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ALSA: hda - Add fixup for Haswell to enable all pin and convertor widgets
[deliverable/linux.git] / sound / pci / hda / patch_hdmi.c
1 /*
2 *
3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
4 *
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 *
10 * Authors:
11 * Wu Fengguang <wfg@linux.intel.com>
12 *
13 * Maintained by:
14 * Wu Fengguang <wfg@linux.intel.com>
15 *
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 * for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
41 #include "hda_jack.h"
42
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46
47 /*
48 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
49 * could support N independent pipes, each of them can be connected to one or
50 * more ports (DVI, HDMI or DisplayPort).
51 *
52 * The HDA correspondence of pipes/ports are converter/pin nodes.
53 */
54 #define MAX_HDMI_CVTS 8
55 #define MAX_HDMI_PINS 8
56
57 struct hdmi_spec_per_cvt {
58 hda_nid_t cvt_nid;
59 int assigned;
60 unsigned int channels_min;
61 unsigned int channels_max;
62 u32 rates;
63 u64 formats;
64 unsigned int maxbps;
65 };
66
67 /* max. connections to a widget */
68 #define HDA_MAX_CONNECTIONS 32
69
70 struct hdmi_spec_per_pin {
71 hda_nid_t pin_nid;
72 int num_mux_nids;
73 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
74
75 struct hda_codec *codec;
76 struct hdmi_eld sink_eld;
77 struct delayed_work work;
78 int repoll_count;
79 bool non_pcm;
80 bool chmap_set; /* channel-map override by ALSA API? */
81 unsigned char chmap[8]; /* ALSA API channel-map */
82 };
83
84 struct hdmi_spec {
85 int num_cvts;
86 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
87
88 int num_pins;
89 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
90 struct hda_pcm pcm_rec[MAX_HDMI_PINS];
91 unsigned int channels_max; /* max over all cvts */
92
93 /*
94 * Non-generic ATI/NVIDIA specific
95 */
96 struct hda_multi_out multiout;
97 struct hda_pcm_stream pcm_playback;
98 };
99
100
101 struct hdmi_audio_infoframe {
102 u8 type; /* 0x84 */
103 u8 ver; /* 0x01 */
104 u8 len; /* 0x0a */
105
106 u8 checksum;
107
108 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
109 u8 SS01_SF24;
110 u8 CXT04;
111 u8 CA;
112 u8 LFEPBL01_LSV36_DM_INH7;
113 };
114
115 struct dp_audio_infoframe {
116 u8 type; /* 0x84 */
117 u8 len; /* 0x1b */
118 u8 ver; /* 0x11 << 2 */
119
120 u8 CC02_CT47; /* match with HDMI infoframe from this on */
121 u8 SS01_SF24;
122 u8 CXT04;
123 u8 CA;
124 u8 LFEPBL01_LSV36_DM_INH7;
125 };
126
127 union audio_infoframe {
128 struct hdmi_audio_infoframe hdmi;
129 struct dp_audio_infoframe dp;
130 u8 bytes[0];
131 };
132
133 /*
134 * CEA speaker placement:
135 *
136 * FLH FCH FRH
137 * FLW FL FLC FC FRC FR FRW
138 *
139 * LFE
140 * TC
141 *
142 * RL RLC RC RRC RR
143 *
144 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
145 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
146 */
147 enum cea_speaker_placement {
148 FL = (1 << 0), /* Front Left */
149 FC = (1 << 1), /* Front Center */
150 FR = (1 << 2), /* Front Right */
151 FLC = (1 << 3), /* Front Left Center */
152 FRC = (1 << 4), /* Front Right Center */
153 RL = (1 << 5), /* Rear Left */
154 RC = (1 << 6), /* Rear Center */
155 RR = (1 << 7), /* Rear Right */
156 RLC = (1 << 8), /* Rear Left Center */
157 RRC = (1 << 9), /* Rear Right Center */
158 LFE = (1 << 10), /* Low Frequency Effect */
159 FLW = (1 << 11), /* Front Left Wide */
160 FRW = (1 << 12), /* Front Right Wide */
161 FLH = (1 << 13), /* Front Left High */
162 FCH = (1 << 14), /* Front Center High */
163 FRH = (1 << 15), /* Front Right High */
164 TC = (1 << 16), /* Top Center */
165 };
166
167 /*
168 * ELD SA bits in the CEA Speaker Allocation data block
169 */
170 static int eld_speaker_allocation_bits[] = {
171 [0] = FL | FR,
172 [1] = LFE,
173 [2] = FC,
174 [3] = RL | RR,
175 [4] = RC,
176 [5] = FLC | FRC,
177 [6] = RLC | RRC,
178 /* the following are not defined in ELD yet */
179 [7] = FLW | FRW,
180 [8] = FLH | FRH,
181 [9] = TC,
182 [10] = FCH,
183 };
184
185 struct cea_channel_speaker_allocation {
186 int ca_index;
187 int speakers[8];
188
189 /* derived values, just for convenience */
190 int channels;
191 int spk_mask;
192 };
193
194 /*
195 * ALSA sequence is:
196 *
197 * surround40 surround41 surround50 surround51 surround71
198 * ch0 front left = = = =
199 * ch1 front right = = = =
200 * ch2 rear left = = = =
201 * ch3 rear right = = = =
202 * ch4 LFE center center center
203 * ch5 LFE LFE
204 * ch6 side left
205 * ch7 side right
206 *
207 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
208 */
209 static int hdmi_channel_mapping[0x32][8] = {
210 /* stereo */
211 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
212 /* 2.1 */
213 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
214 /* Dolby Surround */
215 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
216 /* surround40 */
217 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
218 /* 4ch */
219 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
220 /* surround41 */
221 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
222 /* surround50 */
223 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
224 /* surround51 */
225 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
226 /* 7.1 */
227 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
228 };
229
230 /*
231 * This is an ordered list!
232 *
233 * The preceding ones have better chances to be selected by
234 * hdmi_channel_allocation().
235 */
236 static struct cea_channel_speaker_allocation channel_allocations[] = {
237 /* channel: 7 6 5 4 3 2 1 0 */
238 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
239 /* 2.1 */
240 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
241 /* Dolby Surround */
242 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
243 /* surround40 */
244 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
245 /* surround41 */
246 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
247 /* surround50 */
248 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
249 /* surround51 */
250 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
251 /* 6.1 */
252 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
253 /* surround71 */
254 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
255
256 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
257 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
258 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
259 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
260 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
261 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
262 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
263 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
264 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
265 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
266 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
267 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
268 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
269 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
270 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
271 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
272 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
273 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
274 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
275 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
276 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
277 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
278 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
279 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
280 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
281 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
282 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
283 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
284 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
285 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
286 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
287 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
288 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
289 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
290 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
291 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
292 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
293 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
294 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
295 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
296 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
297 };
298
299
300 /*
301 * HDMI routines
302 */
303
304 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
305 {
306 int pin_idx;
307
308 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
309 if (spec->pins[pin_idx].pin_nid == pin_nid)
310 return pin_idx;
311
312 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
313 return -EINVAL;
314 }
315
316 static int hinfo_to_pin_index(struct hdmi_spec *spec,
317 struct hda_pcm_stream *hinfo)
318 {
319 int pin_idx;
320
321 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
322 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
323 return pin_idx;
324
325 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
326 return -EINVAL;
327 }
328
329 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
330 {
331 int cvt_idx;
332
333 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
334 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
335 return cvt_idx;
336
337 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
338 return -EINVAL;
339 }
340
341 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
342 struct snd_ctl_elem_info *uinfo)
343 {
344 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
345 struct hdmi_spec *spec;
346 int pin_idx;
347
348 spec = codec->spec;
349 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
350
351 pin_idx = kcontrol->private_value;
352 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
353
354 return 0;
355 }
356
357 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
358 struct snd_ctl_elem_value *ucontrol)
359 {
360 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
361 struct hdmi_spec *spec;
362 int pin_idx;
363
364 spec = codec->spec;
365 pin_idx = kcontrol->private_value;
366
367 memcpy(ucontrol->value.bytes.data,
368 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
369
370 return 0;
371 }
372
373 static struct snd_kcontrol_new eld_bytes_ctl = {
374 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
375 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
376 .name = "ELD",
377 .info = hdmi_eld_ctl_info,
378 .get = hdmi_eld_ctl_get,
379 };
380
381 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
382 int device)
383 {
384 struct snd_kcontrol *kctl;
385 struct hdmi_spec *spec = codec->spec;
386 int err;
387
388 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
389 if (!kctl)
390 return -ENOMEM;
391 kctl->private_value = pin_idx;
392 kctl->id.device = device;
393
394 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
395 if (err < 0)
396 return err;
397
398 return 0;
399 }
400
401 #ifdef BE_PARANOID
402 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
403 int *packet_index, int *byte_index)
404 {
405 int val;
406
407 val = snd_hda_codec_read(codec, pin_nid, 0,
408 AC_VERB_GET_HDMI_DIP_INDEX, 0);
409
410 *packet_index = val >> 5;
411 *byte_index = val & 0x1f;
412 }
413 #endif
414
415 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
416 int packet_index, int byte_index)
417 {
418 int val;
419
420 val = (packet_index << 5) | (byte_index & 0x1f);
421
422 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
423 }
424
425 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
426 unsigned char val)
427 {
428 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
429 }
430
431 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
432 {
433 /* Unmute */
434 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
435 snd_hda_codec_write(codec, pin_nid, 0,
436 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
437 /* Enable pin out: some machines with GM965 gets broken output when
438 * the pin is disabled or changed while using with HDMI
439 */
440 snd_hda_codec_write(codec, pin_nid, 0,
441 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
442 }
443
444 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
445 {
446 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
447 AC_VERB_GET_CVT_CHAN_COUNT, 0);
448 }
449
450 static void hdmi_set_channel_count(struct hda_codec *codec,
451 hda_nid_t cvt_nid, int chs)
452 {
453 if (chs != hdmi_get_channel_count(codec, cvt_nid))
454 snd_hda_codec_write(codec, cvt_nid, 0,
455 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
456 }
457
458
459 /*
460 * Channel mapping routines
461 */
462
463 /*
464 * Compute derived values in channel_allocations[].
465 */
466 static void init_channel_allocations(void)
467 {
468 int i, j;
469 struct cea_channel_speaker_allocation *p;
470
471 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
472 p = channel_allocations + i;
473 p->channels = 0;
474 p->spk_mask = 0;
475 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
476 if (p->speakers[j]) {
477 p->channels++;
478 p->spk_mask |= p->speakers[j];
479 }
480 }
481 }
482
483 static int get_channel_allocation_order(int ca)
484 {
485 int i;
486
487 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
488 if (channel_allocations[i].ca_index == ca)
489 break;
490 }
491 return i;
492 }
493
494 /*
495 * The transformation takes two steps:
496 *
497 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
498 * spk_mask => (channel_allocations[]) => ai->CA
499 *
500 * TODO: it could select the wrong CA from multiple candidates.
501 */
502 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
503 {
504 int i;
505 int ca = 0;
506 int spk_mask = 0;
507 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
508
509 /*
510 * CA defaults to 0 for basic stereo audio
511 */
512 if (channels <= 2)
513 return 0;
514
515 /*
516 * expand ELD's speaker allocation mask
517 *
518 * ELD tells the speaker mask in a compact(paired) form,
519 * expand ELD's notions to match the ones used by Audio InfoFrame.
520 */
521 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
522 if (eld->spk_alloc & (1 << i))
523 spk_mask |= eld_speaker_allocation_bits[i];
524 }
525
526 /* search for the first working match in the CA table */
527 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
528 if (channels == channel_allocations[i].channels &&
529 (spk_mask & channel_allocations[i].spk_mask) ==
530 channel_allocations[i].spk_mask) {
531 ca = channel_allocations[i].ca_index;
532 break;
533 }
534 }
535
536 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
537 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
538 ca, channels, buf);
539
540 return ca;
541 }
542
543 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
544 hda_nid_t pin_nid)
545 {
546 #ifdef CONFIG_SND_DEBUG_VERBOSE
547 int i;
548 int slot;
549
550 for (i = 0; i < 8; i++) {
551 slot = snd_hda_codec_read(codec, pin_nid, 0,
552 AC_VERB_GET_HDMI_CHAN_SLOT, i);
553 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
554 slot >> 4, slot & 0xf);
555 }
556 #endif
557 }
558
559
560 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
561 hda_nid_t pin_nid,
562 bool non_pcm,
563 int ca)
564 {
565 int i;
566 int err;
567 int order;
568 int non_pcm_mapping[8];
569
570 order = get_channel_allocation_order(ca);
571
572 if (hdmi_channel_mapping[ca][1] == 0) {
573 for (i = 0; i < channel_allocations[order].channels; i++)
574 hdmi_channel_mapping[ca][i] = i | (i << 4);
575 for (; i < 8; i++)
576 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
577 }
578
579 if (non_pcm) {
580 for (i = 0; i < channel_allocations[order].channels; i++)
581 non_pcm_mapping[i] = i | (i << 4);
582 for (; i < 8; i++)
583 non_pcm_mapping[i] = 0xf | (i << 4);
584 }
585
586 for (i = 0; i < 8; i++) {
587 err = snd_hda_codec_write(codec, pin_nid, 0,
588 AC_VERB_SET_HDMI_CHAN_SLOT,
589 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
590 if (err) {
591 snd_printdd(KERN_NOTICE
592 "HDMI: channel mapping failed\n");
593 break;
594 }
595 }
596
597 hdmi_debug_channel_mapping(codec, pin_nid);
598 }
599
600 struct channel_map_table {
601 unsigned char map; /* ALSA API channel map position */
602 unsigned char cea_slot; /* CEA slot value */
603 int spk_mask; /* speaker position bit mask */
604 };
605
606 static struct channel_map_table map_tables[] = {
607 { SNDRV_CHMAP_FL, 0x00, FL },
608 { SNDRV_CHMAP_FR, 0x01, FR },
609 { SNDRV_CHMAP_RL, 0x04, RL },
610 { SNDRV_CHMAP_RR, 0x05, RR },
611 { SNDRV_CHMAP_LFE, 0x02, LFE },
612 { SNDRV_CHMAP_FC, 0x03, FC },
613 { SNDRV_CHMAP_RLC, 0x06, RLC },
614 { SNDRV_CHMAP_RRC, 0x07, RRC },
615 {} /* terminator */
616 };
617
618 /* from ALSA API channel position to speaker bit mask */
619 static int to_spk_mask(unsigned char c)
620 {
621 struct channel_map_table *t = map_tables;
622 for (; t->map; t++) {
623 if (t->map == c)
624 return t->spk_mask;
625 }
626 return 0;
627 }
628
629 /* from ALSA API channel position to CEA slot */
630 static int to_cea_slot(unsigned char c)
631 {
632 struct channel_map_table *t = map_tables;
633 for (; t->map; t++) {
634 if (t->map == c)
635 return t->cea_slot;
636 }
637 return 0x0f;
638 }
639
640 /* from CEA slot to ALSA API channel position */
641 static int from_cea_slot(unsigned char c)
642 {
643 struct channel_map_table *t = map_tables;
644 for (; t->map; t++) {
645 if (t->cea_slot == c)
646 return t->map;
647 }
648 return 0;
649 }
650
651 /* from speaker bit mask to ALSA API channel position */
652 static int spk_to_chmap(int spk)
653 {
654 struct channel_map_table *t = map_tables;
655 for (; t->map; t++) {
656 if (t->spk_mask == spk)
657 return t->map;
658 }
659 return 0;
660 }
661
662 /* get the CA index corresponding to the given ALSA API channel map */
663 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
664 {
665 int i, spks = 0, spk_mask = 0;
666
667 for (i = 0; i < chs; i++) {
668 int mask = to_spk_mask(map[i]);
669 if (mask) {
670 spk_mask |= mask;
671 spks++;
672 }
673 }
674
675 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
676 if ((chs == channel_allocations[i].channels ||
677 spks == channel_allocations[i].channels) &&
678 (spk_mask & channel_allocations[i].spk_mask) ==
679 channel_allocations[i].spk_mask)
680 return channel_allocations[i].ca_index;
681 }
682 return -1;
683 }
684
685 /* set up the channel slots for the given ALSA API channel map */
686 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
687 hda_nid_t pin_nid,
688 int chs, unsigned char *map)
689 {
690 int i;
691 for (i = 0; i < 8; i++) {
692 int val, err;
693 if (i < chs)
694 val = to_cea_slot(map[i]);
695 else
696 val = 0xf;
697 val |= (i << 4);
698 err = snd_hda_codec_write(codec, pin_nid, 0,
699 AC_VERB_SET_HDMI_CHAN_SLOT, val);
700 if (err)
701 return -EINVAL;
702 }
703 return 0;
704 }
705
706 /* store ALSA API channel map from the current default map */
707 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
708 {
709 int i;
710 for (i = 0; i < 8; i++) {
711 if (i < channel_allocations[ca].channels)
712 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
713 else
714 map[i] = 0;
715 }
716 }
717
718 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
719 hda_nid_t pin_nid, bool non_pcm, int ca,
720 int channels, unsigned char *map,
721 bool chmap_set)
722 {
723 if (!non_pcm && chmap_set) {
724 hdmi_manual_setup_channel_mapping(codec, pin_nid,
725 channels, map);
726 } else {
727 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
728 hdmi_setup_fake_chmap(map, ca);
729 }
730 }
731
732 /*
733 * Audio InfoFrame routines
734 */
735
736 /*
737 * Enable Audio InfoFrame Transmission
738 */
739 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
740 hda_nid_t pin_nid)
741 {
742 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
743 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
744 AC_DIPXMIT_BEST);
745 }
746
747 /*
748 * Disable Audio InfoFrame Transmission
749 */
750 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
751 hda_nid_t pin_nid)
752 {
753 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
754 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
755 AC_DIPXMIT_DISABLE);
756 }
757
758 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
759 {
760 #ifdef CONFIG_SND_DEBUG_VERBOSE
761 int i;
762 int size;
763
764 size = snd_hdmi_get_eld_size(codec, pin_nid);
765 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
766
767 for (i = 0; i < 8; i++) {
768 size = snd_hda_codec_read(codec, pin_nid, 0,
769 AC_VERB_GET_HDMI_DIP_SIZE, i);
770 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
771 }
772 #endif
773 }
774
775 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
776 {
777 #ifdef BE_PARANOID
778 int i, j;
779 int size;
780 int pi, bi;
781 for (i = 0; i < 8; i++) {
782 size = snd_hda_codec_read(codec, pin_nid, 0,
783 AC_VERB_GET_HDMI_DIP_SIZE, i);
784 if (size == 0)
785 continue;
786
787 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
788 for (j = 1; j < 1000; j++) {
789 hdmi_write_dip_byte(codec, pin_nid, 0x0);
790 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
791 if (pi != i)
792 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
793 bi, pi, i);
794 if (bi == 0) /* byte index wrapped around */
795 break;
796 }
797 snd_printd(KERN_INFO
798 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
799 i, size, j);
800 }
801 #endif
802 }
803
804 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
805 {
806 u8 *bytes = (u8 *)hdmi_ai;
807 u8 sum = 0;
808 int i;
809
810 hdmi_ai->checksum = 0;
811
812 for (i = 0; i < sizeof(*hdmi_ai); i++)
813 sum += bytes[i];
814
815 hdmi_ai->checksum = -sum;
816 }
817
818 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
819 hda_nid_t pin_nid,
820 u8 *dip, int size)
821 {
822 int i;
823
824 hdmi_debug_dip_size(codec, pin_nid);
825 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
826
827 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
828 for (i = 0; i < size; i++)
829 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
830 }
831
832 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
833 u8 *dip, int size)
834 {
835 u8 val;
836 int i;
837
838 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
839 != AC_DIPXMIT_BEST)
840 return false;
841
842 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
843 for (i = 0; i < size; i++) {
844 val = snd_hda_codec_read(codec, pin_nid, 0,
845 AC_VERB_GET_HDMI_DIP_DATA, 0);
846 if (val != dip[i])
847 return false;
848 }
849
850 return true;
851 }
852
853 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
854 bool non_pcm,
855 struct snd_pcm_substream *substream)
856 {
857 struct hdmi_spec *spec = codec->spec;
858 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
859 hda_nid_t pin_nid = per_pin->pin_nid;
860 int channels = substream->runtime->channels;
861 struct hdmi_eld *eld;
862 int ca;
863 union audio_infoframe ai;
864
865 eld = &spec->pins[pin_idx].sink_eld;
866 if (!eld->monitor_present)
867 return;
868
869 if (!non_pcm && per_pin->chmap_set)
870 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
871 else
872 ca = hdmi_channel_allocation(eld, channels);
873 if (ca < 0)
874 ca = 0;
875
876 memset(&ai, 0, sizeof(ai));
877 if (eld->conn_type == 0) { /* HDMI */
878 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
879
880 hdmi_ai->type = 0x84;
881 hdmi_ai->ver = 0x01;
882 hdmi_ai->len = 0x0a;
883 hdmi_ai->CC02_CT47 = channels - 1;
884 hdmi_ai->CA = ca;
885 hdmi_checksum_audio_infoframe(hdmi_ai);
886 } else if (eld->conn_type == 1) { /* DisplayPort */
887 struct dp_audio_infoframe *dp_ai = &ai.dp;
888
889 dp_ai->type = 0x84;
890 dp_ai->len = 0x1b;
891 dp_ai->ver = 0x11 << 2;
892 dp_ai->CC02_CT47 = channels - 1;
893 dp_ai->CA = ca;
894 } else {
895 snd_printd("HDMI: unknown connection type at pin %d\n",
896 pin_nid);
897 return;
898 }
899
900 /*
901 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
902 * sizeof(*dp_ai) to avoid partial match/update problems when
903 * the user switches between HDMI/DP monitors.
904 */
905 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
906 sizeof(ai))) {
907 snd_printdd("hdmi_setup_audio_infoframe: "
908 "pin=%d channels=%d\n",
909 pin_nid,
910 channels);
911 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
912 channels, per_pin->chmap,
913 per_pin->chmap_set);
914 hdmi_stop_infoframe_trans(codec, pin_nid);
915 hdmi_fill_audio_infoframe(codec, pin_nid,
916 ai.bytes, sizeof(ai));
917 hdmi_start_infoframe_trans(codec, pin_nid);
918 } else {
919 /* For non-pcm audio switch, setup new channel mapping
920 * accordingly */
921 if (per_pin->non_pcm != non_pcm)
922 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
923 channels, per_pin->chmap,
924 per_pin->chmap_set);
925 }
926
927 per_pin->non_pcm = non_pcm;
928 }
929
930
931 /*
932 * Unsolicited events
933 */
934
935 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
936
937 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
938 {
939 struct hdmi_spec *spec = codec->spec;
940 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
941 int pin_nid;
942 int pin_idx;
943 struct hda_jack_tbl *jack;
944
945 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
946 if (!jack)
947 return;
948 pin_nid = jack->nid;
949 jack->jack_dirty = 1;
950
951 _snd_printd(SND_PR_VERBOSE,
952 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
953 codec->addr, pin_nid,
954 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
955
956 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
957 if (pin_idx < 0)
958 return;
959
960 hdmi_present_sense(&spec->pins[pin_idx], 1);
961 snd_hda_jack_report_sync(codec);
962 }
963
964 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
965 {
966 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
967 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
968 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
969 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
970
971 printk(KERN_INFO
972 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
973 codec->addr,
974 tag,
975 subtag,
976 cp_state,
977 cp_ready);
978
979 /* TODO */
980 if (cp_state)
981 ;
982 if (cp_ready)
983 ;
984 }
985
986
987 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
988 {
989 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
990 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
991
992 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
993 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
994 return;
995 }
996
997 if (subtag == 0)
998 hdmi_intrinsic_event(codec, res);
999 else
1000 hdmi_non_intrinsic_event(codec, res);
1001 }
1002
1003 /*
1004 * Callbacks
1005 */
1006
1007 /* HBR should be Non-PCM, 8 channels */
1008 #define is_hbr_format(format) \
1009 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1010
1011 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1012 hda_nid_t pin_nid, u32 stream_tag, int format)
1013 {
1014 int pinctl;
1015 int new_pinctl = 0;
1016
1017 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1018 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1019 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1020
1021 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1022 if (is_hbr_format(format))
1023 new_pinctl |= AC_PINCTL_EPT_HBR;
1024 else
1025 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1026
1027 snd_printdd("hdmi_setup_stream: "
1028 "NID=0x%x, %spinctl=0x%x\n",
1029 pin_nid,
1030 pinctl == new_pinctl ? "" : "new-",
1031 new_pinctl);
1032
1033 if (pinctl != new_pinctl)
1034 snd_hda_codec_write(codec, pin_nid, 0,
1035 AC_VERB_SET_PIN_WIDGET_CONTROL,
1036 new_pinctl);
1037
1038 }
1039 if (is_hbr_format(format) && !new_pinctl) {
1040 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1041 return -EINVAL;
1042 }
1043
1044 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1045 return 0;
1046 }
1047
1048 /*
1049 * HDA PCM callbacks
1050 */
1051 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1052 struct hda_codec *codec,
1053 struct snd_pcm_substream *substream)
1054 {
1055 struct hdmi_spec *spec = codec->spec;
1056 struct snd_pcm_runtime *runtime = substream->runtime;
1057 int pin_idx, cvt_idx, mux_idx = 0;
1058 struct hdmi_spec_per_pin *per_pin;
1059 struct hdmi_eld *eld;
1060 struct hdmi_spec_per_cvt *per_cvt = NULL;
1061
1062 /* Validate hinfo */
1063 pin_idx = hinfo_to_pin_index(spec, hinfo);
1064 if (snd_BUG_ON(pin_idx < 0))
1065 return -EINVAL;
1066 per_pin = &spec->pins[pin_idx];
1067 eld = &per_pin->sink_eld;
1068
1069 /* Dynamically assign converter to stream */
1070 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1071 per_cvt = &spec->cvts[cvt_idx];
1072
1073 /* Must not already be assigned */
1074 if (per_cvt->assigned)
1075 continue;
1076 /* Must be in pin's mux's list of converters */
1077 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1078 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1079 break;
1080 /* Not in mux list */
1081 if (mux_idx == per_pin->num_mux_nids)
1082 continue;
1083 break;
1084 }
1085 /* No free converters */
1086 if (cvt_idx == spec->num_cvts)
1087 return -ENODEV;
1088
1089 /* Claim converter */
1090 per_cvt->assigned = 1;
1091 hinfo->nid = per_cvt->cvt_nid;
1092
1093 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1094 AC_VERB_SET_CONNECT_SEL,
1095 mux_idx);
1096 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1097
1098 /* Initially set the converter's capabilities */
1099 hinfo->channels_min = per_cvt->channels_min;
1100 hinfo->channels_max = per_cvt->channels_max;
1101 hinfo->rates = per_cvt->rates;
1102 hinfo->formats = per_cvt->formats;
1103 hinfo->maxbps = per_cvt->maxbps;
1104
1105 /* Restrict capabilities by ELD if this isn't disabled */
1106 if (!static_hdmi_pcm && eld->eld_valid) {
1107 snd_hdmi_eld_update_pcm_info(eld, hinfo);
1108 if (hinfo->channels_min > hinfo->channels_max ||
1109 !hinfo->rates || !hinfo->formats) {
1110 per_cvt->assigned = 0;
1111 hinfo->nid = 0;
1112 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1113 return -ENODEV;
1114 }
1115 }
1116
1117 /* Store the updated parameters */
1118 runtime->hw.channels_min = hinfo->channels_min;
1119 runtime->hw.channels_max = hinfo->channels_max;
1120 runtime->hw.formats = hinfo->formats;
1121 runtime->hw.rates = hinfo->rates;
1122
1123 snd_pcm_hw_constraint_step(substream->runtime, 0,
1124 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1125 return 0;
1126 }
1127
1128 /*
1129 * HDA/HDMI auto parsing
1130 */
1131 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1132 {
1133 struct hdmi_spec *spec = codec->spec;
1134 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1135 hda_nid_t pin_nid = per_pin->pin_nid;
1136
1137 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1138 snd_printk(KERN_WARNING
1139 "HDMI: pin %d wcaps %#x "
1140 "does not support connection list\n",
1141 pin_nid, get_wcaps(codec, pin_nid));
1142 return -EINVAL;
1143 }
1144
1145 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1146 per_pin->mux_nids,
1147 HDA_MAX_CONNECTIONS);
1148
1149 return 0;
1150 }
1151
1152 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1153 {
1154 struct hda_codec *codec = per_pin->codec;
1155 struct hdmi_eld *eld = &per_pin->sink_eld;
1156 hda_nid_t pin_nid = per_pin->pin_nid;
1157 /*
1158 * Always execute a GetPinSense verb here, even when called from
1159 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1160 * response's PD bit is not the real PD value, but indicates that
1161 * the real PD value changed. An older version of the HD-audio
1162 * specification worked this way. Hence, we just ignore the data in
1163 * the unsolicited response to avoid custom WARs.
1164 */
1165 int present = snd_hda_pin_sense(codec, pin_nid);
1166 bool eld_valid = false;
1167
1168 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1169
1170 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1171 if (eld->monitor_present)
1172 eld_valid = !!(present & AC_PINSENSE_ELDV);
1173
1174 _snd_printd(SND_PR_VERBOSE,
1175 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1176 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1177
1178 if (eld_valid) {
1179 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1180 snd_hdmi_show_eld(eld);
1181 else if (repoll) {
1182 queue_delayed_work(codec->bus->workq,
1183 &per_pin->work,
1184 msecs_to_jiffies(300));
1185 }
1186 }
1187 }
1188
1189 static void hdmi_repoll_eld(struct work_struct *work)
1190 {
1191 struct hdmi_spec_per_pin *per_pin =
1192 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1193
1194 if (per_pin->repoll_count++ > 6)
1195 per_pin->repoll_count = 0;
1196
1197 hdmi_present_sense(per_pin, per_pin->repoll_count);
1198 }
1199
1200 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1201 {
1202 struct hdmi_spec *spec = codec->spec;
1203 unsigned int caps, config;
1204 int pin_idx;
1205 struct hdmi_spec_per_pin *per_pin;
1206 int err;
1207
1208 caps = snd_hda_query_pin_caps(codec, pin_nid);
1209 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1210 return 0;
1211
1212 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1213 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1214 return 0;
1215
1216 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1217 return -E2BIG;
1218
1219 pin_idx = spec->num_pins;
1220 per_pin = &spec->pins[pin_idx];
1221
1222 per_pin->pin_nid = pin_nid;
1223 per_pin->non_pcm = false;
1224
1225 err = hdmi_read_pin_conn(codec, pin_idx);
1226 if (err < 0)
1227 return err;
1228
1229 spec->num_pins++;
1230
1231 return 0;
1232 }
1233
1234 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1235 {
1236 struct hdmi_spec *spec = codec->spec;
1237 int cvt_idx;
1238 struct hdmi_spec_per_cvt *per_cvt;
1239 unsigned int chans;
1240 int err;
1241
1242 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1243 return -E2BIG;
1244
1245 chans = get_wcaps(codec, cvt_nid);
1246 chans = get_wcaps_channels(chans);
1247
1248 cvt_idx = spec->num_cvts;
1249 per_cvt = &spec->cvts[cvt_idx];
1250
1251 per_cvt->cvt_nid = cvt_nid;
1252 per_cvt->channels_min = 2;
1253 if (chans <= 16) {
1254 per_cvt->channels_max = chans;
1255 if (chans > spec->channels_max)
1256 spec->channels_max = chans;
1257 }
1258
1259 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1260 &per_cvt->rates,
1261 &per_cvt->formats,
1262 &per_cvt->maxbps);
1263 if (err < 0)
1264 return err;
1265
1266 spec->num_cvts++;
1267
1268 return 0;
1269 }
1270
1271 static int hdmi_parse_codec(struct hda_codec *codec)
1272 {
1273 hda_nid_t nid;
1274 int i, nodes;
1275
1276 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1277 if (!nid || nodes < 0) {
1278 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1279 return -EINVAL;
1280 }
1281
1282 for (i = 0; i < nodes; i++, nid++) {
1283 unsigned int caps;
1284 unsigned int type;
1285
1286 caps = get_wcaps(codec, nid);
1287 type = get_wcaps_type(caps);
1288
1289 if (!(caps & AC_WCAP_DIGITAL))
1290 continue;
1291
1292 switch (type) {
1293 case AC_WID_AUD_OUT:
1294 hdmi_add_cvt(codec, nid);
1295 break;
1296 case AC_WID_PIN:
1297 hdmi_add_pin(codec, nid);
1298 break;
1299 }
1300 }
1301
1302 #ifdef CONFIG_PM
1303 /* We're seeing some problems with unsolicited hot plug events on
1304 * PantherPoint after S3, if this is not enabled */
1305 if (codec->vendor_id == 0x80862806)
1306 codec->bus->power_keep_link_on = 1;
1307 /*
1308 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1309 * can be lost and presence sense verb will become inaccurate if the
1310 * HDA link is powered off at hot plug or hw initialization time.
1311 */
1312 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1313 AC_PWRST_EPSS))
1314 codec->bus->power_keep_link_on = 1;
1315 #endif
1316
1317 return 0;
1318 }
1319
1320 /*
1321 */
1322 static char *get_hdmi_pcm_name(int idx)
1323 {
1324 static char names[MAX_HDMI_PINS][8];
1325 sprintf(&names[idx][0], "HDMI %d", idx);
1326 return &names[idx][0];
1327 }
1328
1329 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1330 {
1331 struct hda_spdif_out *spdif;
1332 bool non_pcm;
1333
1334 mutex_lock(&codec->spdif_mutex);
1335 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1336 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1337 mutex_unlock(&codec->spdif_mutex);
1338 return non_pcm;
1339 }
1340
1341
1342 /*
1343 * HDMI callbacks
1344 */
1345
1346 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1347 struct hda_codec *codec,
1348 unsigned int stream_tag,
1349 unsigned int format,
1350 struct snd_pcm_substream *substream)
1351 {
1352 hda_nid_t cvt_nid = hinfo->nid;
1353 struct hdmi_spec *spec = codec->spec;
1354 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1355 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1356 bool non_pcm;
1357
1358 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1359
1360 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1361
1362 hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1363
1364 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1365 }
1366
1367 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1368 struct hda_codec *codec,
1369 struct snd_pcm_substream *substream)
1370 {
1371 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1372 return 0;
1373 }
1374
1375 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1376 struct hda_codec *codec,
1377 struct snd_pcm_substream *substream)
1378 {
1379 struct hdmi_spec *spec = codec->spec;
1380 int cvt_idx, pin_idx;
1381 struct hdmi_spec_per_cvt *per_cvt;
1382 struct hdmi_spec_per_pin *per_pin;
1383
1384 if (hinfo->nid) {
1385 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1386 if (snd_BUG_ON(cvt_idx < 0))
1387 return -EINVAL;
1388 per_cvt = &spec->cvts[cvt_idx];
1389
1390 snd_BUG_ON(!per_cvt->assigned);
1391 per_cvt->assigned = 0;
1392 hinfo->nid = 0;
1393
1394 pin_idx = hinfo_to_pin_index(spec, hinfo);
1395 if (snd_BUG_ON(pin_idx < 0))
1396 return -EINVAL;
1397 per_pin = &spec->pins[pin_idx];
1398
1399 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1400 per_pin->chmap_set = false;
1401 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1402 }
1403
1404 return 0;
1405 }
1406
1407 static const struct hda_pcm_ops generic_ops = {
1408 .open = hdmi_pcm_open,
1409 .close = hdmi_pcm_close,
1410 .prepare = generic_hdmi_playback_pcm_prepare,
1411 .cleanup = generic_hdmi_playback_pcm_cleanup,
1412 };
1413
1414 /*
1415 * ALSA API channel-map control callbacks
1416 */
1417 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1418 struct snd_ctl_elem_info *uinfo)
1419 {
1420 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1421 struct hda_codec *codec = info->private_data;
1422 struct hdmi_spec *spec = codec->spec;
1423 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1424 uinfo->count = spec->channels_max;
1425 uinfo->value.integer.min = 0;
1426 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1427 return 0;
1428 }
1429
1430 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1431 unsigned int size, unsigned int __user *tlv)
1432 {
1433 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1434 struct hda_codec *codec = info->private_data;
1435 struct hdmi_spec *spec = codec->spec;
1436 const unsigned int valid_mask =
1437 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1438 unsigned int __user *dst;
1439 int chs, count = 0;
1440
1441 if (size < 8)
1442 return -ENOMEM;
1443 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1444 return -EFAULT;
1445 size -= 8;
1446 dst = tlv + 2;
1447 for (chs = 2; chs <= spec->channels_max; chs++) {
1448 int i, c;
1449 struct cea_channel_speaker_allocation *cap;
1450 cap = channel_allocations;
1451 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1452 int chs_bytes = chs * 4;
1453 if (cap->channels != chs)
1454 continue;
1455 if (cap->spk_mask & ~valid_mask)
1456 continue;
1457 if (size < 8)
1458 return -ENOMEM;
1459 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1460 put_user(chs_bytes, dst + 1))
1461 return -EFAULT;
1462 dst += 2;
1463 size -= 8;
1464 count += 8;
1465 if (size < chs_bytes)
1466 return -ENOMEM;
1467 size -= chs_bytes;
1468 count += chs_bytes;
1469 for (c = 7; c >= 0; c--) {
1470 int spk = cap->speakers[c];
1471 if (!spk)
1472 continue;
1473 if (put_user(spk_to_chmap(spk), dst))
1474 return -EFAULT;
1475 dst++;
1476 }
1477 }
1478 }
1479 if (put_user(count, tlv + 1))
1480 return -EFAULT;
1481 return 0;
1482 }
1483
1484 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1485 struct snd_ctl_elem_value *ucontrol)
1486 {
1487 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1488 struct hda_codec *codec = info->private_data;
1489 struct hdmi_spec *spec = codec->spec;
1490 int pin_idx = kcontrol->private_value;
1491 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1492 int i;
1493
1494 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1495 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1496 return 0;
1497 }
1498
1499 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1500 struct snd_ctl_elem_value *ucontrol)
1501 {
1502 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1503 struct hda_codec *codec = info->private_data;
1504 struct hdmi_spec *spec = codec->spec;
1505 int pin_idx = kcontrol->private_value;
1506 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1507 unsigned int ctl_idx;
1508 struct snd_pcm_substream *substream;
1509 unsigned char chmap[8];
1510 int i, ca, prepared = 0;
1511
1512 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1513 substream = snd_pcm_chmap_substream(info, ctl_idx);
1514 if (!substream || !substream->runtime)
1515 return 0; /* just for avoiding error from alsactl restore */
1516 switch (substream->runtime->status->state) {
1517 case SNDRV_PCM_STATE_OPEN:
1518 case SNDRV_PCM_STATE_SETUP:
1519 break;
1520 case SNDRV_PCM_STATE_PREPARED:
1521 prepared = 1;
1522 break;
1523 default:
1524 return -EBUSY;
1525 }
1526 memset(chmap, 0, sizeof(chmap));
1527 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1528 chmap[i] = ucontrol->value.integer.value[i];
1529 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1530 return 0;
1531 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1532 if (ca < 0)
1533 return -EINVAL;
1534 per_pin->chmap_set = true;
1535 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1536 if (prepared)
1537 hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
1538 substream);
1539
1540 return 0;
1541 }
1542
1543 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1544 {
1545 struct hdmi_spec *spec = codec->spec;
1546 int pin_idx;
1547
1548 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1549 struct hda_pcm *info;
1550 struct hda_pcm_stream *pstr;
1551
1552 info = &spec->pcm_rec[pin_idx];
1553 info->name = get_hdmi_pcm_name(pin_idx);
1554 info->pcm_type = HDA_PCM_TYPE_HDMI;
1555 info->own_chmap = true;
1556
1557 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1558 pstr->substreams = 1;
1559 pstr->ops = generic_ops;
1560 /* other pstr fields are set in open */
1561 }
1562
1563 codec->num_pcms = spec->num_pins;
1564 codec->pcm_info = spec->pcm_rec;
1565
1566 return 0;
1567 }
1568
1569 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1570 {
1571 char hdmi_str[32] = "HDMI/DP";
1572 struct hdmi_spec *spec = codec->spec;
1573 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1574 int pcmdev = spec->pcm_rec[pin_idx].device;
1575
1576 if (pcmdev > 0)
1577 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1578
1579 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1580 }
1581
1582 static int generic_hdmi_build_controls(struct hda_codec *codec)
1583 {
1584 struct hdmi_spec *spec = codec->spec;
1585 int err;
1586 int pin_idx;
1587
1588 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1589 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1590
1591 err = generic_hdmi_build_jack(codec, pin_idx);
1592 if (err < 0)
1593 return err;
1594
1595 err = snd_hda_create_dig_out_ctls(codec,
1596 per_pin->pin_nid,
1597 per_pin->mux_nids[0],
1598 HDA_PCM_TYPE_HDMI);
1599 if (err < 0)
1600 return err;
1601 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1602
1603 /* add control for ELD Bytes */
1604 err = hdmi_create_eld_ctl(codec,
1605 pin_idx,
1606 spec->pcm_rec[pin_idx].device);
1607
1608 if (err < 0)
1609 return err;
1610
1611 hdmi_present_sense(per_pin, 0);
1612 }
1613
1614 /* add channel maps */
1615 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1616 struct snd_pcm_chmap *chmap;
1617 struct snd_kcontrol *kctl;
1618 int i;
1619 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1620 SNDRV_PCM_STREAM_PLAYBACK,
1621 NULL, 0, pin_idx, &chmap);
1622 if (err < 0)
1623 return err;
1624 /* override handlers */
1625 chmap->private_data = codec;
1626 kctl = chmap->kctl;
1627 for (i = 0; i < kctl->count; i++)
1628 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1629 kctl->info = hdmi_chmap_ctl_info;
1630 kctl->get = hdmi_chmap_ctl_get;
1631 kctl->put = hdmi_chmap_ctl_put;
1632 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1633 }
1634
1635 return 0;
1636 }
1637
1638 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1639 {
1640 struct hdmi_spec *spec = codec->spec;
1641 int pin_idx;
1642
1643 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1644 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1645 struct hdmi_eld *eld = &per_pin->sink_eld;
1646
1647 per_pin->codec = codec;
1648 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1649 snd_hda_eld_proc_new(codec, eld, pin_idx);
1650 }
1651 return 0;
1652 }
1653
1654 static int generic_hdmi_init(struct hda_codec *codec)
1655 {
1656 struct hdmi_spec *spec = codec->spec;
1657 int pin_idx;
1658
1659 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1660 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1661 hda_nid_t pin_nid = per_pin->pin_nid;
1662
1663 hdmi_init_pin(codec, pin_nid);
1664 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1665 }
1666 return 0;
1667 }
1668
1669 static void generic_hdmi_free(struct hda_codec *codec)
1670 {
1671 struct hdmi_spec *spec = codec->spec;
1672 int pin_idx;
1673
1674 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1675 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1676 struct hdmi_eld *eld = &per_pin->sink_eld;
1677
1678 cancel_delayed_work(&per_pin->work);
1679 snd_hda_eld_proc_free(codec, eld);
1680 }
1681
1682 flush_workqueue(codec->bus->workq);
1683 kfree(spec);
1684 }
1685
1686 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1687 .init = generic_hdmi_init,
1688 .free = generic_hdmi_free,
1689 .build_pcms = generic_hdmi_build_pcms,
1690 .build_controls = generic_hdmi_build_controls,
1691 .unsol_event = hdmi_unsol_event,
1692 };
1693
1694 static void intel_haswell_fixup_connect_list(struct hda_codec *codec)
1695 {
1696 unsigned int vendor_param;
1697 hda_nid_t list[3] = {0x2, 0x3, 0x4};
1698
1699 vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
1700 if (vendor_param == -1 || vendor_param & 0x02)
1701 return;
1702
1703 /* enable DP1.2 mode */
1704 vendor_param |= 0x02;
1705 snd_hda_codec_read(codec, 0x08, 0, 0x781, vendor_param);
1706
1707 vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
1708 if (vendor_param == -1 || !(vendor_param & 0x02))
1709 return;
1710
1711 /* override 3 pins connection list */
1712 snd_hda_override_conn_list(codec, 0x05, 3, list);
1713 snd_hda_override_conn_list(codec, 0x06, 3, list);
1714 snd_hda_override_conn_list(codec, 0x07, 3, list);
1715 }
1716
1717 #define INTEL_VENDOR_NID 0x08
1718 #define INTEL_GET_VENDOR_VERB 0xf81
1719 #define INTEL_SET_VENDOR_VERB 0x781
1720 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1721 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1722
1723 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1724 const struct hda_fixup *fix, int action)
1725 {
1726 unsigned int vendor_param;
1727
1728 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1729 return;
1730 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1731 INTEL_GET_VENDOR_VERB, 0);
1732 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1733 return;
1734
1735 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1736 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1737 INTEL_SET_VENDOR_VERB, vendor_param);
1738 if (vendor_param == -1)
1739 return;
1740
1741 snd_hda_codec_update_widgets(codec);
1742 return;
1743 }
1744
1745
1746 /* available models for fixup */
1747 enum {
1748 INTEL_HASWELL,
1749 };
1750
1751 static const struct hda_model_fixup hdmi_models[] = {
1752 {.id = INTEL_HASWELL, .name = "Haswell"},
1753 {}
1754 };
1755
1756 static const struct snd_pci_quirk hdmi_fixup_tbl[] = {
1757 SND_PCI_QUIRK(0x8086, 0x2010, "Haswell", INTEL_HASWELL),
1758 {} /* terminator */
1759 };
1760
1761 static const struct hda_fixup hdmi_fixups[] = {
1762 [INTEL_HASWELL] = {
1763 .type = HDA_FIXUP_FUNC,
1764 .v.func = intel_haswell_enable_all_pins,
1765 },
1766 };
1767
1768
1769 static int patch_generic_hdmi(struct hda_codec *codec)
1770 {
1771 struct hdmi_spec *spec;
1772
1773 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1774 if (spec == NULL)
1775 return -ENOMEM;
1776
1777 codec->spec = spec;
1778
1779 snd_hda_pick_fixup(codec, hdmi_models, hdmi_fixup_tbl, hdmi_fixups);
1780 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
1781
1782 if (codec->vendor_id == 0x80862807)
1783 intel_haswell_fixup_connect_list(codec);
1784
1785 if (hdmi_parse_codec(codec) < 0) {
1786 codec->spec = NULL;
1787 kfree(spec);
1788 return -EINVAL;
1789 }
1790 codec->patch_ops = generic_hdmi_patch_ops;
1791 generic_hdmi_init_per_pins(codec);
1792
1793 init_channel_allocations();
1794
1795 return 0;
1796 }
1797
1798 /*
1799 * Shared non-generic implementations
1800 */
1801
1802 static int simple_playback_build_pcms(struct hda_codec *codec)
1803 {
1804 struct hdmi_spec *spec = codec->spec;
1805 struct hda_pcm *info = spec->pcm_rec;
1806 unsigned int chans;
1807 struct hda_pcm_stream *pstr;
1808
1809 codec->num_pcms = 1;
1810 codec->pcm_info = info;
1811
1812 chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
1813 chans = get_wcaps_channels(chans);
1814
1815 info->name = get_hdmi_pcm_name(0);
1816 info->pcm_type = HDA_PCM_TYPE_HDMI;
1817 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1818 *pstr = spec->pcm_playback;
1819 pstr->nid = spec->cvts[0].cvt_nid;
1820 if (pstr->channels_max <= 2 && chans && chans <= 16)
1821 pstr->channels_max = chans;
1822
1823 return 0;
1824 }
1825
1826 /* unsolicited event for jack sensing */
1827 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1828 unsigned int res)
1829 {
1830 snd_hda_jack_set_dirty_all(codec);
1831 snd_hda_jack_report_sync(codec);
1832 }
1833
1834 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1835 * as long as spec->pins[] is set correctly
1836 */
1837 #define simple_hdmi_build_jack generic_hdmi_build_jack
1838
1839 static int simple_playback_build_controls(struct hda_codec *codec)
1840 {
1841 struct hdmi_spec *spec = codec->spec;
1842 int err;
1843
1844 err = snd_hda_create_spdif_out_ctls(codec,
1845 spec->cvts[0].cvt_nid,
1846 spec->cvts[0].cvt_nid);
1847 if (err < 0)
1848 return err;
1849 return simple_hdmi_build_jack(codec, 0);
1850 }
1851
1852 static int simple_playback_init(struct hda_codec *codec)
1853 {
1854 struct hdmi_spec *spec = codec->spec;
1855 hda_nid_t pin = spec->pins[0].pin_nid;
1856
1857 snd_hda_codec_write(codec, pin, 0,
1858 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1859 /* some codecs require to unmute the pin */
1860 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1861 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1862 AMP_OUT_UNMUTE);
1863 snd_hda_jack_detect_enable(codec, pin, pin);
1864 return 0;
1865 }
1866
1867 static void simple_playback_free(struct hda_codec *codec)
1868 {
1869 struct hdmi_spec *spec = codec->spec;
1870
1871 kfree(spec);
1872 }
1873
1874 /*
1875 * Nvidia specific implementations
1876 */
1877
1878 #define Nv_VERB_SET_Channel_Allocation 0xF79
1879 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1880 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1881 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1882
1883 #define nvhdmi_master_con_nid_7x 0x04
1884 #define nvhdmi_master_pin_nid_7x 0x05
1885
1886 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1887 /*front, rear, clfe, rear_surr */
1888 0x6, 0x8, 0xa, 0xc,
1889 };
1890
1891 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
1892 /* set audio protect on */
1893 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1894 /* enable digital output on pin widget */
1895 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1896 {} /* terminator */
1897 };
1898
1899 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
1900 /* set audio protect on */
1901 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1902 /* enable digital output on pin widget */
1903 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1904 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1905 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1906 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1907 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1908 {} /* terminator */
1909 };
1910
1911 #ifdef LIMITED_RATE_FMT_SUPPORT
1912 /* support only the safe format and rate */
1913 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1914 #define SUPPORTED_MAXBPS 16
1915 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1916 #else
1917 /* support all rates and formats */
1918 #define SUPPORTED_RATES \
1919 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1920 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1921 SNDRV_PCM_RATE_192000)
1922 #define SUPPORTED_MAXBPS 24
1923 #define SUPPORTED_FORMATS \
1924 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1925 #endif
1926
1927 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
1928 {
1929 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
1930 return 0;
1931 }
1932
1933 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
1934 {
1935 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
1936 return 0;
1937 }
1938
1939 static unsigned int channels_2_6_8[] = {
1940 2, 6, 8
1941 };
1942
1943 static unsigned int channels_2_8[] = {
1944 2, 8
1945 };
1946
1947 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1948 .count = ARRAY_SIZE(channels_2_6_8),
1949 .list = channels_2_6_8,
1950 .mask = 0,
1951 };
1952
1953 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1954 .count = ARRAY_SIZE(channels_2_8),
1955 .list = channels_2_8,
1956 .mask = 0,
1957 };
1958
1959 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1960 struct hda_codec *codec,
1961 struct snd_pcm_substream *substream)
1962 {
1963 struct hdmi_spec *spec = codec->spec;
1964 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1965
1966 switch (codec->preset->id) {
1967 case 0x10de0002:
1968 case 0x10de0003:
1969 case 0x10de0005:
1970 case 0x10de0006:
1971 hw_constraints_channels = &hw_constraints_2_8_channels;
1972 break;
1973 case 0x10de0007:
1974 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1975 break;
1976 default:
1977 break;
1978 }
1979
1980 if (hw_constraints_channels != NULL) {
1981 snd_pcm_hw_constraint_list(substream->runtime, 0,
1982 SNDRV_PCM_HW_PARAM_CHANNELS,
1983 hw_constraints_channels);
1984 } else {
1985 snd_pcm_hw_constraint_step(substream->runtime, 0,
1986 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1987 }
1988
1989 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1990 }
1991
1992 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1993 struct hda_codec *codec,
1994 struct snd_pcm_substream *substream)
1995 {
1996 struct hdmi_spec *spec = codec->spec;
1997 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1998 }
1999
2000 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2001 struct hda_codec *codec,
2002 unsigned int stream_tag,
2003 unsigned int format,
2004 struct snd_pcm_substream *substream)
2005 {
2006 struct hdmi_spec *spec = codec->spec;
2007 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2008 stream_tag, format, substream);
2009 }
2010
2011 static const struct hda_pcm_stream simple_pcm_playback = {
2012 .substreams = 1,
2013 .channels_min = 2,
2014 .channels_max = 2,
2015 .ops = {
2016 .open = simple_playback_pcm_open,
2017 .close = simple_playback_pcm_close,
2018 .prepare = simple_playback_pcm_prepare
2019 },
2020 };
2021
2022 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2023 .build_controls = simple_playback_build_controls,
2024 .build_pcms = simple_playback_build_pcms,
2025 .init = simple_playback_init,
2026 .free = simple_playback_free,
2027 .unsol_event = simple_hdmi_unsol_event,
2028 };
2029
2030 static int patch_simple_hdmi(struct hda_codec *codec,
2031 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2032 {
2033 struct hdmi_spec *spec;
2034
2035 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2036 if (!spec)
2037 return -ENOMEM;
2038
2039 codec->spec = spec;
2040
2041 spec->multiout.num_dacs = 0; /* no analog */
2042 spec->multiout.max_channels = 2;
2043 spec->multiout.dig_out_nid = cvt_nid;
2044 spec->num_cvts = 1;
2045 spec->num_pins = 1;
2046 spec->cvts[0].cvt_nid = cvt_nid;
2047 spec->pins[0].pin_nid = pin_nid;
2048 spec->pcm_playback = simple_pcm_playback;
2049
2050 codec->patch_ops = simple_hdmi_patch_ops;
2051
2052 return 0;
2053 }
2054
2055 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2056 int channels)
2057 {
2058 unsigned int chanmask;
2059 int chan = channels ? (channels - 1) : 1;
2060
2061 switch (channels) {
2062 default:
2063 case 0:
2064 case 2:
2065 chanmask = 0x00;
2066 break;
2067 case 4:
2068 chanmask = 0x08;
2069 break;
2070 case 6:
2071 chanmask = 0x0b;
2072 break;
2073 case 8:
2074 chanmask = 0x13;
2075 break;
2076 }
2077
2078 /* Set the audio infoframe channel allocation and checksum fields. The
2079 * channel count is computed implicitly by the hardware. */
2080 snd_hda_codec_write(codec, 0x1, 0,
2081 Nv_VERB_SET_Channel_Allocation, chanmask);
2082
2083 snd_hda_codec_write(codec, 0x1, 0,
2084 Nv_VERB_SET_Info_Frame_Checksum,
2085 (0x71 - chan - chanmask));
2086 }
2087
2088 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2089 struct hda_codec *codec,
2090 struct snd_pcm_substream *substream)
2091 {
2092 struct hdmi_spec *spec = codec->spec;
2093 int i;
2094
2095 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2096 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2097 for (i = 0; i < 4; i++) {
2098 /* set the stream id */
2099 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2100 AC_VERB_SET_CHANNEL_STREAMID, 0);
2101 /* set the stream format */
2102 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2103 AC_VERB_SET_STREAM_FORMAT, 0);
2104 }
2105
2106 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2107 * streams are disabled. */
2108 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2109
2110 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2111 }
2112
2113 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2114 struct hda_codec *codec,
2115 unsigned int stream_tag,
2116 unsigned int format,
2117 struct snd_pcm_substream *substream)
2118 {
2119 int chs;
2120 unsigned int dataDCC2, channel_id;
2121 int i;
2122 struct hdmi_spec *spec = codec->spec;
2123 struct hda_spdif_out *spdif;
2124
2125 mutex_lock(&codec->spdif_mutex);
2126 spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
2127
2128 chs = substream->runtime->channels;
2129
2130 dataDCC2 = 0x2;
2131
2132 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2133 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2134 snd_hda_codec_write(codec,
2135 nvhdmi_master_con_nid_7x,
2136 0,
2137 AC_VERB_SET_DIGI_CONVERT_1,
2138 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2139
2140 /* set the stream id */
2141 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2142 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2143
2144 /* set the stream format */
2145 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2146 AC_VERB_SET_STREAM_FORMAT, format);
2147
2148 /* turn on again (if needed) */
2149 /* enable and set the channel status audio/data flag */
2150 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2151 snd_hda_codec_write(codec,
2152 nvhdmi_master_con_nid_7x,
2153 0,
2154 AC_VERB_SET_DIGI_CONVERT_1,
2155 spdif->ctls & 0xff);
2156 snd_hda_codec_write(codec,
2157 nvhdmi_master_con_nid_7x,
2158 0,
2159 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2160 }
2161
2162 for (i = 0; i < 4; i++) {
2163 if (chs == 2)
2164 channel_id = 0;
2165 else
2166 channel_id = i * 2;
2167
2168 /* turn off SPDIF once;
2169 *otherwise the IEC958 bits won't be updated
2170 */
2171 if (codec->spdif_status_reset &&
2172 (spdif->ctls & AC_DIG1_ENABLE))
2173 snd_hda_codec_write(codec,
2174 nvhdmi_con_nids_7x[i],
2175 0,
2176 AC_VERB_SET_DIGI_CONVERT_1,
2177 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2178 /* set the stream id */
2179 snd_hda_codec_write(codec,
2180 nvhdmi_con_nids_7x[i],
2181 0,
2182 AC_VERB_SET_CHANNEL_STREAMID,
2183 (stream_tag << 4) | channel_id);
2184 /* set the stream format */
2185 snd_hda_codec_write(codec,
2186 nvhdmi_con_nids_7x[i],
2187 0,
2188 AC_VERB_SET_STREAM_FORMAT,
2189 format);
2190 /* turn on again (if needed) */
2191 /* enable and set the channel status audio/data flag */
2192 if (codec->spdif_status_reset &&
2193 (spdif->ctls & AC_DIG1_ENABLE)) {
2194 snd_hda_codec_write(codec,
2195 nvhdmi_con_nids_7x[i],
2196 0,
2197 AC_VERB_SET_DIGI_CONVERT_1,
2198 spdif->ctls & 0xff);
2199 snd_hda_codec_write(codec,
2200 nvhdmi_con_nids_7x[i],
2201 0,
2202 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2203 }
2204 }
2205
2206 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2207
2208 mutex_unlock(&codec->spdif_mutex);
2209 return 0;
2210 }
2211
2212 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2213 .substreams = 1,
2214 .channels_min = 2,
2215 .channels_max = 8,
2216 .nid = nvhdmi_master_con_nid_7x,
2217 .rates = SUPPORTED_RATES,
2218 .maxbps = SUPPORTED_MAXBPS,
2219 .formats = SUPPORTED_FORMATS,
2220 .ops = {
2221 .open = simple_playback_pcm_open,
2222 .close = nvhdmi_8ch_7x_pcm_close,
2223 .prepare = nvhdmi_8ch_7x_pcm_prepare
2224 },
2225 };
2226
2227 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2228 {
2229 struct hdmi_spec *spec;
2230 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2231 nvhdmi_master_pin_nid_7x);
2232 if (err < 0)
2233 return err;
2234
2235 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2236 /* override the PCM rates, etc, as the codec doesn't give full list */
2237 spec = codec->spec;
2238 spec->pcm_playback.rates = SUPPORTED_RATES;
2239 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2240 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2241 return 0;
2242 }
2243
2244 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2245 {
2246 struct hdmi_spec *spec = codec->spec;
2247 int err = simple_playback_build_pcms(codec);
2248 spec->pcm_rec[0].own_chmap = true;
2249 return err;
2250 }
2251
2252 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2253 {
2254 struct hdmi_spec *spec = codec->spec;
2255 struct snd_pcm_chmap *chmap;
2256 int err;
2257
2258 err = simple_playback_build_controls(codec);
2259 if (err < 0)
2260 return err;
2261
2262 /* add channel maps */
2263 err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
2264 SNDRV_PCM_STREAM_PLAYBACK,
2265 snd_pcm_alt_chmaps, 8, 0, &chmap);
2266 if (err < 0)
2267 return err;
2268 switch (codec->preset->id) {
2269 case 0x10de0002:
2270 case 0x10de0003:
2271 case 0x10de0005:
2272 case 0x10de0006:
2273 chmap->channel_mask = (1U << 2) | (1U << 8);
2274 break;
2275 case 0x10de0007:
2276 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2277 }
2278 return 0;
2279 }
2280
2281 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2282 {
2283 struct hdmi_spec *spec;
2284 int err = patch_nvhdmi_2ch(codec);
2285 if (err < 0)
2286 return err;
2287 spec = codec->spec;
2288 spec->multiout.max_channels = 8;
2289 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2290 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2291 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2292 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2293
2294 /* Initialize the audio infoframe channel mask and checksum to something
2295 * valid */
2296 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2297
2298 return 0;
2299 }
2300
2301 /*
2302 * ATI-specific implementations
2303 *
2304 * FIXME: we may omit the whole this and use the generic code once after
2305 * it's confirmed to work.
2306 */
2307
2308 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2309 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2310
2311 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2312 struct hda_codec *codec,
2313 unsigned int stream_tag,
2314 unsigned int format,
2315 struct snd_pcm_substream *substream)
2316 {
2317 struct hdmi_spec *spec = codec->spec;
2318 int chans = substream->runtime->channels;
2319 int i, err;
2320
2321 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2322 substream);
2323 if (err < 0)
2324 return err;
2325 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2326 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2327 /* FIXME: XXX */
2328 for (i = 0; i < chans; i++) {
2329 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2330 AC_VERB_SET_HDMI_CHAN_SLOT,
2331 (i << 4) | i);
2332 }
2333 return 0;
2334 }
2335
2336 static int patch_atihdmi(struct hda_codec *codec)
2337 {
2338 struct hdmi_spec *spec;
2339 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2340 if (err < 0)
2341 return err;
2342 spec = codec->spec;
2343 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2344 return 0;
2345 }
2346
2347 /* VIA HDMI Implementation */
2348 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2349 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2350
2351 static int patch_via_hdmi(struct hda_codec *codec)
2352 {
2353 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2354 }
2355
2356 /*
2357 * patch entries
2358 */
2359 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2360 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2361 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2362 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2363 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2364 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2365 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2366 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2367 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2368 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2369 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2370 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2371 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2372 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2373 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2374 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2375 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2376 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2377 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2378 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2379 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2380 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2381 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2382 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2383 /* 17 is known to be absent */
2384 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2385 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2386 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2387 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2388 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2389 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2390 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2391 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2392 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2393 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2394 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2395 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2396 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2397 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2398 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2399 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2400 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2401 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2402 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2403 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2404 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2405 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2406 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2407 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2408 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2409 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2410 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2411 {} /* terminator */
2412 };
2413
2414 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2415 MODULE_ALIAS("snd-hda-codec-id:10027919");
2416 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2417 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2418 MODULE_ALIAS("snd-hda-codec-id:10951390");
2419 MODULE_ALIAS("snd-hda-codec-id:10951392");
2420 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2421 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2422 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2423 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2424 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2425 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2426 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2427 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2428 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2429 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2430 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2431 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2432 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2433 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2434 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2435 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2436 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2437 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2438 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2439 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2440 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2441 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2442 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2443 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2444 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2445 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2446 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2447 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2448 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2449 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2450 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2451 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2452 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2453 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2454 MODULE_ALIAS("snd-hda-codec-id:80860054");
2455 MODULE_ALIAS("snd-hda-codec-id:80862801");
2456 MODULE_ALIAS("snd-hda-codec-id:80862802");
2457 MODULE_ALIAS("snd-hda-codec-id:80862803");
2458 MODULE_ALIAS("snd-hda-codec-id:80862804");
2459 MODULE_ALIAS("snd-hda-codec-id:80862805");
2460 MODULE_ALIAS("snd-hda-codec-id:80862806");
2461 MODULE_ALIAS("snd-hda-codec-id:80862807");
2462 MODULE_ALIAS("snd-hda-codec-id:80862880");
2463 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2464
2465 MODULE_LICENSE("GPL");
2466 MODULE_DESCRIPTION("HDMI HD-audio codec");
2467 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2468 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2469 MODULE_ALIAS("snd-hda-codec-atihdmi");
2470
2471 static struct hda_codec_preset_list intel_list = {
2472 .preset = snd_hda_preset_hdmi,
2473 .owner = THIS_MODULE,
2474 };
2475
2476 static int __init patch_hdmi_init(void)
2477 {
2478 return snd_hda_add_codec_preset(&intel_list);
2479 }
2480
2481 static void __exit patch_hdmi_exit(void)
2482 {
2483 snd_hda_delete_codec_preset(&intel_list);
2484 }
2485
2486 module_init(patch_hdmi_init)
2487 module_exit(patch_hdmi_exit)
Linux kernel - Deliverables
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