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Merge 3.12-rc3 into char-misc-next
[deliverable/linux.git] / sound / pci / hda / patch_hdmi.c
1 /*
2 *
3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
4 *
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 *
10 * Authors:
11 * Wu Fengguang <wfg@linux.intel.com>
12 *
13 * Maintained by:
14 * Wu Fengguang <wfg@linux.intel.com>
15 *
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 * for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
41 #include "hda_jack.h"
42
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46
47 #define is_haswell(codec) ((codec)->vendor_id == 0x80862807)
48
49 struct hdmi_spec_per_cvt {
50 hda_nid_t cvt_nid;
51 int assigned;
52 unsigned int channels_min;
53 unsigned int channels_max;
54 u32 rates;
55 u64 formats;
56 unsigned int maxbps;
57 };
58
59 /* max. connections to a widget */
60 #define HDA_MAX_CONNECTIONS 32
61
62 struct hdmi_spec_per_pin {
63 hda_nid_t pin_nid;
64 int num_mux_nids;
65 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
66
67 struct hda_codec *codec;
68 struct hdmi_eld sink_eld;
69 struct delayed_work work;
70 struct snd_kcontrol *eld_ctl;
71 int repoll_count;
72 bool setup; /* the stream has been set up by prepare callback */
73 int channels; /* current number of channels */
74 bool non_pcm;
75 bool chmap_set; /* channel-map override by ALSA API? */
76 unsigned char chmap[8]; /* ALSA API channel-map */
77 char pcm_name[8]; /* filled in build_pcm callbacks */
78 };
79
80 struct hdmi_spec {
81 int num_cvts;
82 struct snd_array cvts; /* struct hdmi_spec_per_cvt */
83 hda_nid_t cvt_nids[4]; /* only for haswell fix */
84
85 int num_pins;
86 struct snd_array pins; /* struct hdmi_spec_per_pin */
87 struct snd_array pcm_rec; /* struct hda_pcm */
88 unsigned int channels_max; /* max over all cvts */
89
90 struct hdmi_eld temp_eld;
91 /*
92 * Non-generic ATI/NVIDIA specific
93 */
94 struct hda_multi_out multiout;
95 struct hda_pcm_stream pcm_playback;
96 };
97
98
99 struct hdmi_audio_infoframe {
100 u8 type; /* 0x84 */
101 u8 ver; /* 0x01 */
102 u8 len; /* 0x0a */
103
104 u8 checksum;
105
106 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
107 u8 SS01_SF24;
108 u8 CXT04;
109 u8 CA;
110 u8 LFEPBL01_LSV36_DM_INH7;
111 };
112
113 struct dp_audio_infoframe {
114 u8 type; /* 0x84 */
115 u8 len; /* 0x1b */
116 u8 ver; /* 0x11 << 2 */
117
118 u8 CC02_CT47; /* match with HDMI infoframe from this on */
119 u8 SS01_SF24;
120 u8 CXT04;
121 u8 CA;
122 u8 LFEPBL01_LSV36_DM_INH7;
123 };
124
125 union audio_infoframe {
126 struct hdmi_audio_infoframe hdmi;
127 struct dp_audio_infoframe dp;
128 u8 bytes[0];
129 };
130
131 /*
132 * CEA speaker placement:
133 *
134 * FLH FCH FRH
135 * FLW FL FLC FC FRC FR FRW
136 *
137 * LFE
138 * TC
139 *
140 * RL RLC RC RRC RR
141 *
142 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
143 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
144 */
145 enum cea_speaker_placement {
146 FL = (1 << 0), /* Front Left */
147 FC = (1 << 1), /* Front Center */
148 FR = (1 << 2), /* Front Right */
149 FLC = (1 << 3), /* Front Left Center */
150 FRC = (1 << 4), /* Front Right Center */
151 RL = (1 << 5), /* Rear Left */
152 RC = (1 << 6), /* Rear Center */
153 RR = (1 << 7), /* Rear Right */
154 RLC = (1 << 8), /* Rear Left Center */
155 RRC = (1 << 9), /* Rear Right Center */
156 LFE = (1 << 10), /* Low Frequency Effect */
157 FLW = (1 << 11), /* Front Left Wide */
158 FRW = (1 << 12), /* Front Right Wide */
159 FLH = (1 << 13), /* Front Left High */
160 FCH = (1 << 14), /* Front Center High */
161 FRH = (1 << 15), /* Front Right High */
162 TC = (1 << 16), /* Top Center */
163 };
164
165 /*
166 * ELD SA bits in the CEA Speaker Allocation data block
167 */
168 static int eld_speaker_allocation_bits[] = {
169 [0] = FL | FR,
170 [1] = LFE,
171 [2] = FC,
172 [3] = RL | RR,
173 [4] = RC,
174 [5] = FLC | FRC,
175 [6] = RLC | RRC,
176 /* the following are not defined in ELD yet */
177 [7] = FLW | FRW,
178 [8] = FLH | FRH,
179 [9] = TC,
180 [10] = FCH,
181 };
182
183 struct cea_channel_speaker_allocation {
184 int ca_index;
185 int speakers[8];
186
187 /* derived values, just for convenience */
188 int channels;
189 int spk_mask;
190 };
191
192 /*
193 * ALSA sequence is:
194 *
195 * surround40 surround41 surround50 surround51 surround71
196 * ch0 front left = = = =
197 * ch1 front right = = = =
198 * ch2 rear left = = = =
199 * ch3 rear right = = = =
200 * ch4 LFE center center center
201 * ch5 LFE LFE
202 * ch6 side left
203 * ch7 side right
204 *
205 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
206 */
207 static int hdmi_channel_mapping[0x32][8] = {
208 /* stereo */
209 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
210 /* 2.1 */
211 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
212 /* Dolby Surround */
213 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
214 /* surround40 */
215 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
216 /* 4ch */
217 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
218 /* surround41 */
219 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
220 /* surround50 */
221 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
222 /* surround51 */
223 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
224 /* 7.1 */
225 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
226 };
227
228 /*
229 * This is an ordered list!
230 *
231 * The preceding ones have better chances to be selected by
232 * hdmi_channel_allocation().
233 */
234 static struct cea_channel_speaker_allocation channel_allocations[] = {
235 /* channel: 7 6 5 4 3 2 1 0 */
236 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
237 /* 2.1 */
238 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
239 /* Dolby Surround */
240 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
241 /* surround40 */
242 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
243 /* surround41 */
244 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
245 /* surround50 */
246 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
247 /* surround51 */
248 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
249 /* 6.1 */
250 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
251 /* surround71 */
252 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
253
254 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
255 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
256 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
257 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
258 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
259 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
260 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
261 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
262 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
263 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
264 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
265 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
266 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
267 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
268 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
269 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
270 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
271 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
272 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
273 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
274 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
275 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
276 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
277 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
278 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
279 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
280 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
281 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
282 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
283 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
284 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
285 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
286 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
287 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
288 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
289 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
290 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
291 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
292 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
293 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
294 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
295 };
296
297
298 /*
299 * HDMI routines
300 */
301
302 #define get_pin(spec, idx) \
303 ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
304 #define get_cvt(spec, idx) \
305 ((struct hdmi_spec_per_cvt *)snd_array_elem(&spec->cvts, idx))
306 #define get_pcm_rec(spec, idx) \
307 ((struct hda_pcm *)snd_array_elem(&spec->pcm_rec, idx))
308
309 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
310 {
311 int pin_idx;
312
313 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
314 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
315 return pin_idx;
316
317 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
318 return -EINVAL;
319 }
320
321 static int hinfo_to_pin_index(struct hdmi_spec *spec,
322 struct hda_pcm_stream *hinfo)
323 {
324 int pin_idx;
325
326 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
327 if (get_pcm_rec(spec, pin_idx)->stream == hinfo)
328 return pin_idx;
329
330 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
331 return -EINVAL;
332 }
333
334 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
335 {
336 int cvt_idx;
337
338 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
339 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
340 return cvt_idx;
341
342 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
343 return -EINVAL;
344 }
345
346 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
347 struct snd_ctl_elem_info *uinfo)
348 {
349 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
350 struct hdmi_spec *spec = codec->spec;
351 struct hdmi_eld *eld;
352 int pin_idx;
353
354 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
355
356 pin_idx = kcontrol->private_value;
357 eld = &get_pin(spec, pin_idx)->sink_eld;
358
359 mutex_lock(&eld->lock);
360 uinfo->count = eld->eld_valid ? eld->eld_size : 0;
361 mutex_unlock(&eld->lock);
362
363 return 0;
364 }
365
366 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
367 struct snd_ctl_elem_value *ucontrol)
368 {
369 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
370 struct hdmi_spec *spec = codec->spec;
371 struct hdmi_eld *eld;
372 int pin_idx;
373
374 pin_idx = kcontrol->private_value;
375 eld = &get_pin(spec, pin_idx)->sink_eld;
376
377 mutex_lock(&eld->lock);
378 if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data)) {
379 mutex_unlock(&eld->lock);
380 snd_BUG();
381 return -EINVAL;
382 }
383
384 memset(ucontrol->value.bytes.data, 0,
385 ARRAY_SIZE(ucontrol->value.bytes.data));
386 if (eld->eld_valid)
387 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
388 eld->eld_size);
389 mutex_unlock(&eld->lock);
390
391 return 0;
392 }
393
394 static struct snd_kcontrol_new eld_bytes_ctl = {
395 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
396 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
397 .name = "ELD",
398 .info = hdmi_eld_ctl_info,
399 .get = hdmi_eld_ctl_get,
400 };
401
402 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
403 int device)
404 {
405 struct snd_kcontrol *kctl;
406 struct hdmi_spec *spec = codec->spec;
407 int err;
408
409 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
410 if (!kctl)
411 return -ENOMEM;
412 kctl->private_value = pin_idx;
413 kctl->id.device = device;
414
415 err = snd_hda_ctl_add(codec, get_pin(spec, pin_idx)->pin_nid, kctl);
416 if (err < 0)
417 return err;
418
419 get_pin(spec, pin_idx)->eld_ctl = kctl;
420 return 0;
421 }
422
423 #ifdef BE_PARANOID
424 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
425 int *packet_index, int *byte_index)
426 {
427 int val;
428
429 val = snd_hda_codec_read(codec, pin_nid, 0,
430 AC_VERB_GET_HDMI_DIP_INDEX, 0);
431
432 *packet_index = val >> 5;
433 *byte_index = val & 0x1f;
434 }
435 #endif
436
437 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
438 int packet_index, int byte_index)
439 {
440 int val;
441
442 val = (packet_index << 5) | (byte_index & 0x1f);
443
444 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
445 }
446
447 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
448 unsigned char val)
449 {
450 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
451 }
452
453 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
454 {
455 /* Unmute */
456 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
457 snd_hda_codec_write(codec, pin_nid, 0,
458 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
459 /* Enable pin out: some machines with GM965 gets broken output when
460 * the pin is disabled or changed while using with HDMI
461 */
462 snd_hda_codec_write(codec, pin_nid, 0,
463 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
464 }
465
466 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
467 {
468 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
469 AC_VERB_GET_CVT_CHAN_COUNT, 0);
470 }
471
472 static void hdmi_set_channel_count(struct hda_codec *codec,
473 hda_nid_t cvt_nid, int chs)
474 {
475 if (chs != hdmi_get_channel_count(codec, cvt_nid))
476 snd_hda_codec_write(codec, cvt_nid, 0,
477 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
478 }
479
480
481 /*
482 * Channel mapping routines
483 */
484
485 /*
486 * Compute derived values in channel_allocations[].
487 */
488 static void init_channel_allocations(void)
489 {
490 int i, j;
491 struct cea_channel_speaker_allocation *p;
492
493 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
494 p = channel_allocations + i;
495 p->channels = 0;
496 p->spk_mask = 0;
497 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
498 if (p->speakers[j]) {
499 p->channels++;
500 p->spk_mask |= p->speakers[j];
501 }
502 }
503 }
504
505 static int get_channel_allocation_order(int ca)
506 {
507 int i;
508
509 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
510 if (channel_allocations[i].ca_index == ca)
511 break;
512 }
513 return i;
514 }
515
516 /*
517 * The transformation takes two steps:
518 *
519 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
520 * spk_mask => (channel_allocations[]) => ai->CA
521 *
522 * TODO: it could select the wrong CA from multiple candidates.
523 */
524 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
525 {
526 int i;
527 int ca = 0;
528 int spk_mask = 0;
529 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
530
531 /*
532 * CA defaults to 0 for basic stereo audio
533 */
534 if (channels <= 2)
535 return 0;
536
537 /*
538 * expand ELD's speaker allocation mask
539 *
540 * ELD tells the speaker mask in a compact(paired) form,
541 * expand ELD's notions to match the ones used by Audio InfoFrame.
542 */
543 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
544 if (eld->info.spk_alloc & (1 << i))
545 spk_mask |= eld_speaker_allocation_bits[i];
546 }
547
548 /* search for the first working match in the CA table */
549 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
550 if (channels == channel_allocations[i].channels &&
551 (spk_mask & channel_allocations[i].spk_mask) ==
552 channel_allocations[i].spk_mask) {
553 ca = channel_allocations[i].ca_index;
554 break;
555 }
556 }
557
558 if (!ca) {
559 /* if there was no match, select the regular ALSA channel
560 * allocation with the matching number of channels */
561 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
562 if (channels == channel_allocations[i].channels) {
563 ca = channel_allocations[i].ca_index;
564 break;
565 }
566 }
567 }
568
569 snd_print_channel_allocation(eld->info.spk_alloc, buf, sizeof(buf));
570 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
571 ca, channels, buf);
572
573 return ca;
574 }
575
576 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
577 hda_nid_t pin_nid)
578 {
579 #ifdef CONFIG_SND_DEBUG_VERBOSE
580 int i;
581 int slot;
582
583 for (i = 0; i < 8; i++) {
584 slot = snd_hda_codec_read(codec, pin_nid, 0,
585 AC_VERB_GET_HDMI_CHAN_SLOT, i);
586 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
587 slot >> 4, slot & 0xf);
588 }
589 #endif
590 }
591
592
593 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
594 hda_nid_t pin_nid,
595 bool non_pcm,
596 int ca)
597 {
598 int i;
599 int err;
600 int order;
601 int non_pcm_mapping[8];
602
603 order = get_channel_allocation_order(ca);
604
605 if (hdmi_channel_mapping[ca][1] == 0) {
606 for (i = 0; i < channel_allocations[order].channels; i++)
607 hdmi_channel_mapping[ca][i] = i | (i << 4);
608 for (; i < 8; i++)
609 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
610 }
611
612 if (non_pcm) {
613 for (i = 0; i < channel_allocations[order].channels; i++)
614 non_pcm_mapping[i] = i | (i << 4);
615 for (; i < 8; i++)
616 non_pcm_mapping[i] = 0xf | (i << 4);
617 }
618
619 for (i = 0; i < 8; i++) {
620 err = snd_hda_codec_write(codec, pin_nid, 0,
621 AC_VERB_SET_HDMI_CHAN_SLOT,
622 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
623 if (err) {
624 snd_printdd(KERN_NOTICE
625 "HDMI: channel mapping failed\n");
626 break;
627 }
628 }
629
630 hdmi_debug_channel_mapping(codec, pin_nid);
631 }
632
633 struct channel_map_table {
634 unsigned char map; /* ALSA API channel map position */
635 unsigned char cea_slot; /* CEA slot value */
636 int spk_mask; /* speaker position bit mask */
637 };
638
639 static struct channel_map_table map_tables[] = {
640 { SNDRV_CHMAP_FL, 0x00, FL },
641 { SNDRV_CHMAP_FR, 0x01, FR },
642 { SNDRV_CHMAP_RL, 0x04, RL },
643 { SNDRV_CHMAP_RR, 0x05, RR },
644 { SNDRV_CHMAP_LFE, 0x02, LFE },
645 { SNDRV_CHMAP_FC, 0x03, FC },
646 { SNDRV_CHMAP_RLC, 0x06, RLC },
647 { SNDRV_CHMAP_RRC, 0x07, RRC },
648 {} /* terminator */
649 };
650
651 /* from ALSA API channel position to speaker bit mask */
652 static int to_spk_mask(unsigned char c)
653 {
654 struct channel_map_table *t = map_tables;
655 for (; t->map; t++) {
656 if (t->map == c)
657 return t->spk_mask;
658 }
659 return 0;
660 }
661
662 /* from ALSA API channel position to CEA slot */
663 static int to_cea_slot(unsigned char c)
664 {
665 struct channel_map_table *t = map_tables;
666 for (; t->map; t++) {
667 if (t->map == c)
668 return t->cea_slot;
669 }
670 return 0x0f;
671 }
672
673 /* from CEA slot to ALSA API channel position */
674 static int from_cea_slot(unsigned char c)
675 {
676 struct channel_map_table *t = map_tables;
677 for (; t->map; t++) {
678 if (t->cea_slot == c)
679 return t->map;
680 }
681 return 0;
682 }
683
684 /* from speaker bit mask to ALSA API channel position */
685 static int spk_to_chmap(int spk)
686 {
687 struct channel_map_table *t = map_tables;
688 for (; t->map; t++) {
689 if (t->spk_mask == spk)
690 return t->map;
691 }
692 return 0;
693 }
694
695 /* get the CA index corresponding to the given ALSA API channel map */
696 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
697 {
698 int i, spks = 0, spk_mask = 0;
699
700 for (i = 0; i < chs; i++) {
701 int mask = to_spk_mask(map[i]);
702 if (mask) {
703 spk_mask |= mask;
704 spks++;
705 }
706 }
707
708 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
709 if ((chs == channel_allocations[i].channels ||
710 spks == channel_allocations[i].channels) &&
711 (spk_mask & channel_allocations[i].spk_mask) ==
712 channel_allocations[i].spk_mask)
713 return channel_allocations[i].ca_index;
714 }
715 return -1;
716 }
717
718 /* set up the channel slots for the given ALSA API channel map */
719 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
720 hda_nid_t pin_nid,
721 int chs, unsigned char *map)
722 {
723 int i;
724 for (i = 0; i < 8; i++) {
725 int val, err;
726 if (i < chs)
727 val = to_cea_slot(map[i]);
728 else
729 val = 0xf;
730 val |= (i << 4);
731 err = snd_hda_codec_write(codec, pin_nid, 0,
732 AC_VERB_SET_HDMI_CHAN_SLOT, val);
733 if (err)
734 return -EINVAL;
735 }
736 return 0;
737 }
738
739 /* store ALSA API channel map from the current default map */
740 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
741 {
742 int i;
743 for (i = 0; i < 8; i++) {
744 if (i < channel_allocations[ca].channels)
745 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
746 else
747 map[i] = 0;
748 }
749 }
750
751 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
752 hda_nid_t pin_nid, bool non_pcm, int ca,
753 int channels, unsigned char *map,
754 bool chmap_set)
755 {
756 if (!non_pcm && chmap_set) {
757 hdmi_manual_setup_channel_mapping(codec, pin_nid,
758 channels, map);
759 } else {
760 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
761 hdmi_setup_fake_chmap(map, ca);
762 }
763 }
764
765 /*
766 * Audio InfoFrame routines
767 */
768
769 /*
770 * Enable Audio InfoFrame Transmission
771 */
772 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
773 hda_nid_t pin_nid)
774 {
775 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
776 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
777 AC_DIPXMIT_BEST);
778 }
779
780 /*
781 * Disable Audio InfoFrame Transmission
782 */
783 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
784 hda_nid_t pin_nid)
785 {
786 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
787 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
788 AC_DIPXMIT_DISABLE);
789 }
790
791 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
792 {
793 #ifdef CONFIG_SND_DEBUG_VERBOSE
794 int i;
795 int size;
796
797 size = snd_hdmi_get_eld_size(codec, pin_nid);
798 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
799
800 for (i = 0; i < 8; i++) {
801 size = snd_hda_codec_read(codec, pin_nid, 0,
802 AC_VERB_GET_HDMI_DIP_SIZE, i);
803 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
804 }
805 #endif
806 }
807
808 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
809 {
810 #ifdef BE_PARANOID
811 int i, j;
812 int size;
813 int pi, bi;
814 for (i = 0; i < 8; i++) {
815 size = snd_hda_codec_read(codec, pin_nid, 0,
816 AC_VERB_GET_HDMI_DIP_SIZE, i);
817 if (size == 0)
818 continue;
819
820 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
821 for (j = 1; j < 1000; j++) {
822 hdmi_write_dip_byte(codec, pin_nid, 0x0);
823 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
824 if (pi != i)
825 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
826 bi, pi, i);
827 if (bi == 0) /* byte index wrapped around */
828 break;
829 }
830 snd_printd(KERN_INFO
831 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
832 i, size, j);
833 }
834 #endif
835 }
836
837 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
838 {
839 u8 *bytes = (u8 *)hdmi_ai;
840 u8 sum = 0;
841 int i;
842
843 hdmi_ai->checksum = 0;
844
845 for (i = 0; i < sizeof(*hdmi_ai); i++)
846 sum += bytes[i];
847
848 hdmi_ai->checksum = -sum;
849 }
850
851 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
852 hda_nid_t pin_nid,
853 u8 *dip, int size)
854 {
855 int i;
856
857 hdmi_debug_dip_size(codec, pin_nid);
858 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
859
860 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
861 for (i = 0; i < size; i++)
862 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
863 }
864
865 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
866 u8 *dip, int size)
867 {
868 u8 val;
869 int i;
870
871 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
872 != AC_DIPXMIT_BEST)
873 return false;
874
875 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
876 for (i = 0; i < size; i++) {
877 val = snd_hda_codec_read(codec, pin_nid, 0,
878 AC_VERB_GET_HDMI_DIP_DATA, 0);
879 if (val != dip[i])
880 return false;
881 }
882
883 return true;
884 }
885
886 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
887 struct hdmi_spec_per_pin *per_pin,
888 bool non_pcm)
889 {
890 hda_nid_t pin_nid = per_pin->pin_nid;
891 int channels = per_pin->channels;
892 struct hdmi_eld *eld;
893 int ca;
894 union audio_infoframe ai;
895
896 if (!channels)
897 return;
898
899 if (is_haswell(codec))
900 snd_hda_codec_write(codec, pin_nid, 0,
901 AC_VERB_SET_AMP_GAIN_MUTE,
902 AMP_OUT_UNMUTE);
903
904 eld = &per_pin->sink_eld;
905 if (!eld->monitor_present)
906 return;
907
908 if (!non_pcm && per_pin->chmap_set)
909 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
910 else
911 ca = hdmi_channel_allocation(eld, channels);
912 if (ca < 0)
913 ca = 0;
914
915 memset(&ai, 0, sizeof(ai));
916 if (eld->info.conn_type == 0) { /* HDMI */
917 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
918
919 hdmi_ai->type = 0x84;
920 hdmi_ai->ver = 0x01;
921 hdmi_ai->len = 0x0a;
922 hdmi_ai->CC02_CT47 = channels - 1;
923 hdmi_ai->CA = ca;
924 hdmi_checksum_audio_infoframe(hdmi_ai);
925 } else if (eld->info.conn_type == 1) { /* DisplayPort */
926 struct dp_audio_infoframe *dp_ai = &ai.dp;
927
928 dp_ai->type = 0x84;
929 dp_ai->len = 0x1b;
930 dp_ai->ver = 0x11 << 2;
931 dp_ai->CC02_CT47 = channels - 1;
932 dp_ai->CA = ca;
933 } else {
934 snd_printd("HDMI: unknown connection type at pin %d\n",
935 pin_nid);
936 return;
937 }
938
939 /*
940 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
941 * sizeof(*dp_ai) to avoid partial match/update problems when
942 * the user switches between HDMI/DP monitors.
943 */
944 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
945 sizeof(ai))) {
946 snd_printdd("hdmi_setup_audio_infoframe: "
947 "pin=%d channels=%d\n",
948 pin_nid,
949 channels);
950 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
951 channels, per_pin->chmap,
952 per_pin->chmap_set);
953 hdmi_stop_infoframe_trans(codec, pin_nid);
954 hdmi_fill_audio_infoframe(codec, pin_nid,
955 ai.bytes, sizeof(ai));
956 hdmi_start_infoframe_trans(codec, pin_nid);
957 } else {
958 /* For non-pcm audio switch, setup new channel mapping
959 * accordingly */
960 if (per_pin->non_pcm != non_pcm)
961 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
962 channels, per_pin->chmap,
963 per_pin->chmap_set);
964 }
965
966 per_pin->non_pcm = non_pcm;
967 }
968
969
970 /*
971 * Unsolicited events
972 */
973
974 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
975
976 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
977 {
978 struct hdmi_spec *spec = codec->spec;
979 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
980 int pin_nid;
981 int pin_idx;
982 struct hda_jack_tbl *jack;
983 int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
984
985 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
986 if (!jack)
987 return;
988 pin_nid = jack->nid;
989 jack->jack_dirty = 1;
990
991 _snd_printd(SND_PR_VERBOSE,
992 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
993 codec->addr, pin_nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
994 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
995
996 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
997 if (pin_idx < 0)
998 return;
999
1000 hdmi_present_sense(get_pin(spec, pin_idx), 1);
1001 snd_hda_jack_report_sync(codec);
1002 }
1003
1004 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
1005 {
1006 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1007 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1008 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
1009 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
1010
1011 printk(KERN_INFO
1012 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
1013 codec->addr,
1014 tag,
1015 subtag,
1016 cp_state,
1017 cp_ready);
1018
1019 /* TODO */
1020 if (cp_state)
1021 ;
1022 if (cp_ready)
1023 ;
1024 }
1025
1026
1027 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
1028 {
1029 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
1030 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
1031
1032 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
1033 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
1034 return;
1035 }
1036
1037 if (subtag == 0)
1038 hdmi_intrinsic_event(codec, res);
1039 else
1040 hdmi_non_intrinsic_event(codec, res);
1041 }
1042
1043 static void haswell_verify_D0(struct hda_codec *codec,
1044 hda_nid_t cvt_nid, hda_nid_t nid)
1045 {
1046 int pwr;
1047
1048 /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
1049 * thus pins could only choose converter 0 for use. Make sure the
1050 * converters are in correct power state */
1051 if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
1052 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
1053
1054 if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
1055 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
1056 AC_PWRST_D0);
1057 msleep(40);
1058 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
1059 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
1060 snd_printd("Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
1061 }
1062 }
1063
1064 /*
1065 * Callbacks
1066 */
1067
1068 /* HBR should be Non-PCM, 8 channels */
1069 #define is_hbr_format(format) \
1070 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1071
1072 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1073 hda_nid_t pin_nid, u32 stream_tag, int format)
1074 {
1075 int pinctl;
1076 int new_pinctl = 0;
1077
1078 if (is_haswell(codec))
1079 haswell_verify_D0(codec, cvt_nid, pin_nid);
1080
1081 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1082 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1083 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1084
1085 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1086 if (is_hbr_format(format))
1087 new_pinctl |= AC_PINCTL_EPT_HBR;
1088 else
1089 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1090
1091 snd_printdd("hdmi_setup_stream: "
1092 "NID=0x%x, %spinctl=0x%x\n",
1093 pin_nid,
1094 pinctl == new_pinctl ? "" : "new-",
1095 new_pinctl);
1096
1097 if (pinctl != new_pinctl)
1098 snd_hda_codec_write(codec, pin_nid, 0,
1099 AC_VERB_SET_PIN_WIDGET_CONTROL,
1100 new_pinctl);
1101
1102 }
1103 if (is_hbr_format(format) && !new_pinctl) {
1104 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1105 return -EINVAL;
1106 }
1107
1108 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1109 return 0;
1110 }
1111
1112 static int hdmi_choose_cvt(struct hda_codec *codec,
1113 int pin_idx, int *cvt_id, int *mux_id)
1114 {
1115 struct hdmi_spec *spec = codec->spec;
1116 struct hdmi_spec_per_pin *per_pin;
1117 struct hdmi_spec_per_cvt *per_cvt = NULL;
1118 int cvt_idx, mux_idx = 0;
1119
1120 per_pin = get_pin(spec, pin_idx);
1121
1122 /* Dynamically assign converter to stream */
1123 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1124 per_cvt = get_cvt(spec, cvt_idx);
1125
1126 /* Must not already be assigned */
1127 if (per_cvt->assigned)
1128 continue;
1129 /* Must be in pin's mux's list of converters */
1130 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1131 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1132 break;
1133 /* Not in mux list */
1134 if (mux_idx == per_pin->num_mux_nids)
1135 continue;
1136 break;
1137 }
1138
1139 /* No free converters */
1140 if (cvt_idx == spec->num_cvts)
1141 return -ENODEV;
1142
1143 if (cvt_id)
1144 *cvt_id = cvt_idx;
1145 if (mux_id)
1146 *mux_id = mux_idx;
1147
1148 return 0;
1149 }
1150
1151 static void haswell_config_cvts(struct hda_codec *codec,
1152 hda_nid_t pin_nid, int mux_idx)
1153 {
1154 struct hdmi_spec *spec = codec->spec;
1155 hda_nid_t nid, end_nid;
1156 int cvt_idx, curr;
1157 struct hdmi_spec_per_cvt *per_cvt;
1158
1159 /* configure all pins, including "no physical connection" ones */
1160 end_nid = codec->start_nid + codec->num_nodes;
1161 for (nid = codec->start_nid; nid < end_nid; nid++) {
1162 unsigned int wid_caps = get_wcaps(codec, nid);
1163 unsigned int wid_type = get_wcaps_type(wid_caps);
1164
1165 if (wid_type != AC_WID_PIN)
1166 continue;
1167
1168 if (nid == pin_nid)
1169 continue;
1170
1171 curr = snd_hda_codec_read(codec, nid, 0,
1172 AC_VERB_GET_CONNECT_SEL, 0);
1173 if (curr != mux_idx)
1174 continue;
1175
1176 /* choose an unassigned converter. The conveters in the
1177 * connection list are in the same order as in the codec.
1178 */
1179 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1180 per_cvt = get_cvt(spec, cvt_idx);
1181 if (!per_cvt->assigned) {
1182 snd_printdd("choose cvt %d for pin nid %d\n",
1183 cvt_idx, nid);
1184 snd_hda_codec_write_cache(codec, nid, 0,
1185 AC_VERB_SET_CONNECT_SEL,
1186 cvt_idx);
1187 break;
1188 }
1189 }
1190 }
1191 }
1192
1193 /*
1194 * HDA PCM callbacks
1195 */
1196 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1197 struct hda_codec *codec,
1198 struct snd_pcm_substream *substream)
1199 {
1200 struct hdmi_spec *spec = codec->spec;
1201 struct snd_pcm_runtime *runtime = substream->runtime;
1202 int pin_idx, cvt_idx, mux_idx = 0;
1203 struct hdmi_spec_per_pin *per_pin;
1204 struct hdmi_eld *eld;
1205 struct hdmi_spec_per_cvt *per_cvt = NULL;
1206 int err;
1207
1208 /* Validate hinfo */
1209 pin_idx = hinfo_to_pin_index(spec, hinfo);
1210 if (snd_BUG_ON(pin_idx < 0))
1211 return -EINVAL;
1212 per_pin = get_pin(spec, pin_idx);
1213 eld = &per_pin->sink_eld;
1214
1215 err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1216 if (err < 0)
1217 return err;
1218
1219 per_cvt = get_cvt(spec, cvt_idx);
1220 /* Claim converter */
1221 per_cvt->assigned = 1;
1222 hinfo->nid = per_cvt->cvt_nid;
1223
1224 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1225 AC_VERB_SET_CONNECT_SEL,
1226 mux_idx);
1227
1228 /* configure unused pins to choose other converters */
1229 if (is_haswell(codec))
1230 haswell_config_cvts(codec, per_pin->pin_nid, mux_idx);
1231
1232 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1233
1234 /* Initially set the converter's capabilities */
1235 hinfo->channels_min = per_cvt->channels_min;
1236 hinfo->channels_max = per_cvt->channels_max;
1237 hinfo->rates = per_cvt->rates;
1238 hinfo->formats = per_cvt->formats;
1239 hinfo->maxbps = per_cvt->maxbps;
1240
1241 /* Restrict capabilities by ELD if this isn't disabled */
1242 if (!static_hdmi_pcm && eld->eld_valid) {
1243 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1244 if (hinfo->channels_min > hinfo->channels_max ||
1245 !hinfo->rates || !hinfo->formats) {
1246 per_cvt->assigned = 0;
1247 hinfo->nid = 0;
1248 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1249 return -ENODEV;
1250 }
1251 }
1252
1253 /* Store the updated parameters */
1254 runtime->hw.channels_min = hinfo->channels_min;
1255 runtime->hw.channels_max = hinfo->channels_max;
1256 runtime->hw.formats = hinfo->formats;
1257 runtime->hw.rates = hinfo->rates;
1258
1259 snd_pcm_hw_constraint_step(substream->runtime, 0,
1260 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1261 return 0;
1262 }
1263
1264 /*
1265 * HDA/HDMI auto parsing
1266 */
1267 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1268 {
1269 struct hdmi_spec *spec = codec->spec;
1270 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1271 hda_nid_t pin_nid = per_pin->pin_nid;
1272
1273 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1274 snd_printk(KERN_WARNING
1275 "HDMI: pin %d wcaps %#x "
1276 "does not support connection list\n",
1277 pin_nid, get_wcaps(codec, pin_nid));
1278 return -EINVAL;
1279 }
1280
1281 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1282 per_pin->mux_nids,
1283 HDA_MAX_CONNECTIONS);
1284
1285 return 0;
1286 }
1287
1288 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1289 {
1290 struct hda_codec *codec = per_pin->codec;
1291 struct hdmi_spec *spec = codec->spec;
1292 struct hdmi_eld *eld = &spec->temp_eld;
1293 struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1294 hda_nid_t pin_nid = per_pin->pin_nid;
1295 /*
1296 * Always execute a GetPinSense verb here, even when called from
1297 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1298 * response's PD bit is not the real PD value, but indicates that
1299 * the real PD value changed. An older version of the HD-audio
1300 * specification worked this way. Hence, we just ignore the data in
1301 * the unsolicited response to avoid custom WARs.
1302 */
1303 int present = snd_hda_pin_sense(codec, pin_nid);
1304 bool update_eld = false;
1305 bool eld_changed = false;
1306
1307 pin_eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1308 if (pin_eld->monitor_present)
1309 eld->eld_valid = !!(present & AC_PINSENSE_ELDV);
1310 else
1311 eld->eld_valid = false;
1312
1313 _snd_printd(SND_PR_VERBOSE,
1314 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1315 codec->addr, pin_nid, pin_eld->monitor_present, eld->eld_valid);
1316
1317 if (eld->eld_valid) {
1318 if (snd_hdmi_get_eld(codec, pin_nid, eld->eld_buffer,
1319 &eld->eld_size) < 0)
1320 eld->eld_valid = false;
1321 else {
1322 memset(&eld->info, 0, sizeof(struct parsed_hdmi_eld));
1323 if (snd_hdmi_parse_eld(&eld->info, eld->eld_buffer,
1324 eld->eld_size) < 0)
1325 eld->eld_valid = false;
1326 }
1327
1328 if (eld->eld_valid) {
1329 snd_hdmi_show_eld(&eld->info);
1330 update_eld = true;
1331 }
1332 else if (repoll) {
1333 queue_delayed_work(codec->bus->workq,
1334 &per_pin->work,
1335 msecs_to_jiffies(300));
1336 return;
1337 }
1338 }
1339
1340 mutex_lock(&pin_eld->lock);
1341 if (pin_eld->eld_valid && !eld->eld_valid) {
1342 update_eld = true;
1343 eld_changed = true;
1344 }
1345 if (update_eld) {
1346 bool old_eld_valid = pin_eld->eld_valid;
1347 pin_eld->eld_valid = eld->eld_valid;
1348 eld_changed = pin_eld->eld_size != eld->eld_size ||
1349 memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1350 eld->eld_size) != 0;
1351 if (eld_changed)
1352 memcpy(pin_eld->eld_buffer, eld->eld_buffer,
1353 eld->eld_size);
1354 pin_eld->eld_size = eld->eld_size;
1355 pin_eld->info = eld->info;
1356
1357 /* Haswell-specific workaround: re-setup when the transcoder is
1358 * changed during the stream playback
1359 */
1360 if (is_haswell(codec) &&
1361 eld->eld_valid && !old_eld_valid && per_pin->setup)
1362 hdmi_setup_audio_infoframe(codec, per_pin,
1363 per_pin->non_pcm);
1364 }
1365 mutex_unlock(&pin_eld->lock);
1366
1367 if (eld_changed)
1368 snd_ctl_notify(codec->bus->card,
1369 SNDRV_CTL_EVENT_MASK_VALUE | SNDRV_CTL_EVENT_MASK_INFO,
1370 &per_pin->eld_ctl->id);
1371 }
1372
1373 static void hdmi_repoll_eld(struct work_struct *work)
1374 {
1375 struct hdmi_spec_per_pin *per_pin =
1376 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1377
1378 if (per_pin->repoll_count++ > 6)
1379 per_pin->repoll_count = 0;
1380
1381 hdmi_present_sense(per_pin, per_pin->repoll_count);
1382 }
1383
1384 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1385 hda_nid_t nid);
1386
1387 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1388 {
1389 struct hdmi_spec *spec = codec->spec;
1390 unsigned int caps, config;
1391 int pin_idx;
1392 struct hdmi_spec_per_pin *per_pin;
1393 int err;
1394
1395 caps = snd_hda_query_pin_caps(codec, pin_nid);
1396 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1397 return 0;
1398
1399 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1400 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1401 return 0;
1402
1403 if (is_haswell(codec))
1404 intel_haswell_fixup_connect_list(codec, pin_nid);
1405
1406 pin_idx = spec->num_pins;
1407 per_pin = snd_array_new(&spec->pins);
1408 if (!per_pin)
1409 return -ENOMEM;
1410
1411 per_pin->pin_nid = pin_nid;
1412 per_pin->non_pcm = false;
1413
1414 err = hdmi_read_pin_conn(codec, pin_idx);
1415 if (err < 0)
1416 return err;
1417
1418 spec->num_pins++;
1419
1420 return 0;
1421 }
1422
1423 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1424 {
1425 struct hdmi_spec *spec = codec->spec;
1426 struct hdmi_spec_per_cvt *per_cvt;
1427 unsigned int chans;
1428 int err;
1429
1430 chans = get_wcaps(codec, cvt_nid);
1431 chans = get_wcaps_channels(chans);
1432
1433 per_cvt = snd_array_new(&spec->cvts);
1434 if (!per_cvt)
1435 return -ENOMEM;
1436
1437 per_cvt->cvt_nid = cvt_nid;
1438 per_cvt->channels_min = 2;
1439 if (chans <= 16) {
1440 per_cvt->channels_max = chans;
1441 if (chans > spec->channels_max)
1442 spec->channels_max = chans;
1443 }
1444
1445 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1446 &per_cvt->rates,
1447 &per_cvt->formats,
1448 &per_cvt->maxbps);
1449 if (err < 0)
1450 return err;
1451
1452 if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1453 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1454 spec->num_cvts++;
1455
1456 return 0;
1457 }
1458
1459 static int hdmi_parse_codec(struct hda_codec *codec)
1460 {
1461 hda_nid_t nid;
1462 int i, nodes;
1463
1464 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1465 if (!nid || nodes < 0) {
1466 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1467 return -EINVAL;
1468 }
1469
1470 for (i = 0; i < nodes; i++, nid++) {
1471 unsigned int caps;
1472 unsigned int type;
1473
1474 caps = get_wcaps(codec, nid);
1475 type = get_wcaps_type(caps);
1476
1477 if (!(caps & AC_WCAP_DIGITAL))
1478 continue;
1479
1480 switch (type) {
1481 case AC_WID_AUD_OUT:
1482 hdmi_add_cvt(codec, nid);
1483 break;
1484 case AC_WID_PIN:
1485 hdmi_add_pin(codec, nid);
1486 break;
1487 }
1488 }
1489
1490 #ifdef CONFIG_PM
1491 /* We're seeing some problems with unsolicited hot plug events on
1492 * PantherPoint after S3, if this is not enabled */
1493 if (codec->vendor_id == 0x80862806)
1494 codec->bus->power_keep_link_on = 1;
1495 /*
1496 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1497 * can be lost and presence sense verb will become inaccurate if the
1498 * HDA link is powered off at hot plug or hw initialization time.
1499 */
1500 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1501 AC_PWRST_EPSS))
1502 codec->bus->power_keep_link_on = 1;
1503 #endif
1504
1505 return 0;
1506 }
1507
1508 /*
1509 */
1510 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1511 {
1512 struct hda_spdif_out *spdif;
1513 bool non_pcm;
1514
1515 mutex_lock(&codec->spdif_mutex);
1516 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1517 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1518 mutex_unlock(&codec->spdif_mutex);
1519 return non_pcm;
1520 }
1521
1522
1523 /*
1524 * HDMI callbacks
1525 */
1526
1527 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1528 struct hda_codec *codec,
1529 unsigned int stream_tag,
1530 unsigned int format,
1531 struct snd_pcm_substream *substream)
1532 {
1533 hda_nid_t cvt_nid = hinfo->nid;
1534 struct hdmi_spec *spec = codec->spec;
1535 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1536 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1537 hda_nid_t pin_nid = per_pin->pin_nid;
1538 bool non_pcm;
1539
1540 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1541 per_pin->channels = substream->runtime->channels;
1542 per_pin->setup = true;
1543
1544 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1545
1546 hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1547
1548 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1549 }
1550
1551 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1552 struct hda_codec *codec,
1553 struct snd_pcm_substream *substream)
1554 {
1555 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1556 return 0;
1557 }
1558
1559 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1560 struct hda_codec *codec,
1561 struct snd_pcm_substream *substream)
1562 {
1563 struct hdmi_spec *spec = codec->spec;
1564 int cvt_idx, pin_idx;
1565 struct hdmi_spec_per_cvt *per_cvt;
1566 struct hdmi_spec_per_pin *per_pin;
1567
1568 if (hinfo->nid) {
1569 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1570 if (snd_BUG_ON(cvt_idx < 0))
1571 return -EINVAL;
1572 per_cvt = get_cvt(spec, cvt_idx);
1573
1574 snd_BUG_ON(!per_cvt->assigned);
1575 per_cvt->assigned = 0;
1576 hinfo->nid = 0;
1577
1578 pin_idx = hinfo_to_pin_index(spec, hinfo);
1579 if (snd_BUG_ON(pin_idx < 0))
1580 return -EINVAL;
1581 per_pin = get_pin(spec, pin_idx);
1582
1583 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1584 per_pin->chmap_set = false;
1585 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1586
1587 per_pin->setup = false;
1588 per_pin->channels = 0;
1589 }
1590
1591 return 0;
1592 }
1593
1594 static const struct hda_pcm_ops generic_ops = {
1595 .open = hdmi_pcm_open,
1596 .close = hdmi_pcm_close,
1597 .prepare = generic_hdmi_playback_pcm_prepare,
1598 .cleanup = generic_hdmi_playback_pcm_cleanup,
1599 };
1600
1601 /*
1602 * ALSA API channel-map control callbacks
1603 */
1604 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1605 struct snd_ctl_elem_info *uinfo)
1606 {
1607 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1608 struct hda_codec *codec = info->private_data;
1609 struct hdmi_spec *spec = codec->spec;
1610 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1611 uinfo->count = spec->channels_max;
1612 uinfo->value.integer.min = 0;
1613 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1614 return 0;
1615 }
1616
1617 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1618 unsigned int size, unsigned int __user *tlv)
1619 {
1620 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1621 struct hda_codec *codec = info->private_data;
1622 struct hdmi_spec *spec = codec->spec;
1623 const unsigned int valid_mask =
1624 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1625 unsigned int __user *dst;
1626 int chs, count = 0;
1627
1628 if (size < 8)
1629 return -ENOMEM;
1630 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1631 return -EFAULT;
1632 size -= 8;
1633 dst = tlv + 2;
1634 for (chs = 2; chs <= spec->channels_max; chs++) {
1635 int i, c;
1636 struct cea_channel_speaker_allocation *cap;
1637 cap = channel_allocations;
1638 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1639 int chs_bytes = chs * 4;
1640 if (cap->channels != chs)
1641 continue;
1642 if (cap->spk_mask & ~valid_mask)
1643 continue;
1644 if (size < 8)
1645 return -ENOMEM;
1646 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1647 put_user(chs_bytes, dst + 1))
1648 return -EFAULT;
1649 dst += 2;
1650 size -= 8;
1651 count += 8;
1652 if (size < chs_bytes)
1653 return -ENOMEM;
1654 size -= chs_bytes;
1655 count += chs_bytes;
1656 for (c = 7; c >= 0; c--) {
1657 int spk = cap->speakers[c];
1658 if (!spk)
1659 continue;
1660 if (put_user(spk_to_chmap(spk), dst))
1661 return -EFAULT;
1662 dst++;
1663 }
1664 }
1665 }
1666 if (put_user(count, tlv + 1))
1667 return -EFAULT;
1668 return 0;
1669 }
1670
1671 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1672 struct snd_ctl_elem_value *ucontrol)
1673 {
1674 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1675 struct hda_codec *codec = info->private_data;
1676 struct hdmi_spec *spec = codec->spec;
1677 int pin_idx = kcontrol->private_value;
1678 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1679 int i;
1680
1681 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1682 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1683 return 0;
1684 }
1685
1686 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1687 struct snd_ctl_elem_value *ucontrol)
1688 {
1689 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1690 struct hda_codec *codec = info->private_data;
1691 struct hdmi_spec *spec = codec->spec;
1692 int pin_idx = kcontrol->private_value;
1693 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1694 unsigned int ctl_idx;
1695 struct snd_pcm_substream *substream;
1696 unsigned char chmap[8];
1697 int i, ca, prepared = 0;
1698
1699 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1700 substream = snd_pcm_chmap_substream(info, ctl_idx);
1701 if (!substream || !substream->runtime)
1702 return 0; /* just for avoiding error from alsactl restore */
1703 switch (substream->runtime->status->state) {
1704 case SNDRV_PCM_STATE_OPEN:
1705 case SNDRV_PCM_STATE_SETUP:
1706 break;
1707 case SNDRV_PCM_STATE_PREPARED:
1708 prepared = 1;
1709 break;
1710 default:
1711 return -EBUSY;
1712 }
1713 memset(chmap, 0, sizeof(chmap));
1714 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1715 chmap[i] = ucontrol->value.integer.value[i];
1716 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1717 return 0;
1718 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1719 if (ca < 0)
1720 return -EINVAL;
1721 per_pin->chmap_set = true;
1722 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1723 if (prepared)
1724 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1725
1726 return 0;
1727 }
1728
1729 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1730 {
1731 struct hdmi_spec *spec = codec->spec;
1732 int pin_idx;
1733
1734 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1735 struct hda_pcm *info;
1736 struct hda_pcm_stream *pstr;
1737 struct hdmi_spec_per_pin *per_pin;
1738
1739 per_pin = get_pin(spec, pin_idx);
1740 sprintf(per_pin->pcm_name, "HDMI %d", pin_idx);
1741 info = snd_array_new(&spec->pcm_rec);
1742 if (!info)
1743 return -ENOMEM;
1744 info->name = per_pin->pcm_name;
1745 info->pcm_type = HDA_PCM_TYPE_HDMI;
1746 info->own_chmap = true;
1747
1748 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1749 pstr->substreams = 1;
1750 pstr->ops = generic_ops;
1751 /* other pstr fields are set in open */
1752 }
1753
1754 codec->num_pcms = spec->num_pins;
1755 codec->pcm_info = spec->pcm_rec.list;
1756
1757 return 0;
1758 }
1759
1760 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1761 {
1762 char hdmi_str[32] = "HDMI/DP";
1763 struct hdmi_spec *spec = codec->spec;
1764 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1765 int pcmdev = get_pcm_rec(spec, pin_idx)->device;
1766
1767 if (pcmdev > 0)
1768 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1769 if (!is_jack_detectable(codec, per_pin->pin_nid))
1770 strncat(hdmi_str, " Phantom",
1771 sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1772
1773 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1774 }
1775
1776 static int generic_hdmi_build_controls(struct hda_codec *codec)
1777 {
1778 struct hdmi_spec *spec = codec->spec;
1779 int err;
1780 int pin_idx;
1781
1782 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1783 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1784
1785 err = generic_hdmi_build_jack(codec, pin_idx);
1786 if (err < 0)
1787 return err;
1788
1789 err = snd_hda_create_dig_out_ctls(codec,
1790 per_pin->pin_nid,
1791 per_pin->mux_nids[0],
1792 HDA_PCM_TYPE_HDMI);
1793 if (err < 0)
1794 return err;
1795 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1796
1797 /* add control for ELD Bytes */
1798 err = hdmi_create_eld_ctl(codec, pin_idx,
1799 get_pcm_rec(spec, pin_idx)->device);
1800
1801 if (err < 0)
1802 return err;
1803
1804 hdmi_present_sense(per_pin, 0);
1805 }
1806
1807 /* add channel maps */
1808 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1809 struct snd_pcm_chmap *chmap;
1810 struct snd_kcontrol *kctl;
1811 int i;
1812
1813 if (!codec->pcm_info[pin_idx].pcm)
1814 break;
1815 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1816 SNDRV_PCM_STREAM_PLAYBACK,
1817 NULL, 0, pin_idx, &chmap);
1818 if (err < 0)
1819 return err;
1820 /* override handlers */
1821 chmap->private_data = codec;
1822 kctl = chmap->kctl;
1823 for (i = 0; i < kctl->count; i++)
1824 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1825 kctl->info = hdmi_chmap_ctl_info;
1826 kctl->get = hdmi_chmap_ctl_get;
1827 kctl->put = hdmi_chmap_ctl_put;
1828 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1829 }
1830
1831 return 0;
1832 }
1833
1834 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1835 {
1836 struct hdmi_spec *spec = codec->spec;
1837 int pin_idx;
1838
1839 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1840 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1841 struct hdmi_eld *eld = &per_pin->sink_eld;
1842
1843 per_pin->codec = codec;
1844 mutex_init(&eld->lock);
1845 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1846 snd_hda_eld_proc_new(codec, eld, pin_idx);
1847 }
1848 return 0;
1849 }
1850
1851 static int generic_hdmi_init(struct hda_codec *codec)
1852 {
1853 struct hdmi_spec *spec = codec->spec;
1854 int pin_idx;
1855
1856 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1857 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1858 hda_nid_t pin_nid = per_pin->pin_nid;
1859
1860 hdmi_init_pin(codec, pin_nid);
1861 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1862 }
1863 return 0;
1864 }
1865
1866 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
1867 {
1868 snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
1869 snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
1870 snd_array_init(&spec->pcm_rec, sizeof(struct hda_pcm), nums);
1871 }
1872
1873 static void hdmi_array_free(struct hdmi_spec *spec)
1874 {
1875 snd_array_free(&spec->pins);
1876 snd_array_free(&spec->cvts);
1877 snd_array_free(&spec->pcm_rec);
1878 }
1879
1880 static void generic_hdmi_free(struct hda_codec *codec)
1881 {
1882 struct hdmi_spec *spec = codec->spec;
1883 int pin_idx;
1884
1885 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1886 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1887 struct hdmi_eld *eld = &per_pin->sink_eld;
1888
1889 cancel_delayed_work(&per_pin->work);
1890 snd_hda_eld_proc_free(codec, eld);
1891 }
1892
1893 flush_workqueue(codec->bus->workq);
1894 hdmi_array_free(spec);
1895 kfree(spec);
1896 }
1897
1898 #ifdef CONFIG_PM
1899 static int generic_hdmi_resume(struct hda_codec *codec)
1900 {
1901 struct hdmi_spec *spec = codec->spec;
1902 int pin_idx;
1903
1904 generic_hdmi_init(codec);
1905 snd_hda_codec_resume_amp(codec);
1906 snd_hda_codec_resume_cache(codec);
1907
1908 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1909 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1910 hdmi_present_sense(per_pin, 1);
1911 }
1912 return 0;
1913 }
1914 #endif
1915
1916 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1917 .init = generic_hdmi_init,
1918 .free = generic_hdmi_free,
1919 .build_pcms = generic_hdmi_build_pcms,
1920 .build_controls = generic_hdmi_build_controls,
1921 .unsol_event = hdmi_unsol_event,
1922 #ifdef CONFIG_PM
1923 .resume = generic_hdmi_resume,
1924 #endif
1925 };
1926
1927
1928 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1929 hda_nid_t nid)
1930 {
1931 struct hdmi_spec *spec = codec->spec;
1932 hda_nid_t conns[4];
1933 int nconns;
1934
1935 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1936 if (nconns == spec->num_cvts &&
1937 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1938 return;
1939
1940 /* override pins connection list */
1941 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1942 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1943 }
1944
1945 #define INTEL_VENDOR_NID 0x08
1946 #define INTEL_GET_VENDOR_VERB 0xf81
1947 #define INTEL_SET_VENDOR_VERB 0x781
1948 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1949 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1950
1951 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1952 bool update_tree)
1953 {
1954 unsigned int vendor_param;
1955
1956 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1957 INTEL_GET_VENDOR_VERB, 0);
1958 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1959 return;
1960
1961 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1962 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1963 INTEL_SET_VENDOR_VERB, vendor_param);
1964 if (vendor_param == -1)
1965 return;
1966
1967 if (update_tree)
1968 snd_hda_codec_update_widgets(codec);
1969 }
1970
1971 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1972 {
1973 unsigned int vendor_param;
1974
1975 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1976 INTEL_GET_VENDOR_VERB, 0);
1977 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1978 return;
1979
1980 /* enable DP1.2 mode */
1981 vendor_param |= INTEL_EN_DP12;
1982 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1983 INTEL_SET_VENDOR_VERB, vendor_param);
1984 }
1985
1986 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
1987 * Otherwise you may get severe h/w communication errors.
1988 */
1989 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
1990 unsigned int power_state)
1991 {
1992 if (power_state == AC_PWRST_D0) {
1993 intel_haswell_enable_all_pins(codec, false);
1994 intel_haswell_fixup_enable_dp12(codec);
1995 }
1996
1997 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
1998 snd_hda_codec_set_power_to_all(codec, fg, power_state);
1999 }
2000
2001 static int patch_generic_hdmi(struct hda_codec *codec)
2002 {
2003 struct hdmi_spec *spec;
2004
2005 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2006 if (spec == NULL)
2007 return -ENOMEM;
2008
2009 codec->spec = spec;
2010 hdmi_array_init(spec, 4);
2011
2012 if (is_haswell(codec)) {
2013 intel_haswell_enable_all_pins(codec, true);
2014 intel_haswell_fixup_enable_dp12(codec);
2015 }
2016
2017 if (hdmi_parse_codec(codec) < 0) {
2018 codec->spec = NULL;
2019 kfree(spec);
2020 return -EINVAL;
2021 }
2022 codec->patch_ops = generic_hdmi_patch_ops;
2023 if (is_haswell(codec)) {
2024 codec->patch_ops.set_power_state = haswell_set_power_state;
2025 codec->dp_mst = true;
2026 }
2027
2028 generic_hdmi_init_per_pins(codec);
2029
2030 init_channel_allocations();
2031
2032 return 0;
2033 }
2034
2035 /*
2036 * Shared non-generic implementations
2037 */
2038
2039 static int simple_playback_build_pcms(struct hda_codec *codec)
2040 {
2041 struct hdmi_spec *spec = codec->spec;
2042 struct hda_pcm *info;
2043 unsigned int chans;
2044 struct hda_pcm_stream *pstr;
2045 struct hdmi_spec_per_cvt *per_cvt;
2046
2047 per_cvt = get_cvt(spec, 0);
2048 chans = get_wcaps(codec, per_cvt->cvt_nid);
2049 chans = get_wcaps_channels(chans);
2050
2051 info = snd_array_new(&spec->pcm_rec);
2052 if (!info)
2053 return -ENOMEM;
2054 info->name = get_pin(spec, 0)->pcm_name;
2055 sprintf(info->name, "HDMI 0");
2056 info->pcm_type = HDA_PCM_TYPE_HDMI;
2057 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2058 *pstr = spec->pcm_playback;
2059 pstr->nid = per_cvt->cvt_nid;
2060 if (pstr->channels_max <= 2 && chans && chans <= 16)
2061 pstr->channels_max = chans;
2062
2063 codec->num_pcms = 1;
2064 codec->pcm_info = info;
2065
2066 return 0;
2067 }
2068
2069 /* unsolicited event for jack sensing */
2070 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2071 unsigned int res)
2072 {
2073 snd_hda_jack_set_dirty_all(codec);
2074 snd_hda_jack_report_sync(codec);
2075 }
2076
2077 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2078 * as long as spec->pins[] is set correctly
2079 */
2080 #define simple_hdmi_build_jack generic_hdmi_build_jack
2081
2082 static int simple_playback_build_controls(struct hda_codec *codec)
2083 {
2084 struct hdmi_spec *spec = codec->spec;
2085 struct hdmi_spec_per_cvt *per_cvt;
2086 int err;
2087
2088 per_cvt = get_cvt(spec, 0);
2089 err = snd_hda_create_spdif_out_ctls(codec, per_cvt->cvt_nid,
2090 per_cvt->cvt_nid);
2091 if (err < 0)
2092 return err;
2093 return simple_hdmi_build_jack(codec, 0);
2094 }
2095
2096 static int simple_playback_init(struct hda_codec *codec)
2097 {
2098 struct hdmi_spec *spec = codec->spec;
2099 struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2100 hda_nid_t pin = per_pin->pin_nid;
2101
2102 snd_hda_codec_write(codec, pin, 0,
2103 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2104 /* some codecs require to unmute the pin */
2105 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2106 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2107 AMP_OUT_UNMUTE);
2108 snd_hda_jack_detect_enable(codec, pin, pin);
2109 return 0;
2110 }
2111
2112 static void simple_playback_free(struct hda_codec *codec)
2113 {
2114 struct hdmi_spec *spec = codec->spec;
2115
2116 hdmi_array_free(spec);
2117 kfree(spec);
2118 }
2119
2120 /*
2121 * Nvidia specific implementations
2122 */
2123
2124 #define Nv_VERB_SET_Channel_Allocation 0xF79
2125 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
2126 #define Nv_VERB_SET_Audio_Protection_On 0xF98
2127 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
2128
2129 #define nvhdmi_master_con_nid_7x 0x04
2130 #define nvhdmi_master_pin_nid_7x 0x05
2131
2132 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2133 /*front, rear, clfe, rear_surr */
2134 0x6, 0x8, 0xa, 0xc,
2135 };
2136
2137 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2138 /* set audio protect on */
2139 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2140 /* enable digital output on pin widget */
2141 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2142 {} /* terminator */
2143 };
2144
2145 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2146 /* set audio protect on */
2147 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2148 /* enable digital output on pin widget */
2149 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2150 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2151 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2152 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2153 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2154 {} /* terminator */
2155 };
2156
2157 #ifdef LIMITED_RATE_FMT_SUPPORT
2158 /* support only the safe format and rate */
2159 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
2160 #define SUPPORTED_MAXBPS 16
2161 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
2162 #else
2163 /* support all rates and formats */
2164 #define SUPPORTED_RATES \
2165 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2166 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2167 SNDRV_PCM_RATE_192000)
2168 #define SUPPORTED_MAXBPS 24
2169 #define SUPPORTED_FORMATS \
2170 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2171 #endif
2172
2173 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2174 {
2175 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2176 return 0;
2177 }
2178
2179 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2180 {
2181 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2182 return 0;
2183 }
2184
2185 static unsigned int channels_2_6_8[] = {
2186 2, 6, 8
2187 };
2188
2189 static unsigned int channels_2_8[] = {
2190 2, 8
2191 };
2192
2193 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2194 .count = ARRAY_SIZE(channels_2_6_8),
2195 .list = channels_2_6_8,
2196 .mask = 0,
2197 };
2198
2199 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2200 .count = ARRAY_SIZE(channels_2_8),
2201 .list = channels_2_8,
2202 .mask = 0,
2203 };
2204
2205 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2206 struct hda_codec *codec,
2207 struct snd_pcm_substream *substream)
2208 {
2209 struct hdmi_spec *spec = codec->spec;
2210 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2211
2212 switch (codec->preset->id) {
2213 case 0x10de0002:
2214 case 0x10de0003:
2215 case 0x10de0005:
2216 case 0x10de0006:
2217 hw_constraints_channels = &hw_constraints_2_8_channels;
2218 break;
2219 case 0x10de0007:
2220 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2221 break;
2222 default:
2223 break;
2224 }
2225
2226 if (hw_constraints_channels != NULL) {
2227 snd_pcm_hw_constraint_list(substream->runtime, 0,
2228 SNDRV_PCM_HW_PARAM_CHANNELS,
2229 hw_constraints_channels);
2230 } else {
2231 snd_pcm_hw_constraint_step(substream->runtime, 0,
2232 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2233 }
2234
2235 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2236 }
2237
2238 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2239 struct hda_codec *codec,
2240 struct snd_pcm_substream *substream)
2241 {
2242 struct hdmi_spec *spec = codec->spec;
2243 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2244 }
2245
2246 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2247 struct hda_codec *codec,
2248 unsigned int stream_tag,
2249 unsigned int format,
2250 struct snd_pcm_substream *substream)
2251 {
2252 struct hdmi_spec *spec = codec->spec;
2253 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2254 stream_tag, format, substream);
2255 }
2256
2257 static const struct hda_pcm_stream simple_pcm_playback = {
2258 .substreams = 1,
2259 .channels_min = 2,
2260 .channels_max = 2,
2261 .ops = {
2262 .open = simple_playback_pcm_open,
2263 .close = simple_playback_pcm_close,
2264 .prepare = simple_playback_pcm_prepare
2265 },
2266 };
2267
2268 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2269 .build_controls = simple_playback_build_controls,
2270 .build_pcms = simple_playback_build_pcms,
2271 .init = simple_playback_init,
2272 .free = simple_playback_free,
2273 .unsol_event = simple_hdmi_unsol_event,
2274 };
2275
2276 static int patch_simple_hdmi(struct hda_codec *codec,
2277 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2278 {
2279 struct hdmi_spec *spec;
2280 struct hdmi_spec_per_cvt *per_cvt;
2281 struct hdmi_spec_per_pin *per_pin;
2282
2283 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2284 if (!spec)
2285 return -ENOMEM;
2286
2287 codec->spec = spec;
2288 hdmi_array_init(spec, 1);
2289
2290 spec->multiout.num_dacs = 0; /* no analog */
2291 spec->multiout.max_channels = 2;
2292 spec->multiout.dig_out_nid = cvt_nid;
2293 spec->num_cvts = 1;
2294 spec->num_pins = 1;
2295 per_pin = snd_array_new(&spec->pins);
2296 per_cvt = snd_array_new(&spec->cvts);
2297 if (!per_pin || !per_cvt) {
2298 simple_playback_free(codec);
2299 return -ENOMEM;
2300 }
2301 per_cvt->cvt_nid = cvt_nid;
2302 per_pin->pin_nid = pin_nid;
2303 spec->pcm_playback = simple_pcm_playback;
2304
2305 codec->patch_ops = simple_hdmi_patch_ops;
2306
2307 return 0;
2308 }
2309
2310 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2311 int channels)
2312 {
2313 unsigned int chanmask;
2314 int chan = channels ? (channels - 1) : 1;
2315
2316 switch (channels) {
2317 default:
2318 case 0:
2319 case 2:
2320 chanmask = 0x00;
2321 break;
2322 case 4:
2323 chanmask = 0x08;
2324 break;
2325 case 6:
2326 chanmask = 0x0b;
2327 break;
2328 case 8:
2329 chanmask = 0x13;
2330 break;
2331 }
2332
2333 /* Set the audio infoframe channel allocation and checksum fields. The
2334 * channel count is computed implicitly by the hardware. */
2335 snd_hda_codec_write(codec, 0x1, 0,
2336 Nv_VERB_SET_Channel_Allocation, chanmask);
2337
2338 snd_hda_codec_write(codec, 0x1, 0,
2339 Nv_VERB_SET_Info_Frame_Checksum,
2340 (0x71 - chan - chanmask));
2341 }
2342
2343 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2344 struct hda_codec *codec,
2345 struct snd_pcm_substream *substream)
2346 {
2347 struct hdmi_spec *spec = codec->spec;
2348 int i;
2349
2350 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2351 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2352 for (i = 0; i < 4; i++) {
2353 /* set the stream id */
2354 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2355 AC_VERB_SET_CHANNEL_STREAMID, 0);
2356 /* set the stream format */
2357 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2358 AC_VERB_SET_STREAM_FORMAT, 0);
2359 }
2360
2361 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2362 * streams are disabled. */
2363 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2364
2365 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2366 }
2367
2368 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2369 struct hda_codec *codec,
2370 unsigned int stream_tag,
2371 unsigned int format,
2372 struct snd_pcm_substream *substream)
2373 {
2374 int chs;
2375 unsigned int dataDCC2, channel_id;
2376 int i;
2377 struct hdmi_spec *spec = codec->spec;
2378 struct hda_spdif_out *spdif;
2379 struct hdmi_spec_per_cvt *per_cvt;
2380
2381 mutex_lock(&codec->spdif_mutex);
2382 per_cvt = get_cvt(spec, 0);
2383 spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2384
2385 chs = substream->runtime->channels;
2386
2387 dataDCC2 = 0x2;
2388
2389 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2390 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2391 snd_hda_codec_write(codec,
2392 nvhdmi_master_con_nid_7x,
2393 0,
2394 AC_VERB_SET_DIGI_CONVERT_1,
2395 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2396
2397 /* set the stream id */
2398 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2399 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2400
2401 /* set the stream format */
2402 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2403 AC_VERB_SET_STREAM_FORMAT, format);
2404
2405 /* turn on again (if needed) */
2406 /* enable and set the channel status audio/data flag */
2407 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2408 snd_hda_codec_write(codec,
2409 nvhdmi_master_con_nid_7x,
2410 0,
2411 AC_VERB_SET_DIGI_CONVERT_1,
2412 spdif->ctls & 0xff);
2413 snd_hda_codec_write(codec,
2414 nvhdmi_master_con_nid_7x,
2415 0,
2416 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2417 }
2418
2419 for (i = 0; i < 4; i++) {
2420 if (chs == 2)
2421 channel_id = 0;
2422 else
2423 channel_id = i * 2;
2424
2425 /* turn off SPDIF once;
2426 *otherwise the IEC958 bits won't be updated
2427 */
2428 if (codec->spdif_status_reset &&
2429 (spdif->ctls & AC_DIG1_ENABLE))
2430 snd_hda_codec_write(codec,
2431 nvhdmi_con_nids_7x[i],
2432 0,
2433 AC_VERB_SET_DIGI_CONVERT_1,
2434 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2435 /* set the stream id */
2436 snd_hda_codec_write(codec,
2437 nvhdmi_con_nids_7x[i],
2438 0,
2439 AC_VERB_SET_CHANNEL_STREAMID,
2440 (stream_tag << 4) | channel_id);
2441 /* set the stream format */
2442 snd_hda_codec_write(codec,
2443 nvhdmi_con_nids_7x[i],
2444 0,
2445 AC_VERB_SET_STREAM_FORMAT,
2446 format);
2447 /* turn on again (if needed) */
2448 /* enable and set the channel status audio/data flag */
2449 if (codec->spdif_status_reset &&
2450 (spdif->ctls & AC_DIG1_ENABLE)) {
2451 snd_hda_codec_write(codec,
2452 nvhdmi_con_nids_7x[i],
2453 0,
2454 AC_VERB_SET_DIGI_CONVERT_1,
2455 spdif->ctls & 0xff);
2456 snd_hda_codec_write(codec,
2457 nvhdmi_con_nids_7x[i],
2458 0,
2459 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2460 }
2461 }
2462
2463 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2464
2465 mutex_unlock(&codec->spdif_mutex);
2466 return 0;
2467 }
2468
2469 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2470 .substreams = 1,
2471 .channels_min = 2,
2472 .channels_max = 8,
2473 .nid = nvhdmi_master_con_nid_7x,
2474 .rates = SUPPORTED_RATES,
2475 .maxbps = SUPPORTED_MAXBPS,
2476 .formats = SUPPORTED_FORMATS,
2477 .ops = {
2478 .open = simple_playback_pcm_open,
2479 .close = nvhdmi_8ch_7x_pcm_close,
2480 .prepare = nvhdmi_8ch_7x_pcm_prepare
2481 },
2482 };
2483
2484 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2485 {
2486 struct hdmi_spec *spec;
2487 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2488 nvhdmi_master_pin_nid_7x);
2489 if (err < 0)
2490 return err;
2491
2492 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2493 /* override the PCM rates, etc, as the codec doesn't give full list */
2494 spec = codec->spec;
2495 spec->pcm_playback.rates = SUPPORTED_RATES;
2496 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2497 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2498 return 0;
2499 }
2500
2501 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2502 {
2503 struct hdmi_spec *spec = codec->spec;
2504 int err = simple_playback_build_pcms(codec);
2505 if (!err) {
2506 struct hda_pcm *info = get_pcm_rec(spec, 0);
2507 info->own_chmap = true;
2508 }
2509 return err;
2510 }
2511
2512 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2513 {
2514 struct hdmi_spec *spec = codec->spec;
2515 struct hda_pcm *info;
2516 struct snd_pcm_chmap *chmap;
2517 int err;
2518
2519 err = simple_playback_build_controls(codec);
2520 if (err < 0)
2521 return err;
2522
2523 /* add channel maps */
2524 info = get_pcm_rec(spec, 0);
2525 err = snd_pcm_add_chmap_ctls(info->pcm,
2526 SNDRV_PCM_STREAM_PLAYBACK,
2527 snd_pcm_alt_chmaps, 8, 0, &chmap);
2528 if (err < 0)
2529 return err;
2530 switch (codec->preset->id) {
2531 case 0x10de0002:
2532 case 0x10de0003:
2533 case 0x10de0005:
2534 case 0x10de0006:
2535 chmap->channel_mask = (1U << 2) | (1U << 8);
2536 break;
2537 case 0x10de0007:
2538 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2539 }
2540 return 0;
2541 }
2542
2543 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2544 {
2545 struct hdmi_spec *spec;
2546 int err = patch_nvhdmi_2ch(codec);
2547 if (err < 0)
2548 return err;
2549 spec = codec->spec;
2550 spec->multiout.max_channels = 8;
2551 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2552 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2553 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2554 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2555
2556 /* Initialize the audio infoframe channel mask and checksum to something
2557 * valid */
2558 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2559
2560 return 0;
2561 }
2562
2563 /*
2564 * ATI-specific implementations
2565 *
2566 * FIXME: we may omit the whole this and use the generic code once after
2567 * it's confirmed to work.
2568 */
2569
2570 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2571 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2572
2573 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2574 struct hda_codec *codec,
2575 unsigned int stream_tag,
2576 unsigned int format,
2577 struct snd_pcm_substream *substream)
2578 {
2579 struct hdmi_spec *spec = codec->spec;
2580 struct hdmi_spec_per_cvt *per_cvt = get_cvt(spec, 0);
2581 int chans = substream->runtime->channels;
2582 int i, err;
2583
2584 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2585 substream);
2586 if (err < 0)
2587 return err;
2588 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2589 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2590 /* FIXME: XXX */
2591 for (i = 0; i < chans; i++) {
2592 snd_hda_codec_write(codec, per_cvt->cvt_nid, 0,
2593 AC_VERB_SET_HDMI_CHAN_SLOT,
2594 (i << 4) | i);
2595 }
2596 return 0;
2597 }
2598
2599 static int patch_atihdmi(struct hda_codec *codec)
2600 {
2601 struct hdmi_spec *spec;
2602 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2603 if (err < 0)
2604 return err;
2605 spec = codec->spec;
2606 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2607 return 0;
2608 }
2609
2610 /* VIA HDMI Implementation */
2611 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2612 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2613
2614 static int patch_via_hdmi(struct hda_codec *codec)
2615 {
2616 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2617 }
2618
2619 /*
2620 * patch entries
2621 */
2622 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2623 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2624 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2625 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2626 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2627 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2628 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2629 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2630 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2631 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2632 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2633 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2634 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2635 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2636 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2637 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2638 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2639 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2640 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2641 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2642 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2643 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2644 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2645 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2646 /* 17 is known to be absent */
2647 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2648 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2649 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2650 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2651 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2652 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2653 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2654 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2655 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2656 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2657 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2658 { .id = 0x10de0060, .name = "GPU 60 HDMI/DP", .patch = patch_generic_hdmi },
2659 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2660 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2661 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2662 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2663 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2664 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2665 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2666 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2667 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2668 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2669 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2670 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2671 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2672 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2673 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2674 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2675 {} /* terminator */
2676 };
2677
2678 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2679 MODULE_ALIAS("snd-hda-codec-id:10027919");
2680 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2681 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2682 MODULE_ALIAS("snd-hda-codec-id:10951390");
2683 MODULE_ALIAS("snd-hda-codec-id:10951392");
2684 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2685 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2686 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2687 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2688 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2689 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2690 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2691 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2692 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2693 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2694 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2695 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2696 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2697 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2698 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2699 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2700 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2701 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2702 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2703 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2704 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2705 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2706 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2707 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2708 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2709 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2710 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2711 MODULE_ALIAS("snd-hda-codec-id:10de0060");
2712 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2713 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2714 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2715 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2716 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2717 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2718 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2719 MODULE_ALIAS("snd-hda-codec-id:80860054");
2720 MODULE_ALIAS("snd-hda-codec-id:80862801");
2721 MODULE_ALIAS("snd-hda-codec-id:80862802");
2722 MODULE_ALIAS("snd-hda-codec-id:80862803");
2723 MODULE_ALIAS("snd-hda-codec-id:80862804");
2724 MODULE_ALIAS("snd-hda-codec-id:80862805");
2725 MODULE_ALIAS("snd-hda-codec-id:80862806");
2726 MODULE_ALIAS("snd-hda-codec-id:80862807");
2727 MODULE_ALIAS("snd-hda-codec-id:80862880");
2728 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2729
2730 MODULE_LICENSE("GPL");
2731 MODULE_DESCRIPTION("HDMI HD-audio codec");
2732 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2733 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2734 MODULE_ALIAS("snd-hda-codec-atihdmi");
2735
2736 static struct hda_codec_preset_list intel_list = {
2737 .preset = snd_hda_preset_hdmi,
2738 .owner = THIS_MODULE,
2739 };
2740
2741 static int __init patch_hdmi_init(void)
2742 {
2743 return snd_hda_add_codec_preset(&intel_list);
2744 }
2745
2746 static void __exit patch_hdmi_exit(void)
2747 {
2748 snd_hda_delete_codec_preset(&intel_list);
2749 }
2750
2751 module_init(patch_hdmi_init)
2752 module_exit(patch_hdmi_exit)
Linux kernel - Deliverables
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