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ALSA: hda - Fix default multichannel HDMI mapping regression
[deliverable/linux.git] / sound / pci / hda / patch_hdmi.c
1 /*
2 *
3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
4 *
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 *
10 * Authors:
11 * Wu Fengguang <wfg@linux.intel.com>
12 *
13 * Maintained by:
14 * Wu Fengguang <wfg@linux.intel.com>
15 *
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 * for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
41 #include "hda_jack.h"
42
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46
47 /*
48 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
49 * could support N independent pipes, each of them can be connected to one or
50 * more ports (DVI, HDMI or DisplayPort).
51 *
52 * The HDA correspondence of pipes/ports are converter/pin nodes.
53 */
54 #define MAX_HDMI_CVTS 8
55 #define MAX_HDMI_PINS 8
56
57 struct hdmi_spec_per_cvt {
58 hda_nid_t cvt_nid;
59 int assigned;
60 unsigned int channels_min;
61 unsigned int channels_max;
62 u32 rates;
63 u64 formats;
64 unsigned int maxbps;
65 };
66
67 struct hdmi_spec_per_pin {
68 hda_nid_t pin_nid;
69 int num_mux_nids;
70 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
71
72 struct hda_codec *codec;
73 struct hdmi_eld sink_eld;
74 struct delayed_work work;
75 int repoll_count;
76 bool non_pcm;
77 bool chmap_set; /* channel-map override by ALSA API? */
78 unsigned char chmap[8]; /* ALSA API channel-map */
79 };
80
81 struct hdmi_spec {
82 int num_cvts;
83 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
84
85 int num_pins;
86 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
87 struct hda_pcm pcm_rec[MAX_HDMI_PINS];
88 unsigned int channels_max; /* max over all cvts */
89
90 /*
91 * Non-generic ATI/NVIDIA specific
92 */
93 struct hda_multi_out multiout;
94 struct hda_pcm_stream pcm_playback;
95 };
96
97
98 struct hdmi_audio_infoframe {
99 u8 type; /* 0x84 */
100 u8 ver; /* 0x01 */
101 u8 len; /* 0x0a */
102
103 u8 checksum;
104
105 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
106 u8 SS01_SF24;
107 u8 CXT04;
108 u8 CA;
109 u8 LFEPBL01_LSV36_DM_INH7;
110 };
111
112 struct dp_audio_infoframe {
113 u8 type; /* 0x84 */
114 u8 len; /* 0x1b */
115 u8 ver; /* 0x11 << 2 */
116
117 u8 CC02_CT47; /* match with HDMI infoframe from this on */
118 u8 SS01_SF24;
119 u8 CXT04;
120 u8 CA;
121 u8 LFEPBL01_LSV36_DM_INH7;
122 };
123
124 union audio_infoframe {
125 struct hdmi_audio_infoframe hdmi;
126 struct dp_audio_infoframe dp;
127 u8 bytes[0];
128 };
129
130 /*
131 * CEA speaker placement:
132 *
133 * FLH FCH FRH
134 * FLW FL FLC FC FRC FR FRW
135 *
136 * LFE
137 * TC
138 *
139 * RL RLC RC RRC RR
140 *
141 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
142 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
143 */
144 enum cea_speaker_placement {
145 FL = (1 << 0), /* Front Left */
146 FC = (1 << 1), /* Front Center */
147 FR = (1 << 2), /* Front Right */
148 FLC = (1 << 3), /* Front Left Center */
149 FRC = (1 << 4), /* Front Right Center */
150 RL = (1 << 5), /* Rear Left */
151 RC = (1 << 6), /* Rear Center */
152 RR = (1 << 7), /* Rear Right */
153 RLC = (1 << 8), /* Rear Left Center */
154 RRC = (1 << 9), /* Rear Right Center */
155 LFE = (1 << 10), /* Low Frequency Effect */
156 FLW = (1 << 11), /* Front Left Wide */
157 FRW = (1 << 12), /* Front Right Wide */
158 FLH = (1 << 13), /* Front Left High */
159 FCH = (1 << 14), /* Front Center High */
160 FRH = (1 << 15), /* Front Right High */
161 TC = (1 << 16), /* Top Center */
162 };
163
164 /*
165 * ELD SA bits in the CEA Speaker Allocation data block
166 */
167 static int eld_speaker_allocation_bits[] = {
168 [0] = FL | FR,
169 [1] = LFE,
170 [2] = FC,
171 [3] = RL | RR,
172 [4] = RC,
173 [5] = FLC | FRC,
174 [6] = RLC | RRC,
175 /* the following are not defined in ELD yet */
176 [7] = FLW | FRW,
177 [8] = FLH | FRH,
178 [9] = TC,
179 [10] = FCH,
180 };
181
182 struct cea_channel_speaker_allocation {
183 int ca_index;
184 int speakers[8];
185
186 /* derived values, just for convenience */
187 int channels;
188 int spk_mask;
189 };
190
191 /*
192 * ALSA sequence is:
193 *
194 * surround40 surround41 surround50 surround51 surround71
195 * ch0 front left = = = =
196 * ch1 front right = = = =
197 * ch2 rear left = = = =
198 * ch3 rear right = = = =
199 * ch4 LFE center center center
200 * ch5 LFE LFE
201 * ch6 side left
202 * ch7 side right
203 *
204 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
205 */
206 static int hdmi_channel_mapping[0x32][8] = {
207 /* stereo */
208 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
209 /* 2.1 */
210 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
211 /* Dolby Surround */
212 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
213 /* surround40 */
214 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
215 /* 4ch */
216 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
217 /* surround41 */
218 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
219 /* surround50 */
220 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
221 /* surround51 */
222 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
223 /* 7.1 */
224 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
225 };
226
227 /*
228 * This is an ordered list!
229 *
230 * The preceding ones have better chances to be selected by
231 * hdmi_channel_allocation().
232 */
233 static struct cea_channel_speaker_allocation channel_allocations[] = {
234 /* channel: 7 6 5 4 3 2 1 0 */
235 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
236 /* 2.1 */
237 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
238 /* Dolby Surround */
239 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
240 /* surround40 */
241 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
242 /* surround41 */
243 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
244 /* surround50 */
245 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
246 /* surround51 */
247 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
248 /* 6.1 */
249 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
250 /* surround71 */
251 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
252
253 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
254 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
255 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
256 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
257 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
258 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
259 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
260 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
261 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
262 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
263 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
264 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
265 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
266 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
267 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
268 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
269 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
270 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
271 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
272 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
273 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
274 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
275 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
276 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
277 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
278 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
279 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
280 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
281 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
282 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
283 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
284 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
285 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
286 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
287 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
288 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
289 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
290 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
291 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
292 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
293 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
294 };
295
296
297 /*
298 * HDMI routines
299 */
300
301 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
302 {
303 int pin_idx;
304
305 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
306 if (spec->pins[pin_idx].pin_nid == pin_nid)
307 return pin_idx;
308
309 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
310 return -EINVAL;
311 }
312
313 static int hinfo_to_pin_index(struct hdmi_spec *spec,
314 struct hda_pcm_stream *hinfo)
315 {
316 int pin_idx;
317
318 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
319 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
320 return pin_idx;
321
322 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
323 return -EINVAL;
324 }
325
326 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
327 {
328 int cvt_idx;
329
330 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
331 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
332 return cvt_idx;
333
334 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
335 return -EINVAL;
336 }
337
338 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
339 struct snd_ctl_elem_info *uinfo)
340 {
341 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
342 struct hdmi_spec *spec;
343 int pin_idx;
344
345 spec = codec->spec;
346 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
347
348 pin_idx = kcontrol->private_value;
349 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
350
351 return 0;
352 }
353
354 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
355 struct snd_ctl_elem_value *ucontrol)
356 {
357 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
358 struct hdmi_spec *spec;
359 int pin_idx;
360
361 spec = codec->spec;
362 pin_idx = kcontrol->private_value;
363
364 memcpy(ucontrol->value.bytes.data,
365 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
366
367 return 0;
368 }
369
370 static struct snd_kcontrol_new eld_bytes_ctl = {
371 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
372 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
373 .name = "ELD",
374 .info = hdmi_eld_ctl_info,
375 .get = hdmi_eld_ctl_get,
376 };
377
378 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
379 int device)
380 {
381 struct snd_kcontrol *kctl;
382 struct hdmi_spec *spec = codec->spec;
383 int err;
384
385 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
386 if (!kctl)
387 return -ENOMEM;
388 kctl->private_value = pin_idx;
389 kctl->id.device = device;
390
391 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
392 if (err < 0)
393 return err;
394
395 return 0;
396 }
397
398 #ifdef BE_PARANOID
399 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
400 int *packet_index, int *byte_index)
401 {
402 int val;
403
404 val = snd_hda_codec_read(codec, pin_nid, 0,
405 AC_VERB_GET_HDMI_DIP_INDEX, 0);
406
407 *packet_index = val >> 5;
408 *byte_index = val & 0x1f;
409 }
410 #endif
411
412 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
413 int packet_index, int byte_index)
414 {
415 int val;
416
417 val = (packet_index << 5) | (byte_index & 0x1f);
418
419 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
420 }
421
422 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
423 unsigned char val)
424 {
425 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
426 }
427
428 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
429 {
430 /* Unmute */
431 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
432 snd_hda_codec_write(codec, pin_nid, 0,
433 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
434 /* Enable pin out: some machines with GM965 gets broken output when
435 * the pin is disabled or changed while using with HDMI
436 */
437 snd_hda_codec_write(codec, pin_nid, 0,
438 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
439 }
440
441 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
442 {
443 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
444 AC_VERB_GET_CVT_CHAN_COUNT, 0);
445 }
446
447 static void hdmi_set_channel_count(struct hda_codec *codec,
448 hda_nid_t cvt_nid, int chs)
449 {
450 if (chs != hdmi_get_channel_count(codec, cvt_nid))
451 snd_hda_codec_write(codec, cvt_nid, 0,
452 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
453 }
454
455
456 /*
457 * Channel mapping routines
458 */
459
460 /*
461 * Compute derived values in channel_allocations[].
462 */
463 static void init_channel_allocations(void)
464 {
465 int i, j;
466 struct cea_channel_speaker_allocation *p;
467
468 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
469 p = channel_allocations + i;
470 p->channels = 0;
471 p->spk_mask = 0;
472 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
473 if (p->speakers[j]) {
474 p->channels++;
475 p->spk_mask |= p->speakers[j];
476 }
477 }
478 }
479
480 static int get_channel_allocation_order(int ca)
481 {
482 int i;
483
484 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
485 if (channel_allocations[i].ca_index == ca)
486 break;
487 }
488 return i;
489 }
490
491 /*
492 * The transformation takes two steps:
493 *
494 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
495 * spk_mask => (channel_allocations[]) => ai->CA
496 *
497 * TODO: it could select the wrong CA from multiple candidates.
498 */
499 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
500 {
501 int i;
502 int ca = 0;
503 int spk_mask = 0;
504 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
505
506 /*
507 * CA defaults to 0 for basic stereo audio
508 */
509 if (channels <= 2)
510 return 0;
511
512 /*
513 * expand ELD's speaker allocation mask
514 *
515 * ELD tells the speaker mask in a compact(paired) form,
516 * expand ELD's notions to match the ones used by Audio InfoFrame.
517 */
518 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
519 if (eld->spk_alloc & (1 << i))
520 spk_mask |= eld_speaker_allocation_bits[i];
521 }
522
523 /* search for the first working match in the CA table */
524 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
525 if (channels == channel_allocations[i].channels &&
526 (spk_mask & channel_allocations[i].spk_mask) ==
527 channel_allocations[i].spk_mask) {
528 ca = channel_allocations[i].ca_index;
529 break;
530 }
531 }
532
533 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
534 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
535 ca, channels, buf);
536
537 return ca;
538 }
539
540 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
541 hda_nid_t pin_nid)
542 {
543 #ifdef CONFIG_SND_DEBUG_VERBOSE
544 int i;
545 int slot;
546
547 for (i = 0; i < 8; i++) {
548 slot = snd_hda_codec_read(codec, pin_nid, 0,
549 AC_VERB_GET_HDMI_CHAN_SLOT, i);
550 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
551 slot >> 4, slot & 0xf);
552 }
553 #endif
554 }
555
556
557 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
558 hda_nid_t pin_nid,
559 bool non_pcm,
560 int ca)
561 {
562 int i;
563 int err;
564 int order;
565 int non_pcm_mapping[8];
566
567 order = get_channel_allocation_order(ca);
568
569 if (hdmi_channel_mapping[ca][1] == 0) {
570 for (i = 0; i < channel_allocations[order].channels; i++)
571 hdmi_channel_mapping[ca][i] = i | (i << 4);
572 for (; i < 8; i++)
573 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
574 }
575
576 if (non_pcm) {
577 for (i = 0; i < channel_allocations[order].channels; i++)
578 non_pcm_mapping[i] = i | (i << 4);
579 for (; i < 8; i++)
580 non_pcm_mapping[i] = 0xf | (i << 4);
581 }
582
583 for (i = 0; i < 8; i++) {
584 err = snd_hda_codec_write(codec, pin_nid, 0,
585 AC_VERB_SET_HDMI_CHAN_SLOT,
586 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
587 if (err) {
588 snd_printdd(KERN_NOTICE
589 "HDMI: channel mapping failed\n");
590 break;
591 }
592 }
593
594 hdmi_debug_channel_mapping(codec, pin_nid);
595 }
596
597 struct channel_map_table {
598 unsigned char map; /* ALSA API channel map position */
599 unsigned char cea_slot; /* CEA slot value */
600 int spk_mask; /* speaker position bit mask */
601 };
602
603 static struct channel_map_table map_tables[] = {
604 { SNDRV_CHMAP_FL, 0x00, FL },
605 { SNDRV_CHMAP_FR, 0x01, FR },
606 { SNDRV_CHMAP_RL, 0x04, RL },
607 { SNDRV_CHMAP_RR, 0x05, RR },
608 { SNDRV_CHMAP_LFE, 0x02, LFE },
609 { SNDRV_CHMAP_FC, 0x03, FC },
610 { SNDRV_CHMAP_RLC, 0x06, RLC },
611 { SNDRV_CHMAP_RRC, 0x07, RRC },
612 {} /* terminator */
613 };
614
615 /* from ALSA API channel position to speaker bit mask */
616 static int to_spk_mask(unsigned char c)
617 {
618 struct channel_map_table *t = map_tables;
619 for (; t->map; t++) {
620 if (t->map == c)
621 return t->spk_mask;
622 }
623 return 0;
624 }
625
626 /* from ALSA API channel position to CEA slot */
627 static int to_cea_slot(unsigned char c)
628 {
629 struct channel_map_table *t = map_tables;
630 for (; t->map; t++) {
631 if (t->map == c)
632 return t->cea_slot;
633 }
634 return 0x0f;
635 }
636
637 /* from CEA slot to ALSA API channel position */
638 static int from_cea_slot(unsigned char c)
639 {
640 struct channel_map_table *t = map_tables;
641 for (; t->map; t++) {
642 if (t->cea_slot == c)
643 return t->map;
644 }
645 return 0;
646 }
647
648 /* from speaker bit mask to ALSA API channel position */
649 static int spk_to_chmap(int spk)
650 {
651 struct channel_map_table *t = map_tables;
652 for (; t->map; t++) {
653 if (t->spk_mask == spk)
654 return t->map;
655 }
656 return 0;
657 }
658
659 /* get the CA index corresponding to the given ALSA API channel map */
660 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
661 {
662 int i, spks = 0, spk_mask = 0;
663
664 for (i = 0; i < chs; i++) {
665 int mask = to_spk_mask(map[i]);
666 if (mask) {
667 spk_mask |= mask;
668 spks++;
669 }
670 }
671
672 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
673 if ((chs == channel_allocations[i].channels ||
674 spks == channel_allocations[i].channels) &&
675 (spk_mask & channel_allocations[i].spk_mask) ==
676 channel_allocations[i].spk_mask)
677 return channel_allocations[i].ca_index;
678 }
679 return -1;
680 }
681
682 /* set up the channel slots for the given ALSA API channel map */
683 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
684 hda_nid_t pin_nid,
685 int chs, unsigned char *map)
686 {
687 int i;
688 for (i = 0; i < 8; i++) {
689 int val, err;
690 if (i < chs)
691 val = to_cea_slot(map[i]);
692 else
693 val = 0xf;
694 val |= (i << 4);
695 err = snd_hda_codec_write(codec, pin_nid, 0,
696 AC_VERB_SET_HDMI_CHAN_SLOT, val);
697 if (err)
698 return -EINVAL;
699 }
700 return 0;
701 }
702
703 /* store ALSA API channel map from the current default map */
704 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
705 {
706 int i;
707 for (i = 0; i < 8; i++) {
708 if (i < channel_allocations[ca].channels)
709 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
710 else
711 map[i] = 0;
712 }
713 }
714
715 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
716 hda_nid_t pin_nid, bool non_pcm, int ca,
717 int channels, unsigned char *map,
718 bool chmap_set)
719 {
720 if (!non_pcm && chmap_set) {
721 hdmi_manual_setup_channel_mapping(codec, pin_nid,
722 channels, map);
723 } else {
724 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
725 hdmi_setup_fake_chmap(map, ca);
726 }
727 }
728
729 /*
730 * Audio InfoFrame routines
731 */
732
733 /*
734 * Enable Audio InfoFrame Transmission
735 */
736 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
737 hda_nid_t pin_nid)
738 {
739 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
740 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
741 AC_DIPXMIT_BEST);
742 }
743
744 /*
745 * Disable Audio InfoFrame Transmission
746 */
747 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
748 hda_nid_t pin_nid)
749 {
750 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
751 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
752 AC_DIPXMIT_DISABLE);
753 }
754
755 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
756 {
757 #ifdef CONFIG_SND_DEBUG_VERBOSE
758 int i;
759 int size;
760
761 size = snd_hdmi_get_eld_size(codec, pin_nid);
762 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
763
764 for (i = 0; i < 8; i++) {
765 size = snd_hda_codec_read(codec, pin_nid, 0,
766 AC_VERB_GET_HDMI_DIP_SIZE, i);
767 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
768 }
769 #endif
770 }
771
772 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
773 {
774 #ifdef BE_PARANOID
775 int i, j;
776 int size;
777 int pi, bi;
778 for (i = 0; i < 8; i++) {
779 size = snd_hda_codec_read(codec, pin_nid, 0,
780 AC_VERB_GET_HDMI_DIP_SIZE, i);
781 if (size == 0)
782 continue;
783
784 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
785 for (j = 1; j < 1000; j++) {
786 hdmi_write_dip_byte(codec, pin_nid, 0x0);
787 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
788 if (pi != i)
789 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
790 bi, pi, i);
791 if (bi == 0) /* byte index wrapped around */
792 break;
793 }
794 snd_printd(KERN_INFO
795 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
796 i, size, j);
797 }
798 #endif
799 }
800
801 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
802 {
803 u8 *bytes = (u8 *)hdmi_ai;
804 u8 sum = 0;
805 int i;
806
807 hdmi_ai->checksum = 0;
808
809 for (i = 0; i < sizeof(*hdmi_ai); i++)
810 sum += bytes[i];
811
812 hdmi_ai->checksum = -sum;
813 }
814
815 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
816 hda_nid_t pin_nid,
817 u8 *dip, int size)
818 {
819 int i;
820
821 hdmi_debug_dip_size(codec, pin_nid);
822 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
823
824 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
825 for (i = 0; i < size; i++)
826 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
827 }
828
829 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
830 u8 *dip, int size)
831 {
832 u8 val;
833 int i;
834
835 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
836 != AC_DIPXMIT_BEST)
837 return false;
838
839 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
840 for (i = 0; i < size; i++) {
841 val = snd_hda_codec_read(codec, pin_nid, 0,
842 AC_VERB_GET_HDMI_DIP_DATA, 0);
843 if (val != dip[i])
844 return false;
845 }
846
847 return true;
848 }
849
850 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
851 bool non_pcm,
852 struct snd_pcm_substream *substream)
853 {
854 struct hdmi_spec *spec = codec->spec;
855 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
856 hda_nid_t pin_nid = per_pin->pin_nid;
857 int channels = substream->runtime->channels;
858 struct hdmi_eld *eld;
859 int ca;
860 union audio_infoframe ai;
861
862 eld = &spec->pins[pin_idx].sink_eld;
863 if (!eld->monitor_present)
864 return;
865
866 if (!non_pcm && per_pin->chmap_set)
867 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
868 else
869 ca = hdmi_channel_allocation(eld, channels);
870 if (ca < 0)
871 ca = 0;
872
873 memset(&ai, 0, sizeof(ai));
874 if (eld->conn_type == 0) { /* HDMI */
875 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
876
877 hdmi_ai->type = 0x84;
878 hdmi_ai->ver = 0x01;
879 hdmi_ai->len = 0x0a;
880 hdmi_ai->CC02_CT47 = channels - 1;
881 hdmi_ai->CA = ca;
882 hdmi_checksum_audio_infoframe(hdmi_ai);
883 } else if (eld->conn_type == 1) { /* DisplayPort */
884 struct dp_audio_infoframe *dp_ai = &ai.dp;
885
886 dp_ai->type = 0x84;
887 dp_ai->len = 0x1b;
888 dp_ai->ver = 0x11 << 2;
889 dp_ai->CC02_CT47 = channels - 1;
890 dp_ai->CA = ca;
891 } else {
892 snd_printd("HDMI: unknown connection type at pin %d\n",
893 pin_nid);
894 return;
895 }
896
897 /*
898 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
899 * sizeof(*dp_ai) to avoid partial match/update problems when
900 * the user switches between HDMI/DP monitors.
901 */
902 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
903 sizeof(ai))) {
904 snd_printdd("hdmi_setup_audio_infoframe: "
905 "pin=%d channels=%d\n",
906 pin_nid,
907 channels);
908 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
909 channels, per_pin->chmap,
910 per_pin->chmap_set);
911 hdmi_stop_infoframe_trans(codec, pin_nid);
912 hdmi_fill_audio_infoframe(codec, pin_nid,
913 ai.bytes, sizeof(ai));
914 hdmi_start_infoframe_trans(codec, pin_nid);
915 } else {
916 /* For non-pcm audio switch, setup new channel mapping
917 * accordingly */
918 if (per_pin->non_pcm != non_pcm)
919 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
920 channels, per_pin->chmap,
921 per_pin->chmap_set);
922 }
923
924 per_pin->non_pcm = non_pcm;
925 }
926
927
928 /*
929 * Unsolicited events
930 */
931
932 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
933
934 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
935 {
936 struct hdmi_spec *spec = codec->spec;
937 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
938 int pin_nid;
939 int pin_idx;
940 struct hda_jack_tbl *jack;
941
942 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
943 if (!jack)
944 return;
945 pin_nid = jack->nid;
946 jack->jack_dirty = 1;
947
948 _snd_printd(SND_PR_VERBOSE,
949 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
950 codec->addr, pin_nid,
951 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
952
953 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
954 if (pin_idx < 0)
955 return;
956
957 hdmi_present_sense(&spec->pins[pin_idx], 1);
958 snd_hda_jack_report_sync(codec);
959 }
960
961 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
962 {
963 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
964 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
965 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
966 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
967
968 printk(KERN_INFO
969 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
970 codec->addr,
971 tag,
972 subtag,
973 cp_state,
974 cp_ready);
975
976 /* TODO */
977 if (cp_state)
978 ;
979 if (cp_ready)
980 ;
981 }
982
983
984 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
985 {
986 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
987 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
988
989 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
990 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
991 return;
992 }
993
994 if (subtag == 0)
995 hdmi_intrinsic_event(codec, res);
996 else
997 hdmi_non_intrinsic_event(codec, res);
998 }
999
1000 /*
1001 * Callbacks
1002 */
1003
1004 /* HBR should be Non-PCM, 8 channels */
1005 #define is_hbr_format(format) \
1006 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1007
1008 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1009 hda_nid_t pin_nid, u32 stream_tag, int format)
1010 {
1011 int pinctl;
1012 int new_pinctl = 0;
1013
1014 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1015 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1016 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1017
1018 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1019 if (is_hbr_format(format))
1020 new_pinctl |= AC_PINCTL_EPT_HBR;
1021 else
1022 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1023
1024 snd_printdd("hdmi_setup_stream: "
1025 "NID=0x%x, %spinctl=0x%x\n",
1026 pin_nid,
1027 pinctl == new_pinctl ? "" : "new-",
1028 new_pinctl);
1029
1030 if (pinctl != new_pinctl)
1031 snd_hda_codec_write(codec, pin_nid, 0,
1032 AC_VERB_SET_PIN_WIDGET_CONTROL,
1033 new_pinctl);
1034
1035 }
1036 if (is_hbr_format(format) && !new_pinctl) {
1037 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1038 return -EINVAL;
1039 }
1040
1041 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1042 return 0;
1043 }
1044
1045 /*
1046 * HDA PCM callbacks
1047 */
1048 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1049 struct hda_codec *codec,
1050 struct snd_pcm_substream *substream)
1051 {
1052 struct hdmi_spec *spec = codec->spec;
1053 struct snd_pcm_runtime *runtime = substream->runtime;
1054 int pin_idx, cvt_idx, mux_idx = 0;
1055 struct hdmi_spec_per_pin *per_pin;
1056 struct hdmi_eld *eld;
1057 struct hdmi_spec_per_cvt *per_cvt = NULL;
1058
1059 /* Validate hinfo */
1060 pin_idx = hinfo_to_pin_index(spec, hinfo);
1061 if (snd_BUG_ON(pin_idx < 0))
1062 return -EINVAL;
1063 per_pin = &spec->pins[pin_idx];
1064 eld = &per_pin->sink_eld;
1065
1066 /* Dynamically assign converter to stream */
1067 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1068 per_cvt = &spec->cvts[cvt_idx];
1069
1070 /* Must not already be assigned */
1071 if (per_cvt->assigned)
1072 continue;
1073 /* Must be in pin's mux's list of converters */
1074 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1075 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1076 break;
1077 /* Not in mux list */
1078 if (mux_idx == per_pin->num_mux_nids)
1079 continue;
1080 break;
1081 }
1082 /* No free converters */
1083 if (cvt_idx == spec->num_cvts)
1084 return -ENODEV;
1085
1086 /* Claim converter */
1087 per_cvt->assigned = 1;
1088 hinfo->nid = per_cvt->cvt_nid;
1089
1090 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1091 AC_VERB_SET_CONNECT_SEL,
1092 mux_idx);
1093 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1094
1095 /* Initially set the converter's capabilities */
1096 hinfo->channels_min = per_cvt->channels_min;
1097 hinfo->channels_max = per_cvt->channels_max;
1098 hinfo->rates = per_cvt->rates;
1099 hinfo->formats = per_cvt->formats;
1100 hinfo->maxbps = per_cvt->maxbps;
1101
1102 /* Restrict capabilities by ELD if this isn't disabled */
1103 if (!static_hdmi_pcm && eld->eld_valid) {
1104 snd_hdmi_eld_update_pcm_info(eld, hinfo);
1105 if (hinfo->channels_min > hinfo->channels_max ||
1106 !hinfo->rates || !hinfo->formats)
1107 return -ENODEV;
1108 }
1109
1110 /* Store the updated parameters */
1111 runtime->hw.channels_min = hinfo->channels_min;
1112 runtime->hw.channels_max = hinfo->channels_max;
1113 runtime->hw.formats = hinfo->formats;
1114 runtime->hw.rates = hinfo->rates;
1115
1116 snd_pcm_hw_constraint_step(substream->runtime, 0,
1117 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1118 return 0;
1119 }
1120
1121 /*
1122 * HDA/HDMI auto parsing
1123 */
1124 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1125 {
1126 struct hdmi_spec *spec = codec->spec;
1127 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1128 hda_nid_t pin_nid = per_pin->pin_nid;
1129
1130 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1131 snd_printk(KERN_WARNING
1132 "HDMI: pin %d wcaps %#x "
1133 "does not support connection list\n",
1134 pin_nid, get_wcaps(codec, pin_nid));
1135 return -EINVAL;
1136 }
1137
1138 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1139 per_pin->mux_nids,
1140 HDA_MAX_CONNECTIONS);
1141
1142 return 0;
1143 }
1144
1145 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1146 {
1147 struct hda_codec *codec = per_pin->codec;
1148 struct hdmi_eld *eld = &per_pin->sink_eld;
1149 hda_nid_t pin_nid = per_pin->pin_nid;
1150 /*
1151 * Always execute a GetPinSense verb here, even when called from
1152 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1153 * response's PD bit is not the real PD value, but indicates that
1154 * the real PD value changed. An older version of the HD-audio
1155 * specification worked this way. Hence, we just ignore the data in
1156 * the unsolicited response to avoid custom WARs.
1157 */
1158 int present = snd_hda_pin_sense(codec, pin_nid);
1159 bool eld_valid = false;
1160
1161 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1162
1163 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1164 if (eld->monitor_present)
1165 eld_valid = !!(present & AC_PINSENSE_ELDV);
1166
1167 _snd_printd(SND_PR_VERBOSE,
1168 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1169 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1170
1171 if (eld_valid) {
1172 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1173 snd_hdmi_show_eld(eld);
1174 else if (repoll) {
1175 queue_delayed_work(codec->bus->workq,
1176 &per_pin->work,
1177 msecs_to_jiffies(300));
1178 }
1179 }
1180 }
1181
1182 static void hdmi_repoll_eld(struct work_struct *work)
1183 {
1184 struct hdmi_spec_per_pin *per_pin =
1185 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1186
1187 if (per_pin->repoll_count++ > 6)
1188 per_pin->repoll_count = 0;
1189
1190 hdmi_present_sense(per_pin, per_pin->repoll_count);
1191 }
1192
1193 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1194 {
1195 struct hdmi_spec *spec = codec->spec;
1196 unsigned int caps, config;
1197 int pin_idx;
1198 struct hdmi_spec_per_pin *per_pin;
1199 int err;
1200
1201 caps = snd_hda_query_pin_caps(codec, pin_nid);
1202 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1203 return 0;
1204
1205 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1206 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1207 return 0;
1208
1209 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1210 return -E2BIG;
1211
1212 pin_idx = spec->num_pins;
1213 per_pin = &spec->pins[pin_idx];
1214
1215 per_pin->pin_nid = pin_nid;
1216 per_pin->non_pcm = false;
1217
1218 err = hdmi_read_pin_conn(codec, pin_idx);
1219 if (err < 0)
1220 return err;
1221
1222 spec->num_pins++;
1223
1224 return 0;
1225 }
1226
1227 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1228 {
1229 struct hdmi_spec *spec = codec->spec;
1230 int cvt_idx;
1231 struct hdmi_spec_per_cvt *per_cvt;
1232 unsigned int chans;
1233 int err;
1234
1235 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1236 return -E2BIG;
1237
1238 chans = get_wcaps(codec, cvt_nid);
1239 chans = get_wcaps_channels(chans);
1240
1241 cvt_idx = spec->num_cvts;
1242 per_cvt = &spec->cvts[cvt_idx];
1243
1244 per_cvt->cvt_nid = cvt_nid;
1245 per_cvt->channels_min = 2;
1246 if (chans <= 16) {
1247 per_cvt->channels_max = chans;
1248 if (chans > spec->channels_max)
1249 spec->channels_max = chans;
1250 }
1251
1252 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1253 &per_cvt->rates,
1254 &per_cvt->formats,
1255 &per_cvt->maxbps);
1256 if (err < 0)
1257 return err;
1258
1259 spec->num_cvts++;
1260
1261 return 0;
1262 }
1263
1264 static int hdmi_parse_codec(struct hda_codec *codec)
1265 {
1266 hda_nid_t nid;
1267 int i, nodes;
1268
1269 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1270 if (!nid || nodes < 0) {
1271 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1272 return -EINVAL;
1273 }
1274
1275 for (i = 0; i < nodes; i++, nid++) {
1276 unsigned int caps;
1277 unsigned int type;
1278
1279 caps = get_wcaps(codec, nid);
1280 type = get_wcaps_type(caps);
1281
1282 if (!(caps & AC_WCAP_DIGITAL))
1283 continue;
1284
1285 switch (type) {
1286 case AC_WID_AUD_OUT:
1287 hdmi_add_cvt(codec, nid);
1288 break;
1289 case AC_WID_PIN:
1290 hdmi_add_pin(codec, nid);
1291 break;
1292 }
1293 }
1294
1295 #ifdef CONFIG_PM
1296 /* We're seeing some problems with unsolicited hot plug events on
1297 * PantherPoint after S3, if this is not enabled */
1298 if (codec->vendor_id == 0x80862806)
1299 codec->bus->power_keep_link_on = 1;
1300 /*
1301 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1302 * can be lost and presence sense verb will become inaccurate if the
1303 * HDA link is powered off at hot plug or hw initialization time.
1304 */
1305 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1306 AC_PWRST_EPSS))
1307 codec->bus->power_keep_link_on = 1;
1308 #endif
1309
1310 return 0;
1311 }
1312
1313 /*
1314 */
1315 static char *get_hdmi_pcm_name(int idx)
1316 {
1317 static char names[MAX_HDMI_PINS][8];
1318 sprintf(&names[idx][0], "HDMI %d", idx);
1319 return &names[idx][0];
1320 }
1321
1322 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1323 {
1324 struct hda_spdif_out *spdif;
1325 bool non_pcm;
1326
1327 mutex_lock(&codec->spdif_mutex);
1328 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1329 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1330 mutex_unlock(&codec->spdif_mutex);
1331 return non_pcm;
1332 }
1333
1334
1335 /*
1336 * HDMI callbacks
1337 */
1338
1339 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1340 struct hda_codec *codec,
1341 unsigned int stream_tag,
1342 unsigned int format,
1343 struct snd_pcm_substream *substream)
1344 {
1345 hda_nid_t cvt_nid = hinfo->nid;
1346 struct hdmi_spec *spec = codec->spec;
1347 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1348 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1349 bool non_pcm;
1350
1351 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1352
1353 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1354
1355 hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1356
1357 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1358 }
1359
1360 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1361 struct hda_codec *codec,
1362 struct snd_pcm_substream *substream)
1363 {
1364 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1365 return 0;
1366 }
1367
1368 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1369 struct hda_codec *codec,
1370 struct snd_pcm_substream *substream)
1371 {
1372 struct hdmi_spec *spec = codec->spec;
1373 int cvt_idx, pin_idx;
1374 struct hdmi_spec_per_cvt *per_cvt;
1375 struct hdmi_spec_per_pin *per_pin;
1376
1377 if (hinfo->nid) {
1378 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1379 if (snd_BUG_ON(cvt_idx < 0))
1380 return -EINVAL;
1381 per_cvt = &spec->cvts[cvt_idx];
1382
1383 snd_BUG_ON(!per_cvt->assigned);
1384 per_cvt->assigned = 0;
1385 hinfo->nid = 0;
1386
1387 pin_idx = hinfo_to_pin_index(spec, hinfo);
1388 if (snd_BUG_ON(pin_idx < 0))
1389 return -EINVAL;
1390 per_pin = &spec->pins[pin_idx];
1391
1392 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1393 per_pin->chmap_set = false;
1394 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1395 }
1396
1397 return 0;
1398 }
1399
1400 static const struct hda_pcm_ops generic_ops = {
1401 .open = hdmi_pcm_open,
1402 .close = hdmi_pcm_close,
1403 .prepare = generic_hdmi_playback_pcm_prepare,
1404 .cleanup = generic_hdmi_playback_pcm_cleanup,
1405 };
1406
1407 /*
1408 * ALSA API channel-map control callbacks
1409 */
1410 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1411 struct snd_ctl_elem_info *uinfo)
1412 {
1413 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1414 struct hda_codec *codec = info->private_data;
1415 struct hdmi_spec *spec = codec->spec;
1416 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1417 uinfo->count = spec->channels_max;
1418 uinfo->value.integer.min = 0;
1419 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1420 return 0;
1421 }
1422
1423 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1424 unsigned int size, unsigned int __user *tlv)
1425 {
1426 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1427 struct hda_codec *codec = info->private_data;
1428 struct hdmi_spec *spec = codec->spec;
1429 const unsigned int valid_mask =
1430 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1431 unsigned int __user *dst;
1432 int chs, count = 0;
1433
1434 if (size < 8)
1435 return -ENOMEM;
1436 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1437 return -EFAULT;
1438 size -= 8;
1439 dst = tlv + 2;
1440 for (chs = 2; chs <= spec->channels_max; chs++) {
1441 int i, c;
1442 struct cea_channel_speaker_allocation *cap;
1443 cap = channel_allocations;
1444 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1445 int chs_bytes = chs * 4;
1446 if (cap->channels != chs)
1447 continue;
1448 if (cap->spk_mask & ~valid_mask)
1449 continue;
1450 if (size < 8)
1451 return -ENOMEM;
1452 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1453 put_user(chs_bytes, dst + 1))
1454 return -EFAULT;
1455 dst += 2;
1456 size -= 8;
1457 count += 8;
1458 if (size < chs_bytes)
1459 return -ENOMEM;
1460 size -= chs_bytes;
1461 count += chs_bytes;
1462 for (c = 7; c >= 0; c--) {
1463 int spk = cap->speakers[c];
1464 if (!spk)
1465 continue;
1466 if (put_user(spk_to_chmap(spk), dst))
1467 return -EFAULT;
1468 dst++;
1469 }
1470 }
1471 }
1472 if (put_user(count, tlv + 1))
1473 return -EFAULT;
1474 return 0;
1475 }
1476
1477 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1478 struct snd_ctl_elem_value *ucontrol)
1479 {
1480 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1481 struct hda_codec *codec = info->private_data;
1482 struct hdmi_spec *spec = codec->spec;
1483 int pin_idx = kcontrol->private_value;
1484 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1485 int i;
1486
1487 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1488 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1489 return 0;
1490 }
1491
1492 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1493 struct snd_ctl_elem_value *ucontrol)
1494 {
1495 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1496 struct hda_codec *codec = info->private_data;
1497 struct hdmi_spec *spec = codec->spec;
1498 int pin_idx = kcontrol->private_value;
1499 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1500 unsigned int ctl_idx;
1501 struct snd_pcm_substream *substream;
1502 unsigned char chmap[8];
1503 int i, ca, prepared = 0;
1504
1505 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1506 substream = snd_pcm_chmap_substream(info, ctl_idx);
1507 if (!substream || !substream->runtime)
1508 return 0; /* just for avoiding error from alsactl restore */
1509 switch (substream->runtime->status->state) {
1510 case SNDRV_PCM_STATE_OPEN:
1511 case SNDRV_PCM_STATE_SETUP:
1512 break;
1513 case SNDRV_PCM_STATE_PREPARED:
1514 prepared = 1;
1515 break;
1516 default:
1517 return -EBUSY;
1518 }
1519 memset(chmap, 0, sizeof(chmap));
1520 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1521 chmap[i] = ucontrol->value.integer.value[i];
1522 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1523 return 0;
1524 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1525 if (ca < 0)
1526 return -EINVAL;
1527 per_pin->chmap_set = true;
1528 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1529 if (prepared)
1530 hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
1531 substream);
1532
1533 return 0;
1534 }
1535
1536 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1537 {
1538 struct hdmi_spec *spec = codec->spec;
1539 int pin_idx;
1540
1541 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1542 struct hda_pcm *info;
1543 struct hda_pcm_stream *pstr;
1544
1545 info = &spec->pcm_rec[pin_idx];
1546 info->name = get_hdmi_pcm_name(pin_idx);
1547 info->pcm_type = HDA_PCM_TYPE_HDMI;
1548 info->own_chmap = true;
1549
1550 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1551 pstr->substreams = 1;
1552 pstr->ops = generic_ops;
1553 /* other pstr fields are set in open */
1554 }
1555
1556 codec->num_pcms = spec->num_pins;
1557 codec->pcm_info = spec->pcm_rec;
1558
1559 return 0;
1560 }
1561
1562 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1563 {
1564 char hdmi_str[32] = "HDMI/DP";
1565 struct hdmi_spec *spec = codec->spec;
1566 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1567 int pcmdev = spec->pcm_rec[pin_idx].device;
1568
1569 if (pcmdev > 0)
1570 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1571
1572 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1573 }
1574
1575 static int generic_hdmi_build_controls(struct hda_codec *codec)
1576 {
1577 struct hdmi_spec *spec = codec->spec;
1578 int err;
1579 int pin_idx;
1580
1581 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1582 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1583
1584 err = generic_hdmi_build_jack(codec, pin_idx);
1585 if (err < 0)
1586 return err;
1587
1588 err = snd_hda_create_dig_out_ctls(codec,
1589 per_pin->pin_nid,
1590 per_pin->mux_nids[0],
1591 HDA_PCM_TYPE_HDMI);
1592 if (err < 0)
1593 return err;
1594 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1595
1596 /* add control for ELD Bytes */
1597 err = hdmi_create_eld_ctl(codec,
1598 pin_idx,
1599 spec->pcm_rec[pin_idx].device);
1600
1601 if (err < 0)
1602 return err;
1603
1604 hdmi_present_sense(per_pin, 0);
1605 }
1606
1607 /* add channel maps */
1608 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1609 struct snd_pcm_chmap *chmap;
1610 struct snd_kcontrol *kctl;
1611 int i;
1612 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1613 SNDRV_PCM_STREAM_PLAYBACK,
1614 NULL, 0, pin_idx, &chmap);
1615 if (err < 0)
1616 return err;
1617 /* override handlers */
1618 chmap->private_data = codec;
1619 kctl = chmap->kctl;
1620 for (i = 0; i < kctl->count; i++)
1621 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1622 kctl->info = hdmi_chmap_ctl_info;
1623 kctl->get = hdmi_chmap_ctl_get;
1624 kctl->put = hdmi_chmap_ctl_put;
1625 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1626 }
1627
1628 return 0;
1629 }
1630
1631 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1632 {
1633 struct hdmi_spec *spec = codec->spec;
1634 int pin_idx;
1635
1636 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1637 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1638 struct hdmi_eld *eld = &per_pin->sink_eld;
1639
1640 per_pin->codec = codec;
1641 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1642 snd_hda_eld_proc_new(codec, eld, pin_idx);
1643 }
1644 return 0;
1645 }
1646
1647 static int generic_hdmi_init(struct hda_codec *codec)
1648 {
1649 struct hdmi_spec *spec = codec->spec;
1650 int pin_idx;
1651
1652 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1653 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1654 hda_nid_t pin_nid = per_pin->pin_nid;
1655
1656 hdmi_init_pin(codec, pin_nid);
1657 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1658 }
1659 return 0;
1660 }
1661
1662 static void generic_hdmi_free(struct hda_codec *codec)
1663 {
1664 struct hdmi_spec *spec = codec->spec;
1665 int pin_idx;
1666
1667 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1668 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1669 struct hdmi_eld *eld = &per_pin->sink_eld;
1670
1671 cancel_delayed_work(&per_pin->work);
1672 snd_hda_eld_proc_free(codec, eld);
1673 }
1674
1675 flush_workqueue(codec->bus->workq);
1676 kfree(spec);
1677 }
1678
1679 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1680 .init = generic_hdmi_init,
1681 .free = generic_hdmi_free,
1682 .build_pcms = generic_hdmi_build_pcms,
1683 .build_controls = generic_hdmi_build_controls,
1684 .unsol_event = hdmi_unsol_event,
1685 };
1686
1687 static void intel_haswell_fixup_connect_list(struct hda_codec *codec)
1688 {
1689 unsigned int vendor_param;
1690 hda_nid_t list[3] = {0x2, 0x3, 0x4};
1691
1692 vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
1693 if (vendor_param == -1 || vendor_param & 0x02)
1694 return;
1695
1696 /* enable DP1.2 mode */
1697 vendor_param |= 0x02;
1698 snd_hda_codec_read(codec, 0x08, 0, 0x781, vendor_param);
1699
1700 vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
1701 if (vendor_param == -1 || !(vendor_param & 0x02))
1702 return;
1703
1704 /* override 3 pins connection list */
1705 snd_hda_override_conn_list(codec, 0x05, 3, list);
1706 snd_hda_override_conn_list(codec, 0x06, 3, list);
1707 snd_hda_override_conn_list(codec, 0x07, 3, list);
1708 }
1709
1710
1711 static int patch_generic_hdmi(struct hda_codec *codec)
1712 {
1713 struct hdmi_spec *spec;
1714
1715 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1716 if (spec == NULL)
1717 return -ENOMEM;
1718
1719 codec->spec = spec;
1720
1721 if (codec->vendor_id == 0x80862807)
1722 intel_haswell_fixup_connect_list(codec);
1723
1724 if (hdmi_parse_codec(codec) < 0) {
1725 codec->spec = NULL;
1726 kfree(spec);
1727 return -EINVAL;
1728 }
1729 codec->patch_ops = generic_hdmi_patch_ops;
1730 generic_hdmi_init_per_pins(codec);
1731
1732 init_channel_allocations();
1733
1734 return 0;
1735 }
1736
1737 /*
1738 * Shared non-generic implementations
1739 */
1740
1741 static int simple_playback_build_pcms(struct hda_codec *codec)
1742 {
1743 struct hdmi_spec *spec = codec->spec;
1744 struct hda_pcm *info = spec->pcm_rec;
1745 unsigned int chans;
1746 struct hda_pcm_stream *pstr;
1747
1748 codec->num_pcms = 1;
1749 codec->pcm_info = info;
1750
1751 chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
1752 chans = get_wcaps_channels(chans);
1753
1754 info->name = get_hdmi_pcm_name(0);
1755 info->pcm_type = HDA_PCM_TYPE_HDMI;
1756 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1757 *pstr = spec->pcm_playback;
1758 pstr->nid = spec->cvts[0].cvt_nid;
1759 if (pstr->channels_max <= 2 && chans && chans <= 16)
1760 pstr->channels_max = chans;
1761
1762 return 0;
1763 }
1764
1765 /* unsolicited event for jack sensing */
1766 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1767 unsigned int res)
1768 {
1769 snd_hda_jack_set_dirty_all(codec);
1770 snd_hda_jack_report_sync(codec);
1771 }
1772
1773 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1774 * as long as spec->pins[] is set correctly
1775 */
1776 #define simple_hdmi_build_jack generic_hdmi_build_jack
1777
1778 static int simple_playback_build_controls(struct hda_codec *codec)
1779 {
1780 struct hdmi_spec *spec = codec->spec;
1781 int err;
1782
1783 err = snd_hda_create_spdif_out_ctls(codec,
1784 spec->cvts[0].cvt_nid,
1785 spec->cvts[0].cvt_nid);
1786 if (err < 0)
1787 return err;
1788 return simple_hdmi_build_jack(codec, 0);
1789 }
1790
1791 static int simple_playback_init(struct hda_codec *codec)
1792 {
1793 struct hdmi_spec *spec = codec->spec;
1794 hda_nid_t pin = spec->pins[0].pin_nid;
1795
1796 snd_hda_codec_write(codec, pin, 0,
1797 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1798 /* some codecs require to unmute the pin */
1799 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1800 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1801 AMP_OUT_UNMUTE);
1802 snd_hda_jack_detect_enable(codec, pin, pin);
1803 return 0;
1804 }
1805
1806 static void simple_playback_free(struct hda_codec *codec)
1807 {
1808 struct hdmi_spec *spec = codec->spec;
1809
1810 kfree(spec);
1811 }
1812
1813 /*
1814 * Nvidia specific implementations
1815 */
1816
1817 #define Nv_VERB_SET_Channel_Allocation 0xF79
1818 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1819 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1820 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1821
1822 #define nvhdmi_master_con_nid_7x 0x04
1823 #define nvhdmi_master_pin_nid_7x 0x05
1824
1825 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1826 /*front, rear, clfe, rear_surr */
1827 0x6, 0x8, 0xa, 0xc,
1828 };
1829
1830 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
1831 /* set audio protect on */
1832 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1833 /* enable digital output on pin widget */
1834 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1835 {} /* terminator */
1836 };
1837
1838 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
1839 /* set audio protect on */
1840 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1841 /* enable digital output on pin widget */
1842 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1843 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1844 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1845 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1846 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1847 {} /* terminator */
1848 };
1849
1850 #ifdef LIMITED_RATE_FMT_SUPPORT
1851 /* support only the safe format and rate */
1852 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1853 #define SUPPORTED_MAXBPS 16
1854 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1855 #else
1856 /* support all rates and formats */
1857 #define SUPPORTED_RATES \
1858 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1859 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1860 SNDRV_PCM_RATE_192000)
1861 #define SUPPORTED_MAXBPS 24
1862 #define SUPPORTED_FORMATS \
1863 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1864 #endif
1865
1866 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
1867 {
1868 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
1869 return 0;
1870 }
1871
1872 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
1873 {
1874 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
1875 return 0;
1876 }
1877
1878 static unsigned int channels_2_6_8[] = {
1879 2, 6, 8
1880 };
1881
1882 static unsigned int channels_2_8[] = {
1883 2, 8
1884 };
1885
1886 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1887 .count = ARRAY_SIZE(channels_2_6_8),
1888 .list = channels_2_6_8,
1889 .mask = 0,
1890 };
1891
1892 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1893 .count = ARRAY_SIZE(channels_2_8),
1894 .list = channels_2_8,
1895 .mask = 0,
1896 };
1897
1898 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1899 struct hda_codec *codec,
1900 struct snd_pcm_substream *substream)
1901 {
1902 struct hdmi_spec *spec = codec->spec;
1903 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1904
1905 switch (codec->preset->id) {
1906 case 0x10de0002:
1907 case 0x10de0003:
1908 case 0x10de0005:
1909 case 0x10de0006:
1910 hw_constraints_channels = &hw_constraints_2_8_channels;
1911 break;
1912 case 0x10de0007:
1913 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1914 break;
1915 default:
1916 break;
1917 }
1918
1919 if (hw_constraints_channels != NULL) {
1920 snd_pcm_hw_constraint_list(substream->runtime, 0,
1921 SNDRV_PCM_HW_PARAM_CHANNELS,
1922 hw_constraints_channels);
1923 } else {
1924 snd_pcm_hw_constraint_step(substream->runtime, 0,
1925 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1926 }
1927
1928 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
1929 }
1930
1931 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
1932 struct hda_codec *codec,
1933 struct snd_pcm_substream *substream)
1934 {
1935 struct hdmi_spec *spec = codec->spec;
1936 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
1937 }
1938
1939 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1940 struct hda_codec *codec,
1941 unsigned int stream_tag,
1942 unsigned int format,
1943 struct snd_pcm_substream *substream)
1944 {
1945 struct hdmi_spec *spec = codec->spec;
1946 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
1947 stream_tag, format, substream);
1948 }
1949
1950 static const struct hda_pcm_stream simple_pcm_playback = {
1951 .substreams = 1,
1952 .channels_min = 2,
1953 .channels_max = 2,
1954 .ops = {
1955 .open = simple_playback_pcm_open,
1956 .close = simple_playback_pcm_close,
1957 .prepare = simple_playback_pcm_prepare
1958 },
1959 };
1960
1961 static const struct hda_codec_ops simple_hdmi_patch_ops = {
1962 .build_controls = simple_playback_build_controls,
1963 .build_pcms = simple_playback_build_pcms,
1964 .init = simple_playback_init,
1965 .free = simple_playback_free,
1966 .unsol_event = simple_hdmi_unsol_event,
1967 };
1968
1969 static int patch_simple_hdmi(struct hda_codec *codec,
1970 hda_nid_t cvt_nid, hda_nid_t pin_nid)
1971 {
1972 struct hdmi_spec *spec;
1973
1974 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1975 if (!spec)
1976 return -ENOMEM;
1977
1978 codec->spec = spec;
1979
1980 spec->multiout.num_dacs = 0; /* no analog */
1981 spec->multiout.max_channels = 2;
1982 spec->multiout.dig_out_nid = cvt_nid;
1983 spec->num_cvts = 1;
1984 spec->num_pins = 1;
1985 spec->cvts[0].cvt_nid = cvt_nid;
1986 spec->pins[0].pin_nid = pin_nid;
1987 spec->pcm_playback = simple_pcm_playback;
1988
1989 codec->patch_ops = simple_hdmi_patch_ops;
1990
1991 return 0;
1992 }
1993
1994 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
1995 int channels)
1996 {
1997 unsigned int chanmask;
1998 int chan = channels ? (channels - 1) : 1;
1999
2000 switch (channels) {
2001 default:
2002 case 0:
2003 case 2:
2004 chanmask = 0x00;
2005 break;
2006 case 4:
2007 chanmask = 0x08;
2008 break;
2009 case 6:
2010 chanmask = 0x0b;
2011 break;
2012 case 8:
2013 chanmask = 0x13;
2014 break;
2015 }
2016
2017 /* Set the audio infoframe channel allocation and checksum fields. The
2018 * channel count is computed implicitly by the hardware. */
2019 snd_hda_codec_write(codec, 0x1, 0,
2020 Nv_VERB_SET_Channel_Allocation, chanmask);
2021
2022 snd_hda_codec_write(codec, 0x1, 0,
2023 Nv_VERB_SET_Info_Frame_Checksum,
2024 (0x71 - chan - chanmask));
2025 }
2026
2027 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2028 struct hda_codec *codec,
2029 struct snd_pcm_substream *substream)
2030 {
2031 struct hdmi_spec *spec = codec->spec;
2032 int i;
2033
2034 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2035 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2036 for (i = 0; i < 4; i++) {
2037 /* set the stream id */
2038 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2039 AC_VERB_SET_CHANNEL_STREAMID, 0);
2040 /* set the stream format */
2041 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2042 AC_VERB_SET_STREAM_FORMAT, 0);
2043 }
2044
2045 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2046 * streams are disabled. */
2047 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2048
2049 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2050 }
2051
2052 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2053 struct hda_codec *codec,
2054 unsigned int stream_tag,
2055 unsigned int format,
2056 struct snd_pcm_substream *substream)
2057 {
2058 int chs;
2059 unsigned int dataDCC2, channel_id;
2060 int i;
2061 struct hdmi_spec *spec = codec->spec;
2062 struct hda_spdif_out *spdif;
2063
2064 mutex_lock(&codec->spdif_mutex);
2065 spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
2066
2067 chs = substream->runtime->channels;
2068
2069 dataDCC2 = 0x2;
2070
2071 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2072 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2073 snd_hda_codec_write(codec,
2074 nvhdmi_master_con_nid_7x,
2075 0,
2076 AC_VERB_SET_DIGI_CONVERT_1,
2077 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2078
2079 /* set the stream id */
2080 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2081 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2082
2083 /* set the stream format */
2084 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2085 AC_VERB_SET_STREAM_FORMAT, format);
2086
2087 /* turn on again (if needed) */
2088 /* enable and set the channel status audio/data flag */
2089 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2090 snd_hda_codec_write(codec,
2091 nvhdmi_master_con_nid_7x,
2092 0,
2093 AC_VERB_SET_DIGI_CONVERT_1,
2094 spdif->ctls & 0xff);
2095 snd_hda_codec_write(codec,
2096 nvhdmi_master_con_nid_7x,
2097 0,
2098 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2099 }
2100
2101 for (i = 0; i < 4; i++) {
2102 if (chs == 2)
2103 channel_id = 0;
2104 else
2105 channel_id = i * 2;
2106
2107 /* turn off SPDIF once;
2108 *otherwise the IEC958 bits won't be updated
2109 */
2110 if (codec->spdif_status_reset &&
2111 (spdif->ctls & AC_DIG1_ENABLE))
2112 snd_hda_codec_write(codec,
2113 nvhdmi_con_nids_7x[i],
2114 0,
2115 AC_VERB_SET_DIGI_CONVERT_1,
2116 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2117 /* set the stream id */
2118 snd_hda_codec_write(codec,
2119 nvhdmi_con_nids_7x[i],
2120 0,
2121 AC_VERB_SET_CHANNEL_STREAMID,
2122 (stream_tag << 4) | channel_id);
2123 /* set the stream format */
2124 snd_hda_codec_write(codec,
2125 nvhdmi_con_nids_7x[i],
2126 0,
2127 AC_VERB_SET_STREAM_FORMAT,
2128 format);
2129 /* turn on again (if needed) */
2130 /* enable and set the channel status audio/data flag */
2131 if (codec->spdif_status_reset &&
2132 (spdif->ctls & AC_DIG1_ENABLE)) {
2133 snd_hda_codec_write(codec,
2134 nvhdmi_con_nids_7x[i],
2135 0,
2136 AC_VERB_SET_DIGI_CONVERT_1,
2137 spdif->ctls & 0xff);
2138 snd_hda_codec_write(codec,
2139 nvhdmi_con_nids_7x[i],
2140 0,
2141 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2142 }
2143 }
2144
2145 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2146
2147 mutex_unlock(&codec->spdif_mutex);
2148 return 0;
2149 }
2150
2151 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2152 .substreams = 1,
2153 .channels_min = 2,
2154 .channels_max = 8,
2155 .nid = nvhdmi_master_con_nid_7x,
2156 .rates = SUPPORTED_RATES,
2157 .maxbps = SUPPORTED_MAXBPS,
2158 .formats = SUPPORTED_FORMATS,
2159 .ops = {
2160 .open = simple_playback_pcm_open,
2161 .close = nvhdmi_8ch_7x_pcm_close,
2162 .prepare = nvhdmi_8ch_7x_pcm_prepare
2163 },
2164 };
2165
2166 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2167 {
2168 struct hdmi_spec *spec;
2169 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2170 nvhdmi_master_pin_nid_7x);
2171 if (err < 0)
2172 return err;
2173
2174 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2175 /* override the PCM rates, etc, as the codec doesn't give full list */
2176 spec = codec->spec;
2177 spec->pcm_playback.rates = SUPPORTED_RATES;
2178 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2179 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2180 return 0;
2181 }
2182
2183 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2184 {
2185 struct hdmi_spec *spec = codec->spec;
2186 int err = simple_playback_build_pcms(codec);
2187 spec->pcm_rec[0].own_chmap = true;
2188 return err;
2189 }
2190
2191 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2192 {
2193 struct hdmi_spec *spec = codec->spec;
2194 struct snd_pcm_chmap *chmap;
2195 int err;
2196
2197 err = simple_playback_build_controls(codec);
2198 if (err < 0)
2199 return err;
2200
2201 /* add channel maps */
2202 err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
2203 SNDRV_PCM_STREAM_PLAYBACK,
2204 snd_pcm_alt_chmaps, 8, 0, &chmap);
2205 if (err < 0)
2206 return err;
2207 switch (codec->preset->id) {
2208 case 0x10de0002:
2209 case 0x10de0003:
2210 case 0x10de0005:
2211 case 0x10de0006:
2212 chmap->channel_mask = (1U << 2) | (1U << 8);
2213 break;
2214 case 0x10de0007:
2215 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2216 }
2217 return 0;
2218 }
2219
2220 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2221 {
2222 struct hdmi_spec *spec;
2223 int err = patch_nvhdmi_2ch(codec);
2224 if (err < 0)
2225 return err;
2226 spec = codec->spec;
2227 spec->multiout.max_channels = 8;
2228 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2229 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2230 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2231 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2232
2233 /* Initialize the audio infoframe channel mask and checksum to something
2234 * valid */
2235 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2236
2237 return 0;
2238 }
2239
2240 /*
2241 * ATI-specific implementations
2242 *
2243 * FIXME: we may omit the whole this and use the generic code once after
2244 * it's confirmed to work.
2245 */
2246
2247 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2248 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2249
2250 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2251 struct hda_codec *codec,
2252 unsigned int stream_tag,
2253 unsigned int format,
2254 struct snd_pcm_substream *substream)
2255 {
2256 struct hdmi_spec *spec = codec->spec;
2257 int chans = substream->runtime->channels;
2258 int i, err;
2259
2260 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2261 substream);
2262 if (err < 0)
2263 return err;
2264 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2265 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2266 /* FIXME: XXX */
2267 for (i = 0; i < chans; i++) {
2268 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2269 AC_VERB_SET_HDMI_CHAN_SLOT,
2270 (i << 4) | i);
2271 }
2272 return 0;
2273 }
2274
2275 static int patch_atihdmi(struct hda_codec *codec)
2276 {
2277 struct hdmi_spec *spec;
2278 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2279 if (err < 0)
2280 return err;
2281 spec = codec->spec;
2282 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2283 return 0;
2284 }
2285
2286 /* VIA HDMI Implementation */
2287 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2288 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2289
2290 static int patch_via_hdmi(struct hda_codec *codec)
2291 {
2292 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2293 }
2294
2295 /*
2296 * patch entries
2297 */
2298 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2299 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2300 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2301 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2302 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2303 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2304 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2305 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2306 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2307 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2308 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2309 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2310 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2311 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2312 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2313 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2314 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2315 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2316 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2317 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2318 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2319 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2320 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2321 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2322 /* 17 is known to be absent */
2323 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2324 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2325 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2326 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2327 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2328 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2329 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2330 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2331 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2332 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2333 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2334 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2335 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2336 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2337 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2338 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2339 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2340 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2341 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2342 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2343 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2344 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2345 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2346 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2347 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2348 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2349 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2350 {} /* terminator */
2351 };
2352
2353 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2354 MODULE_ALIAS("snd-hda-codec-id:10027919");
2355 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2356 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2357 MODULE_ALIAS("snd-hda-codec-id:10951390");
2358 MODULE_ALIAS("snd-hda-codec-id:10951392");
2359 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2360 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2361 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2362 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2363 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2364 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2365 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2366 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2367 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2368 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2369 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2370 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2371 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2372 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2373 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2374 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2375 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2376 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2377 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2378 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2379 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2380 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2381 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2382 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2383 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2384 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2385 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2386 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2387 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2388 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2389 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2390 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2391 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2392 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2393 MODULE_ALIAS("snd-hda-codec-id:80860054");
2394 MODULE_ALIAS("snd-hda-codec-id:80862801");
2395 MODULE_ALIAS("snd-hda-codec-id:80862802");
2396 MODULE_ALIAS("snd-hda-codec-id:80862803");
2397 MODULE_ALIAS("snd-hda-codec-id:80862804");
2398 MODULE_ALIAS("snd-hda-codec-id:80862805");
2399 MODULE_ALIAS("snd-hda-codec-id:80862806");
2400 MODULE_ALIAS("snd-hda-codec-id:80862807");
2401 MODULE_ALIAS("snd-hda-codec-id:80862880");
2402 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2403
2404 MODULE_LICENSE("GPL");
2405 MODULE_DESCRIPTION("HDMI HD-audio codec");
2406 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2407 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2408 MODULE_ALIAS("snd-hda-codec-atihdmi");
2409
2410 static struct hda_codec_preset_list intel_list = {
2411 .preset = snd_hda_preset_hdmi,
2412 .owner = THIS_MODULE,
2413 };
2414
2415 static int __init patch_hdmi_init(void)
2416 {
2417 return snd_hda_add_codec_preset(&intel_list);
2418 }
2419
2420 static void __exit patch_hdmi_exit(void)
2421 {
2422 snd_hda_delete_codec_preset(&intel_list);
2423 }
2424
2425 module_init(patch_hdmi_init)
2426 module_exit(patch_hdmi_exit)
Linux kernel - Deliverables
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