3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
11 * Wu Fengguang <wfg@linux.intel.com>
14 * Wu Fengguang <wfg@linux.intel.com>
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
43 static bool static_hdmi_pcm
;
44 module_param(static_hdmi_pcm
, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm
, "Don't restrict PCM parameters per ELD info");
48 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
49 * could support N independent pipes, each of them can be connected to one or
50 * more ports (DVI, HDMI or DisplayPort).
52 * The HDA correspondence of pipes/ports are converter/pin nodes.
54 #define MAX_HDMI_CVTS 8
55 #define MAX_HDMI_PINS 8
57 struct hdmi_spec_per_cvt
{
60 unsigned int channels_min
;
61 unsigned int channels_max
;
67 struct hdmi_spec_per_pin
{
70 hda_nid_t mux_nids
[HDA_MAX_CONNECTIONS
];
72 struct hda_codec
*codec
;
73 struct hdmi_eld sink_eld
;
74 struct delayed_work work
;
77 bool chmap_set
; /* channel-map override by ALSA API? */
78 unsigned char chmap
[8]; /* ALSA API channel-map */
83 struct hdmi_spec_per_cvt cvts
[MAX_HDMI_CVTS
];
86 struct hdmi_spec_per_pin pins
[MAX_HDMI_PINS
];
87 struct hda_pcm pcm_rec
[MAX_HDMI_PINS
];
88 unsigned int channels_max
; /* max over all cvts */
91 * Non-generic ATI/NVIDIA specific
93 struct hda_multi_out multiout
;
94 struct hda_pcm_stream pcm_playback
;
98 struct hdmi_audio_infoframe
{
105 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
109 u8 LFEPBL01_LSV36_DM_INH7
;
112 struct dp_audio_infoframe
{
115 u8 ver
; /* 0x11 << 2 */
117 u8 CC02_CT47
; /* match with HDMI infoframe from this on */
121 u8 LFEPBL01_LSV36_DM_INH7
;
124 union audio_infoframe
{
125 struct hdmi_audio_infoframe hdmi
;
126 struct dp_audio_infoframe dp
;
131 * CEA speaker placement:
134 * FLW FL FLC FC FRC FR FRW
141 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
142 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
144 enum cea_speaker_placement
{
145 FL
= (1 << 0), /* Front Left */
146 FC
= (1 << 1), /* Front Center */
147 FR
= (1 << 2), /* Front Right */
148 FLC
= (1 << 3), /* Front Left Center */
149 FRC
= (1 << 4), /* Front Right Center */
150 RL
= (1 << 5), /* Rear Left */
151 RC
= (1 << 6), /* Rear Center */
152 RR
= (1 << 7), /* Rear Right */
153 RLC
= (1 << 8), /* Rear Left Center */
154 RRC
= (1 << 9), /* Rear Right Center */
155 LFE
= (1 << 10), /* Low Frequency Effect */
156 FLW
= (1 << 11), /* Front Left Wide */
157 FRW
= (1 << 12), /* Front Right Wide */
158 FLH
= (1 << 13), /* Front Left High */
159 FCH
= (1 << 14), /* Front Center High */
160 FRH
= (1 << 15), /* Front Right High */
161 TC
= (1 << 16), /* Top Center */
165 * ELD SA bits in the CEA Speaker Allocation data block
167 static int eld_speaker_allocation_bits
[] = {
175 /* the following are not defined in ELD yet */
182 struct cea_channel_speaker_allocation
{
186 /* derived values, just for convenience */
194 * surround40 surround41 surround50 surround51 surround71
195 * ch0 front left = = = =
196 * ch1 front right = = = =
197 * ch2 rear left = = = =
198 * ch3 rear right = = = =
199 * ch4 LFE center center center
204 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
206 static int hdmi_channel_mapping
[0x32][8] = {
208 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
210 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
212 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
214 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
216 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
218 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
220 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
222 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
224 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
228 * This is an ordered list!
230 * The preceding ones have better chances to be selected by
231 * hdmi_channel_allocation().
233 static struct cea_channel_speaker_allocation channel_allocations
[] = {
234 /* channel: 7 6 5 4 3 2 1 0 */
235 { .ca_index
= 0x00, .speakers
= { 0, 0, 0, 0, 0, 0, FR
, FL
} },
237 { .ca_index
= 0x01, .speakers
= { 0, 0, 0, 0, 0, LFE
, FR
, FL
} },
239 { .ca_index
= 0x02, .speakers
= { 0, 0, 0, 0, FC
, 0, FR
, FL
} },
241 { .ca_index
= 0x08, .speakers
= { 0, 0, RR
, RL
, 0, 0, FR
, FL
} },
243 { .ca_index
= 0x09, .speakers
= { 0, 0, RR
, RL
, 0, LFE
, FR
, FL
} },
245 { .ca_index
= 0x0a, .speakers
= { 0, 0, RR
, RL
, FC
, 0, FR
, FL
} },
247 { .ca_index
= 0x0b, .speakers
= { 0, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
249 { .ca_index
= 0x0f, .speakers
= { 0, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
251 { .ca_index
= 0x13, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
253 { .ca_index
= 0x03, .speakers
= { 0, 0, 0, 0, FC
, LFE
, FR
, FL
} },
254 { .ca_index
= 0x04, .speakers
= { 0, 0, 0, RC
, 0, 0, FR
, FL
} },
255 { .ca_index
= 0x05, .speakers
= { 0, 0, 0, RC
, 0, LFE
, FR
, FL
} },
256 { .ca_index
= 0x06, .speakers
= { 0, 0, 0, RC
, FC
, 0, FR
, FL
} },
257 { .ca_index
= 0x07, .speakers
= { 0, 0, 0, RC
, FC
, LFE
, FR
, FL
} },
258 { .ca_index
= 0x0c, .speakers
= { 0, RC
, RR
, RL
, 0, 0, FR
, FL
} },
259 { .ca_index
= 0x0d, .speakers
= { 0, RC
, RR
, RL
, 0, LFE
, FR
, FL
} },
260 { .ca_index
= 0x0e, .speakers
= { 0, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
261 { .ca_index
= 0x10, .speakers
= { RRC
, RLC
, RR
, RL
, 0, 0, FR
, FL
} },
262 { .ca_index
= 0x11, .speakers
= { RRC
, RLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
263 { .ca_index
= 0x12, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, 0, FR
, FL
} },
264 { .ca_index
= 0x14, .speakers
= { FRC
, FLC
, 0, 0, 0, 0, FR
, FL
} },
265 { .ca_index
= 0x15, .speakers
= { FRC
, FLC
, 0, 0, 0, LFE
, FR
, FL
} },
266 { .ca_index
= 0x16, .speakers
= { FRC
, FLC
, 0, 0, FC
, 0, FR
, FL
} },
267 { .ca_index
= 0x17, .speakers
= { FRC
, FLC
, 0, 0, FC
, LFE
, FR
, FL
} },
268 { .ca_index
= 0x18, .speakers
= { FRC
, FLC
, 0, RC
, 0, 0, FR
, FL
} },
269 { .ca_index
= 0x19, .speakers
= { FRC
, FLC
, 0, RC
, 0, LFE
, FR
, FL
} },
270 { .ca_index
= 0x1a, .speakers
= { FRC
, FLC
, 0, RC
, FC
, 0, FR
, FL
} },
271 { .ca_index
= 0x1b, .speakers
= { FRC
, FLC
, 0, RC
, FC
, LFE
, FR
, FL
} },
272 { .ca_index
= 0x1c, .speakers
= { FRC
, FLC
, RR
, RL
, 0, 0, FR
, FL
} },
273 { .ca_index
= 0x1d, .speakers
= { FRC
, FLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
274 { .ca_index
= 0x1e, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, 0, FR
, FL
} },
275 { .ca_index
= 0x1f, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
276 { .ca_index
= 0x20, .speakers
= { 0, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
277 { .ca_index
= 0x21, .speakers
= { 0, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
278 { .ca_index
= 0x22, .speakers
= { TC
, 0, RR
, RL
, FC
, 0, FR
, FL
} },
279 { .ca_index
= 0x23, .speakers
= { TC
, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
280 { .ca_index
= 0x24, .speakers
= { FRH
, FLH
, RR
, RL
, 0, 0, FR
, FL
} },
281 { .ca_index
= 0x25, .speakers
= { FRH
, FLH
, RR
, RL
, 0, LFE
, FR
, FL
} },
282 { .ca_index
= 0x26, .speakers
= { FRW
, FLW
, RR
, RL
, 0, 0, FR
, FL
} },
283 { .ca_index
= 0x27, .speakers
= { FRW
, FLW
, RR
, RL
, 0, LFE
, FR
, FL
} },
284 { .ca_index
= 0x28, .speakers
= { TC
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
285 { .ca_index
= 0x29, .speakers
= { TC
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
286 { .ca_index
= 0x2a, .speakers
= { FCH
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
287 { .ca_index
= 0x2b, .speakers
= { FCH
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
288 { .ca_index
= 0x2c, .speakers
= { TC
, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
289 { .ca_index
= 0x2d, .speakers
= { TC
, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
290 { .ca_index
= 0x2e, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, 0, FR
, FL
} },
291 { .ca_index
= 0x2f, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
292 { .ca_index
= 0x30, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, 0, FR
, FL
} },
293 { .ca_index
= 0x31, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, LFE
, FR
, FL
} },
301 static int pin_nid_to_pin_index(struct hdmi_spec
*spec
, hda_nid_t pin_nid
)
305 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
306 if (spec
->pins
[pin_idx
].pin_nid
== pin_nid
)
309 snd_printk(KERN_WARNING
"HDMI: pin nid %d not registered\n", pin_nid
);
313 static int hinfo_to_pin_index(struct hdmi_spec
*spec
,
314 struct hda_pcm_stream
*hinfo
)
318 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++)
319 if (&spec
->pcm_rec
[pin_idx
].stream
[0] == hinfo
)
322 snd_printk(KERN_WARNING
"HDMI: hinfo %p not registered\n", hinfo
);
326 static int cvt_nid_to_cvt_index(struct hdmi_spec
*spec
, hda_nid_t cvt_nid
)
330 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++)
331 if (spec
->cvts
[cvt_idx
].cvt_nid
== cvt_nid
)
334 snd_printk(KERN_WARNING
"HDMI: cvt nid %d not registered\n", cvt_nid
);
338 static int hdmi_eld_ctl_info(struct snd_kcontrol
*kcontrol
,
339 struct snd_ctl_elem_info
*uinfo
)
341 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
342 struct hdmi_spec
*spec
;
346 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
348 pin_idx
= kcontrol
->private_value
;
349 uinfo
->count
= spec
->pins
[pin_idx
].sink_eld
.eld_size
;
354 static int hdmi_eld_ctl_get(struct snd_kcontrol
*kcontrol
,
355 struct snd_ctl_elem_value
*ucontrol
)
357 struct hda_codec
*codec
= snd_kcontrol_chip(kcontrol
);
358 struct hdmi_spec
*spec
;
362 pin_idx
= kcontrol
->private_value
;
364 memcpy(ucontrol
->value
.bytes
.data
,
365 spec
->pins
[pin_idx
].sink_eld
.eld_buffer
, ELD_MAX_SIZE
);
370 static struct snd_kcontrol_new eld_bytes_ctl
= {
371 .access
= SNDRV_CTL_ELEM_ACCESS_READ
| SNDRV_CTL_ELEM_ACCESS_VOLATILE
,
372 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
374 .info
= hdmi_eld_ctl_info
,
375 .get
= hdmi_eld_ctl_get
,
378 static int hdmi_create_eld_ctl(struct hda_codec
*codec
, int pin_idx
,
381 struct snd_kcontrol
*kctl
;
382 struct hdmi_spec
*spec
= codec
->spec
;
385 kctl
= snd_ctl_new1(&eld_bytes_ctl
, codec
);
388 kctl
->private_value
= pin_idx
;
389 kctl
->id
.device
= device
;
391 err
= snd_hda_ctl_add(codec
, spec
->pins
[pin_idx
].pin_nid
, kctl
);
399 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
400 int *packet_index
, int *byte_index
)
404 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
405 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
407 *packet_index
= val
>> 5;
408 *byte_index
= val
& 0x1f;
412 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
413 int packet_index
, int byte_index
)
417 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
419 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
422 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
425 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
428 static void hdmi_init_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
431 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
432 snd_hda_codec_write(codec
, pin_nid
, 0,
433 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
434 /* Enable pin out: some machines with GM965 gets broken output when
435 * the pin is disabled or changed while using with HDMI
437 snd_hda_codec_write(codec
, pin_nid
, 0,
438 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
441 static int hdmi_get_channel_count(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
443 return 1 + snd_hda_codec_read(codec
, cvt_nid
, 0,
444 AC_VERB_GET_CVT_CHAN_COUNT
, 0);
447 static void hdmi_set_channel_count(struct hda_codec
*codec
,
448 hda_nid_t cvt_nid
, int chs
)
450 if (chs
!= hdmi_get_channel_count(codec
, cvt_nid
))
451 snd_hda_codec_write(codec
, cvt_nid
, 0,
452 AC_VERB_SET_CVT_CHAN_COUNT
, chs
- 1);
457 * Channel mapping routines
461 * Compute derived values in channel_allocations[].
463 static void init_channel_allocations(void)
466 struct cea_channel_speaker_allocation
*p
;
468 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
469 p
= channel_allocations
+ i
;
472 for (j
= 0; j
< ARRAY_SIZE(p
->speakers
); j
++)
473 if (p
->speakers
[j
]) {
475 p
->spk_mask
|= p
->speakers
[j
];
480 static int get_channel_allocation_order(int ca
)
484 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
485 if (channel_allocations
[i
].ca_index
== ca
)
492 * The transformation takes two steps:
494 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
495 * spk_mask => (channel_allocations[]) => ai->CA
497 * TODO: it could select the wrong CA from multiple candidates.
499 static int hdmi_channel_allocation(struct hdmi_eld
*eld
, int channels
)
504 char buf
[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE
];
507 * CA defaults to 0 for basic stereo audio
513 * expand ELD's speaker allocation mask
515 * ELD tells the speaker mask in a compact(paired) form,
516 * expand ELD's notions to match the ones used by Audio InfoFrame.
518 for (i
= 0; i
< ARRAY_SIZE(eld_speaker_allocation_bits
); i
++) {
519 if (eld
->spk_alloc
& (1 << i
))
520 spk_mask
|= eld_speaker_allocation_bits
[i
];
523 /* search for the first working match in the CA table */
524 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
525 if (channels
== channel_allocations
[i
].channels
&&
526 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
527 channel_allocations
[i
].spk_mask
) {
528 ca
= channel_allocations
[i
].ca_index
;
533 snd_print_channel_allocation(eld
->spk_alloc
, buf
, sizeof(buf
));
534 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
540 static void hdmi_debug_channel_mapping(struct hda_codec
*codec
,
543 #ifdef CONFIG_SND_DEBUG_VERBOSE
547 for (i
= 0; i
< 8; i
++) {
548 slot
= snd_hda_codec_read(codec
, pin_nid
, 0,
549 AC_VERB_GET_HDMI_CHAN_SLOT
, i
);
550 printk(KERN_DEBUG
"HDMI: ASP channel %d => slot %d\n",
551 slot
>> 4, slot
& 0xf);
557 static void hdmi_std_setup_channel_mapping(struct hda_codec
*codec
,
565 int non_pcm_mapping
[8];
567 order
= get_channel_allocation_order(ca
);
569 if (hdmi_channel_mapping
[ca
][1] == 0) {
570 for (i
= 0; i
< channel_allocations
[order
].channels
; i
++)
571 hdmi_channel_mapping
[ca
][i
] = i
| (i
<< 4);
573 hdmi_channel_mapping
[ca
][i
] = 0xf | (i
<< 4);
577 for (i
= 0; i
< channel_allocations
[order
].channels
; i
++)
578 non_pcm_mapping
[i
] = i
| (i
<< 4);
580 non_pcm_mapping
[i
] = 0xf | (i
<< 4);
583 for (i
= 0; i
< 8; i
++) {
584 err
= snd_hda_codec_write(codec
, pin_nid
, 0,
585 AC_VERB_SET_HDMI_CHAN_SLOT
,
586 non_pcm
? non_pcm_mapping
[i
] : hdmi_channel_mapping
[ca
][i
]);
588 snd_printdd(KERN_NOTICE
589 "HDMI: channel mapping failed\n");
594 hdmi_debug_channel_mapping(codec
, pin_nid
);
597 struct channel_map_table
{
598 unsigned char map
; /* ALSA API channel map position */
599 unsigned char cea_slot
; /* CEA slot value */
600 int spk_mask
; /* speaker position bit mask */
603 static struct channel_map_table map_tables
[] = {
604 { SNDRV_CHMAP_FL
, 0x00, FL
},
605 { SNDRV_CHMAP_FR
, 0x01, FR
},
606 { SNDRV_CHMAP_RL
, 0x04, RL
},
607 { SNDRV_CHMAP_RR
, 0x05, RR
},
608 { SNDRV_CHMAP_LFE
, 0x02, LFE
},
609 { SNDRV_CHMAP_FC
, 0x03, FC
},
610 { SNDRV_CHMAP_RLC
, 0x06, RLC
},
611 { SNDRV_CHMAP_RRC
, 0x07, RRC
},
615 /* from ALSA API channel position to speaker bit mask */
616 static int to_spk_mask(unsigned char c
)
618 struct channel_map_table
*t
= map_tables
;
619 for (; t
->map
; t
++) {
626 /* from ALSA API channel position to CEA slot */
627 static int to_cea_slot(unsigned char c
)
629 struct channel_map_table
*t
= map_tables
;
630 for (; t
->map
; t
++) {
637 /* from CEA slot to ALSA API channel position */
638 static int from_cea_slot(unsigned char c
)
640 struct channel_map_table
*t
= map_tables
;
641 for (; t
->map
; t
++) {
642 if (t
->cea_slot
== c
)
648 /* from speaker bit mask to ALSA API channel position */
649 static int spk_to_chmap(int spk
)
651 struct channel_map_table
*t
= map_tables
;
652 for (; t
->map
; t
++) {
653 if (t
->spk_mask
== spk
)
659 /* get the CA index corresponding to the given ALSA API channel map */
660 static int hdmi_manual_channel_allocation(int chs
, unsigned char *map
)
662 int i
, spks
= 0, spk_mask
= 0;
664 for (i
= 0; i
< chs
; i
++) {
665 int mask
= to_spk_mask(map
[i
]);
672 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
673 if ((chs
== channel_allocations
[i
].channels
||
674 spks
== channel_allocations
[i
].channels
) &&
675 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
676 channel_allocations
[i
].spk_mask
)
677 return channel_allocations
[i
].ca_index
;
682 /* set up the channel slots for the given ALSA API channel map */
683 static int hdmi_manual_setup_channel_mapping(struct hda_codec
*codec
,
685 int chs
, unsigned char *map
)
688 for (i
= 0; i
< 8; i
++) {
691 val
= to_cea_slot(map
[i
]);
695 err
= snd_hda_codec_write(codec
, pin_nid
, 0,
696 AC_VERB_SET_HDMI_CHAN_SLOT
, val
);
703 /* store ALSA API channel map from the current default map */
704 static void hdmi_setup_fake_chmap(unsigned char *map
, int ca
)
707 for (i
= 0; i
< 8; i
++) {
708 if (i
< channel_allocations
[ca
].channels
)
709 map
[i
] = from_cea_slot((hdmi_channel_mapping
[ca
][i
] >> 4) & 0x0f);
715 static void hdmi_setup_channel_mapping(struct hda_codec
*codec
,
716 hda_nid_t pin_nid
, bool non_pcm
, int ca
,
717 int channels
, unsigned char *map
,
720 if (!non_pcm
&& chmap_set
) {
721 hdmi_manual_setup_channel_mapping(codec
, pin_nid
,
724 hdmi_std_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
);
725 hdmi_setup_fake_chmap(map
, ca
);
730 * Audio InfoFrame routines
734 * Enable Audio InfoFrame Transmission
736 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
739 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
740 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
745 * Disable Audio InfoFrame Transmission
747 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
750 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
751 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
755 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
757 #ifdef CONFIG_SND_DEBUG_VERBOSE
761 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
762 printk(KERN_DEBUG
"HDMI: ELD buf size is %d\n", size
);
764 for (i
= 0; i
< 8; i
++) {
765 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
766 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
767 printk(KERN_DEBUG
"HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
772 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
778 for (i
= 0; i
< 8; i
++) {
779 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
780 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
784 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
785 for (j
= 1; j
< 1000; j
++) {
786 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
787 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
789 snd_printd(KERN_INFO
"dip index %d: %d != %d\n",
791 if (bi
== 0) /* byte index wrapped around */
795 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
801 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe
*hdmi_ai
)
803 u8
*bytes
= (u8
*)hdmi_ai
;
807 hdmi_ai
->checksum
= 0;
809 for (i
= 0; i
< sizeof(*hdmi_ai
); i
++)
812 hdmi_ai
->checksum
= -sum
;
815 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
821 hdmi_debug_dip_size(codec
, pin_nid
);
822 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
824 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
825 for (i
= 0; i
< size
; i
++)
826 hdmi_write_dip_byte(codec
, pin_nid
, dip
[i
]);
829 static bool hdmi_infoframe_uptodate(struct hda_codec
*codec
, hda_nid_t pin_nid
,
835 if (snd_hda_codec_read(codec
, pin_nid
, 0, AC_VERB_GET_HDMI_DIP_XMIT
, 0)
839 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
840 for (i
= 0; i
< size
; i
++) {
841 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
842 AC_VERB_GET_HDMI_DIP_DATA
, 0);
850 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
, int pin_idx
,
852 struct snd_pcm_substream
*substream
)
854 struct hdmi_spec
*spec
= codec
->spec
;
855 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
856 hda_nid_t pin_nid
= per_pin
->pin_nid
;
857 int channels
= substream
->runtime
->channels
;
858 struct hdmi_eld
*eld
;
860 union audio_infoframe ai
;
862 eld
= &spec
->pins
[pin_idx
].sink_eld
;
863 if (!eld
->monitor_present
)
866 if (!non_pcm
&& per_pin
->chmap_set
)
867 ca
= hdmi_manual_channel_allocation(channels
, per_pin
->chmap
);
869 ca
= hdmi_channel_allocation(eld
, channels
);
873 memset(&ai
, 0, sizeof(ai
));
874 if (eld
->conn_type
== 0) { /* HDMI */
875 struct hdmi_audio_infoframe
*hdmi_ai
= &ai
.hdmi
;
877 hdmi_ai
->type
= 0x84;
880 hdmi_ai
->CC02_CT47
= channels
- 1;
882 hdmi_checksum_audio_infoframe(hdmi_ai
);
883 } else if (eld
->conn_type
== 1) { /* DisplayPort */
884 struct dp_audio_infoframe
*dp_ai
= &ai
.dp
;
888 dp_ai
->ver
= 0x11 << 2;
889 dp_ai
->CC02_CT47
= channels
- 1;
892 snd_printd("HDMI: unknown connection type at pin %d\n",
898 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
899 * sizeof(*dp_ai) to avoid partial match/update problems when
900 * the user switches between HDMI/DP monitors.
902 if (!hdmi_infoframe_uptodate(codec
, pin_nid
, ai
.bytes
,
904 snd_printdd("hdmi_setup_audio_infoframe: "
905 "pin=%d channels=%d\n",
908 hdmi_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
,
909 channels
, per_pin
->chmap
,
911 hdmi_stop_infoframe_trans(codec
, pin_nid
);
912 hdmi_fill_audio_infoframe(codec
, pin_nid
,
913 ai
.bytes
, sizeof(ai
));
914 hdmi_start_infoframe_trans(codec
, pin_nid
);
916 /* For non-pcm audio switch, setup new channel mapping
918 if (per_pin
->non_pcm
!= non_pcm
)
919 hdmi_setup_channel_mapping(codec
, pin_nid
, non_pcm
, ca
,
920 channels
, per_pin
->chmap
,
924 per_pin
->non_pcm
= non_pcm
;
932 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
);
934 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
936 struct hdmi_spec
*spec
= codec
->spec
;
937 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
940 struct hda_jack_tbl
*jack
;
942 jack
= snd_hda_jack_tbl_get_from_tag(codec
, tag
);
946 jack
->jack_dirty
= 1;
948 _snd_printd(SND_PR_VERBOSE
,
949 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
950 codec
->addr
, pin_nid
,
951 !!(res
& AC_UNSOL_RES_PD
), !!(res
& AC_UNSOL_RES_ELDV
));
953 pin_idx
= pin_nid_to_pin_index(spec
, pin_nid
);
957 hdmi_present_sense(&spec
->pins
[pin_idx
], 1);
958 snd_hda_jack_report_sync(codec
);
961 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
963 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
964 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
965 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
966 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
969 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
984 static void hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
986 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
987 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
989 if (!snd_hda_jack_tbl_get_from_tag(codec
, tag
)) {
990 snd_printd(KERN_INFO
"Unexpected HDMI event tag 0x%x\n", tag
);
995 hdmi_intrinsic_event(codec
, res
);
997 hdmi_non_intrinsic_event(codec
, res
);
1004 /* HBR should be Non-PCM, 8 channels */
1005 #define is_hbr_format(format) \
1006 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1008 static int hdmi_setup_stream(struct hda_codec
*codec
, hda_nid_t cvt_nid
,
1009 hda_nid_t pin_nid
, u32 stream_tag
, int format
)
1014 if (snd_hda_query_pin_caps(codec
, pin_nid
) & AC_PINCAP_HBR
) {
1015 pinctl
= snd_hda_codec_read(codec
, pin_nid
, 0,
1016 AC_VERB_GET_PIN_WIDGET_CONTROL
, 0);
1018 new_pinctl
= pinctl
& ~AC_PINCTL_EPT
;
1019 if (is_hbr_format(format
))
1020 new_pinctl
|= AC_PINCTL_EPT_HBR
;
1022 new_pinctl
|= AC_PINCTL_EPT_NATIVE
;
1024 snd_printdd("hdmi_setup_stream: "
1025 "NID=0x%x, %spinctl=0x%x\n",
1027 pinctl
== new_pinctl
? "" : "new-",
1030 if (pinctl
!= new_pinctl
)
1031 snd_hda_codec_write(codec
, pin_nid
, 0,
1032 AC_VERB_SET_PIN_WIDGET_CONTROL
,
1036 if (is_hbr_format(format
) && !new_pinctl
) {
1037 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1041 snd_hda_codec_setup_stream(codec
, cvt_nid
, stream_tag
, 0, format
);
1048 static int hdmi_pcm_open(struct hda_pcm_stream
*hinfo
,
1049 struct hda_codec
*codec
,
1050 struct snd_pcm_substream
*substream
)
1052 struct hdmi_spec
*spec
= codec
->spec
;
1053 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
1054 int pin_idx
, cvt_idx
, mux_idx
= 0;
1055 struct hdmi_spec_per_pin
*per_pin
;
1056 struct hdmi_eld
*eld
;
1057 struct hdmi_spec_per_cvt
*per_cvt
= NULL
;
1059 /* Validate hinfo */
1060 pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1061 if (snd_BUG_ON(pin_idx
< 0))
1063 per_pin
= &spec
->pins
[pin_idx
];
1064 eld
= &per_pin
->sink_eld
;
1066 /* Dynamically assign converter to stream */
1067 for (cvt_idx
= 0; cvt_idx
< spec
->num_cvts
; cvt_idx
++) {
1068 per_cvt
= &spec
->cvts
[cvt_idx
];
1070 /* Must not already be assigned */
1071 if (per_cvt
->assigned
)
1073 /* Must be in pin's mux's list of converters */
1074 for (mux_idx
= 0; mux_idx
< per_pin
->num_mux_nids
; mux_idx
++)
1075 if (per_pin
->mux_nids
[mux_idx
] == per_cvt
->cvt_nid
)
1077 /* Not in mux list */
1078 if (mux_idx
== per_pin
->num_mux_nids
)
1082 /* No free converters */
1083 if (cvt_idx
== spec
->num_cvts
)
1086 /* Claim converter */
1087 per_cvt
->assigned
= 1;
1088 hinfo
->nid
= per_cvt
->cvt_nid
;
1090 snd_hda_codec_write(codec
, per_pin
->pin_nid
, 0,
1091 AC_VERB_SET_CONNECT_SEL
,
1093 snd_hda_spdif_ctls_assign(codec
, pin_idx
, per_cvt
->cvt_nid
);
1095 /* Initially set the converter's capabilities */
1096 hinfo
->channels_min
= per_cvt
->channels_min
;
1097 hinfo
->channels_max
= per_cvt
->channels_max
;
1098 hinfo
->rates
= per_cvt
->rates
;
1099 hinfo
->formats
= per_cvt
->formats
;
1100 hinfo
->maxbps
= per_cvt
->maxbps
;
1102 /* Restrict capabilities by ELD if this isn't disabled */
1103 if (!static_hdmi_pcm
&& eld
->eld_valid
) {
1104 snd_hdmi_eld_update_pcm_info(eld
, hinfo
);
1105 if (hinfo
->channels_min
> hinfo
->channels_max
||
1106 !hinfo
->rates
|| !hinfo
->formats
) {
1107 per_cvt
->assigned
= 0;
1109 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1114 /* Store the updated parameters */
1115 runtime
->hw
.channels_min
= hinfo
->channels_min
;
1116 runtime
->hw
.channels_max
= hinfo
->channels_max
;
1117 runtime
->hw
.formats
= hinfo
->formats
;
1118 runtime
->hw
.rates
= hinfo
->rates
;
1120 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1121 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1126 * HDA/HDMI auto parsing
1128 static int hdmi_read_pin_conn(struct hda_codec
*codec
, int pin_idx
)
1130 struct hdmi_spec
*spec
= codec
->spec
;
1131 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1132 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1134 if (!(get_wcaps(codec
, pin_nid
) & AC_WCAP_CONN_LIST
)) {
1135 snd_printk(KERN_WARNING
1136 "HDMI: pin %d wcaps %#x "
1137 "does not support connection list\n",
1138 pin_nid
, get_wcaps(codec
, pin_nid
));
1142 per_pin
->num_mux_nids
= snd_hda_get_connections(codec
, pin_nid
,
1144 HDA_MAX_CONNECTIONS
);
1149 static void hdmi_present_sense(struct hdmi_spec_per_pin
*per_pin
, int repoll
)
1151 struct hda_codec
*codec
= per_pin
->codec
;
1152 struct hdmi_eld
*eld
= &per_pin
->sink_eld
;
1153 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1155 * Always execute a GetPinSense verb here, even when called from
1156 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1157 * response's PD bit is not the real PD value, but indicates that
1158 * the real PD value changed. An older version of the HD-audio
1159 * specification worked this way. Hence, we just ignore the data in
1160 * the unsolicited response to avoid custom WARs.
1162 int present
= snd_hda_pin_sense(codec
, pin_nid
);
1163 bool eld_valid
= false;
1165 memset(eld
, 0, offsetof(struct hdmi_eld
, eld_buffer
));
1167 eld
->monitor_present
= !!(present
& AC_PINSENSE_PRESENCE
);
1168 if (eld
->monitor_present
)
1169 eld_valid
= !!(present
& AC_PINSENSE_ELDV
);
1171 _snd_printd(SND_PR_VERBOSE
,
1172 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1173 codec
->addr
, pin_nid
, eld
->monitor_present
, eld_valid
);
1176 if (!snd_hdmi_get_eld(eld
, codec
, pin_nid
))
1177 snd_hdmi_show_eld(eld
);
1179 queue_delayed_work(codec
->bus
->workq
,
1181 msecs_to_jiffies(300));
1186 static void hdmi_repoll_eld(struct work_struct
*work
)
1188 struct hdmi_spec_per_pin
*per_pin
=
1189 container_of(to_delayed_work(work
), struct hdmi_spec_per_pin
, work
);
1191 if (per_pin
->repoll_count
++ > 6)
1192 per_pin
->repoll_count
= 0;
1194 hdmi_present_sense(per_pin
, per_pin
->repoll_count
);
1197 static int hdmi_add_pin(struct hda_codec
*codec
, hda_nid_t pin_nid
)
1199 struct hdmi_spec
*spec
= codec
->spec
;
1200 unsigned int caps
, config
;
1202 struct hdmi_spec_per_pin
*per_pin
;
1205 caps
= snd_hda_query_pin_caps(codec
, pin_nid
);
1206 if (!(caps
& (AC_PINCAP_HDMI
| AC_PINCAP_DP
)))
1209 config
= snd_hda_codec_get_pincfg(codec
, pin_nid
);
1210 if (get_defcfg_connect(config
) == AC_JACK_PORT_NONE
)
1213 if (snd_BUG_ON(spec
->num_pins
>= MAX_HDMI_PINS
))
1216 pin_idx
= spec
->num_pins
;
1217 per_pin
= &spec
->pins
[pin_idx
];
1219 per_pin
->pin_nid
= pin_nid
;
1220 per_pin
->non_pcm
= false;
1222 err
= hdmi_read_pin_conn(codec
, pin_idx
);
1231 static int hdmi_add_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1233 struct hdmi_spec
*spec
= codec
->spec
;
1235 struct hdmi_spec_per_cvt
*per_cvt
;
1239 if (snd_BUG_ON(spec
->num_cvts
>= MAX_HDMI_CVTS
))
1242 chans
= get_wcaps(codec
, cvt_nid
);
1243 chans
= get_wcaps_channels(chans
);
1245 cvt_idx
= spec
->num_cvts
;
1246 per_cvt
= &spec
->cvts
[cvt_idx
];
1248 per_cvt
->cvt_nid
= cvt_nid
;
1249 per_cvt
->channels_min
= 2;
1251 per_cvt
->channels_max
= chans
;
1252 if (chans
> spec
->channels_max
)
1253 spec
->channels_max
= chans
;
1256 err
= snd_hda_query_supported_pcm(codec
, cvt_nid
,
1268 static int hdmi_parse_codec(struct hda_codec
*codec
)
1273 nodes
= snd_hda_get_sub_nodes(codec
, codec
->afg
, &nid
);
1274 if (!nid
|| nodes
< 0) {
1275 snd_printk(KERN_WARNING
"HDMI: failed to get afg sub nodes\n");
1279 for (i
= 0; i
< nodes
; i
++, nid
++) {
1283 caps
= get_wcaps(codec
, nid
);
1284 type
= get_wcaps_type(caps
);
1286 if (!(caps
& AC_WCAP_DIGITAL
))
1290 case AC_WID_AUD_OUT
:
1291 hdmi_add_cvt(codec
, nid
);
1294 hdmi_add_pin(codec
, nid
);
1300 /* We're seeing some problems with unsolicited hot plug events on
1301 * PantherPoint after S3, if this is not enabled */
1302 if (codec
->vendor_id
== 0x80862806)
1303 codec
->bus
->power_keep_link_on
= 1;
1305 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1306 * can be lost and presence sense verb will become inaccurate if the
1307 * HDA link is powered off at hot plug or hw initialization time.
1309 else if (!(snd_hda_param_read(codec
, codec
->afg
, AC_PAR_POWER_STATE
) &
1311 codec
->bus
->power_keep_link_on
= 1;
1319 static char *get_hdmi_pcm_name(int idx
)
1321 static char names
[MAX_HDMI_PINS
][8];
1322 sprintf(&names
[idx
][0], "HDMI %d", idx
);
1323 return &names
[idx
][0];
1326 static bool check_non_pcm_per_cvt(struct hda_codec
*codec
, hda_nid_t cvt_nid
)
1328 struct hda_spdif_out
*spdif
;
1331 mutex_lock(&codec
->spdif_mutex
);
1332 spdif
= snd_hda_spdif_out_of_nid(codec
, cvt_nid
);
1333 non_pcm
= !!(spdif
->status
& IEC958_AES0_NONAUDIO
);
1334 mutex_unlock(&codec
->spdif_mutex
);
1343 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1344 struct hda_codec
*codec
,
1345 unsigned int stream_tag
,
1346 unsigned int format
,
1347 struct snd_pcm_substream
*substream
)
1349 hda_nid_t cvt_nid
= hinfo
->nid
;
1350 struct hdmi_spec
*spec
= codec
->spec
;
1351 int pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1352 hda_nid_t pin_nid
= spec
->pins
[pin_idx
].pin_nid
;
1355 non_pcm
= check_non_pcm_per_cvt(codec
, cvt_nid
);
1357 hdmi_set_channel_count(codec
, cvt_nid
, substream
->runtime
->channels
);
1359 hdmi_setup_audio_infoframe(codec
, pin_idx
, non_pcm
, substream
);
1361 return hdmi_setup_stream(codec
, cvt_nid
, pin_nid
, stream_tag
, format
);
1364 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
1365 struct hda_codec
*codec
,
1366 struct snd_pcm_substream
*substream
)
1368 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
1372 static int hdmi_pcm_close(struct hda_pcm_stream
*hinfo
,
1373 struct hda_codec
*codec
,
1374 struct snd_pcm_substream
*substream
)
1376 struct hdmi_spec
*spec
= codec
->spec
;
1377 int cvt_idx
, pin_idx
;
1378 struct hdmi_spec_per_cvt
*per_cvt
;
1379 struct hdmi_spec_per_pin
*per_pin
;
1382 cvt_idx
= cvt_nid_to_cvt_index(spec
, hinfo
->nid
);
1383 if (snd_BUG_ON(cvt_idx
< 0))
1385 per_cvt
= &spec
->cvts
[cvt_idx
];
1387 snd_BUG_ON(!per_cvt
->assigned
);
1388 per_cvt
->assigned
= 0;
1391 pin_idx
= hinfo_to_pin_index(spec
, hinfo
);
1392 if (snd_BUG_ON(pin_idx
< 0))
1394 per_pin
= &spec
->pins
[pin_idx
];
1396 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1397 per_pin
->chmap_set
= false;
1398 memset(per_pin
->chmap
, 0, sizeof(per_pin
->chmap
));
1404 static const struct hda_pcm_ops generic_ops
= {
1405 .open
= hdmi_pcm_open
,
1406 .close
= hdmi_pcm_close
,
1407 .prepare
= generic_hdmi_playback_pcm_prepare
,
1408 .cleanup
= generic_hdmi_playback_pcm_cleanup
,
1412 * ALSA API channel-map control callbacks
1414 static int hdmi_chmap_ctl_info(struct snd_kcontrol
*kcontrol
,
1415 struct snd_ctl_elem_info
*uinfo
)
1417 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1418 struct hda_codec
*codec
= info
->private_data
;
1419 struct hdmi_spec
*spec
= codec
->spec
;
1420 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
1421 uinfo
->count
= spec
->channels_max
;
1422 uinfo
->value
.integer
.min
= 0;
1423 uinfo
->value
.integer
.max
= SNDRV_CHMAP_LAST
;
1427 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol
*kcontrol
, int op_flag
,
1428 unsigned int size
, unsigned int __user
*tlv
)
1430 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1431 struct hda_codec
*codec
= info
->private_data
;
1432 struct hdmi_spec
*spec
= codec
->spec
;
1433 const unsigned int valid_mask
=
1434 FL
| FR
| RL
| RR
| LFE
| FC
| RLC
| RRC
;
1435 unsigned int __user
*dst
;
1440 if (put_user(SNDRV_CTL_TLVT_CONTAINER
, tlv
))
1444 for (chs
= 2; chs
<= spec
->channels_max
; chs
++) {
1446 struct cea_channel_speaker_allocation
*cap
;
1447 cap
= channel_allocations
;
1448 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++, cap
++) {
1449 int chs_bytes
= chs
* 4;
1450 if (cap
->channels
!= chs
)
1452 if (cap
->spk_mask
& ~valid_mask
)
1456 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR
, dst
) ||
1457 put_user(chs_bytes
, dst
+ 1))
1462 if (size
< chs_bytes
)
1466 for (c
= 7; c
>= 0; c
--) {
1467 int spk
= cap
->speakers
[c
];
1470 if (put_user(spk_to_chmap(spk
), dst
))
1476 if (put_user(count
, tlv
+ 1))
1481 static int hdmi_chmap_ctl_get(struct snd_kcontrol
*kcontrol
,
1482 struct snd_ctl_elem_value
*ucontrol
)
1484 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1485 struct hda_codec
*codec
= info
->private_data
;
1486 struct hdmi_spec
*spec
= codec
->spec
;
1487 int pin_idx
= kcontrol
->private_value
;
1488 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1491 for (i
= 0; i
< ARRAY_SIZE(per_pin
->chmap
); i
++)
1492 ucontrol
->value
.integer
.value
[i
] = per_pin
->chmap
[i
];
1496 static int hdmi_chmap_ctl_put(struct snd_kcontrol
*kcontrol
,
1497 struct snd_ctl_elem_value
*ucontrol
)
1499 struct snd_pcm_chmap
*info
= snd_kcontrol_chip(kcontrol
);
1500 struct hda_codec
*codec
= info
->private_data
;
1501 struct hdmi_spec
*spec
= codec
->spec
;
1502 int pin_idx
= kcontrol
->private_value
;
1503 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1504 unsigned int ctl_idx
;
1505 struct snd_pcm_substream
*substream
;
1506 unsigned char chmap
[8];
1507 int i
, ca
, prepared
= 0;
1509 ctl_idx
= snd_ctl_get_ioffidx(kcontrol
, &ucontrol
->id
);
1510 substream
= snd_pcm_chmap_substream(info
, ctl_idx
);
1511 if (!substream
|| !substream
->runtime
)
1512 return 0; /* just for avoiding error from alsactl restore */
1513 switch (substream
->runtime
->status
->state
) {
1514 case SNDRV_PCM_STATE_OPEN
:
1515 case SNDRV_PCM_STATE_SETUP
:
1517 case SNDRV_PCM_STATE_PREPARED
:
1523 memset(chmap
, 0, sizeof(chmap
));
1524 for (i
= 0; i
< ARRAY_SIZE(chmap
); i
++)
1525 chmap
[i
] = ucontrol
->value
.integer
.value
[i
];
1526 if (!memcmp(chmap
, per_pin
->chmap
, sizeof(chmap
)))
1528 ca
= hdmi_manual_channel_allocation(ARRAY_SIZE(chmap
), chmap
);
1531 per_pin
->chmap_set
= true;
1532 memcpy(per_pin
->chmap
, chmap
, sizeof(chmap
));
1534 hdmi_setup_audio_infoframe(codec
, pin_idx
, per_pin
->non_pcm
,
1540 static int generic_hdmi_build_pcms(struct hda_codec
*codec
)
1542 struct hdmi_spec
*spec
= codec
->spec
;
1545 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1546 struct hda_pcm
*info
;
1547 struct hda_pcm_stream
*pstr
;
1549 info
= &spec
->pcm_rec
[pin_idx
];
1550 info
->name
= get_hdmi_pcm_name(pin_idx
);
1551 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
1552 info
->own_chmap
= true;
1554 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
1555 pstr
->substreams
= 1;
1556 pstr
->ops
= generic_ops
;
1557 /* other pstr fields are set in open */
1560 codec
->num_pcms
= spec
->num_pins
;
1561 codec
->pcm_info
= spec
->pcm_rec
;
1566 static int generic_hdmi_build_jack(struct hda_codec
*codec
, int pin_idx
)
1568 char hdmi_str
[32] = "HDMI/DP";
1569 struct hdmi_spec
*spec
= codec
->spec
;
1570 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1571 int pcmdev
= spec
->pcm_rec
[pin_idx
].device
;
1574 sprintf(hdmi_str
+ strlen(hdmi_str
), ",pcm=%d", pcmdev
);
1576 return snd_hda_jack_add_kctl(codec
, per_pin
->pin_nid
, hdmi_str
, 0);
1579 static int generic_hdmi_build_controls(struct hda_codec
*codec
)
1581 struct hdmi_spec
*spec
= codec
->spec
;
1585 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1586 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1588 err
= generic_hdmi_build_jack(codec
, pin_idx
);
1592 err
= snd_hda_create_dig_out_ctls(codec
,
1594 per_pin
->mux_nids
[0],
1598 snd_hda_spdif_ctls_unassign(codec
, pin_idx
);
1600 /* add control for ELD Bytes */
1601 err
= hdmi_create_eld_ctl(codec
,
1603 spec
->pcm_rec
[pin_idx
].device
);
1608 hdmi_present_sense(per_pin
, 0);
1611 /* add channel maps */
1612 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1613 struct snd_pcm_chmap
*chmap
;
1614 struct snd_kcontrol
*kctl
;
1616 err
= snd_pcm_add_chmap_ctls(codec
->pcm_info
[pin_idx
].pcm
,
1617 SNDRV_PCM_STREAM_PLAYBACK
,
1618 NULL
, 0, pin_idx
, &chmap
);
1621 /* override handlers */
1622 chmap
->private_data
= codec
;
1624 for (i
= 0; i
< kctl
->count
; i
++)
1625 kctl
->vd
[i
].access
|= SNDRV_CTL_ELEM_ACCESS_WRITE
;
1626 kctl
->info
= hdmi_chmap_ctl_info
;
1627 kctl
->get
= hdmi_chmap_ctl_get
;
1628 kctl
->put
= hdmi_chmap_ctl_put
;
1629 kctl
->tlv
.c
= hdmi_chmap_ctl_tlv
;
1635 static int generic_hdmi_init_per_pins(struct hda_codec
*codec
)
1637 struct hdmi_spec
*spec
= codec
->spec
;
1640 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1641 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1642 struct hdmi_eld
*eld
= &per_pin
->sink_eld
;
1644 per_pin
->codec
= codec
;
1645 INIT_DELAYED_WORK(&per_pin
->work
, hdmi_repoll_eld
);
1646 snd_hda_eld_proc_new(codec
, eld
, pin_idx
);
1651 static int generic_hdmi_init(struct hda_codec
*codec
)
1653 struct hdmi_spec
*spec
= codec
->spec
;
1656 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1657 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1658 hda_nid_t pin_nid
= per_pin
->pin_nid
;
1660 hdmi_init_pin(codec
, pin_nid
);
1661 snd_hda_jack_detect_enable(codec
, pin_nid
, pin_nid
);
1666 static void generic_hdmi_free(struct hda_codec
*codec
)
1668 struct hdmi_spec
*spec
= codec
->spec
;
1671 for (pin_idx
= 0; pin_idx
< spec
->num_pins
; pin_idx
++) {
1672 struct hdmi_spec_per_pin
*per_pin
= &spec
->pins
[pin_idx
];
1673 struct hdmi_eld
*eld
= &per_pin
->sink_eld
;
1675 cancel_delayed_work(&per_pin
->work
);
1676 snd_hda_eld_proc_free(codec
, eld
);
1679 flush_workqueue(codec
->bus
->workq
);
1683 static const struct hda_codec_ops generic_hdmi_patch_ops
= {
1684 .init
= generic_hdmi_init
,
1685 .free
= generic_hdmi_free
,
1686 .build_pcms
= generic_hdmi_build_pcms
,
1687 .build_controls
= generic_hdmi_build_controls
,
1688 .unsol_event
= hdmi_unsol_event
,
1691 static void intel_haswell_fixup_connect_list(struct hda_codec
*codec
)
1693 unsigned int vendor_param
;
1694 hda_nid_t list
[3] = {0x2, 0x3, 0x4};
1696 vendor_param
= snd_hda_codec_read(codec
, 0x08, 0, 0xf81, 0);
1697 if (vendor_param
== -1 || vendor_param
& 0x02)
1700 /* enable DP1.2 mode */
1701 vendor_param
|= 0x02;
1702 snd_hda_codec_read(codec
, 0x08, 0, 0x781, vendor_param
);
1704 vendor_param
= snd_hda_codec_read(codec
, 0x08, 0, 0xf81, 0);
1705 if (vendor_param
== -1 || !(vendor_param
& 0x02))
1708 /* override 3 pins connection list */
1709 snd_hda_override_conn_list(codec
, 0x05, 3, list
);
1710 snd_hda_override_conn_list(codec
, 0x06, 3, list
);
1711 snd_hda_override_conn_list(codec
, 0x07, 3, list
);
1715 static int patch_generic_hdmi(struct hda_codec
*codec
)
1717 struct hdmi_spec
*spec
;
1719 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
1725 if (codec
->vendor_id
== 0x80862807)
1726 intel_haswell_fixup_connect_list(codec
);
1728 if (hdmi_parse_codec(codec
) < 0) {
1733 codec
->patch_ops
= generic_hdmi_patch_ops
;
1734 generic_hdmi_init_per_pins(codec
);
1736 init_channel_allocations();
1742 * Shared non-generic implementations
1745 static int simple_playback_build_pcms(struct hda_codec
*codec
)
1747 struct hdmi_spec
*spec
= codec
->spec
;
1748 struct hda_pcm
*info
= spec
->pcm_rec
;
1750 struct hda_pcm_stream
*pstr
;
1752 codec
->num_pcms
= 1;
1753 codec
->pcm_info
= info
;
1755 chans
= get_wcaps(codec
, spec
->cvts
[0].cvt_nid
);
1756 chans
= get_wcaps_channels(chans
);
1758 info
->name
= get_hdmi_pcm_name(0);
1759 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
1760 pstr
= &info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
];
1761 *pstr
= spec
->pcm_playback
;
1762 pstr
->nid
= spec
->cvts
[0].cvt_nid
;
1763 if (pstr
->channels_max
<= 2 && chans
&& chans
<= 16)
1764 pstr
->channels_max
= chans
;
1769 /* unsolicited event for jack sensing */
1770 static void simple_hdmi_unsol_event(struct hda_codec
*codec
,
1773 snd_hda_jack_set_dirty_all(codec
);
1774 snd_hda_jack_report_sync(codec
);
1777 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1778 * as long as spec->pins[] is set correctly
1780 #define simple_hdmi_build_jack generic_hdmi_build_jack
1782 static int simple_playback_build_controls(struct hda_codec
*codec
)
1784 struct hdmi_spec
*spec
= codec
->spec
;
1787 err
= snd_hda_create_spdif_out_ctls(codec
,
1788 spec
->cvts
[0].cvt_nid
,
1789 spec
->cvts
[0].cvt_nid
);
1792 return simple_hdmi_build_jack(codec
, 0);
1795 static int simple_playback_init(struct hda_codec
*codec
)
1797 struct hdmi_spec
*spec
= codec
->spec
;
1798 hda_nid_t pin
= spec
->pins
[0].pin_nid
;
1800 snd_hda_codec_write(codec
, pin
, 0,
1801 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
1802 /* some codecs require to unmute the pin */
1803 if (get_wcaps(codec
, pin
) & AC_WCAP_OUT_AMP
)
1804 snd_hda_codec_write(codec
, pin
, 0, AC_VERB_SET_AMP_GAIN_MUTE
,
1806 snd_hda_jack_detect_enable(codec
, pin
, pin
);
1810 static void simple_playback_free(struct hda_codec
*codec
)
1812 struct hdmi_spec
*spec
= codec
->spec
;
1818 * Nvidia specific implementations
1821 #define Nv_VERB_SET_Channel_Allocation 0xF79
1822 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1823 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1824 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1826 #define nvhdmi_master_con_nid_7x 0x04
1827 #define nvhdmi_master_pin_nid_7x 0x05
1829 static const hda_nid_t nvhdmi_con_nids_7x
[4] = {
1830 /*front, rear, clfe, rear_surr */
1834 static const struct hda_verb nvhdmi_basic_init_7x_2ch
[] = {
1835 /* set audio protect on */
1836 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
1837 /* enable digital output on pin widget */
1838 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1842 static const struct hda_verb nvhdmi_basic_init_7x_8ch
[] = {
1843 /* set audio protect on */
1844 { 0x1, Nv_VERB_SET_Audio_Protection_On
, 0x1},
1845 /* enable digital output on pin widget */
1846 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1847 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1848 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1849 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1850 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
| 0x5 },
1854 #ifdef LIMITED_RATE_FMT_SUPPORT
1855 /* support only the safe format and rate */
1856 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1857 #define SUPPORTED_MAXBPS 16
1858 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1860 /* support all rates and formats */
1861 #define SUPPORTED_RATES \
1862 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1863 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1864 SNDRV_PCM_RATE_192000)
1865 #define SUPPORTED_MAXBPS 24
1866 #define SUPPORTED_FORMATS \
1867 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1870 static int nvhdmi_7x_init_2ch(struct hda_codec
*codec
)
1872 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_2ch
);
1876 static int nvhdmi_7x_init_8ch(struct hda_codec
*codec
)
1878 snd_hda_sequence_write(codec
, nvhdmi_basic_init_7x_8ch
);
1882 static unsigned int channels_2_6_8
[] = {
1886 static unsigned int channels_2_8
[] = {
1890 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels
= {
1891 .count
= ARRAY_SIZE(channels_2_6_8
),
1892 .list
= channels_2_6_8
,
1896 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels
= {
1897 .count
= ARRAY_SIZE(channels_2_8
),
1898 .list
= channels_2_8
,
1902 static int simple_playback_pcm_open(struct hda_pcm_stream
*hinfo
,
1903 struct hda_codec
*codec
,
1904 struct snd_pcm_substream
*substream
)
1906 struct hdmi_spec
*spec
= codec
->spec
;
1907 struct snd_pcm_hw_constraint_list
*hw_constraints_channels
= NULL
;
1909 switch (codec
->preset
->id
) {
1914 hw_constraints_channels
= &hw_constraints_2_8_channels
;
1917 hw_constraints_channels
= &hw_constraints_2_6_8_channels
;
1923 if (hw_constraints_channels
!= NULL
) {
1924 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
1925 SNDRV_PCM_HW_PARAM_CHANNELS
,
1926 hw_constraints_channels
);
1928 snd_pcm_hw_constraint_step(substream
->runtime
, 0,
1929 SNDRV_PCM_HW_PARAM_CHANNELS
, 2);
1932 return snd_hda_multi_out_dig_open(codec
, &spec
->multiout
);
1935 static int simple_playback_pcm_close(struct hda_pcm_stream
*hinfo
,
1936 struct hda_codec
*codec
,
1937 struct snd_pcm_substream
*substream
)
1939 struct hdmi_spec
*spec
= codec
->spec
;
1940 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
1943 static int simple_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
1944 struct hda_codec
*codec
,
1945 unsigned int stream_tag
,
1946 unsigned int format
,
1947 struct snd_pcm_substream
*substream
)
1949 struct hdmi_spec
*spec
= codec
->spec
;
1950 return snd_hda_multi_out_dig_prepare(codec
, &spec
->multiout
,
1951 stream_tag
, format
, substream
);
1954 static const struct hda_pcm_stream simple_pcm_playback
= {
1959 .open
= simple_playback_pcm_open
,
1960 .close
= simple_playback_pcm_close
,
1961 .prepare
= simple_playback_pcm_prepare
1965 static const struct hda_codec_ops simple_hdmi_patch_ops
= {
1966 .build_controls
= simple_playback_build_controls
,
1967 .build_pcms
= simple_playback_build_pcms
,
1968 .init
= simple_playback_init
,
1969 .free
= simple_playback_free
,
1970 .unsol_event
= simple_hdmi_unsol_event
,
1973 static int patch_simple_hdmi(struct hda_codec
*codec
,
1974 hda_nid_t cvt_nid
, hda_nid_t pin_nid
)
1976 struct hdmi_spec
*spec
;
1978 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
1984 spec
->multiout
.num_dacs
= 0; /* no analog */
1985 spec
->multiout
.max_channels
= 2;
1986 spec
->multiout
.dig_out_nid
= cvt_nid
;
1989 spec
->cvts
[0].cvt_nid
= cvt_nid
;
1990 spec
->pins
[0].pin_nid
= pin_nid
;
1991 spec
->pcm_playback
= simple_pcm_playback
;
1993 codec
->patch_ops
= simple_hdmi_patch_ops
;
1998 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec
*codec
,
2001 unsigned int chanmask
;
2002 int chan
= channels
? (channels
- 1) : 1;
2021 /* Set the audio infoframe channel allocation and checksum fields. The
2022 * channel count is computed implicitly by the hardware. */
2023 snd_hda_codec_write(codec
, 0x1, 0,
2024 Nv_VERB_SET_Channel_Allocation
, chanmask
);
2026 snd_hda_codec_write(codec
, 0x1, 0,
2027 Nv_VERB_SET_Info_Frame_Checksum
,
2028 (0x71 - chan
- chanmask
));
2031 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream
*hinfo
,
2032 struct hda_codec
*codec
,
2033 struct snd_pcm_substream
*substream
)
2035 struct hdmi_spec
*spec
= codec
->spec
;
2038 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
,
2039 0, AC_VERB_SET_CHANNEL_STREAMID
, 0);
2040 for (i
= 0; i
< 4; i
++) {
2041 /* set the stream id */
2042 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2043 AC_VERB_SET_CHANNEL_STREAMID
, 0);
2044 /* set the stream format */
2045 snd_hda_codec_write(codec
, nvhdmi_con_nids_7x
[i
], 0,
2046 AC_VERB_SET_STREAM_FORMAT
, 0);
2049 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2050 * streams are disabled. */
2051 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2053 return snd_hda_multi_out_dig_close(codec
, &spec
->multiout
);
2056 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2057 struct hda_codec
*codec
,
2058 unsigned int stream_tag
,
2059 unsigned int format
,
2060 struct snd_pcm_substream
*substream
)
2063 unsigned int dataDCC2
, channel_id
;
2065 struct hdmi_spec
*spec
= codec
->spec
;
2066 struct hda_spdif_out
*spdif
;
2068 mutex_lock(&codec
->spdif_mutex
);
2069 spdif
= snd_hda_spdif_out_of_nid(codec
, spec
->cvts
[0].cvt_nid
);
2071 chs
= substream
->runtime
->channels
;
2075 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2076 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
))
2077 snd_hda_codec_write(codec
,
2078 nvhdmi_master_con_nid_7x
,
2080 AC_VERB_SET_DIGI_CONVERT_1
,
2081 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2083 /* set the stream id */
2084 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2085 AC_VERB_SET_CHANNEL_STREAMID
, (stream_tag
<< 4) | 0x0);
2087 /* set the stream format */
2088 snd_hda_codec_write(codec
, nvhdmi_master_con_nid_7x
, 0,
2089 AC_VERB_SET_STREAM_FORMAT
, format
);
2091 /* turn on again (if needed) */
2092 /* enable and set the channel status audio/data flag */
2093 if (codec
->spdif_status_reset
&& (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2094 snd_hda_codec_write(codec
,
2095 nvhdmi_master_con_nid_7x
,
2097 AC_VERB_SET_DIGI_CONVERT_1
,
2098 spdif
->ctls
& 0xff);
2099 snd_hda_codec_write(codec
,
2100 nvhdmi_master_con_nid_7x
,
2102 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2105 for (i
= 0; i
< 4; i
++) {
2111 /* turn off SPDIF once;
2112 *otherwise the IEC958 bits won't be updated
2114 if (codec
->spdif_status_reset
&&
2115 (spdif
->ctls
& AC_DIG1_ENABLE
))
2116 snd_hda_codec_write(codec
,
2117 nvhdmi_con_nids_7x
[i
],
2119 AC_VERB_SET_DIGI_CONVERT_1
,
2120 spdif
->ctls
& ~AC_DIG1_ENABLE
& 0xff);
2121 /* set the stream id */
2122 snd_hda_codec_write(codec
,
2123 nvhdmi_con_nids_7x
[i
],
2125 AC_VERB_SET_CHANNEL_STREAMID
,
2126 (stream_tag
<< 4) | channel_id
);
2127 /* set the stream format */
2128 snd_hda_codec_write(codec
,
2129 nvhdmi_con_nids_7x
[i
],
2131 AC_VERB_SET_STREAM_FORMAT
,
2133 /* turn on again (if needed) */
2134 /* enable and set the channel status audio/data flag */
2135 if (codec
->spdif_status_reset
&&
2136 (spdif
->ctls
& AC_DIG1_ENABLE
)) {
2137 snd_hda_codec_write(codec
,
2138 nvhdmi_con_nids_7x
[i
],
2140 AC_VERB_SET_DIGI_CONVERT_1
,
2141 spdif
->ctls
& 0xff);
2142 snd_hda_codec_write(codec
,
2143 nvhdmi_con_nids_7x
[i
],
2145 AC_VERB_SET_DIGI_CONVERT_2
, dataDCC2
);
2149 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, chs
);
2151 mutex_unlock(&codec
->spdif_mutex
);
2155 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x
= {
2159 .nid
= nvhdmi_master_con_nid_7x
,
2160 .rates
= SUPPORTED_RATES
,
2161 .maxbps
= SUPPORTED_MAXBPS
,
2162 .formats
= SUPPORTED_FORMATS
,
2164 .open
= simple_playback_pcm_open
,
2165 .close
= nvhdmi_8ch_7x_pcm_close
,
2166 .prepare
= nvhdmi_8ch_7x_pcm_prepare
2170 static int patch_nvhdmi_2ch(struct hda_codec
*codec
)
2172 struct hdmi_spec
*spec
;
2173 int err
= patch_simple_hdmi(codec
, nvhdmi_master_con_nid_7x
,
2174 nvhdmi_master_pin_nid_7x
);
2178 codec
->patch_ops
.init
= nvhdmi_7x_init_2ch
;
2179 /* override the PCM rates, etc, as the codec doesn't give full list */
2181 spec
->pcm_playback
.rates
= SUPPORTED_RATES
;
2182 spec
->pcm_playback
.maxbps
= SUPPORTED_MAXBPS
;
2183 spec
->pcm_playback
.formats
= SUPPORTED_FORMATS
;
2187 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec
*codec
)
2189 struct hdmi_spec
*spec
= codec
->spec
;
2190 int err
= simple_playback_build_pcms(codec
);
2191 spec
->pcm_rec
[0].own_chmap
= true;
2195 static int nvhdmi_7x_8ch_build_controls(struct hda_codec
*codec
)
2197 struct hdmi_spec
*spec
= codec
->spec
;
2198 struct snd_pcm_chmap
*chmap
;
2201 err
= simple_playback_build_controls(codec
);
2205 /* add channel maps */
2206 err
= snd_pcm_add_chmap_ctls(spec
->pcm_rec
[0].pcm
,
2207 SNDRV_PCM_STREAM_PLAYBACK
,
2208 snd_pcm_alt_chmaps
, 8, 0, &chmap
);
2211 switch (codec
->preset
->id
) {
2216 chmap
->channel_mask
= (1U << 2) | (1U << 8);
2219 chmap
->channel_mask
= (1U << 2) | (1U << 6) | (1U << 8);
2224 static int patch_nvhdmi_8ch_7x(struct hda_codec
*codec
)
2226 struct hdmi_spec
*spec
;
2227 int err
= patch_nvhdmi_2ch(codec
);
2231 spec
->multiout
.max_channels
= 8;
2232 spec
->pcm_playback
= nvhdmi_pcm_playback_8ch_7x
;
2233 codec
->patch_ops
.init
= nvhdmi_7x_init_8ch
;
2234 codec
->patch_ops
.build_pcms
= nvhdmi_7x_8ch_build_pcms
;
2235 codec
->patch_ops
.build_controls
= nvhdmi_7x_8ch_build_controls
;
2237 /* Initialize the audio infoframe channel mask and checksum to something
2239 nvhdmi_8ch_7x_set_info_frame_parameters(codec
, 8);
2245 * ATI-specific implementations
2247 * FIXME: we may omit the whole this and use the generic code once after
2248 * it's confirmed to work.
2251 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2252 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2254 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
2255 struct hda_codec
*codec
,
2256 unsigned int stream_tag
,
2257 unsigned int format
,
2258 struct snd_pcm_substream
*substream
)
2260 struct hdmi_spec
*spec
= codec
->spec
;
2261 int chans
= substream
->runtime
->channels
;
2264 err
= simple_playback_pcm_prepare(hinfo
, codec
, stream_tag
, format
,
2268 snd_hda_codec_write(codec
, spec
->cvts
[0].cvt_nid
, 0,
2269 AC_VERB_SET_CVT_CHAN_COUNT
, chans
- 1);
2271 for (i
= 0; i
< chans
; i
++) {
2272 snd_hda_codec_write(codec
, spec
->cvts
[0].cvt_nid
, 0,
2273 AC_VERB_SET_HDMI_CHAN_SLOT
,
2279 static int patch_atihdmi(struct hda_codec
*codec
)
2281 struct hdmi_spec
*spec
;
2282 int err
= patch_simple_hdmi(codec
, ATIHDMI_CVT_NID
, ATIHDMI_PIN_NID
);
2286 spec
->pcm_playback
.ops
.prepare
= atihdmi_playback_pcm_prepare
;
2290 /* VIA HDMI Implementation */
2291 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2292 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2294 static int patch_via_hdmi(struct hda_codec
*codec
)
2296 return patch_simple_hdmi(codec
, VIAHDMI_CVT_NID
, VIAHDMI_PIN_NID
);
2302 static const struct hda_codec_preset snd_hda_preset_hdmi
[] = {
2303 { .id
= 0x1002793c, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
2304 { .id
= 0x10027919, .name
= "RS600 HDMI", .patch
= patch_atihdmi
},
2305 { .id
= 0x1002791a, .name
= "RS690/780 HDMI", .patch
= patch_atihdmi
},
2306 { .id
= 0x1002aa01, .name
= "R6xx HDMI", .patch
= patch_generic_hdmi
},
2307 { .id
= 0x10951390, .name
= "SiI1390 HDMI", .patch
= patch_generic_hdmi
},
2308 { .id
= 0x10951392, .name
= "SiI1392 HDMI", .patch
= patch_generic_hdmi
},
2309 { .id
= 0x17e80047, .name
= "Chrontel HDMI", .patch
= patch_generic_hdmi
},
2310 { .id
= 0x10de0002, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2311 { .id
= 0x10de0003, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2312 { .id
= 0x10de0005, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2313 { .id
= 0x10de0006, .name
= "MCP77/78 HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2314 { .id
= 0x10de0007, .name
= "MCP79/7A HDMI", .patch
= patch_nvhdmi_8ch_7x
},
2315 { .id
= 0x10de000a, .name
= "GPU 0a HDMI/DP", .patch
= patch_generic_hdmi
},
2316 { .id
= 0x10de000b, .name
= "GPU 0b HDMI/DP", .patch
= patch_generic_hdmi
},
2317 { .id
= 0x10de000c, .name
= "MCP89 HDMI", .patch
= patch_generic_hdmi
},
2318 { .id
= 0x10de000d, .name
= "GPU 0d HDMI/DP", .patch
= patch_generic_hdmi
},
2319 { .id
= 0x10de0010, .name
= "GPU 10 HDMI/DP", .patch
= patch_generic_hdmi
},
2320 { .id
= 0x10de0011, .name
= "GPU 11 HDMI/DP", .patch
= patch_generic_hdmi
},
2321 { .id
= 0x10de0012, .name
= "GPU 12 HDMI/DP", .patch
= patch_generic_hdmi
},
2322 { .id
= 0x10de0013, .name
= "GPU 13 HDMI/DP", .patch
= patch_generic_hdmi
},
2323 { .id
= 0x10de0014, .name
= "GPU 14 HDMI/DP", .patch
= patch_generic_hdmi
},
2324 { .id
= 0x10de0015, .name
= "GPU 15 HDMI/DP", .patch
= patch_generic_hdmi
},
2325 { .id
= 0x10de0016, .name
= "GPU 16 HDMI/DP", .patch
= patch_generic_hdmi
},
2326 /* 17 is known to be absent */
2327 { .id
= 0x10de0018, .name
= "GPU 18 HDMI/DP", .patch
= patch_generic_hdmi
},
2328 { .id
= 0x10de0019, .name
= "GPU 19 HDMI/DP", .patch
= patch_generic_hdmi
},
2329 { .id
= 0x10de001a, .name
= "GPU 1a HDMI/DP", .patch
= patch_generic_hdmi
},
2330 { .id
= 0x10de001b, .name
= "GPU 1b HDMI/DP", .patch
= patch_generic_hdmi
},
2331 { .id
= 0x10de001c, .name
= "GPU 1c HDMI/DP", .patch
= patch_generic_hdmi
},
2332 { .id
= 0x10de0040, .name
= "GPU 40 HDMI/DP", .patch
= patch_generic_hdmi
},
2333 { .id
= 0x10de0041, .name
= "GPU 41 HDMI/DP", .patch
= patch_generic_hdmi
},
2334 { .id
= 0x10de0042, .name
= "GPU 42 HDMI/DP", .patch
= patch_generic_hdmi
},
2335 { .id
= 0x10de0043, .name
= "GPU 43 HDMI/DP", .patch
= patch_generic_hdmi
},
2336 { .id
= 0x10de0044, .name
= "GPU 44 HDMI/DP", .patch
= patch_generic_hdmi
},
2337 { .id
= 0x10de0051, .name
= "GPU 51 HDMI/DP", .patch
= patch_generic_hdmi
},
2338 { .id
= 0x10de0067, .name
= "MCP67 HDMI", .patch
= patch_nvhdmi_2ch
},
2339 { .id
= 0x10de8001, .name
= "MCP73 HDMI", .patch
= patch_nvhdmi_2ch
},
2340 { .id
= 0x11069f80, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
2341 { .id
= 0x11069f81, .name
= "VX900 HDMI/DP", .patch
= patch_via_hdmi
},
2342 { .id
= 0x11069f84, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
2343 { .id
= 0x11069f85, .name
= "VX11 HDMI/DP", .patch
= patch_generic_hdmi
},
2344 { .id
= 0x80860054, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
2345 { .id
= 0x80862801, .name
= "Bearlake HDMI", .patch
= patch_generic_hdmi
},
2346 { .id
= 0x80862802, .name
= "Cantiga HDMI", .patch
= patch_generic_hdmi
},
2347 { .id
= 0x80862803, .name
= "Eaglelake HDMI", .patch
= patch_generic_hdmi
},
2348 { .id
= 0x80862804, .name
= "IbexPeak HDMI", .patch
= patch_generic_hdmi
},
2349 { .id
= 0x80862805, .name
= "CougarPoint HDMI", .patch
= patch_generic_hdmi
},
2350 { .id
= 0x80862806, .name
= "PantherPoint HDMI", .patch
= patch_generic_hdmi
},
2351 { .id
= 0x80862807, .name
= "Haswell HDMI", .patch
= patch_generic_hdmi
},
2352 { .id
= 0x80862880, .name
= "CedarTrail HDMI", .patch
= patch_generic_hdmi
},
2353 { .id
= 0x808629fb, .name
= "Crestline HDMI", .patch
= patch_generic_hdmi
},
2357 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2358 MODULE_ALIAS("snd-hda-codec-id:10027919");
2359 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2360 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2361 MODULE_ALIAS("snd-hda-codec-id:10951390");
2362 MODULE_ALIAS("snd-hda-codec-id:10951392");
2363 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2364 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2365 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2366 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2367 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2368 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2369 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2370 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2371 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2372 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2373 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2374 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2375 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2376 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2377 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2378 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2379 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2380 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2381 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2382 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2383 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2384 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2385 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2386 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2387 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2388 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2389 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2390 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2391 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2392 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2393 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2394 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2395 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2396 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2397 MODULE_ALIAS("snd-hda-codec-id:80860054");
2398 MODULE_ALIAS("snd-hda-codec-id:80862801");
2399 MODULE_ALIAS("snd-hda-codec-id:80862802");
2400 MODULE_ALIAS("snd-hda-codec-id:80862803");
2401 MODULE_ALIAS("snd-hda-codec-id:80862804");
2402 MODULE_ALIAS("snd-hda-codec-id:80862805");
2403 MODULE_ALIAS("snd-hda-codec-id:80862806");
2404 MODULE_ALIAS("snd-hda-codec-id:80862807");
2405 MODULE_ALIAS("snd-hda-codec-id:80862880");
2406 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2408 MODULE_LICENSE("GPL");
2409 MODULE_DESCRIPTION("HDMI HD-audio codec");
2410 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2411 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2412 MODULE_ALIAS("snd-hda-codec-atihdmi");
2414 static struct hda_codec_preset_list intel_list
= {
2415 .preset
= snd_hda_preset_hdmi
,
2416 .owner
= THIS_MODULE
,
2419 static int __init
patch_hdmi_init(void)
2421 return snd_hda_add_codec_preset(&intel_list
);
2424 static void __exit
patch_hdmi_exit(void)
2426 snd_hda_delete_codec_preset(&intel_list
);
2429 module_init(patch_hdmi_init
)
2430 module_exit(patch_hdmi_exit
)