projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ALSA: hda - Yet another fix for broken HSW HDMI pin connections
[deliverable/linux.git] / sound / pci / hda / patch_hdmi.c
1 /*
2 *
3 * patch_hdmi.c - routines for HDMI/DisplayPort codecs
4 *
5 * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
6 * Copyright (c) 2006 ATI Technologies Inc.
7 * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
8 * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
9 *
10 * Authors:
11 * Wu Fengguang <wfg@linux.intel.com>
12 *
13 * Maintained by:
14 * Wu Fengguang <wfg@linux.intel.com>
15 *
16 * This program is free software; you can redistribute it and/or modify it
17 * under the terms of the GNU General Public License as published by the Free
18 * Software Foundation; either version 2 of the License, or (at your option)
19 * any later version.
20 *
21 * This program is distributed in the hope that it will be useful, but
22 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
23 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 * for more details.
25 *
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software Foundation,
28 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 */
30
31 #include <linux/init.h>
32 #include <linux/delay.h>
33 #include <linux/slab.h>
34 #include <linux/module.h>
35 #include <sound/core.h>
36 #include <sound/jack.h>
37 #include <sound/asoundef.h>
38 #include <sound/tlv.h>
39 #include "hda_codec.h"
40 #include "hda_local.h"
41 #include "hda_jack.h"
42
43 static bool static_hdmi_pcm;
44 module_param(static_hdmi_pcm, bool, 0644);
45 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
46
47 /*
48 * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
49 * could support N independent pipes, each of them can be connected to one or
50 * more ports (DVI, HDMI or DisplayPort).
51 *
52 * The HDA correspondence of pipes/ports are converter/pin nodes.
53 */
54 #define MAX_HDMI_CVTS 8
55 #define MAX_HDMI_PINS 8
56
57 struct hdmi_spec_per_cvt {
58 hda_nid_t cvt_nid;
59 int assigned;
60 unsigned int channels_min;
61 unsigned int channels_max;
62 u32 rates;
63 u64 formats;
64 unsigned int maxbps;
65 };
66
67 /* max. connections to a widget */
68 #define HDA_MAX_CONNECTIONS 32
69
70 struct hdmi_spec_per_pin {
71 hda_nid_t pin_nid;
72 int num_mux_nids;
73 hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
74
75 struct hda_codec *codec;
76 struct hdmi_eld sink_eld;
77 struct delayed_work work;
78 int repoll_count;
79 bool non_pcm;
80 bool chmap_set; /* channel-map override by ALSA API? */
81 unsigned char chmap[8]; /* ALSA API channel-map */
82 };
83
84 struct hdmi_spec {
85 int num_cvts;
86 struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
87 hda_nid_t cvt_nids[MAX_HDMI_CVTS];
88
89 int num_pins;
90 struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
91 struct hda_pcm pcm_rec[MAX_HDMI_PINS];
92 unsigned int channels_max; /* max over all cvts */
93
94 /*
95 * Non-generic ATI/NVIDIA specific
96 */
97 struct hda_multi_out multiout;
98 struct hda_pcm_stream pcm_playback;
99 };
100
101
102 struct hdmi_audio_infoframe {
103 u8 type; /* 0x84 */
104 u8 ver; /* 0x01 */
105 u8 len; /* 0x0a */
106
107 u8 checksum;
108
109 u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
110 u8 SS01_SF24;
111 u8 CXT04;
112 u8 CA;
113 u8 LFEPBL01_LSV36_DM_INH7;
114 };
115
116 struct dp_audio_infoframe {
117 u8 type; /* 0x84 */
118 u8 len; /* 0x1b */
119 u8 ver; /* 0x11 << 2 */
120
121 u8 CC02_CT47; /* match with HDMI infoframe from this on */
122 u8 SS01_SF24;
123 u8 CXT04;
124 u8 CA;
125 u8 LFEPBL01_LSV36_DM_INH7;
126 };
127
128 union audio_infoframe {
129 struct hdmi_audio_infoframe hdmi;
130 struct dp_audio_infoframe dp;
131 u8 bytes[0];
132 };
133
134 /*
135 * CEA speaker placement:
136 *
137 * FLH FCH FRH
138 * FLW FL FLC FC FRC FR FRW
139 *
140 * LFE
141 * TC
142 *
143 * RL RLC RC RRC RR
144 *
145 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
146 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
147 */
148 enum cea_speaker_placement {
149 FL = (1 << 0), /* Front Left */
150 FC = (1 << 1), /* Front Center */
151 FR = (1 << 2), /* Front Right */
152 FLC = (1 << 3), /* Front Left Center */
153 FRC = (1 << 4), /* Front Right Center */
154 RL = (1 << 5), /* Rear Left */
155 RC = (1 << 6), /* Rear Center */
156 RR = (1 << 7), /* Rear Right */
157 RLC = (1 << 8), /* Rear Left Center */
158 RRC = (1 << 9), /* Rear Right Center */
159 LFE = (1 << 10), /* Low Frequency Effect */
160 FLW = (1 << 11), /* Front Left Wide */
161 FRW = (1 << 12), /* Front Right Wide */
162 FLH = (1 << 13), /* Front Left High */
163 FCH = (1 << 14), /* Front Center High */
164 FRH = (1 << 15), /* Front Right High */
165 TC = (1 << 16), /* Top Center */
166 };
167
168 /*
169 * ELD SA bits in the CEA Speaker Allocation data block
170 */
171 static int eld_speaker_allocation_bits[] = {
172 [0] = FL | FR,
173 [1] = LFE,
174 [2] = FC,
175 [3] = RL | RR,
176 [4] = RC,
177 [5] = FLC | FRC,
178 [6] = RLC | RRC,
179 /* the following are not defined in ELD yet */
180 [7] = FLW | FRW,
181 [8] = FLH | FRH,
182 [9] = TC,
183 [10] = FCH,
184 };
185
186 struct cea_channel_speaker_allocation {
187 int ca_index;
188 int speakers[8];
189
190 /* derived values, just for convenience */
191 int channels;
192 int spk_mask;
193 };
194
195 /*
196 * ALSA sequence is:
197 *
198 * surround40 surround41 surround50 surround51 surround71
199 * ch0 front left = = = =
200 * ch1 front right = = = =
201 * ch2 rear left = = = =
202 * ch3 rear right = = = =
203 * ch4 LFE center center center
204 * ch5 LFE LFE
205 * ch6 side left
206 * ch7 side right
207 *
208 * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
209 */
210 static int hdmi_channel_mapping[0x32][8] = {
211 /* stereo */
212 [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
213 /* 2.1 */
214 [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
215 /* Dolby Surround */
216 [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
217 /* surround40 */
218 [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
219 /* 4ch */
220 [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
221 /* surround41 */
222 [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
223 /* surround50 */
224 [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
225 /* surround51 */
226 [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
227 /* 7.1 */
228 [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
229 };
230
231 /*
232 * This is an ordered list!
233 *
234 * The preceding ones have better chances to be selected by
235 * hdmi_channel_allocation().
236 */
237 static struct cea_channel_speaker_allocation channel_allocations[] = {
238 /* channel: 7 6 5 4 3 2 1 0 */
239 { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
240 /* 2.1 */
241 { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
242 /* Dolby Surround */
243 { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
244 /* surround40 */
245 { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
246 /* surround41 */
247 { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
248 /* surround50 */
249 { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
250 /* surround51 */
251 { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
252 /* 6.1 */
253 { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
254 /* surround71 */
255 { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
256
257 { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
258 { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
259 { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
260 { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
261 { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
262 { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
263 { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
264 { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
265 { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
266 { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
267 { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
268 { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
269 { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
270 { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
271 { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
272 { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
273 { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
274 { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
275 { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
276 { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
277 { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
278 { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
279 { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
280 { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
281 { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
282 { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
283 { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
284 { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
285 { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
286 { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
287 { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
288 { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
289 { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
290 { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
291 { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
292 { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
293 { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
294 { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
295 { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
296 { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
297 { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
298 };
299
300
301 /*
302 * HDMI routines
303 */
304
305 static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
306 {
307 int pin_idx;
308
309 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
310 if (spec->pins[pin_idx].pin_nid == pin_nid)
311 return pin_idx;
312
313 snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
314 return -EINVAL;
315 }
316
317 static int hinfo_to_pin_index(struct hdmi_spec *spec,
318 struct hda_pcm_stream *hinfo)
319 {
320 int pin_idx;
321
322 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
323 if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
324 return pin_idx;
325
326 snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
327 return -EINVAL;
328 }
329
330 static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
331 {
332 int cvt_idx;
333
334 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
335 if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
336 return cvt_idx;
337
338 snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
339 return -EINVAL;
340 }
341
342 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
343 struct snd_ctl_elem_info *uinfo)
344 {
345 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
346 struct hdmi_spec *spec;
347 int pin_idx;
348
349 spec = codec->spec;
350 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
351
352 pin_idx = kcontrol->private_value;
353 uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
354
355 return 0;
356 }
357
358 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
359 struct snd_ctl_elem_value *ucontrol)
360 {
361 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
362 struct hdmi_spec *spec;
363 int pin_idx;
364
365 spec = codec->spec;
366 pin_idx = kcontrol->private_value;
367
368 memcpy(ucontrol->value.bytes.data,
369 spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
370
371 return 0;
372 }
373
374 static struct snd_kcontrol_new eld_bytes_ctl = {
375 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
376 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
377 .name = "ELD",
378 .info = hdmi_eld_ctl_info,
379 .get = hdmi_eld_ctl_get,
380 };
381
382 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
383 int device)
384 {
385 struct snd_kcontrol *kctl;
386 struct hdmi_spec *spec = codec->spec;
387 int err;
388
389 kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
390 if (!kctl)
391 return -ENOMEM;
392 kctl->private_value = pin_idx;
393 kctl->id.device = device;
394
395 err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
396 if (err < 0)
397 return err;
398
399 return 0;
400 }
401
402 #ifdef BE_PARANOID
403 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
404 int *packet_index, int *byte_index)
405 {
406 int val;
407
408 val = snd_hda_codec_read(codec, pin_nid, 0,
409 AC_VERB_GET_HDMI_DIP_INDEX, 0);
410
411 *packet_index = val >> 5;
412 *byte_index = val & 0x1f;
413 }
414 #endif
415
416 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
417 int packet_index, int byte_index)
418 {
419 int val;
420
421 val = (packet_index << 5) | (byte_index & 0x1f);
422
423 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
424 }
425
426 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
427 unsigned char val)
428 {
429 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
430 }
431
432 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
433 {
434 /* Unmute */
435 if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
436 snd_hda_codec_write(codec, pin_nid, 0,
437 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
438 /* Enable pin out: some machines with GM965 gets broken output when
439 * the pin is disabled or changed while using with HDMI
440 */
441 snd_hda_codec_write(codec, pin_nid, 0,
442 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
443 }
444
445 static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
446 {
447 return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
448 AC_VERB_GET_CVT_CHAN_COUNT, 0);
449 }
450
451 static void hdmi_set_channel_count(struct hda_codec *codec,
452 hda_nid_t cvt_nid, int chs)
453 {
454 if (chs != hdmi_get_channel_count(codec, cvt_nid))
455 snd_hda_codec_write(codec, cvt_nid, 0,
456 AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
457 }
458
459
460 /*
461 * Channel mapping routines
462 */
463
464 /*
465 * Compute derived values in channel_allocations[].
466 */
467 static void init_channel_allocations(void)
468 {
469 int i, j;
470 struct cea_channel_speaker_allocation *p;
471
472 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
473 p = channel_allocations + i;
474 p->channels = 0;
475 p->spk_mask = 0;
476 for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
477 if (p->speakers[j]) {
478 p->channels++;
479 p->spk_mask |= p->speakers[j];
480 }
481 }
482 }
483
484 static int get_channel_allocation_order(int ca)
485 {
486 int i;
487
488 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
489 if (channel_allocations[i].ca_index == ca)
490 break;
491 }
492 return i;
493 }
494
495 /*
496 * The transformation takes two steps:
497 *
498 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
499 * spk_mask => (channel_allocations[]) => ai->CA
500 *
501 * TODO: it could select the wrong CA from multiple candidates.
502 */
503 static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
504 {
505 int i;
506 int ca = 0;
507 int spk_mask = 0;
508 char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
509
510 /*
511 * CA defaults to 0 for basic stereo audio
512 */
513 if (channels <= 2)
514 return 0;
515
516 /*
517 * expand ELD's speaker allocation mask
518 *
519 * ELD tells the speaker mask in a compact(paired) form,
520 * expand ELD's notions to match the ones used by Audio InfoFrame.
521 */
522 for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
523 if (eld->spk_alloc & (1 << i))
524 spk_mask |= eld_speaker_allocation_bits[i];
525 }
526
527 /* search for the first working match in the CA table */
528 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
529 if (channels == channel_allocations[i].channels &&
530 (spk_mask & channel_allocations[i].spk_mask) ==
531 channel_allocations[i].spk_mask) {
532 ca = channel_allocations[i].ca_index;
533 break;
534 }
535 }
536
537 snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
538 snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
539 ca, channels, buf);
540
541 return ca;
542 }
543
544 static void hdmi_debug_channel_mapping(struct hda_codec *codec,
545 hda_nid_t pin_nid)
546 {
547 #ifdef CONFIG_SND_DEBUG_VERBOSE
548 int i;
549 int slot;
550
551 for (i = 0; i < 8; i++) {
552 slot = snd_hda_codec_read(codec, pin_nid, 0,
553 AC_VERB_GET_HDMI_CHAN_SLOT, i);
554 printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
555 slot >> 4, slot & 0xf);
556 }
557 #endif
558 }
559
560
561 static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
562 hda_nid_t pin_nid,
563 bool non_pcm,
564 int ca)
565 {
566 int i;
567 int err;
568 int order;
569 int non_pcm_mapping[8];
570
571 order = get_channel_allocation_order(ca);
572
573 if (hdmi_channel_mapping[ca][1] == 0) {
574 for (i = 0; i < channel_allocations[order].channels; i++)
575 hdmi_channel_mapping[ca][i] = i | (i << 4);
576 for (; i < 8; i++)
577 hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
578 }
579
580 if (non_pcm) {
581 for (i = 0; i < channel_allocations[order].channels; i++)
582 non_pcm_mapping[i] = i | (i << 4);
583 for (; i < 8; i++)
584 non_pcm_mapping[i] = 0xf | (i << 4);
585 }
586
587 for (i = 0; i < 8; i++) {
588 err = snd_hda_codec_write(codec, pin_nid, 0,
589 AC_VERB_SET_HDMI_CHAN_SLOT,
590 non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
591 if (err) {
592 snd_printdd(KERN_NOTICE
593 "HDMI: channel mapping failed\n");
594 break;
595 }
596 }
597
598 hdmi_debug_channel_mapping(codec, pin_nid);
599 }
600
601 struct channel_map_table {
602 unsigned char map; /* ALSA API channel map position */
603 unsigned char cea_slot; /* CEA slot value */
604 int spk_mask; /* speaker position bit mask */
605 };
606
607 static struct channel_map_table map_tables[] = {
608 { SNDRV_CHMAP_FL, 0x00, FL },
609 { SNDRV_CHMAP_FR, 0x01, FR },
610 { SNDRV_CHMAP_RL, 0x04, RL },
611 { SNDRV_CHMAP_RR, 0x05, RR },
612 { SNDRV_CHMAP_LFE, 0x02, LFE },
613 { SNDRV_CHMAP_FC, 0x03, FC },
614 { SNDRV_CHMAP_RLC, 0x06, RLC },
615 { SNDRV_CHMAP_RRC, 0x07, RRC },
616 {} /* terminator */
617 };
618
619 /* from ALSA API channel position to speaker bit mask */
620 static int to_spk_mask(unsigned char c)
621 {
622 struct channel_map_table *t = map_tables;
623 for (; t->map; t++) {
624 if (t->map == c)
625 return t->spk_mask;
626 }
627 return 0;
628 }
629
630 /* from ALSA API channel position to CEA slot */
631 static int to_cea_slot(unsigned char c)
632 {
633 struct channel_map_table *t = map_tables;
634 for (; t->map; t++) {
635 if (t->map == c)
636 return t->cea_slot;
637 }
638 return 0x0f;
639 }
640
641 /* from CEA slot to ALSA API channel position */
642 static int from_cea_slot(unsigned char c)
643 {
644 struct channel_map_table *t = map_tables;
645 for (; t->map; t++) {
646 if (t->cea_slot == c)
647 return t->map;
648 }
649 return 0;
650 }
651
652 /* from speaker bit mask to ALSA API channel position */
653 static int spk_to_chmap(int spk)
654 {
655 struct channel_map_table *t = map_tables;
656 for (; t->map; t++) {
657 if (t->spk_mask == spk)
658 return t->map;
659 }
660 return 0;
661 }
662
663 /* get the CA index corresponding to the given ALSA API channel map */
664 static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
665 {
666 int i, spks = 0, spk_mask = 0;
667
668 for (i = 0; i < chs; i++) {
669 int mask = to_spk_mask(map[i]);
670 if (mask) {
671 spk_mask |= mask;
672 spks++;
673 }
674 }
675
676 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
677 if ((chs == channel_allocations[i].channels ||
678 spks == channel_allocations[i].channels) &&
679 (spk_mask & channel_allocations[i].spk_mask) ==
680 channel_allocations[i].spk_mask)
681 return channel_allocations[i].ca_index;
682 }
683 return -1;
684 }
685
686 /* set up the channel slots for the given ALSA API channel map */
687 static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
688 hda_nid_t pin_nid,
689 int chs, unsigned char *map)
690 {
691 int i;
692 for (i = 0; i < 8; i++) {
693 int val, err;
694 if (i < chs)
695 val = to_cea_slot(map[i]);
696 else
697 val = 0xf;
698 val |= (i << 4);
699 err = snd_hda_codec_write(codec, pin_nid, 0,
700 AC_VERB_SET_HDMI_CHAN_SLOT, val);
701 if (err)
702 return -EINVAL;
703 }
704 return 0;
705 }
706
707 /* store ALSA API channel map from the current default map */
708 static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
709 {
710 int i;
711 for (i = 0; i < 8; i++) {
712 if (i < channel_allocations[ca].channels)
713 map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
714 else
715 map[i] = 0;
716 }
717 }
718
719 static void hdmi_setup_channel_mapping(struct hda_codec *codec,
720 hda_nid_t pin_nid, bool non_pcm, int ca,
721 int channels, unsigned char *map,
722 bool chmap_set)
723 {
724 if (!non_pcm && chmap_set) {
725 hdmi_manual_setup_channel_mapping(codec, pin_nid,
726 channels, map);
727 } else {
728 hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
729 hdmi_setup_fake_chmap(map, ca);
730 }
731 }
732
733 /*
734 * Audio InfoFrame routines
735 */
736
737 /*
738 * Enable Audio InfoFrame Transmission
739 */
740 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
741 hda_nid_t pin_nid)
742 {
743 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
744 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
745 AC_DIPXMIT_BEST);
746 }
747
748 /*
749 * Disable Audio InfoFrame Transmission
750 */
751 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
752 hda_nid_t pin_nid)
753 {
754 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
755 snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
756 AC_DIPXMIT_DISABLE);
757 }
758
759 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
760 {
761 #ifdef CONFIG_SND_DEBUG_VERBOSE
762 int i;
763 int size;
764
765 size = snd_hdmi_get_eld_size(codec, pin_nid);
766 printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
767
768 for (i = 0; i < 8; i++) {
769 size = snd_hda_codec_read(codec, pin_nid, 0,
770 AC_VERB_GET_HDMI_DIP_SIZE, i);
771 printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
772 }
773 #endif
774 }
775
776 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
777 {
778 #ifdef BE_PARANOID
779 int i, j;
780 int size;
781 int pi, bi;
782 for (i = 0; i < 8; i++) {
783 size = snd_hda_codec_read(codec, pin_nid, 0,
784 AC_VERB_GET_HDMI_DIP_SIZE, i);
785 if (size == 0)
786 continue;
787
788 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
789 for (j = 1; j < 1000; j++) {
790 hdmi_write_dip_byte(codec, pin_nid, 0x0);
791 hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
792 if (pi != i)
793 snd_printd(KERN_INFO "dip index %d: %d != %d\n",
794 bi, pi, i);
795 if (bi == 0) /* byte index wrapped around */
796 break;
797 }
798 snd_printd(KERN_INFO
799 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
800 i, size, j);
801 }
802 #endif
803 }
804
805 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
806 {
807 u8 *bytes = (u8 *)hdmi_ai;
808 u8 sum = 0;
809 int i;
810
811 hdmi_ai->checksum = 0;
812
813 for (i = 0; i < sizeof(*hdmi_ai); i++)
814 sum += bytes[i];
815
816 hdmi_ai->checksum = -sum;
817 }
818
819 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
820 hda_nid_t pin_nid,
821 u8 *dip, int size)
822 {
823 int i;
824
825 hdmi_debug_dip_size(codec, pin_nid);
826 hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
827
828 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
829 for (i = 0; i < size; i++)
830 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
831 }
832
833 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
834 u8 *dip, int size)
835 {
836 u8 val;
837 int i;
838
839 if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
840 != AC_DIPXMIT_BEST)
841 return false;
842
843 hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
844 for (i = 0; i < size; i++) {
845 val = snd_hda_codec_read(codec, pin_nid, 0,
846 AC_VERB_GET_HDMI_DIP_DATA, 0);
847 if (val != dip[i])
848 return false;
849 }
850
851 return true;
852 }
853
854 static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
855 bool non_pcm,
856 struct snd_pcm_substream *substream)
857 {
858 struct hdmi_spec *spec = codec->spec;
859 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
860 hda_nid_t pin_nid = per_pin->pin_nid;
861 int channels = substream->runtime->channels;
862 struct hdmi_eld *eld;
863 int ca;
864 union audio_infoframe ai;
865
866 eld = &spec->pins[pin_idx].sink_eld;
867 if (!eld->monitor_present)
868 return;
869
870 if (!non_pcm && per_pin->chmap_set)
871 ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
872 else
873 ca = hdmi_channel_allocation(eld, channels);
874 if (ca < 0)
875 ca = 0;
876
877 memset(&ai, 0, sizeof(ai));
878 if (eld->conn_type == 0) { /* HDMI */
879 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
880
881 hdmi_ai->type = 0x84;
882 hdmi_ai->ver = 0x01;
883 hdmi_ai->len = 0x0a;
884 hdmi_ai->CC02_CT47 = channels - 1;
885 hdmi_ai->CA = ca;
886 hdmi_checksum_audio_infoframe(hdmi_ai);
887 } else if (eld->conn_type == 1) { /* DisplayPort */
888 struct dp_audio_infoframe *dp_ai = &ai.dp;
889
890 dp_ai->type = 0x84;
891 dp_ai->len = 0x1b;
892 dp_ai->ver = 0x11 << 2;
893 dp_ai->CC02_CT47 = channels - 1;
894 dp_ai->CA = ca;
895 } else {
896 snd_printd("HDMI: unknown connection type at pin %d\n",
897 pin_nid);
898 return;
899 }
900
901 /*
902 * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
903 * sizeof(*dp_ai) to avoid partial match/update problems when
904 * the user switches between HDMI/DP monitors.
905 */
906 if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
907 sizeof(ai))) {
908 snd_printdd("hdmi_setup_audio_infoframe: "
909 "pin=%d channels=%d\n",
910 pin_nid,
911 channels);
912 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
913 channels, per_pin->chmap,
914 per_pin->chmap_set);
915 hdmi_stop_infoframe_trans(codec, pin_nid);
916 hdmi_fill_audio_infoframe(codec, pin_nid,
917 ai.bytes, sizeof(ai));
918 hdmi_start_infoframe_trans(codec, pin_nid);
919 } else {
920 /* For non-pcm audio switch, setup new channel mapping
921 * accordingly */
922 if (per_pin->non_pcm != non_pcm)
923 hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
924 channels, per_pin->chmap,
925 per_pin->chmap_set);
926 }
927
928 per_pin->non_pcm = non_pcm;
929 }
930
931
932 /*
933 * Unsolicited events
934 */
935
936 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
937
938 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
939 {
940 struct hdmi_spec *spec = codec->spec;
941 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
942 int pin_nid;
943 int pin_idx;
944 struct hda_jack_tbl *jack;
945
946 jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
947 if (!jack)
948 return;
949 pin_nid = jack->nid;
950 jack->jack_dirty = 1;
951
952 _snd_printd(SND_PR_VERBOSE,
953 "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
954 codec->addr, pin_nid,
955 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
956
957 pin_idx = pin_nid_to_pin_index(spec, pin_nid);
958 if (pin_idx < 0)
959 return;
960
961 hdmi_present_sense(&spec->pins[pin_idx], 1);
962 snd_hda_jack_report_sync(codec);
963 }
964
965 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
966 {
967 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
968 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
969 int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
970 int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
971
972 printk(KERN_INFO
973 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
974 codec->addr,
975 tag,
976 subtag,
977 cp_state,
978 cp_ready);
979
980 /* TODO */
981 if (cp_state)
982 ;
983 if (cp_ready)
984 ;
985 }
986
987
988 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
989 {
990 int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
991 int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
992
993 if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
994 snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
995 return;
996 }
997
998 if (subtag == 0)
999 hdmi_intrinsic_event(codec, res);
1000 else
1001 hdmi_non_intrinsic_event(codec, res);
1002 }
1003
1004 /*
1005 * Callbacks
1006 */
1007
1008 /* HBR should be Non-PCM, 8 channels */
1009 #define is_hbr_format(format) \
1010 ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
1011
1012 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
1013 hda_nid_t pin_nid, u32 stream_tag, int format)
1014 {
1015 int pinctl;
1016 int new_pinctl = 0;
1017
1018 if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
1019 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1020 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1021
1022 new_pinctl = pinctl & ~AC_PINCTL_EPT;
1023 if (is_hbr_format(format))
1024 new_pinctl |= AC_PINCTL_EPT_HBR;
1025 else
1026 new_pinctl |= AC_PINCTL_EPT_NATIVE;
1027
1028 snd_printdd("hdmi_setup_stream: "
1029 "NID=0x%x, %spinctl=0x%x\n",
1030 pin_nid,
1031 pinctl == new_pinctl ? "" : "new-",
1032 new_pinctl);
1033
1034 if (pinctl != new_pinctl)
1035 snd_hda_codec_write(codec, pin_nid, 0,
1036 AC_VERB_SET_PIN_WIDGET_CONTROL,
1037 new_pinctl);
1038
1039 }
1040 if (is_hbr_format(format) && !new_pinctl) {
1041 snd_printdd("hdmi_setup_stream: HBR is not supported\n");
1042 return -EINVAL;
1043 }
1044
1045 snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
1046 return 0;
1047 }
1048
1049 /*
1050 * HDA PCM callbacks
1051 */
1052 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1053 struct hda_codec *codec,
1054 struct snd_pcm_substream *substream)
1055 {
1056 struct hdmi_spec *spec = codec->spec;
1057 struct snd_pcm_runtime *runtime = substream->runtime;
1058 int pin_idx, cvt_idx, mux_idx = 0;
1059 struct hdmi_spec_per_pin *per_pin;
1060 struct hdmi_eld *eld;
1061 struct hdmi_spec_per_cvt *per_cvt = NULL;
1062
1063 /* Validate hinfo */
1064 pin_idx = hinfo_to_pin_index(spec, hinfo);
1065 if (snd_BUG_ON(pin_idx < 0))
1066 return -EINVAL;
1067 per_pin = &spec->pins[pin_idx];
1068 eld = &per_pin->sink_eld;
1069
1070 /* Dynamically assign converter to stream */
1071 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1072 per_cvt = &spec->cvts[cvt_idx];
1073
1074 /* Must not already be assigned */
1075 if (per_cvt->assigned)
1076 continue;
1077 /* Must be in pin's mux's list of converters */
1078 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1079 if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
1080 break;
1081 /* Not in mux list */
1082 if (mux_idx == per_pin->num_mux_nids)
1083 continue;
1084 break;
1085 }
1086 /* No free converters */
1087 if (cvt_idx == spec->num_cvts)
1088 return -ENODEV;
1089
1090 /* Claim converter */
1091 per_cvt->assigned = 1;
1092 hinfo->nid = per_cvt->cvt_nid;
1093
1094 snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1095 AC_VERB_SET_CONNECT_SEL,
1096 mux_idx);
1097 snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
1098
1099 /* Initially set the converter's capabilities */
1100 hinfo->channels_min = per_cvt->channels_min;
1101 hinfo->channels_max = per_cvt->channels_max;
1102 hinfo->rates = per_cvt->rates;
1103 hinfo->formats = per_cvt->formats;
1104 hinfo->maxbps = per_cvt->maxbps;
1105
1106 /* Restrict capabilities by ELD if this isn't disabled */
1107 if (!static_hdmi_pcm && eld->eld_valid) {
1108 snd_hdmi_eld_update_pcm_info(eld, hinfo);
1109 if (hinfo->channels_min > hinfo->channels_max ||
1110 !hinfo->rates || !hinfo->formats) {
1111 per_cvt->assigned = 0;
1112 hinfo->nid = 0;
1113 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1114 return -ENODEV;
1115 }
1116 }
1117
1118 /* Store the updated parameters */
1119 runtime->hw.channels_min = hinfo->channels_min;
1120 runtime->hw.channels_max = hinfo->channels_max;
1121 runtime->hw.formats = hinfo->formats;
1122 runtime->hw.rates = hinfo->rates;
1123
1124 snd_pcm_hw_constraint_step(substream->runtime, 0,
1125 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1126 return 0;
1127 }
1128
1129 /*
1130 * HDA/HDMI auto parsing
1131 */
1132 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1133 {
1134 struct hdmi_spec *spec = codec->spec;
1135 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1136 hda_nid_t pin_nid = per_pin->pin_nid;
1137
1138 if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1139 snd_printk(KERN_WARNING
1140 "HDMI: pin %d wcaps %#x "
1141 "does not support connection list\n",
1142 pin_nid, get_wcaps(codec, pin_nid));
1143 return -EINVAL;
1144 }
1145
1146 per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1147 per_pin->mux_nids,
1148 HDA_MAX_CONNECTIONS);
1149
1150 return 0;
1151 }
1152
1153 static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1154 {
1155 struct hda_codec *codec = per_pin->codec;
1156 struct hdmi_eld *eld = &per_pin->sink_eld;
1157 hda_nid_t pin_nid = per_pin->pin_nid;
1158 /*
1159 * Always execute a GetPinSense verb here, even when called from
1160 * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1161 * response's PD bit is not the real PD value, but indicates that
1162 * the real PD value changed. An older version of the HD-audio
1163 * specification worked this way. Hence, we just ignore the data in
1164 * the unsolicited response to avoid custom WARs.
1165 */
1166 int present = snd_hda_pin_sense(codec, pin_nid);
1167 bool eld_valid = false;
1168
1169 memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
1170
1171 eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1172 if (eld->monitor_present)
1173 eld_valid = !!(present & AC_PINSENSE_ELDV);
1174
1175 _snd_printd(SND_PR_VERBOSE,
1176 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1177 codec->addr, pin_nid, eld->monitor_present, eld_valid);
1178
1179 if (eld_valid) {
1180 if (!snd_hdmi_get_eld(eld, codec, pin_nid))
1181 snd_hdmi_show_eld(eld);
1182 else if (repoll) {
1183 queue_delayed_work(codec->bus->workq,
1184 &per_pin->work,
1185 msecs_to_jiffies(300));
1186 }
1187 }
1188 }
1189
1190 static void hdmi_repoll_eld(struct work_struct *work)
1191 {
1192 struct hdmi_spec_per_pin *per_pin =
1193 container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1194
1195 if (per_pin->repoll_count++ > 6)
1196 per_pin->repoll_count = 0;
1197
1198 hdmi_present_sense(per_pin, per_pin->repoll_count);
1199 }
1200
1201 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1202 hda_nid_t nid);
1203
1204 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1205 {
1206 struct hdmi_spec *spec = codec->spec;
1207 unsigned int caps, config;
1208 int pin_idx;
1209 struct hdmi_spec_per_pin *per_pin;
1210 int err;
1211
1212 caps = snd_hda_query_pin_caps(codec, pin_nid);
1213 if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1214 return 0;
1215
1216 config = snd_hda_codec_get_pincfg(codec, pin_nid);
1217 if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1218 return 0;
1219
1220 if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
1221 return -E2BIG;
1222
1223 if (codec->vendor_id == 0x80862807)
1224 intel_haswell_fixup_connect_list(codec, pin_nid);
1225
1226 pin_idx = spec->num_pins;
1227 per_pin = &spec->pins[pin_idx];
1228
1229 per_pin->pin_nid = pin_nid;
1230 per_pin->non_pcm = false;
1231
1232 err = hdmi_read_pin_conn(codec, pin_idx);
1233 if (err < 0)
1234 return err;
1235
1236 spec->num_pins++;
1237
1238 return 0;
1239 }
1240
1241 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1242 {
1243 struct hdmi_spec *spec = codec->spec;
1244 int cvt_idx;
1245 struct hdmi_spec_per_cvt *per_cvt;
1246 unsigned int chans;
1247 int err;
1248
1249 if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
1250 return -E2BIG;
1251
1252 chans = get_wcaps(codec, cvt_nid);
1253 chans = get_wcaps_channels(chans);
1254
1255 cvt_idx = spec->num_cvts;
1256 per_cvt = &spec->cvts[cvt_idx];
1257
1258 per_cvt->cvt_nid = cvt_nid;
1259 per_cvt->channels_min = 2;
1260 if (chans <= 16) {
1261 per_cvt->channels_max = chans;
1262 if (chans > spec->channels_max)
1263 spec->channels_max = chans;
1264 }
1265
1266 err = snd_hda_query_supported_pcm(codec, cvt_nid,
1267 &per_cvt->rates,
1268 &per_cvt->formats,
1269 &per_cvt->maxbps);
1270 if (err < 0)
1271 return err;
1272
1273 spec->cvt_nids[spec->num_cvts++] = cvt_nid;
1274
1275 return 0;
1276 }
1277
1278 static int hdmi_parse_codec(struct hda_codec *codec)
1279 {
1280 hda_nid_t nid;
1281 int i, nodes;
1282
1283 nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
1284 if (!nid || nodes < 0) {
1285 snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
1286 return -EINVAL;
1287 }
1288
1289 for (i = 0; i < nodes; i++, nid++) {
1290 unsigned int caps;
1291 unsigned int type;
1292
1293 caps = get_wcaps(codec, nid);
1294 type = get_wcaps_type(caps);
1295
1296 if (!(caps & AC_WCAP_DIGITAL))
1297 continue;
1298
1299 switch (type) {
1300 case AC_WID_AUD_OUT:
1301 hdmi_add_cvt(codec, nid);
1302 break;
1303 case AC_WID_PIN:
1304 hdmi_add_pin(codec, nid);
1305 break;
1306 }
1307 }
1308
1309 #ifdef CONFIG_PM
1310 /* We're seeing some problems with unsolicited hot plug events on
1311 * PantherPoint after S3, if this is not enabled */
1312 if (codec->vendor_id == 0x80862806)
1313 codec->bus->power_keep_link_on = 1;
1314 /*
1315 * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
1316 * can be lost and presence sense verb will become inaccurate if the
1317 * HDA link is powered off at hot plug or hw initialization time.
1318 */
1319 else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
1320 AC_PWRST_EPSS))
1321 codec->bus->power_keep_link_on = 1;
1322 #endif
1323
1324 return 0;
1325 }
1326
1327 /*
1328 */
1329 static char *get_hdmi_pcm_name(int idx)
1330 {
1331 static char names[MAX_HDMI_PINS][8];
1332 sprintf(&names[idx][0], "HDMI %d", idx);
1333 return &names[idx][0];
1334 }
1335
1336 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1337 {
1338 struct hda_spdif_out *spdif;
1339 bool non_pcm;
1340
1341 mutex_lock(&codec->spdif_mutex);
1342 spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1343 non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1344 mutex_unlock(&codec->spdif_mutex);
1345 return non_pcm;
1346 }
1347
1348
1349 /*
1350 * HDMI callbacks
1351 */
1352
1353 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1354 struct hda_codec *codec,
1355 unsigned int stream_tag,
1356 unsigned int format,
1357 struct snd_pcm_substream *substream)
1358 {
1359 hda_nid_t cvt_nid = hinfo->nid;
1360 struct hdmi_spec *spec = codec->spec;
1361 int pin_idx = hinfo_to_pin_index(spec, hinfo);
1362 hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
1363 bool non_pcm;
1364
1365 non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1366
1367 hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
1368
1369 hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
1370
1371 return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
1372 }
1373
1374 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1375 struct hda_codec *codec,
1376 struct snd_pcm_substream *substream)
1377 {
1378 snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1379 return 0;
1380 }
1381
1382 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1383 struct hda_codec *codec,
1384 struct snd_pcm_substream *substream)
1385 {
1386 struct hdmi_spec *spec = codec->spec;
1387 int cvt_idx, pin_idx;
1388 struct hdmi_spec_per_cvt *per_cvt;
1389 struct hdmi_spec_per_pin *per_pin;
1390
1391 if (hinfo->nid) {
1392 cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
1393 if (snd_BUG_ON(cvt_idx < 0))
1394 return -EINVAL;
1395 per_cvt = &spec->cvts[cvt_idx];
1396
1397 snd_BUG_ON(!per_cvt->assigned);
1398 per_cvt->assigned = 0;
1399 hinfo->nid = 0;
1400
1401 pin_idx = hinfo_to_pin_index(spec, hinfo);
1402 if (snd_BUG_ON(pin_idx < 0))
1403 return -EINVAL;
1404 per_pin = &spec->pins[pin_idx];
1405
1406 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1407 per_pin->chmap_set = false;
1408 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1409 }
1410
1411 return 0;
1412 }
1413
1414 static const struct hda_pcm_ops generic_ops = {
1415 .open = hdmi_pcm_open,
1416 .close = hdmi_pcm_close,
1417 .prepare = generic_hdmi_playback_pcm_prepare,
1418 .cleanup = generic_hdmi_playback_pcm_cleanup,
1419 };
1420
1421 /*
1422 * ALSA API channel-map control callbacks
1423 */
1424 static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
1425 struct snd_ctl_elem_info *uinfo)
1426 {
1427 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1428 struct hda_codec *codec = info->private_data;
1429 struct hdmi_spec *spec = codec->spec;
1430 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1431 uinfo->count = spec->channels_max;
1432 uinfo->value.integer.min = 0;
1433 uinfo->value.integer.max = SNDRV_CHMAP_LAST;
1434 return 0;
1435 }
1436
1437 static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
1438 unsigned int size, unsigned int __user *tlv)
1439 {
1440 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1441 struct hda_codec *codec = info->private_data;
1442 struct hdmi_spec *spec = codec->spec;
1443 const unsigned int valid_mask =
1444 FL | FR | RL | RR | LFE | FC | RLC | RRC;
1445 unsigned int __user *dst;
1446 int chs, count = 0;
1447
1448 if (size < 8)
1449 return -ENOMEM;
1450 if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
1451 return -EFAULT;
1452 size -= 8;
1453 dst = tlv + 2;
1454 for (chs = 2; chs <= spec->channels_max; chs++) {
1455 int i, c;
1456 struct cea_channel_speaker_allocation *cap;
1457 cap = channel_allocations;
1458 for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
1459 int chs_bytes = chs * 4;
1460 if (cap->channels != chs)
1461 continue;
1462 if (cap->spk_mask & ~valid_mask)
1463 continue;
1464 if (size < 8)
1465 return -ENOMEM;
1466 if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
1467 put_user(chs_bytes, dst + 1))
1468 return -EFAULT;
1469 dst += 2;
1470 size -= 8;
1471 count += 8;
1472 if (size < chs_bytes)
1473 return -ENOMEM;
1474 size -= chs_bytes;
1475 count += chs_bytes;
1476 for (c = 7; c >= 0; c--) {
1477 int spk = cap->speakers[c];
1478 if (!spk)
1479 continue;
1480 if (put_user(spk_to_chmap(spk), dst))
1481 return -EFAULT;
1482 dst++;
1483 }
1484 }
1485 }
1486 if (put_user(count, tlv + 1))
1487 return -EFAULT;
1488 return 0;
1489 }
1490
1491 static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
1492 struct snd_ctl_elem_value *ucontrol)
1493 {
1494 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1495 struct hda_codec *codec = info->private_data;
1496 struct hdmi_spec *spec = codec->spec;
1497 int pin_idx = kcontrol->private_value;
1498 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1499 int i;
1500
1501 for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
1502 ucontrol->value.integer.value[i] = per_pin->chmap[i];
1503 return 0;
1504 }
1505
1506 static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
1507 struct snd_ctl_elem_value *ucontrol)
1508 {
1509 struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
1510 struct hda_codec *codec = info->private_data;
1511 struct hdmi_spec *spec = codec->spec;
1512 int pin_idx = kcontrol->private_value;
1513 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1514 unsigned int ctl_idx;
1515 struct snd_pcm_substream *substream;
1516 unsigned char chmap[8];
1517 int i, ca, prepared = 0;
1518
1519 ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
1520 substream = snd_pcm_chmap_substream(info, ctl_idx);
1521 if (!substream || !substream->runtime)
1522 return 0; /* just for avoiding error from alsactl restore */
1523 switch (substream->runtime->status->state) {
1524 case SNDRV_PCM_STATE_OPEN:
1525 case SNDRV_PCM_STATE_SETUP:
1526 break;
1527 case SNDRV_PCM_STATE_PREPARED:
1528 prepared = 1;
1529 break;
1530 default:
1531 return -EBUSY;
1532 }
1533 memset(chmap, 0, sizeof(chmap));
1534 for (i = 0; i < ARRAY_SIZE(chmap); i++)
1535 chmap[i] = ucontrol->value.integer.value[i];
1536 if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
1537 return 0;
1538 ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
1539 if (ca < 0)
1540 return -EINVAL;
1541 per_pin->chmap_set = true;
1542 memcpy(per_pin->chmap, chmap, sizeof(chmap));
1543 if (prepared)
1544 hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
1545 substream);
1546
1547 return 0;
1548 }
1549
1550 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1551 {
1552 struct hdmi_spec *spec = codec->spec;
1553 int pin_idx;
1554
1555 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1556 struct hda_pcm *info;
1557 struct hda_pcm_stream *pstr;
1558
1559 info = &spec->pcm_rec[pin_idx];
1560 info->name = get_hdmi_pcm_name(pin_idx);
1561 info->pcm_type = HDA_PCM_TYPE_HDMI;
1562 info->own_chmap = true;
1563
1564 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1565 pstr->substreams = 1;
1566 pstr->ops = generic_ops;
1567 /* other pstr fields are set in open */
1568 }
1569
1570 codec->num_pcms = spec->num_pins;
1571 codec->pcm_info = spec->pcm_rec;
1572
1573 return 0;
1574 }
1575
1576 static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
1577 {
1578 char hdmi_str[32] = "HDMI/DP";
1579 struct hdmi_spec *spec = codec->spec;
1580 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1581 int pcmdev = spec->pcm_rec[pin_idx].device;
1582
1583 if (pcmdev > 0)
1584 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1585
1586 return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
1587 }
1588
1589 static int generic_hdmi_build_controls(struct hda_codec *codec)
1590 {
1591 struct hdmi_spec *spec = codec->spec;
1592 int err;
1593 int pin_idx;
1594
1595 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1596 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1597
1598 err = generic_hdmi_build_jack(codec, pin_idx);
1599 if (err < 0)
1600 return err;
1601
1602 err = snd_hda_create_dig_out_ctls(codec,
1603 per_pin->pin_nid,
1604 per_pin->mux_nids[0],
1605 HDA_PCM_TYPE_HDMI);
1606 if (err < 0)
1607 return err;
1608 snd_hda_spdif_ctls_unassign(codec, pin_idx);
1609
1610 /* add control for ELD Bytes */
1611 err = hdmi_create_eld_ctl(codec,
1612 pin_idx,
1613 spec->pcm_rec[pin_idx].device);
1614
1615 if (err < 0)
1616 return err;
1617
1618 hdmi_present_sense(per_pin, 0);
1619 }
1620
1621 /* add channel maps */
1622 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1623 struct snd_pcm_chmap *chmap;
1624 struct snd_kcontrol *kctl;
1625 int i;
1626 err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
1627 SNDRV_PCM_STREAM_PLAYBACK,
1628 NULL, 0, pin_idx, &chmap);
1629 if (err < 0)
1630 return err;
1631 /* override handlers */
1632 chmap->private_data = codec;
1633 kctl = chmap->kctl;
1634 for (i = 0; i < kctl->count; i++)
1635 kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
1636 kctl->info = hdmi_chmap_ctl_info;
1637 kctl->get = hdmi_chmap_ctl_get;
1638 kctl->put = hdmi_chmap_ctl_put;
1639 kctl->tlv.c = hdmi_chmap_ctl_tlv;
1640 }
1641
1642 return 0;
1643 }
1644
1645 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
1646 {
1647 struct hdmi_spec *spec = codec->spec;
1648 int pin_idx;
1649
1650 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1651 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1652 struct hdmi_eld *eld = &per_pin->sink_eld;
1653
1654 per_pin->codec = codec;
1655 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
1656 snd_hda_eld_proc_new(codec, eld, pin_idx);
1657 }
1658 return 0;
1659 }
1660
1661 static int generic_hdmi_init(struct hda_codec *codec)
1662 {
1663 struct hdmi_spec *spec = codec->spec;
1664 int pin_idx;
1665
1666 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1667 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1668 hda_nid_t pin_nid = per_pin->pin_nid;
1669
1670 hdmi_init_pin(codec, pin_nid);
1671 snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
1672 }
1673 return 0;
1674 }
1675
1676 static void generic_hdmi_free(struct hda_codec *codec)
1677 {
1678 struct hdmi_spec *spec = codec->spec;
1679 int pin_idx;
1680
1681 for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1682 struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
1683 struct hdmi_eld *eld = &per_pin->sink_eld;
1684
1685 cancel_delayed_work(&per_pin->work);
1686 snd_hda_eld_proc_free(codec, eld);
1687 }
1688
1689 flush_workqueue(codec->bus->workq);
1690 kfree(spec);
1691 }
1692
1693 static const struct hda_codec_ops generic_hdmi_patch_ops = {
1694 .init = generic_hdmi_init,
1695 .free = generic_hdmi_free,
1696 .build_pcms = generic_hdmi_build_pcms,
1697 .build_controls = generic_hdmi_build_controls,
1698 .unsol_event = hdmi_unsol_event,
1699 };
1700
1701
1702 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1703 hda_nid_t nid)
1704 {
1705 struct hdmi_spec *spec = codec->spec;
1706 hda_nid_t conns[4];
1707 int nconns;
1708
1709 nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
1710 if (nconns == spec->num_cvts &&
1711 !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
1712 return;
1713
1714 /* override pins connection list */
1715 snd_printdd("hdmi: haswell: override pin connection 0x%x\n", nid);
1716 snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
1717 }
1718
1719 #define INTEL_VENDOR_NID 0x08
1720 #define INTEL_GET_VENDOR_VERB 0xf81
1721 #define INTEL_SET_VENDOR_VERB 0x781
1722 #define INTEL_EN_DP12 0x02 /* enable DP 1.2 features */
1723 #define INTEL_EN_ALL_PIN_CVTS 0x01 /* enable 2nd & 3rd pins and convertors */
1724
1725 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
1726 const struct hda_fixup *fix, int action)
1727 {
1728 unsigned int vendor_param;
1729
1730 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1731 return;
1732 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1733 INTEL_GET_VENDOR_VERB, 0);
1734 if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
1735 return;
1736
1737 vendor_param |= INTEL_EN_ALL_PIN_CVTS;
1738 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1739 INTEL_SET_VENDOR_VERB, vendor_param);
1740 if (vendor_param == -1)
1741 return;
1742
1743 snd_hda_codec_update_widgets(codec);
1744 return;
1745 }
1746
1747 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
1748 {
1749 unsigned int vendor_param;
1750
1751 vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
1752 INTEL_GET_VENDOR_VERB, 0);
1753 if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
1754 return;
1755
1756 /* enable DP1.2 mode */
1757 vendor_param |= INTEL_EN_DP12;
1758 snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
1759 INTEL_SET_VENDOR_VERB, vendor_param);
1760 }
1761
1762
1763
1764 /* available models for fixup */
1765 enum {
1766 INTEL_HASWELL,
1767 };
1768
1769 static const struct hda_model_fixup hdmi_models[] = {
1770 {.id = INTEL_HASWELL, .name = "Haswell"},
1771 {}
1772 };
1773
1774 static const struct snd_pci_quirk hdmi_fixup_tbl[] = {
1775 SND_PCI_QUIRK(0x8086, 0x2010, "Haswell", INTEL_HASWELL),
1776 {} /* terminator */
1777 };
1778
1779 static const struct hda_fixup hdmi_fixups[] = {
1780 [INTEL_HASWELL] = {
1781 .type = HDA_FIXUP_FUNC,
1782 .v.func = intel_haswell_enable_all_pins,
1783 },
1784 };
1785
1786
1787 static int patch_generic_hdmi(struct hda_codec *codec)
1788 {
1789 struct hdmi_spec *spec;
1790
1791 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
1792 if (spec == NULL)
1793 return -ENOMEM;
1794
1795 codec->spec = spec;
1796
1797 snd_hda_pick_fixup(codec, hdmi_models, hdmi_fixup_tbl, hdmi_fixups);
1798 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
1799
1800 if (codec->vendor_id == 0x80862807)
1801 intel_haswell_fixup_enable_dp12(codec);
1802
1803 if (hdmi_parse_codec(codec) < 0) {
1804 codec->spec = NULL;
1805 kfree(spec);
1806 return -EINVAL;
1807 }
1808 codec->patch_ops = generic_hdmi_patch_ops;
1809 generic_hdmi_init_per_pins(codec);
1810
1811 init_channel_allocations();
1812
1813 return 0;
1814 }
1815
1816 /*
1817 * Shared non-generic implementations
1818 */
1819
1820 static int simple_playback_build_pcms(struct hda_codec *codec)
1821 {
1822 struct hdmi_spec *spec = codec->spec;
1823 struct hda_pcm *info = spec->pcm_rec;
1824 unsigned int chans;
1825 struct hda_pcm_stream *pstr;
1826
1827 codec->num_pcms = 1;
1828 codec->pcm_info = info;
1829
1830 chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
1831 chans = get_wcaps_channels(chans);
1832
1833 info->name = get_hdmi_pcm_name(0);
1834 info->pcm_type = HDA_PCM_TYPE_HDMI;
1835 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1836 *pstr = spec->pcm_playback;
1837 pstr->nid = spec->cvts[0].cvt_nid;
1838 if (pstr->channels_max <= 2 && chans && chans <= 16)
1839 pstr->channels_max = chans;
1840
1841 return 0;
1842 }
1843
1844 /* unsolicited event for jack sensing */
1845 static void simple_hdmi_unsol_event(struct hda_codec *codec,
1846 unsigned int res)
1847 {
1848 snd_hda_jack_set_dirty_all(codec);
1849 snd_hda_jack_report_sync(codec);
1850 }
1851
1852 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
1853 * as long as spec->pins[] is set correctly
1854 */
1855 #define simple_hdmi_build_jack generic_hdmi_build_jack
1856
1857 static int simple_playback_build_controls(struct hda_codec *codec)
1858 {
1859 struct hdmi_spec *spec = codec->spec;
1860 int err;
1861
1862 err = snd_hda_create_spdif_out_ctls(codec,
1863 spec->cvts[0].cvt_nid,
1864 spec->cvts[0].cvt_nid);
1865 if (err < 0)
1866 return err;
1867 return simple_hdmi_build_jack(codec, 0);
1868 }
1869
1870 static int simple_playback_init(struct hda_codec *codec)
1871 {
1872 struct hdmi_spec *spec = codec->spec;
1873 hda_nid_t pin = spec->pins[0].pin_nid;
1874
1875 snd_hda_codec_write(codec, pin, 0,
1876 AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
1877 /* some codecs require to unmute the pin */
1878 if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
1879 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
1880 AMP_OUT_UNMUTE);
1881 snd_hda_jack_detect_enable(codec, pin, pin);
1882 return 0;
1883 }
1884
1885 static void simple_playback_free(struct hda_codec *codec)
1886 {
1887 struct hdmi_spec *spec = codec->spec;
1888
1889 kfree(spec);
1890 }
1891
1892 /*
1893 * Nvidia specific implementations
1894 */
1895
1896 #define Nv_VERB_SET_Channel_Allocation 0xF79
1897 #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
1898 #define Nv_VERB_SET_Audio_Protection_On 0xF98
1899 #define Nv_VERB_SET_Audio_Protection_Off 0xF99
1900
1901 #define nvhdmi_master_con_nid_7x 0x04
1902 #define nvhdmi_master_pin_nid_7x 0x05
1903
1904 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
1905 /*front, rear, clfe, rear_surr */
1906 0x6, 0x8, 0xa, 0xc,
1907 };
1908
1909 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
1910 /* set audio protect on */
1911 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1912 /* enable digital output on pin widget */
1913 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1914 {} /* terminator */
1915 };
1916
1917 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
1918 /* set audio protect on */
1919 { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
1920 /* enable digital output on pin widget */
1921 { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1922 { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1923 { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1924 { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1925 { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
1926 {} /* terminator */
1927 };
1928
1929 #ifdef LIMITED_RATE_FMT_SUPPORT
1930 /* support only the safe format and rate */
1931 #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
1932 #define SUPPORTED_MAXBPS 16
1933 #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
1934 #else
1935 /* support all rates and formats */
1936 #define SUPPORTED_RATES \
1937 (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
1938 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
1939 SNDRV_PCM_RATE_192000)
1940 #define SUPPORTED_MAXBPS 24
1941 #define SUPPORTED_FORMATS \
1942 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
1943 #endif
1944
1945 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
1946 {
1947 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
1948 return 0;
1949 }
1950
1951 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
1952 {
1953 snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
1954 return 0;
1955 }
1956
1957 static unsigned int channels_2_6_8[] = {
1958 2, 6, 8
1959 };
1960
1961 static unsigned int channels_2_8[] = {
1962 2, 8
1963 };
1964
1965 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
1966 .count = ARRAY_SIZE(channels_2_6_8),
1967 .list = channels_2_6_8,
1968 .mask = 0,
1969 };
1970
1971 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
1972 .count = ARRAY_SIZE(channels_2_8),
1973 .list = channels_2_8,
1974 .mask = 0,
1975 };
1976
1977 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
1978 struct hda_codec *codec,
1979 struct snd_pcm_substream *substream)
1980 {
1981 struct hdmi_spec *spec = codec->spec;
1982 struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
1983
1984 switch (codec->preset->id) {
1985 case 0x10de0002:
1986 case 0x10de0003:
1987 case 0x10de0005:
1988 case 0x10de0006:
1989 hw_constraints_channels = &hw_constraints_2_8_channels;
1990 break;
1991 case 0x10de0007:
1992 hw_constraints_channels = &hw_constraints_2_6_8_channels;
1993 break;
1994 default:
1995 break;
1996 }
1997
1998 if (hw_constraints_channels != NULL) {
1999 snd_pcm_hw_constraint_list(substream->runtime, 0,
2000 SNDRV_PCM_HW_PARAM_CHANNELS,
2001 hw_constraints_channels);
2002 } else {
2003 snd_pcm_hw_constraint_step(substream->runtime, 0,
2004 SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2005 }
2006
2007 return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2008 }
2009
2010 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2011 struct hda_codec *codec,
2012 struct snd_pcm_substream *substream)
2013 {
2014 struct hdmi_spec *spec = codec->spec;
2015 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2016 }
2017
2018 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2019 struct hda_codec *codec,
2020 unsigned int stream_tag,
2021 unsigned int format,
2022 struct snd_pcm_substream *substream)
2023 {
2024 struct hdmi_spec *spec = codec->spec;
2025 return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2026 stream_tag, format, substream);
2027 }
2028
2029 static const struct hda_pcm_stream simple_pcm_playback = {
2030 .substreams = 1,
2031 .channels_min = 2,
2032 .channels_max = 2,
2033 .ops = {
2034 .open = simple_playback_pcm_open,
2035 .close = simple_playback_pcm_close,
2036 .prepare = simple_playback_pcm_prepare
2037 },
2038 };
2039
2040 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2041 .build_controls = simple_playback_build_controls,
2042 .build_pcms = simple_playback_build_pcms,
2043 .init = simple_playback_init,
2044 .free = simple_playback_free,
2045 .unsol_event = simple_hdmi_unsol_event,
2046 };
2047
2048 static int patch_simple_hdmi(struct hda_codec *codec,
2049 hda_nid_t cvt_nid, hda_nid_t pin_nid)
2050 {
2051 struct hdmi_spec *spec;
2052
2053 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2054 if (!spec)
2055 return -ENOMEM;
2056
2057 codec->spec = spec;
2058
2059 spec->multiout.num_dacs = 0; /* no analog */
2060 spec->multiout.max_channels = 2;
2061 spec->multiout.dig_out_nid = cvt_nid;
2062 spec->num_cvts = 1;
2063 spec->num_pins = 1;
2064 spec->cvts[0].cvt_nid = cvt_nid;
2065 spec->pins[0].pin_nid = pin_nid;
2066 spec->pcm_playback = simple_pcm_playback;
2067
2068 codec->patch_ops = simple_hdmi_patch_ops;
2069
2070 return 0;
2071 }
2072
2073 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2074 int channels)
2075 {
2076 unsigned int chanmask;
2077 int chan = channels ? (channels - 1) : 1;
2078
2079 switch (channels) {
2080 default:
2081 case 0:
2082 case 2:
2083 chanmask = 0x00;
2084 break;
2085 case 4:
2086 chanmask = 0x08;
2087 break;
2088 case 6:
2089 chanmask = 0x0b;
2090 break;
2091 case 8:
2092 chanmask = 0x13;
2093 break;
2094 }
2095
2096 /* Set the audio infoframe channel allocation and checksum fields. The
2097 * channel count is computed implicitly by the hardware. */
2098 snd_hda_codec_write(codec, 0x1, 0,
2099 Nv_VERB_SET_Channel_Allocation, chanmask);
2100
2101 snd_hda_codec_write(codec, 0x1, 0,
2102 Nv_VERB_SET_Info_Frame_Checksum,
2103 (0x71 - chan - chanmask));
2104 }
2105
2106 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2107 struct hda_codec *codec,
2108 struct snd_pcm_substream *substream)
2109 {
2110 struct hdmi_spec *spec = codec->spec;
2111 int i;
2112
2113 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2114 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2115 for (i = 0; i < 4; i++) {
2116 /* set the stream id */
2117 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2118 AC_VERB_SET_CHANNEL_STREAMID, 0);
2119 /* set the stream format */
2120 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2121 AC_VERB_SET_STREAM_FORMAT, 0);
2122 }
2123
2124 /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2125 * streams are disabled. */
2126 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2127
2128 return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2129 }
2130
2131 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2132 struct hda_codec *codec,
2133 unsigned int stream_tag,
2134 unsigned int format,
2135 struct snd_pcm_substream *substream)
2136 {
2137 int chs;
2138 unsigned int dataDCC2, channel_id;
2139 int i;
2140 struct hdmi_spec *spec = codec->spec;
2141 struct hda_spdif_out *spdif;
2142
2143 mutex_lock(&codec->spdif_mutex);
2144 spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
2145
2146 chs = substream->runtime->channels;
2147
2148 dataDCC2 = 0x2;
2149
2150 /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2151 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2152 snd_hda_codec_write(codec,
2153 nvhdmi_master_con_nid_7x,
2154 0,
2155 AC_VERB_SET_DIGI_CONVERT_1,
2156 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2157
2158 /* set the stream id */
2159 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2160 AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2161
2162 /* set the stream format */
2163 snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2164 AC_VERB_SET_STREAM_FORMAT, format);
2165
2166 /* turn on again (if needed) */
2167 /* enable and set the channel status audio/data flag */
2168 if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2169 snd_hda_codec_write(codec,
2170 nvhdmi_master_con_nid_7x,
2171 0,
2172 AC_VERB_SET_DIGI_CONVERT_1,
2173 spdif->ctls & 0xff);
2174 snd_hda_codec_write(codec,
2175 nvhdmi_master_con_nid_7x,
2176 0,
2177 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2178 }
2179
2180 for (i = 0; i < 4; i++) {
2181 if (chs == 2)
2182 channel_id = 0;
2183 else
2184 channel_id = i * 2;
2185
2186 /* turn off SPDIF once;
2187 *otherwise the IEC958 bits won't be updated
2188 */
2189 if (codec->spdif_status_reset &&
2190 (spdif->ctls & AC_DIG1_ENABLE))
2191 snd_hda_codec_write(codec,
2192 nvhdmi_con_nids_7x[i],
2193 0,
2194 AC_VERB_SET_DIGI_CONVERT_1,
2195 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2196 /* set the stream id */
2197 snd_hda_codec_write(codec,
2198 nvhdmi_con_nids_7x[i],
2199 0,
2200 AC_VERB_SET_CHANNEL_STREAMID,
2201 (stream_tag << 4) | channel_id);
2202 /* set the stream format */
2203 snd_hda_codec_write(codec,
2204 nvhdmi_con_nids_7x[i],
2205 0,
2206 AC_VERB_SET_STREAM_FORMAT,
2207 format);
2208 /* turn on again (if needed) */
2209 /* enable and set the channel status audio/data flag */
2210 if (codec->spdif_status_reset &&
2211 (spdif->ctls & AC_DIG1_ENABLE)) {
2212 snd_hda_codec_write(codec,
2213 nvhdmi_con_nids_7x[i],
2214 0,
2215 AC_VERB_SET_DIGI_CONVERT_1,
2216 spdif->ctls & 0xff);
2217 snd_hda_codec_write(codec,
2218 nvhdmi_con_nids_7x[i],
2219 0,
2220 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2221 }
2222 }
2223
2224 nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2225
2226 mutex_unlock(&codec->spdif_mutex);
2227 return 0;
2228 }
2229
2230 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2231 .substreams = 1,
2232 .channels_min = 2,
2233 .channels_max = 8,
2234 .nid = nvhdmi_master_con_nid_7x,
2235 .rates = SUPPORTED_RATES,
2236 .maxbps = SUPPORTED_MAXBPS,
2237 .formats = SUPPORTED_FORMATS,
2238 .ops = {
2239 .open = simple_playback_pcm_open,
2240 .close = nvhdmi_8ch_7x_pcm_close,
2241 .prepare = nvhdmi_8ch_7x_pcm_prepare
2242 },
2243 };
2244
2245 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2246 {
2247 struct hdmi_spec *spec;
2248 int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2249 nvhdmi_master_pin_nid_7x);
2250 if (err < 0)
2251 return err;
2252
2253 codec->patch_ops.init = nvhdmi_7x_init_2ch;
2254 /* override the PCM rates, etc, as the codec doesn't give full list */
2255 spec = codec->spec;
2256 spec->pcm_playback.rates = SUPPORTED_RATES;
2257 spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2258 spec->pcm_playback.formats = SUPPORTED_FORMATS;
2259 return 0;
2260 }
2261
2262 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2263 {
2264 struct hdmi_spec *spec = codec->spec;
2265 int err = simple_playback_build_pcms(codec);
2266 spec->pcm_rec[0].own_chmap = true;
2267 return err;
2268 }
2269
2270 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2271 {
2272 struct hdmi_spec *spec = codec->spec;
2273 struct snd_pcm_chmap *chmap;
2274 int err;
2275
2276 err = simple_playback_build_controls(codec);
2277 if (err < 0)
2278 return err;
2279
2280 /* add channel maps */
2281 err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
2282 SNDRV_PCM_STREAM_PLAYBACK,
2283 snd_pcm_alt_chmaps, 8, 0, &chmap);
2284 if (err < 0)
2285 return err;
2286 switch (codec->preset->id) {
2287 case 0x10de0002:
2288 case 0x10de0003:
2289 case 0x10de0005:
2290 case 0x10de0006:
2291 chmap->channel_mask = (1U << 2) | (1U << 8);
2292 break;
2293 case 0x10de0007:
2294 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2295 }
2296 return 0;
2297 }
2298
2299 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2300 {
2301 struct hdmi_spec *spec;
2302 int err = patch_nvhdmi_2ch(codec);
2303 if (err < 0)
2304 return err;
2305 spec = codec->spec;
2306 spec->multiout.max_channels = 8;
2307 spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2308 codec->patch_ops.init = nvhdmi_7x_init_8ch;
2309 codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2310 codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2311
2312 /* Initialize the audio infoframe channel mask and checksum to something
2313 * valid */
2314 nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2315
2316 return 0;
2317 }
2318
2319 /*
2320 * ATI-specific implementations
2321 *
2322 * FIXME: we may omit the whole this and use the generic code once after
2323 * it's confirmed to work.
2324 */
2325
2326 #define ATIHDMI_CVT_NID 0x02 /* audio converter */
2327 #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
2328
2329 static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2330 struct hda_codec *codec,
2331 unsigned int stream_tag,
2332 unsigned int format,
2333 struct snd_pcm_substream *substream)
2334 {
2335 struct hdmi_spec *spec = codec->spec;
2336 int chans = substream->runtime->channels;
2337 int i, err;
2338
2339 err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
2340 substream);
2341 if (err < 0)
2342 return err;
2343 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2344 AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
2345 /* FIXME: XXX */
2346 for (i = 0; i < chans; i++) {
2347 snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
2348 AC_VERB_SET_HDMI_CHAN_SLOT,
2349 (i << 4) | i);
2350 }
2351 return 0;
2352 }
2353
2354 static int patch_atihdmi(struct hda_codec *codec)
2355 {
2356 struct hdmi_spec *spec;
2357 int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
2358 if (err < 0)
2359 return err;
2360 spec = codec->spec;
2361 spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
2362 return 0;
2363 }
2364
2365 /* VIA HDMI Implementation */
2366 #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
2367 #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
2368
2369 static int patch_via_hdmi(struct hda_codec *codec)
2370 {
2371 return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
2372 }
2373
2374 /*
2375 * patch entries
2376 */
2377 static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
2378 { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
2379 { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
2380 { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
2381 { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
2382 { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
2383 { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
2384 { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
2385 { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2386 { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2387 { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2388 { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
2389 { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
2390 { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
2391 { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
2392 { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
2393 { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
2394 { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
2395 { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
2396 { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
2397 { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
2398 { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
2399 { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
2400 { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
2401 /* 17 is known to be absent */
2402 { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
2403 { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
2404 { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
2405 { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
2406 { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
2407 { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
2408 { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
2409 { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
2410 { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
2411 { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
2412 { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
2413 { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
2414 { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
2415 { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2416 { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
2417 { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2418 { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
2419 { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2420 { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
2421 { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
2422 { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
2423 { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
2424 { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
2425 { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
2426 { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
2427 { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
2428 { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
2429 {} /* terminator */
2430 };
2431
2432 MODULE_ALIAS("snd-hda-codec-id:1002793c");
2433 MODULE_ALIAS("snd-hda-codec-id:10027919");
2434 MODULE_ALIAS("snd-hda-codec-id:1002791a");
2435 MODULE_ALIAS("snd-hda-codec-id:1002aa01");
2436 MODULE_ALIAS("snd-hda-codec-id:10951390");
2437 MODULE_ALIAS("snd-hda-codec-id:10951392");
2438 MODULE_ALIAS("snd-hda-codec-id:10de0002");
2439 MODULE_ALIAS("snd-hda-codec-id:10de0003");
2440 MODULE_ALIAS("snd-hda-codec-id:10de0005");
2441 MODULE_ALIAS("snd-hda-codec-id:10de0006");
2442 MODULE_ALIAS("snd-hda-codec-id:10de0007");
2443 MODULE_ALIAS("snd-hda-codec-id:10de000a");
2444 MODULE_ALIAS("snd-hda-codec-id:10de000b");
2445 MODULE_ALIAS("snd-hda-codec-id:10de000c");
2446 MODULE_ALIAS("snd-hda-codec-id:10de000d");
2447 MODULE_ALIAS("snd-hda-codec-id:10de0010");
2448 MODULE_ALIAS("snd-hda-codec-id:10de0011");
2449 MODULE_ALIAS("snd-hda-codec-id:10de0012");
2450 MODULE_ALIAS("snd-hda-codec-id:10de0013");
2451 MODULE_ALIAS("snd-hda-codec-id:10de0014");
2452 MODULE_ALIAS("snd-hda-codec-id:10de0015");
2453 MODULE_ALIAS("snd-hda-codec-id:10de0016");
2454 MODULE_ALIAS("snd-hda-codec-id:10de0018");
2455 MODULE_ALIAS("snd-hda-codec-id:10de0019");
2456 MODULE_ALIAS("snd-hda-codec-id:10de001a");
2457 MODULE_ALIAS("snd-hda-codec-id:10de001b");
2458 MODULE_ALIAS("snd-hda-codec-id:10de001c");
2459 MODULE_ALIAS("snd-hda-codec-id:10de0040");
2460 MODULE_ALIAS("snd-hda-codec-id:10de0041");
2461 MODULE_ALIAS("snd-hda-codec-id:10de0042");
2462 MODULE_ALIAS("snd-hda-codec-id:10de0043");
2463 MODULE_ALIAS("snd-hda-codec-id:10de0044");
2464 MODULE_ALIAS("snd-hda-codec-id:10de0051");
2465 MODULE_ALIAS("snd-hda-codec-id:10de0067");
2466 MODULE_ALIAS("snd-hda-codec-id:10de8001");
2467 MODULE_ALIAS("snd-hda-codec-id:11069f80");
2468 MODULE_ALIAS("snd-hda-codec-id:11069f81");
2469 MODULE_ALIAS("snd-hda-codec-id:11069f84");
2470 MODULE_ALIAS("snd-hda-codec-id:11069f85");
2471 MODULE_ALIAS("snd-hda-codec-id:17e80047");
2472 MODULE_ALIAS("snd-hda-codec-id:80860054");
2473 MODULE_ALIAS("snd-hda-codec-id:80862801");
2474 MODULE_ALIAS("snd-hda-codec-id:80862802");
2475 MODULE_ALIAS("snd-hda-codec-id:80862803");
2476 MODULE_ALIAS("snd-hda-codec-id:80862804");
2477 MODULE_ALIAS("snd-hda-codec-id:80862805");
2478 MODULE_ALIAS("snd-hda-codec-id:80862806");
2479 MODULE_ALIAS("snd-hda-codec-id:80862807");
2480 MODULE_ALIAS("snd-hda-codec-id:80862880");
2481 MODULE_ALIAS("snd-hda-codec-id:808629fb");
2482
2483 MODULE_LICENSE("GPL");
2484 MODULE_DESCRIPTION("HDMI HD-audio codec");
2485 MODULE_ALIAS("snd-hda-codec-intelhdmi");
2486 MODULE_ALIAS("snd-hda-codec-nvhdmi");
2487 MODULE_ALIAS("snd-hda-codec-atihdmi");
2488
2489 static struct hda_codec_preset_list intel_list = {
2490 .preset = snd_hda_preset_hdmi,
2491 .owner = THIS_MODULE,
2492 };
2493
2494 static int __init patch_hdmi_init(void)
2495 {
2496 return snd_hda_add_codec_preset(&intel_list);
2497 }
2498
2499 static void __exit patch_hdmi_exit(void)
2500 {
2501 snd_hda_delete_codec_preset(&intel_list);
2502 }
2503
2504 module_init(patch_hdmi_init)
2505 module_exit(patch_hdmi_exit)
Linux kernel - Deliverables
This page took 0.185035 seconds and 6 git commands to generate.