3 * patch_intelhdmi.c - Patch for Intel HDMI codecs
5 * Copyright(c) 2008 Intel Corporation. All rights reserved.
8 * Jiang Zhe <zhe.jiang@intel.com>
9 * Wu Fengguang <wfg@linux.intel.com>
12 * Wu Fengguang <wfg@linux.intel.com>
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License as published by the Free
16 * Software Foundation; either version 2 of the License, or (at your option)
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
21 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software Foundation,
26 * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
29 #include <linux/init.h>
30 #include <linux/delay.h>
31 #include <linux/slab.h>
32 #include <sound/core.h>
33 #include "hda_codec.h"
34 #include "hda_local.h"
36 static hda_nid_t cvt_nid
; /* audio converter */
37 static hda_nid_t pin_nid
; /* HDMI output pin */
39 #define INTEL_HDMI_EVENT_TAG 0x08
41 struct intel_hdmi_spec
{
42 struct hda_pcm pcm_rec
;
43 struct hdmi_eld sink_eld
;
46 struct hdmi_audio_infoframe
{
51 u8 checksum
; /* PB0 */
52 u8 CC02_CT47
; /* CC in bits 0:2, CT in 4:7 */
56 u8 LFEPBL01_LSV36_DM_INH7
;
57 u8 reserved
[5]; /* PB6 - PB10 */
61 * CEA speaker placement:
64 * FLW FL FLC FC FRC FR FRW
71 * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
72 * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
74 enum cea_speaker_placement
{
75 FL
= (1 << 0), /* Front Left */
76 FC
= (1 << 1), /* Front Center */
77 FR
= (1 << 2), /* Front Right */
78 FLC
= (1 << 3), /* Front Left Center */
79 FRC
= (1 << 4), /* Front Right Center */
80 RL
= (1 << 5), /* Rear Left */
81 RC
= (1 << 6), /* Rear Center */
82 RR
= (1 << 7), /* Rear Right */
83 RLC
= (1 << 8), /* Rear Left Center */
84 RRC
= (1 << 9), /* Rear Right Center */
85 LFE
= (1 << 10), /* Low Frequency Effect */
86 FLW
= (1 << 11), /* Front Left Wide */
87 FRW
= (1 << 12), /* Front Right Wide */
88 FLH
= (1 << 13), /* Front Left High */
89 FCH
= (1 << 14), /* Front Center High */
90 FRH
= (1 << 15), /* Front Right High */
91 TC
= (1 << 16), /* Top Center */
95 * ELD SA bits in the CEA Speaker Allocation data block
97 static int eld_speaker_allocation_bits
[] = {
105 /* the following are not defined in ELD yet */
112 struct cea_channel_speaker_allocation
{
116 /* derived values, just for convenience */
122 * This is an ordered list!
124 * The preceding ones have better chances to be selected by
125 * hdmi_setup_channel_allocation().
127 static struct cea_channel_speaker_allocation channel_allocations
[] = {
128 /* channel: 8 7 6 5 4 3 2 1 */
129 { .ca_index
= 0x00, .speakers
= { 0, 0, 0, 0, 0, 0, FR
, FL
} },
131 { .ca_index
= 0x01, .speakers
= { 0, 0, 0, 0, 0, LFE
, FR
, FL
} },
133 { .ca_index
= 0x02, .speakers
= { 0, 0, 0, 0, FC
, 0, FR
, FL
} },
134 { .ca_index
= 0x03, .speakers
= { 0, 0, 0, 0, FC
, LFE
, FR
, FL
} },
135 { .ca_index
= 0x04, .speakers
= { 0, 0, 0, RC
, 0, 0, FR
, FL
} },
136 { .ca_index
= 0x05, .speakers
= { 0, 0, 0, RC
, 0, LFE
, FR
, FL
} },
137 { .ca_index
= 0x06, .speakers
= { 0, 0, 0, RC
, FC
, 0, FR
, FL
} },
138 { .ca_index
= 0x07, .speakers
= { 0, 0, 0, RC
, FC
, LFE
, FR
, FL
} },
139 { .ca_index
= 0x08, .speakers
= { 0, 0, RR
, RL
, 0, 0, FR
, FL
} },
140 { .ca_index
= 0x09, .speakers
= { 0, 0, RR
, RL
, 0, LFE
, FR
, FL
} },
141 { .ca_index
= 0x0a, .speakers
= { 0, 0, RR
, RL
, FC
, 0, FR
, FL
} },
143 { .ca_index
= 0x0b, .speakers
= { 0, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
144 { .ca_index
= 0x0c, .speakers
= { 0, RC
, RR
, RL
, 0, 0, FR
, FL
} },
145 { .ca_index
= 0x0d, .speakers
= { 0, RC
, RR
, RL
, 0, LFE
, FR
, FL
} },
146 { .ca_index
= 0x0e, .speakers
= { 0, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
148 { .ca_index
= 0x0f, .speakers
= { 0, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
149 { .ca_index
= 0x10, .speakers
= { RRC
, RLC
, RR
, RL
, 0, 0, FR
, FL
} },
150 { .ca_index
= 0x11, .speakers
= { RRC
, RLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
151 { .ca_index
= 0x12, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, 0, FR
, FL
} },
153 { .ca_index
= 0x13, .speakers
= { RRC
, RLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
154 { .ca_index
= 0x14, .speakers
= { FRC
, FLC
, 0, 0, 0, 0, FR
, FL
} },
155 { .ca_index
= 0x15, .speakers
= { FRC
, FLC
, 0, 0, 0, LFE
, FR
, FL
} },
156 { .ca_index
= 0x16, .speakers
= { FRC
, FLC
, 0, 0, FC
, 0, FR
, FL
} },
157 { .ca_index
= 0x17, .speakers
= { FRC
, FLC
, 0, 0, FC
, LFE
, FR
, FL
} },
158 { .ca_index
= 0x18, .speakers
= { FRC
, FLC
, 0, RC
, 0, 0, FR
, FL
} },
159 { .ca_index
= 0x19, .speakers
= { FRC
, FLC
, 0, RC
, 0, LFE
, FR
, FL
} },
160 { .ca_index
= 0x1a, .speakers
= { FRC
, FLC
, 0, RC
, FC
, 0, FR
, FL
} },
161 { .ca_index
= 0x1b, .speakers
= { FRC
, FLC
, 0, RC
, FC
, LFE
, FR
, FL
} },
162 { .ca_index
= 0x1c, .speakers
= { FRC
, FLC
, RR
, RL
, 0, 0, FR
, FL
} },
163 { .ca_index
= 0x1d, .speakers
= { FRC
, FLC
, RR
, RL
, 0, LFE
, FR
, FL
} },
164 { .ca_index
= 0x1e, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, 0, FR
, FL
} },
165 { .ca_index
= 0x1f, .speakers
= { FRC
, FLC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
166 { .ca_index
= 0x20, .speakers
= { 0, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
167 { .ca_index
= 0x21, .speakers
= { 0, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
168 { .ca_index
= 0x22, .speakers
= { TC
, 0, RR
, RL
, FC
, 0, FR
, FL
} },
169 { .ca_index
= 0x23, .speakers
= { TC
, 0, RR
, RL
, FC
, LFE
, FR
, FL
} },
170 { .ca_index
= 0x24, .speakers
= { FRH
, FLH
, RR
, RL
, 0, 0, FR
, FL
} },
171 { .ca_index
= 0x25, .speakers
= { FRH
, FLH
, RR
, RL
, 0, LFE
, FR
, FL
} },
172 { .ca_index
= 0x26, .speakers
= { FRW
, FLW
, RR
, RL
, 0, 0, FR
, FL
} },
173 { .ca_index
= 0x27, .speakers
= { FRW
, FLW
, RR
, RL
, 0, LFE
, FR
, FL
} },
174 { .ca_index
= 0x28, .speakers
= { TC
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
175 { .ca_index
= 0x29, .speakers
= { TC
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
176 { .ca_index
= 0x2a, .speakers
= { FCH
, RC
, RR
, RL
, FC
, 0, FR
, FL
} },
177 { .ca_index
= 0x2b, .speakers
= { FCH
, RC
, RR
, RL
, FC
, LFE
, FR
, FL
} },
178 { .ca_index
= 0x2c, .speakers
= { TC
, FCH
, RR
, RL
, FC
, 0, FR
, FL
} },
179 { .ca_index
= 0x2d, .speakers
= { TC
, FCH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
180 { .ca_index
= 0x2e, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, 0, FR
, FL
} },
181 { .ca_index
= 0x2f, .speakers
= { FRH
, FLH
, RR
, RL
, FC
, LFE
, FR
, FL
} },
182 { .ca_index
= 0x30, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, 0, FR
, FL
} },
183 { .ca_index
= 0x31, .speakers
= { FRW
, FLW
, RR
, RL
, FC
, LFE
, FR
, FL
} },
191 static void hdmi_get_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
192 int *packet_index
, int *byte_index
)
196 val
= snd_hda_codec_read(codec
, pin_nid
, 0,
197 AC_VERB_GET_HDMI_DIP_INDEX
, 0);
199 *packet_index
= val
>> 5;
200 *byte_index
= val
& 0x1f;
204 static void hdmi_set_dip_index(struct hda_codec
*codec
, hda_nid_t pin_nid
,
205 int packet_index
, int byte_index
)
209 val
= (packet_index
<< 5) | (byte_index
& 0x1f);
211 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_INDEX
, val
);
214 static void hdmi_write_dip_byte(struct hda_codec
*codec
, hda_nid_t pin_nid
,
217 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_DATA
, val
);
220 static void hdmi_enable_output(struct hda_codec
*codec
, hda_nid_t pin_nid
)
223 if (get_wcaps(codec
, pin_nid
) & AC_WCAP_OUT_AMP
)
224 snd_hda_codec_write(codec
, pin_nid
, 0,
225 AC_VERB_SET_AMP_GAIN_MUTE
, AMP_OUT_UNMUTE
);
227 snd_hda_codec_write(codec
, pin_nid
, 0,
228 AC_VERB_SET_PIN_WIDGET_CONTROL
, PIN_OUT
);
232 * Enable Audio InfoFrame Transmission
234 static void hdmi_start_infoframe_trans(struct hda_codec
*codec
,
237 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
238 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
243 * Disable Audio InfoFrame Transmission
245 static void hdmi_stop_infoframe_trans(struct hda_codec
*codec
,
248 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
249 snd_hda_codec_write(codec
, pin_nid
, 0, AC_VERB_SET_HDMI_DIP_XMIT
,
253 static int hdmi_get_channel_count(struct hda_codec
*codec
, hda_nid_t nid
)
255 return 1 + snd_hda_codec_read(codec
, nid
, 0,
256 AC_VERB_GET_CVT_CHAN_COUNT
, 0);
259 static void hdmi_set_channel_count(struct hda_codec
*codec
,
260 hda_nid_t nid
, int chs
)
262 snd_hda_codec_write(codec
, nid
, 0, AC_VERB_SET_CVT_CHAN_COUNT
, chs
- 1);
264 #ifdef CONFIG_SND_DEBUG_VERBOSE
265 if (chs
!= hdmi_get_channel_count(codec
, nid
))
266 snd_printd(KERN_INFO
"HDMI channel count: expect %d, get %d\n",
267 chs
, hdmi_get_channel_count(codec
, nid
));
271 static void hdmi_debug_channel_mapping(struct hda_codec
*codec
, hda_nid_t nid
)
273 #ifdef CONFIG_SND_DEBUG_VERBOSE
277 for (i
= 0; i
< 8; i
++) {
278 slot
= snd_hda_codec_read(codec
, nid
, 0,
279 AC_VERB_GET_HDMI_CHAN_SLOT
, i
);
280 printk(KERN_DEBUG
"HDMI: ASP channel %d => slot %d\n",
281 slot
>> 4, slot
& 0x7);
286 static void hdmi_parse_eld(struct hda_codec
*codec
)
288 struct intel_hdmi_spec
*spec
= codec
->spec
;
289 struct hdmi_eld
*eld
= &spec
->sink_eld
;
291 if (!snd_hdmi_get_eld(eld
, codec
, pin_nid
))
292 snd_hdmi_show_eld(eld
);
297 * Audio InfoFrame routines
300 static void hdmi_debug_dip_size(struct hda_codec
*codec
, hda_nid_t pin_nid
)
302 #ifdef CONFIG_SND_DEBUG_VERBOSE
306 size
= snd_hdmi_get_eld_size(codec
, pin_nid
);
307 printk(KERN_DEBUG
"HDMI: ELD buf size is %d\n", size
);
309 for (i
= 0; i
< 8; i
++) {
310 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
311 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
312 printk(KERN_DEBUG
"HDMI: DIP GP[%d] buf size is %d\n", i
, size
);
317 static void hdmi_clear_dip_buffers(struct hda_codec
*codec
, hda_nid_t pin_nid
)
323 for (i
= 0; i
< 8; i
++) {
324 size
= snd_hda_codec_read(codec
, pin_nid
, 0,
325 AC_VERB_GET_HDMI_DIP_SIZE
, i
);
329 hdmi_set_dip_index(codec
, pin_nid
, i
, 0x0);
330 for (j
= 1; j
< 1000; j
++) {
331 hdmi_write_dip_byte(codec
, pin_nid
, 0x0);
332 hdmi_get_dip_index(codec
, pin_nid
, &pi
, &bi
);
334 snd_printd(KERN_INFO
"dip index %d: %d != %d\n",
336 if (bi
== 0) /* byte index wrapped around */
340 "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
346 static void hdmi_fill_audio_infoframe(struct hda_codec
*codec
,
348 struct hdmi_audio_infoframe
*ai
)
350 u8
*params
= (u8
*)ai
;
354 hdmi_debug_dip_size(codec
, pin_nid
);
355 hdmi_clear_dip_buffers(codec
, pin_nid
); /* be paranoid */
357 for (i
= 0; i
< sizeof(ai
); i
++)
359 ai
->checksum
= - sum
;
361 hdmi_set_dip_index(codec
, pin_nid
, 0x0, 0x0);
362 for (i
= 0; i
< sizeof(ai
); i
++)
363 hdmi_write_dip_byte(codec
, pin_nid
, params
[i
]);
367 * Compute derived values in channel_allocations[].
369 static void init_channel_allocations(void)
372 struct cea_channel_speaker_allocation
*p
;
374 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
375 p
= channel_allocations
+ i
;
378 for (j
= 0; j
< ARRAY_SIZE(p
->speakers
); j
++)
379 if (p
->speakers
[j
]) {
381 p
->spk_mask
|= p
->speakers
[j
];
387 * The transformation takes two steps:
389 * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
390 * spk_mask => (channel_allocations[]) => ai->CA
392 * TODO: it could select the wrong CA from multiple candidates.
394 static int hdmi_setup_channel_allocation(struct hda_codec
*codec
, hda_nid_t nid
,
395 struct hdmi_audio_infoframe
*ai
)
397 struct intel_hdmi_spec
*spec
= codec
->spec
;
398 struct hdmi_eld
*eld
= &spec
->sink_eld
;
401 int channels
= 1 + (ai
->CC02_CT47
& 0x7);
402 char buf
[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE
];
405 * CA defaults to 0 for basic stereo audio
411 * HDMI sink's ELD info cannot always be retrieved for now, e.g.
412 * in console or for audio devices. Assume the highest speakers
413 * configuration, to _not_ prohibit multi-channel audio playback.
416 eld
->spk_alloc
= 0xffff;
419 * expand ELD's speaker allocation mask
421 * ELD tells the speaker mask in a compact(paired) form,
422 * expand ELD's notions to match the ones used by Audio InfoFrame.
424 for (i
= 0; i
< ARRAY_SIZE(eld_speaker_allocation_bits
); i
++) {
425 if (eld
->spk_alloc
& (1 << i
))
426 spk_mask
|= eld_speaker_allocation_bits
[i
];
429 /* search for the first working match in the CA table */
430 for (i
= 0; i
< ARRAY_SIZE(channel_allocations
); i
++) {
431 if (channels
== channel_allocations
[i
].channels
&&
432 (spk_mask
& channel_allocations
[i
].spk_mask
) ==
433 channel_allocations
[i
].spk_mask
) {
434 ai
->CA
= channel_allocations
[i
].ca_index
;
439 snd_print_channel_allocation(eld
->spk_alloc
, buf
, sizeof(buf
));
440 snd_printdd(KERN_INFO
441 "HDMI: select CA 0x%x for %d-channel allocation: %s\n",
442 ai
->CA
, channels
, buf
);
447 static void hdmi_setup_channel_mapping(struct hda_codec
*codec
, hda_nid_t nid
,
448 struct hdmi_audio_infoframe
*ai
)
456 * TODO: adjust channel mapping if necessary
457 * ALSA sequence is front/surr/clfe/side?
460 for (i
= 0; i
< 8; i
++)
461 snd_hda_codec_write(codec
, nid
, 0,
462 AC_VERB_SET_HDMI_CHAN_SLOT
,
465 hdmi_debug_channel_mapping(codec
, nid
);
469 static void hdmi_setup_audio_infoframe(struct hda_codec
*codec
, hda_nid_t nid
,
470 struct snd_pcm_substream
*substream
)
472 struct hdmi_audio_infoframe ai
= {
476 .CC02_CT47
= substream
->runtime
->channels
- 1,
479 hdmi_setup_channel_allocation(codec
, nid
, &ai
);
480 hdmi_setup_channel_mapping(codec
, nid
, &ai
);
482 hdmi_fill_audio_infoframe(codec
, pin_nid
, &ai
);
483 hdmi_start_infoframe_trans(codec
, pin_nid
);
491 static void hdmi_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
493 int pind
= !!(res
& AC_UNSOL_RES_PD
);
494 int eldv
= !!(res
& AC_UNSOL_RES_ELDV
);
497 "HDMI hot plug event: Presence_Detect=%d ELD_Valid=%d\n",
501 hdmi_parse_eld(codec
);
502 /* TODO: do real things about ELD */
506 static void hdmi_non_intrinsic_event(struct hda_codec
*codec
, unsigned int res
)
508 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
509 int cp_state
= !!(res
& AC_UNSOL_RES_CP_STATE
);
510 int cp_ready
= !!(res
& AC_UNSOL_RES_CP_READY
);
513 "HDMI content protection event: SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
526 static void intel_hdmi_unsol_event(struct hda_codec
*codec
, unsigned int res
)
528 int tag
= res
>> AC_UNSOL_RES_TAG_SHIFT
;
529 int subtag
= (res
& AC_UNSOL_RES_SUBTAG
) >> AC_UNSOL_RES_SUBTAG_SHIFT
;
531 if (tag
!= INTEL_HDMI_EVENT_TAG
) {
532 snd_printd(KERN_INFO
"Unexpected HDMI event tag 0x%x\n", tag
);
537 hdmi_intrinsic_event(codec
, res
);
539 hdmi_non_intrinsic_event(codec
, res
);
546 static int intel_hdmi_playback_pcm_prepare(struct hda_pcm_stream
*hinfo
,
547 struct hda_codec
*codec
,
548 unsigned int stream_tag
,
550 struct snd_pcm_substream
*substream
)
552 hdmi_set_channel_count(codec
, cvt_nid
,
553 substream
->runtime
->channels
);
555 hdmi_setup_audio_infoframe(codec
, cvt_nid
, substream
);
557 snd_hda_codec_setup_stream(codec
, hinfo
->nid
, stream_tag
, 0, format
);
561 static int intel_hdmi_playback_pcm_cleanup(struct hda_pcm_stream
*hinfo
,
562 struct hda_codec
*codec
,
563 struct snd_pcm_substream
*substream
)
565 struct intel_hdmi_spec
*spec
= codec
->spec
;
567 hdmi_stop_infoframe_trans(codec
, pin_nid
);
569 snd_hda_codec_cleanup_stream(codec
, hinfo
->nid
);
573 static struct hda_pcm_stream intel_hdmi_pcm_playback
= {
578 .prepare
= intel_hdmi_playback_pcm_prepare
,
579 .cleanup
= intel_hdmi_playback_pcm_cleanup
,
583 static int intel_hdmi_build_pcms(struct hda_codec
*codec
)
585 struct intel_hdmi_spec
*spec
= codec
->spec
;
586 struct hda_pcm
*info
= &spec
->pcm_rec
;
589 codec
->pcm_info
= info
;
591 /* NID to query formats and rates and setup streams */
592 intel_hdmi_pcm_playback
.nid
= cvt_nid
;
594 info
->name
= "INTEL HDMI";
595 info
->pcm_type
= HDA_PCM_TYPE_HDMI
;
596 info
->stream
[SNDRV_PCM_STREAM_PLAYBACK
] = intel_hdmi_pcm_playback
;
601 static int intel_hdmi_build_controls(struct hda_codec
*codec
)
603 struct intel_hdmi_spec
*spec
= codec
->spec
;
606 err
= snd_hda_create_spdif_out_ctls(codec
, cvt_nid
);
613 static int intel_hdmi_init(struct hda_codec
*codec
)
615 hdmi_enable_output(codec
, pin_nid
);
617 snd_hda_codec_write(codec
, pin_nid
, 0,
618 AC_VERB_SET_UNSOLICITED_ENABLE
,
619 AC_USRSP_EN
| INTEL_HDMI_EVENT_TAG
);
623 static void intel_hdmi_free(struct hda_codec
*codec
)
625 struct intel_hdmi_spec
*spec
= codec
->spec
;
627 snd_hda_eld_proc_free(codec
, &spec
->sink_eld
);
631 static struct hda_codec_ops intel_hdmi_patch_ops
= {
632 .init
= intel_hdmi_init
,
633 .free
= intel_hdmi_free
,
634 .build_pcms
= intel_hdmi_build_pcms
,
635 .build_controls
= intel_hdmi_build_controls
,
636 .unsol_event
= intel_hdmi_unsol_event
,
639 static int do_patch_intel_hdmi(struct hda_codec
*codec
)
641 struct intel_hdmi_spec
*spec
;
643 spec
= kzalloc(sizeof(*spec
), GFP_KERNEL
);
648 codec
->patch_ops
= intel_hdmi_patch_ops
;
650 snd_hda_eld_proc_new(codec
, &spec
->sink_eld
);
652 init_channel_allocations();
657 static int patch_intel_hdmi(struct hda_codec
*codec
)
661 return do_patch_intel_hdmi(codec
);
664 static int patch_intel_hdmi_ibexpeak(struct hda_codec
*codec
)
668 return do_patch_intel_hdmi(codec
);
671 static struct hda_codec_preset snd_hda_preset_intelhdmi
[] = {
672 { .id
= 0x808629fb, .name
= "G45 DEVCL", .patch
= patch_intel_hdmi
},
673 { .id
= 0x80862801, .name
= "G45 DEVBLC", .patch
= patch_intel_hdmi
},
674 { .id
= 0x80862802, .name
= "G45 DEVCTG", .patch
= patch_intel_hdmi
},
675 { .id
= 0x80862803, .name
= "G45 DEVELK", .patch
= patch_intel_hdmi
},
676 { .id
= 0x80862804, .name
= "G45 DEVIBX", .patch
= patch_intel_hdmi_ibexpeak
},
677 { .id
= 0x80860054, .name
= "Q57 DEVIBX", .patch
= patch_intel_hdmi_ibexpeak
},
678 { .id
= 0x10951392, .name
= "SiI1392 HDMI", .patch
= patch_intel_hdmi
},
682 MODULE_ALIAS("snd-hda-codec-id:808629fb");
683 MODULE_ALIAS("snd-hda-codec-id:80862801");
684 MODULE_ALIAS("snd-hda-codec-id:80862802");
685 MODULE_ALIAS("snd-hda-codec-id:80862803");
686 MODULE_ALIAS("snd-hda-codec-id:80862804");
687 MODULE_ALIAS("snd-hda-codec-id:80860054");
688 MODULE_ALIAS("snd-hda-codec-id:10951392");
690 MODULE_LICENSE("GPL");
691 MODULE_DESCRIPTION("Intel HDMI HD-audio codec");
693 static struct hda_codec_preset_list intel_list
= {
694 .preset
= snd_hda_preset_intelhdmi
,
695 .owner
= THIS_MODULE
,
698 static int __init
patch_intelhdmi_init(void)
700 return snd_hda_add_codec_preset(&intel_list
);
703 static void __exit
patch_intelhdmi_exit(void)
705 snd_hda_delete_codec_preset(&intel_list
);
708 module_init(patch_intelhdmi_init
)
709 module_exit(patch_intelhdmi_exit
)