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ALSA: hda - Remove superfluous header inclusions
[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
1 /*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7 * Matt Porter <mporter@embeddedalley.com>
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/dmi.h>
32 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/jack.h>
35 #include <sound/tlv.h>
36 #include "hda_codec.h"
37 #include "hda_local.h"
38 #include "hda_auto_parser.h"
39 #include "hda_beep.h"
40 #include "hda_jack.h"
41 #include "hda_generic.h"
42
43 enum {
44 STAC_VREF_EVENT = 8,
45 STAC_PWR_EVENT,
46 };
47
48 enum {
49 STAC_REF,
50 STAC_9200_OQO,
51 STAC_9200_DELL_D21,
52 STAC_9200_DELL_D22,
53 STAC_9200_DELL_D23,
54 STAC_9200_DELL_M21,
55 STAC_9200_DELL_M22,
56 STAC_9200_DELL_M23,
57 STAC_9200_DELL_M24,
58 STAC_9200_DELL_M25,
59 STAC_9200_DELL_M26,
60 STAC_9200_DELL_M27,
61 STAC_9200_M4,
62 STAC_9200_M4_2,
63 STAC_9200_PANASONIC,
64 STAC_9200_EAPD_INIT,
65 STAC_9200_MODELS
66 };
67
68 enum {
69 STAC_9205_REF,
70 STAC_9205_DELL_M42,
71 STAC_9205_DELL_M43,
72 STAC_9205_DELL_M44,
73 STAC_9205_EAPD,
74 STAC_9205_MODELS
75 };
76
77 enum {
78 STAC_92HD73XX_NO_JD, /* no jack-detection */
79 STAC_92HD73XX_REF,
80 STAC_92HD73XX_INTEL,
81 STAC_DELL_M6_AMIC,
82 STAC_DELL_M6_DMIC,
83 STAC_DELL_M6_BOTH,
84 STAC_DELL_EQ,
85 STAC_ALIENWARE_M17X,
86 STAC_92HD73XX_MODELS
87 };
88
89 enum {
90 STAC_92HD83XXX_REF,
91 STAC_92HD83XXX_PWR_REF,
92 STAC_DELL_S14,
93 STAC_DELL_VOSTRO_3500,
94 STAC_92HD83XXX_HP_cNB11_INTQUAD,
95 STAC_HP_DV7_4000,
96 STAC_HP_ZEPHYR,
97 STAC_92HD83XXX_HP_LED,
98 STAC_92HD83XXX_HP_INV_LED,
99 STAC_92HD83XXX_HP_MIC_LED,
100 STAC_92HD83XXX_HEADSET_JACK,
101 STAC_92HD83XXX_HP,
102 STAC_HP_ENVY_BASS,
103 STAC_92HD83XXX_MODELS
104 };
105
106 enum {
107 STAC_92HD71BXX_REF,
108 STAC_DELL_M4_1,
109 STAC_DELL_M4_2,
110 STAC_DELL_M4_3,
111 STAC_HP_M4,
112 STAC_HP_DV4,
113 STAC_HP_DV5,
114 STAC_HP_HDX,
115 STAC_92HD71BXX_HP,
116 STAC_92HD71BXX_NO_DMIC,
117 STAC_92HD71BXX_NO_SMUX,
118 STAC_92HD71BXX_MODELS
119 };
120
121 enum {
122 STAC_925x_REF,
123 STAC_M1,
124 STAC_M1_2,
125 STAC_M2,
126 STAC_M2_2,
127 STAC_M3,
128 STAC_M5,
129 STAC_M6,
130 STAC_925x_MODELS
131 };
132
133 enum {
134 STAC_D945_REF,
135 STAC_D945GTP3,
136 STAC_D945GTP5,
137 STAC_INTEL_MAC_V1,
138 STAC_INTEL_MAC_V2,
139 STAC_INTEL_MAC_V3,
140 STAC_INTEL_MAC_V4,
141 STAC_INTEL_MAC_V5,
142 STAC_INTEL_MAC_AUTO,
143 STAC_ECS_202,
144 STAC_922X_DELL_D81,
145 STAC_922X_DELL_D82,
146 STAC_922X_DELL_M81,
147 STAC_922X_DELL_M82,
148 STAC_922X_INTEL_MAC_GPIO,
149 STAC_922X_MODELS
150 };
151
152 enum {
153 STAC_D965_REF_NO_JD, /* no jack-detection */
154 STAC_D965_REF,
155 STAC_D965_3ST,
156 STAC_D965_5ST,
157 STAC_D965_5ST_NO_FP,
158 STAC_D965_VERBS,
159 STAC_DELL_3ST,
160 STAC_DELL_BIOS,
161 STAC_DELL_BIOS_SPDIF,
162 STAC_927X_DELL_DMIC,
163 STAC_927X_VOLKNOB,
164 STAC_927X_MODELS
165 };
166
167 enum {
168 STAC_9872_VAIO,
169 STAC_9872_MODELS
170 };
171
172 struct sigmatel_spec {
173 struct hda_gen_spec gen;
174
175 unsigned int eapd_switch: 1;
176 unsigned int linear_tone_beep:1;
177 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
178 unsigned int volknob_init:1; /* special volume-knob initialization */
179 unsigned int powerdown_adcs:1;
180
181 /* gpio lines */
182 unsigned int eapd_mask;
183 unsigned int gpio_mask;
184 unsigned int gpio_dir;
185 unsigned int gpio_data;
186 unsigned int gpio_mute;
187 unsigned int gpio_led;
188 unsigned int gpio_led_polarity;
189 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
190 unsigned int vref_led;
191 int default_polarity;
192
193 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
194 bool mic_mute_led_on; /* current mic mute state */
195
196 /* stream */
197 unsigned int stream_delay;
198
199 /* analog loopback */
200 const struct snd_kcontrol_new *aloopback_ctl;
201 unsigned int aloopback;
202 unsigned char aloopback_mask;
203 unsigned char aloopback_shift;
204
205 /* power management */
206 unsigned int power_map_bits;
207 unsigned int num_pwrs;
208 const hda_nid_t *pwr_nids;
209 unsigned int active_adcs;
210
211 /* beep widgets */
212 hda_nid_t anabeep_nid;
213 hda_nid_t digbeep_nid;
214 };
215
216 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
217 #define AC_VERB_IDT_GET_POWER_MAP 0xfec
218
219 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
220 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
221 0x0f, 0x10, 0x11
222 };
223
224 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
225 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
226 0x0f, 0x10
227 };
228
229 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
230 0x0a, 0x0d, 0x0f
231 };
232
233
234 /*
235 * PCM hooks
236 */
237 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
238 struct hda_codec *codec,
239 struct snd_pcm_substream *substream,
240 int action)
241 {
242 struct sigmatel_spec *spec = codec->spec;
243 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
244 msleep(spec->stream_delay);
245 }
246
247 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
248 struct hda_codec *codec,
249 struct snd_pcm_substream *substream,
250 int action)
251 {
252 struct sigmatel_spec *spec = codec->spec;
253 int i, idx = 0;
254
255 if (!spec->powerdown_adcs)
256 return;
257
258 for (i = 0; i < spec->gen.num_all_adcs; i++) {
259 if (spec->gen.all_adcs[i] == hinfo->nid) {
260 idx = i;
261 break;
262 }
263 }
264
265 switch (action) {
266 case HDA_GEN_PCM_ACT_OPEN:
267 msleep(40);
268 snd_hda_codec_write(codec, hinfo->nid, 0,
269 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
270 spec->active_adcs |= (1 << idx);
271 break;
272 case HDA_GEN_PCM_ACT_CLOSE:
273 snd_hda_codec_write(codec, hinfo->nid, 0,
274 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
275 spec->active_adcs &= ~(1 << idx);
276 break;
277 }
278 }
279
280 /*
281 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
282 * funky external mute control using GPIO pins.
283 */
284
285 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
286 unsigned int dir_mask, unsigned int data)
287 {
288 unsigned int gpiostate, gpiomask, gpiodir;
289
290 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
291
292 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
293 AC_VERB_GET_GPIO_DATA, 0);
294 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
295
296 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
297 AC_VERB_GET_GPIO_MASK, 0);
298 gpiomask |= mask;
299
300 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
301 AC_VERB_GET_GPIO_DIRECTION, 0);
302 gpiodir |= dir_mask;
303
304 /* Configure GPIOx as CMOS */
305 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
306
307 snd_hda_codec_write(codec, codec->afg, 0,
308 AC_VERB_SET_GPIO_MASK, gpiomask);
309 snd_hda_codec_read(codec, codec->afg, 0,
310 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
311
312 msleep(1);
313
314 snd_hda_codec_read(codec, codec->afg, 0,
315 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
316 }
317
318 /* hook for controlling mic-mute LED GPIO */
319 static void stac_capture_led_hook(struct hda_codec *codec,
320 struct snd_ctl_elem_value *ucontrol)
321 {
322 struct sigmatel_spec *spec = codec->spec;
323 bool mute;
324
325 if (!ucontrol)
326 return;
327
328 mute = !(ucontrol->value.integer.value[0] ||
329 ucontrol->value.integer.value[1]);
330 if (spec->mic_mute_led_on != mute) {
331 spec->mic_mute_led_on = mute;
332 if (mute)
333 spec->gpio_data |= spec->mic_mute_led_gpio;
334 else
335 spec->gpio_data &= ~spec->mic_mute_led_gpio;
336 stac_gpio_set(codec, spec->gpio_mask,
337 spec->gpio_dir, spec->gpio_data);
338 }
339 }
340
341 static int stac_vrefout_set(struct hda_codec *codec,
342 hda_nid_t nid, unsigned int new_vref)
343 {
344 int error, pinctl;
345
346 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
347 pinctl = snd_hda_codec_read(codec, nid, 0,
348 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
349
350 if (pinctl < 0)
351 return pinctl;
352
353 pinctl &= 0xff;
354 pinctl &= ~AC_PINCTL_VREFEN;
355 pinctl |= (new_vref & AC_PINCTL_VREFEN);
356
357 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
358 if (error < 0)
359 return error;
360
361 return 1;
362 }
363
364 /* update mute-LED accoring to the master switch */
365 static void stac_update_led_status(struct hda_codec *codec, int enabled)
366 {
367 struct sigmatel_spec *spec = codec->spec;
368 int muted = !enabled;
369
370 if (!spec->gpio_led)
371 return;
372
373 /* LED state is inverted on these systems */
374 if (spec->gpio_led_polarity)
375 muted = !muted;
376
377 if (!spec->vref_mute_led_nid) {
378 if (muted)
379 spec->gpio_data |= spec->gpio_led;
380 else
381 spec->gpio_data &= ~spec->gpio_led;
382 stac_gpio_set(codec, spec->gpio_mask,
383 spec->gpio_dir, spec->gpio_data);
384 } else {
385 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
386 stac_vrefout_set(codec, spec->vref_mute_led_nid,
387 spec->vref_led);
388 }
389 }
390
391 /* vmaster hook to update mute LED */
392 static void stac_vmaster_hook(void *private_data, int val)
393 {
394 stac_update_led_status(private_data, val);
395 }
396
397 /* automute hook to handle GPIO mute and EAPD updates */
398 static void stac_update_outputs(struct hda_codec *codec)
399 {
400 struct sigmatel_spec *spec = codec->spec;
401
402 if (spec->gpio_mute)
403 spec->gen.master_mute =
404 !(snd_hda_codec_read(codec, codec->afg, 0,
405 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
406
407 snd_hda_gen_update_outputs(codec);
408
409 if (spec->eapd_mask && spec->eapd_switch) {
410 unsigned int val = spec->gpio_data;
411 if (spec->gen.speaker_muted)
412 val &= ~spec->eapd_mask;
413 else
414 val |= spec->eapd_mask;
415 if (spec->gpio_data != val)
416 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
417 val);
418 }
419 }
420
421 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
422 bool enable, bool do_write)
423 {
424 struct sigmatel_spec *spec = codec->spec;
425 unsigned int idx, val;
426
427 for (idx = 0; idx < spec->num_pwrs; idx++) {
428 if (spec->pwr_nids[idx] == nid)
429 break;
430 }
431 if (idx >= spec->num_pwrs)
432 return;
433
434 idx = 1 << idx;
435
436 val = spec->power_map_bits;
437 if (enable)
438 val &= ~idx;
439 else
440 val |= idx;
441
442 /* power down unused output ports */
443 if (val != spec->power_map_bits) {
444 spec->power_map_bits = val;
445 if (do_write)
446 snd_hda_codec_write(codec, codec->afg, 0,
447 AC_VERB_IDT_SET_POWER_MAP, val);
448 }
449 }
450
451 /* update power bit per jack plug/unplug */
452 static void jack_update_power(struct hda_codec *codec,
453 struct hda_jack_tbl *jack)
454 {
455 struct sigmatel_spec *spec = codec->spec;
456 int i;
457
458 if (!spec->num_pwrs)
459 return;
460
461 if (jack && jack->nid) {
462 stac_toggle_power_map(codec, jack->nid,
463 snd_hda_jack_detect(codec, jack->nid),
464 true);
465 return;
466 }
467
468 /* update all jacks */
469 for (i = 0; i < spec->num_pwrs; i++) {
470 hda_nid_t nid = spec->pwr_nids[i];
471 jack = snd_hda_jack_tbl_get(codec, nid);
472 if (!jack || !jack->action)
473 continue;
474 if (jack->action == STAC_PWR_EVENT ||
475 jack->action <= HDA_GEN_LAST_EVENT)
476 stac_toggle_power_map(codec, nid,
477 snd_hda_jack_detect(codec, nid),
478 false);
479 }
480
481 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
482 spec->power_map_bits);
483 }
484
485 static void stac_hp_automute(struct hda_codec *codec,
486 struct hda_jack_tbl *jack)
487 {
488 snd_hda_gen_hp_automute(codec, jack);
489 jack_update_power(codec, jack);
490 }
491
492 static void stac_line_automute(struct hda_codec *codec,
493 struct hda_jack_tbl *jack)
494 {
495 snd_hda_gen_line_automute(codec, jack);
496 jack_update_power(codec, jack);
497 }
498
499 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
500 {
501 unsigned int data;
502
503 data = snd_hda_codec_read(codec, codec->afg, 0,
504 AC_VERB_GET_GPIO_DATA, 0);
505 /* toggle VREF state based on GPIOx status */
506 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
507 !!(data & (1 << event->private_data)));
508 }
509
510 /* initialize the power map and enable the power event to jacks that
511 * haven't been assigned to automute
512 */
513 static void stac_init_power_map(struct hda_codec *codec)
514 {
515 struct sigmatel_spec *spec = codec->spec;
516 int i;
517
518 for (i = 0; i < spec->num_pwrs; i++) {
519 hda_nid_t nid = spec->pwr_nids[i];
520 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
521 def_conf = get_defcfg_connect(def_conf);
522 if (snd_hda_jack_tbl_get(codec, nid))
523 continue;
524 if (def_conf == AC_JACK_PORT_COMPLEX &&
525 !(spec->vref_mute_led_nid == nid ||
526 is_jack_detectable(codec, nid))) {
527 snd_hda_jack_detect_enable_callback(codec, nid,
528 STAC_PWR_EVENT,
529 jack_update_power);
530 } else {
531 if (def_conf == AC_JACK_PORT_NONE)
532 stac_toggle_power_map(codec, nid, false, false);
533 else
534 stac_toggle_power_map(codec, nid, true, false);
535 }
536 }
537 }
538
539 /*
540 */
541
542 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
543 int *valp)
544 {
545 return !snd_hda_get_int_hint(codec, key, valp);
546 }
547
548 /* override some hints from the hwdep entry */
549 static void stac_store_hints(struct hda_codec *codec)
550 {
551 struct sigmatel_spec *spec = codec->spec;
552 int val;
553
554 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
555 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
556 spec->gpio_mask;
557 }
558 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
559 spec->gpio_mask &= spec->gpio_mask;
560 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
561 spec->gpio_dir &= spec->gpio_mask;
562 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
563 spec->eapd_mask &= spec->gpio_mask;
564 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
565 spec->gpio_mute &= spec->gpio_mask;
566 val = snd_hda_get_bool_hint(codec, "eapd_switch");
567 if (val >= 0)
568 spec->eapd_switch = val;
569 }
570
571 /*
572 * loopback controls
573 */
574
575 #define stac_aloopback_info snd_ctl_boolean_mono_info
576
577 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
578 struct snd_ctl_elem_value *ucontrol)
579 {
580 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
581 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
582 struct sigmatel_spec *spec = codec->spec;
583
584 ucontrol->value.integer.value[0] = !!(spec->aloopback &
585 (spec->aloopback_mask << idx));
586 return 0;
587 }
588
589 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
590 struct snd_ctl_elem_value *ucontrol)
591 {
592 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
593 struct sigmatel_spec *spec = codec->spec;
594 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
595 unsigned int dac_mode;
596 unsigned int val, idx_val;
597
598 idx_val = spec->aloopback_mask << idx;
599 if (ucontrol->value.integer.value[0])
600 val = spec->aloopback | idx_val;
601 else
602 val = spec->aloopback & ~idx_val;
603 if (spec->aloopback == val)
604 return 0;
605
606 spec->aloopback = val;
607
608 /* Only return the bits defined by the shift value of the
609 * first two bytes of the mask
610 */
611 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
612 kcontrol->private_value & 0xFFFF, 0x0);
613 dac_mode >>= spec->aloopback_shift;
614
615 if (spec->aloopback & idx_val) {
616 snd_hda_power_up(codec);
617 dac_mode |= idx_val;
618 } else {
619 snd_hda_power_down(codec);
620 dac_mode &= ~idx_val;
621 }
622
623 snd_hda_codec_write_cache(codec, codec->afg, 0,
624 kcontrol->private_value >> 16, dac_mode);
625
626 return 1;
627 }
628
629 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
630 { \
631 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
632 .name = "Analog Loopback", \
633 .count = cnt, \
634 .info = stac_aloopback_info, \
635 .get = stac_aloopback_get, \
636 .put = stac_aloopback_put, \
637 .private_value = verb_read | (verb_write << 16), \
638 }
639
640 /*
641 * Mute LED handling on HP laptops
642 */
643
644 /* check whether it's a HP laptop with a docking port */
645 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
646 {
647 if (codec->vendor_id != 0x111d7605 &&
648 codec->vendor_id != 0x111d76d1)
649 return false;
650
651 switch (codec->subsystem_id) {
652 case 0x103c1618:
653 case 0x103c1619:
654 case 0x103c161a:
655 case 0x103c161b:
656 case 0x103c161c:
657 case 0x103c161d:
658 case 0x103c161e:
659 case 0x103c161f:
660
661 case 0x103c162a:
662 case 0x103c162b:
663
664 case 0x103c1630:
665 case 0x103c1631:
666
667 case 0x103c1633:
668 case 0x103c1634:
669 case 0x103c1635:
670
671 case 0x103c3587:
672 case 0x103c3588:
673 case 0x103c3589:
674 case 0x103c358a:
675
676 case 0x103c3667:
677 case 0x103c3668:
678 case 0x103c3669:
679
680 return true;
681 }
682 return false;
683 }
684
685 static bool hp_blike_system(u32 subsystem_id)
686 {
687 switch (subsystem_id) {
688 case 0x103c1520:
689 case 0x103c1521:
690 case 0x103c1523:
691 case 0x103c1524:
692 case 0x103c1525:
693 case 0x103c1722:
694 case 0x103c1723:
695 case 0x103c1724:
696 case 0x103c1725:
697 case 0x103c1726:
698 case 0x103c1727:
699 case 0x103c1728:
700 case 0x103c1729:
701 case 0x103c172a:
702 case 0x103c172b:
703 case 0x103c307e:
704 case 0x103c307f:
705 case 0x103c3080:
706 case 0x103c3081:
707 case 0x103c7007:
708 case 0x103c7008:
709 return true;
710 }
711 return false;
712 }
713
714 static void set_hp_led_gpio(struct hda_codec *codec)
715 {
716 struct sigmatel_spec *spec = codec->spec;
717 unsigned int gpio;
718
719 if (spec->gpio_led)
720 return;
721
722 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
723 gpio &= AC_GPIO_IO_COUNT;
724 if (gpio > 3)
725 spec->gpio_led = 0x08; /* GPIO 3 */
726 else
727 spec->gpio_led = 0x01; /* GPIO 0 */
728 }
729
730 /*
731 * This method searches for the mute LED GPIO configuration
732 * provided as OEM string in SMBIOS. The format of that string
733 * is HP_Mute_LED_P_G or HP_Mute_LED_P
734 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
735 * that corresponds to the NOT muted state of the master volume
736 * and G is the index of the GPIO to use as the mute LED control (0..9)
737 * If _G portion is missing it is assigned based on the codec ID
738 *
739 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
740 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
741 *
742 *
743 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
744 * SMBIOS - at least the ones I have seen do not have them - which include
745 * my own system (HP Pavilion dv6-1110ax) and my cousin's
746 * HP Pavilion dv9500t CTO.
747 * Need more information on whether it is true across the entire series.
748 * -- kunal
749 */
750 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
751 {
752 struct sigmatel_spec *spec = codec->spec;
753 const struct dmi_device *dev = NULL;
754
755 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
756 get_int_hint(codec, "gpio_led_polarity",
757 &spec->gpio_led_polarity);
758 return 1;
759 }
760
761 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
762 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
763 &spec->gpio_led_polarity,
764 &spec->gpio_led) == 2) {
765 unsigned int max_gpio;
766 max_gpio = snd_hda_param_read(codec, codec->afg,
767 AC_PAR_GPIO_CAP);
768 max_gpio &= AC_GPIO_IO_COUNT;
769 if (spec->gpio_led < max_gpio)
770 spec->gpio_led = 1 << spec->gpio_led;
771 else
772 spec->vref_mute_led_nid = spec->gpio_led;
773 return 1;
774 }
775 if (sscanf(dev->name, "HP_Mute_LED_%d",
776 &spec->gpio_led_polarity) == 1) {
777 set_hp_led_gpio(codec);
778 return 1;
779 }
780 /* BIOS bug: unfilled OEM string */
781 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
782 set_hp_led_gpio(codec);
783 if (default_polarity >= 0)
784 spec->gpio_led_polarity = default_polarity;
785 else
786 spec->gpio_led_polarity = 1;
787 return 1;
788 }
789 }
790
791 /*
792 * Fallback case - if we don't find the DMI strings,
793 * we statically set the GPIO - if not a B-series system
794 * and default polarity is provided
795 */
796 if (!hp_blike_system(codec->subsystem_id) &&
797 (default_polarity == 0 || default_polarity == 1)) {
798 set_hp_led_gpio(codec);
799 spec->gpio_led_polarity = default_polarity;
800 return 1;
801 }
802 return 0;
803 }
804
805 /*
806 * PC beep controls
807 */
808
809 /* create PC beep volume controls */
810 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
811 hda_nid_t nid)
812 {
813 struct sigmatel_spec *spec = codec->spec;
814 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
815 struct snd_kcontrol_new *knew;
816 static struct snd_kcontrol_new abeep_mute_ctl =
817 HDA_CODEC_MUTE(NULL, 0, 0, 0);
818 static struct snd_kcontrol_new dbeep_mute_ctl =
819 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
820 static struct snd_kcontrol_new beep_vol_ctl =
821 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
822
823 /* check for mute support for the the amp */
824 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
825 const struct snd_kcontrol_new *temp;
826 if (spec->anabeep_nid == nid)
827 temp = &abeep_mute_ctl;
828 else
829 temp = &dbeep_mute_ctl;
830 knew = snd_hda_gen_add_kctl(&spec->gen,
831 "Beep Playback Switch", temp);
832 if (!knew)
833 return -ENOMEM;
834 knew->private_value =
835 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
836 }
837
838 /* check to see if there is volume support for the amp */
839 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
840 knew = snd_hda_gen_add_kctl(&spec->gen,
841 "Beep Playback Volume",
842 &beep_vol_ctl);
843 if (!knew)
844 return -ENOMEM;
845 knew->private_value =
846 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
847 }
848 return 0;
849 }
850
851 #ifdef CONFIG_SND_HDA_INPUT_BEEP
852 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
853
854 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
855 struct snd_ctl_elem_value *ucontrol)
856 {
857 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
858 ucontrol->value.integer.value[0] = codec->beep->enabled;
859 return 0;
860 }
861
862 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
863 struct snd_ctl_elem_value *ucontrol)
864 {
865 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
866 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
867 }
868
869 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
870 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
871 .name = "Beep Playback Switch",
872 .info = stac_dig_beep_switch_info,
873 .get = stac_dig_beep_switch_get,
874 .put = stac_dig_beep_switch_put,
875 };
876
877 static int stac_beep_switch_ctl(struct hda_codec *codec)
878 {
879 struct sigmatel_spec *spec = codec->spec;
880
881 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
882 return -ENOMEM;
883 return 0;
884 }
885 #endif
886
887 /*
888 */
889
890 static const struct hda_verb stac9200_core_init[] = {
891 /* set dac0mux for dac converter */
892 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
893 {}
894 };
895
896 static const struct hda_verb stac9200_eapd_init[] = {
897 /* set dac0mux for dac converter */
898 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
899 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
900 {}
901 };
902
903 static const struct hda_verb dell_eq_core_init[] = {
904 /* set master volume to max value without distortion
905 * and direct control */
906 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
907 {}
908 };
909
910 static const struct hda_verb stac92hd73xx_core_init[] = {
911 /* set master volume and direct control */
912 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
913 {}
914 };
915
916 static const struct hda_verb stac92hd83xxx_core_init[] = {
917 /* power state controls amps */
918 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
919 {}
920 };
921
922 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
923 { 0x22, 0x785, 0x43 },
924 { 0x22, 0x782, 0xe0 },
925 { 0x22, 0x795, 0x00 },
926 {}
927 };
928
929 static const struct hda_verb stac92hd71bxx_core_init[] = {
930 /* set master volume and direct control */
931 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
932 {}
933 };
934
935 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
936 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
937 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
938 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
939 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
940 {}
941 };
942
943 static const struct hda_verb stac925x_core_init[] = {
944 /* set dac0mux for dac converter */
945 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
946 /* mute the master volume */
947 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
948 {}
949 };
950
951 static const struct hda_verb stac922x_core_init[] = {
952 /* set master volume and direct control */
953 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
954 {}
955 };
956
957 static const struct hda_verb d965_core_init[] = {
958 /* unmute node 0x1b */
959 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
960 /* select node 0x03 as DAC */
961 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
962 {}
963 };
964
965 static const struct hda_verb dell_3st_core_init[] = {
966 /* don't set delta bit */
967 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
968 /* unmute node 0x1b */
969 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
970 /* select node 0x03 as DAC */
971 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
972 {}
973 };
974
975 static const struct hda_verb stac927x_core_init[] = {
976 /* set master volume and direct control */
977 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
978 /* enable analog pc beep path */
979 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
980 {}
981 };
982
983 static const struct hda_verb stac927x_volknob_core_init[] = {
984 /* don't set delta bit */
985 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
986 /* enable analog pc beep path */
987 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
988 {}
989 };
990
991 static const struct hda_verb stac9205_core_init[] = {
992 /* set master volume and direct control */
993 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
994 /* enable analog pc beep path */
995 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
996 {}
997 };
998
999 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1000 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1001
1002 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1003 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1004
1005 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1006 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1007
1008 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1009 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1010
1011 static const struct snd_kcontrol_new stac9205_loopback =
1012 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1013
1014 static const struct snd_kcontrol_new stac927x_loopback =
1015 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1016
1017 static const struct hda_pintbl ref9200_pin_configs[] = {
1018 { 0x08, 0x01c47010 },
1019 { 0x09, 0x01447010 },
1020 { 0x0d, 0x0221401f },
1021 { 0x0e, 0x01114010 },
1022 { 0x0f, 0x02a19020 },
1023 { 0x10, 0x01a19021 },
1024 { 0x11, 0x90100140 },
1025 { 0x12, 0x01813122 },
1026 {}
1027 };
1028
1029 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1030 { 0x08, 0x400000fe },
1031 { 0x09, 0x404500f4 },
1032 { 0x0d, 0x400100f0 },
1033 { 0x0e, 0x90110010 },
1034 { 0x0f, 0x400100f1 },
1035 { 0x10, 0x02a1902e },
1036 { 0x11, 0x500000f2 },
1037 { 0x12, 0x500000f3 },
1038 {}
1039 };
1040
1041 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1042 { 0x08, 0x400000fe },
1043 { 0x09, 0x404500f4 },
1044 { 0x0d, 0x400100f0 },
1045 { 0x0e, 0x90110010 },
1046 { 0x0f, 0x400100f1 },
1047 { 0x10, 0x02a1902e },
1048 { 0x11, 0x500000f2 },
1049 { 0x12, 0x500000f3 },
1050 {}
1051 };
1052
1053 /*
1054 STAC 9200 pin configs for
1055 102801A8
1056 102801DE
1057 102801E8
1058 */
1059 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1060 { 0x08, 0x400001f0 },
1061 { 0x09, 0x400001f1 },
1062 { 0x0d, 0x02214030 },
1063 { 0x0e, 0x01014010 },
1064 { 0x0f, 0x02a19020 },
1065 { 0x10, 0x01a19021 },
1066 { 0x11, 0x90100140 },
1067 { 0x12, 0x01813122 },
1068 {}
1069 };
1070
1071 /*
1072 STAC 9200 pin configs for
1073 102801C0
1074 102801C1
1075 */
1076 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1077 { 0x08, 0x400001f0 },
1078 { 0x09, 0x400001f1 },
1079 { 0x0d, 0x0221401f },
1080 { 0x0e, 0x01014010 },
1081 { 0x0f, 0x01813020 },
1082 { 0x10, 0x02a19021 },
1083 { 0x11, 0x90100140 },
1084 { 0x12, 0x400001f2 },
1085 {}
1086 };
1087
1088 /*
1089 STAC 9200 pin configs for
1090 102801C4 (Dell Dimension E310)
1091 102801C5
1092 102801C7
1093 102801D9
1094 102801DA
1095 102801E3
1096 */
1097 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1098 { 0x08, 0x400001f0 },
1099 { 0x09, 0x400001f1 },
1100 { 0x0d, 0x0221401f },
1101 { 0x0e, 0x01014010 },
1102 { 0x0f, 0x01813020 },
1103 { 0x10, 0x01a19021 },
1104 { 0x11, 0x90100140 },
1105 { 0x12, 0x400001f2 },
1106 {}
1107 };
1108
1109
1110 /*
1111 STAC 9200-32 pin configs for
1112 102801B5 (Dell Inspiron 630m)
1113 102801D8 (Dell Inspiron 640m)
1114 */
1115 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1116 { 0x08, 0x40c003fa },
1117 { 0x09, 0x03441340 },
1118 { 0x0d, 0x0321121f },
1119 { 0x0e, 0x90170310 },
1120 { 0x0f, 0x408003fb },
1121 { 0x10, 0x03a11020 },
1122 { 0x11, 0x401003fc },
1123 { 0x12, 0x403003fd },
1124 {}
1125 };
1126
1127 /*
1128 STAC 9200-32 pin configs for
1129 102801C2 (Dell Latitude D620)
1130 102801C8
1131 102801CC (Dell Latitude D820)
1132 102801D4
1133 102801D6
1134 */
1135 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1136 { 0x08, 0x40c003fa },
1137 { 0x09, 0x0144131f },
1138 { 0x0d, 0x0321121f },
1139 { 0x0e, 0x90170310 },
1140 { 0x0f, 0x90a70321 },
1141 { 0x10, 0x03a11020 },
1142 { 0x11, 0x401003fb },
1143 { 0x12, 0x40f000fc },
1144 {}
1145 };
1146
1147 /*
1148 STAC 9200-32 pin configs for
1149 102801CE (Dell XPS M1710)
1150 102801CF (Dell Precision M90)
1151 */
1152 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1153 { 0x08, 0x40c003fa },
1154 { 0x09, 0x01441340 },
1155 { 0x0d, 0x0421421f },
1156 { 0x0e, 0x90170310 },
1157 { 0x0f, 0x408003fb },
1158 { 0x10, 0x04a1102e },
1159 { 0x11, 0x90170311 },
1160 { 0x12, 0x403003fc },
1161 {}
1162 };
1163
1164 /*
1165 STAC 9200-32 pin configs for
1166 102801C9
1167 102801CA
1168 102801CB (Dell Latitude 120L)
1169 102801D3
1170 */
1171 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1172 { 0x08, 0x40c003fa },
1173 { 0x09, 0x404003fb },
1174 { 0x0d, 0x0321121f },
1175 { 0x0e, 0x90170310 },
1176 { 0x0f, 0x408003fc },
1177 { 0x10, 0x03a11020 },
1178 { 0x11, 0x401003fd },
1179 { 0x12, 0x403003fe },
1180 {}
1181 };
1182
1183 /*
1184 STAC 9200-32 pin configs for
1185 102801BD (Dell Inspiron E1505n)
1186 102801EE
1187 102801EF
1188 */
1189 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1190 { 0x08, 0x40c003fa },
1191 { 0x09, 0x01441340 },
1192 { 0x0d, 0x0421121f },
1193 { 0x0e, 0x90170310 },
1194 { 0x0f, 0x408003fb },
1195 { 0x10, 0x04a11020 },
1196 { 0x11, 0x401003fc },
1197 { 0x12, 0x403003fd },
1198 {}
1199 };
1200
1201 /*
1202 STAC 9200-32 pin configs for
1203 102801F5 (Dell Inspiron 1501)
1204 102801F6
1205 */
1206 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1207 { 0x08, 0x40c003fa },
1208 { 0x09, 0x404003fb },
1209 { 0x0d, 0x0421121f },
1210 { 0x0e, 0x90170310 },
1211 { 0x0f, 0x408003fc },
1212 { 0x10, 0x04a11020 },
1213 { 0x11, 0x401003fd },
1214 { 0x12, 0x403003fe },
1215 {}
1216 };
1217
1218 /*
1219 STAC 9200-32
1220 102801CD (Dell Inspiron E1705/9400)
1221 */
1222 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1223 { 0x08, 0x40c003fa },
1224 { 0x09, 0x01441340 },
1225 { 0x0d, 0x0421121f },
1226 { 0x0e, 0x90170310 },
1227 { 0x0f, 0x90170310 },
1228 { 0x10, 0x04a11020 },
1229 { 0x11, 0x90170310 },
1230 { 0x12, 0x40f003fc },
1231 {}
1232 };
1233
1234 static const struct hda_pintbl oqo9200_pin_configs[] = {
1235 { 0x08, 0x40c000f0 },
1236 { 0x09, 0x404000f1 },
1237 { 0x0d, 0x0221121f },
1238 { 0x0e, 0x02211210 },
1239 { 0x0f, 0x90170111 },
1240 { 0x10, 0x90a70120 },
1241 { 0x11, 0x400000f2 },
1242 { 0x12, 0x400000f3 },
1243 {}
1244 };
1245
1246
1247 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1248 const struct hda_fixup *fix, int action)
1249 {
1250 struct sigmatel_spec *spec = codec->spec;
1251
1252 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1253 spec->gpio_mask = spec->gpio_dir = 0x09;
1254 spec->gpio_data = 0x00;
1255 /* CF-74 has no headphone detection, and the driver should *NOT*
1256 * do detection and HP/speaker toggle because the hardware does it.
1257 */
1258 spec->gen.suppress_auto_mute = 1;
1259 }
1260 }
1261
1262
1263 static const struct hda_fixup stac9200_fixups[] = {
1264 [STAC_REF] = {
1265 .type = HDA_FIXUP_PINS,
1266 .v.pins = ref9200_pin_configs,
1267 },
1268 [STAC_9200_OQO] = {
1269 .type = HDA_FIXUP_PINS,
1270 .v.pins = oqo9200_pin_configs,
1271 .chained = true,
1272 .chain_id = STAC_9200_EAPD_INIT,
1273 },
1274 [STAC_9200_DELL_D21] = {
1275 .type = HDA_FIXUP_PINS,
1276 .v.pins = dell9200_d21_pin_configs,
1277 },
1278 [STAC_9200_DELL_D22] = {
1279 .type = HDA_FIXUP_PINS,
1280 .v.pins = dell9200_d22_pin_configs,
1281 },
1282 [STAC_9200_DELL_D23] = {
1283 .type = HDA_FIXUP_PINS,
1284 .v.pins = dell9200_d23_pin_configs,
1285 },
1286 [STAC_9200_DELL_M21] = {
1287 .type = HDA_FIXUP_PINS,
1288 .v.pins = dell9200_m21_pin_configs,
1289 },
1290 [STAC_9200_DELL_M22] = {
1291 .type = HDA_FIXUP_PINS,
1292 .v.pins = dell9200_m22_pin_configs,
1293 },
1294 [STAC_9200_DELL_M23] = {
1295 .type = HDA_FIXUP_PINS,
1296 .v.pins = dell9200_m23_pin_configs,
1297 },
1298 [STAC_9200_DELL_M24] = {
1299 .type = HDA_FIXUP_PINS,
1300 .v.pins = dell9200_m24_pin_configs,
1301 },
1302 [STAC_9200_DELL_M25] = {
1303 .type = HDA_FIXUP_PINS,
1304 .v.pins = dell9200_m25_pin_configs,
1305 },
1306 [STAC_9200_DELL_M26] = {
1307 .type = HDA_FIXUP_PINS,
1308 .v.pins = dell9200_m26_pin_configs,
1309 },
1310 [STAC_9200_DELL_M27] = {
1311 .type = HDA_FIXUP_PINS,
1312 .v.pins = dell9200_m27_pin_configs,
1313 },
1314 [STAC_9200_M4] = {
1315 .type = HDA_FIXUP_PINS,
1316 .v.pins = gateway9200_m4_pin_configs,
1317 .chained = true,
1318 .chain_id = STAC_9200_EAPD_INIT,
1319 },
1320 [STAC_9200_M4_2] = {
1321 .type = HDA_FIXUP_PINS,
1322 .v.pins = gateway9200_m4_2_pin_configs,
1323 .chained = true,
1324 .chain_id = STAC_9200_EAPD_INIT,
1325 },
1326 [STAC_9200_PANASONIC] = {
1327 .type = HDA_FIXUP_FUNC,
1328 .v.func = stac9200_fixup_panasonic,
1329 },
1330 [STAC_9200_EAPD_INIT] = {
1331 .type = HDA_FIXUP_VERBS,
1332 .v.verbs = (const struct hda_verb[]) {
1333 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1334 {}
1335 },
1336 },
1337 };
1338
1339 static const struct hda_model_fixup stac9200_models[] = {
1340 { .id = STAC_REF, .name = "ref" },
1341 { .id = STAC_9200_OQO, .name = "oqo" },
1342 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1343 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1344 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1345 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1346 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1347 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1348 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1349 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1350 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1351 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1352 { .id = STAC_9200_M4, .name = "gateway-m4" },
1353 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1354 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1355 {}
1356 };
1357
1358 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1359 /* SigmaTel reference board */
1360 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1361 "DFI LanParty", STAC_REF),
1362 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1363 "DFI LanParty", STAC_REF),
1364 /* Dell laptops have BIOS problem */
1365 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1366 "unknown Dell", STAC_9200_DELL_D21),
1367 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1368 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1369 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1370 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1371 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1372 "unknown Dell", STAC_9200_DELL_D22),
1373 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1374 "unknown Dell", STAC_9200_DELL_D22),
1375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1376 "Dell Latitude D620", STAC_9200_DELL_M22),
1377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1378 "unknown Dell", STAC_9200_DELL_D23),
1379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1380 "unknown Dell", STAC_9200_DELL_D23),
1381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1382 "unknown Dell", STAC_9200_DELL_M22),
1383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1384 "unknown Dell", STAC_9200_DELL_M24),
1385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1386 "unknown Dell", STAC_9200_DELL_M24),
1387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1388 "Dell Latitude 120L", STAC_9200_DELL_M24),
1389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1390 "Dell Latitude D820", STAC_9200_DELL_M22),
1391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1392 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1394 "Dell XPS M1710", STAC_9200_DELL_M23),
1395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1396 "Dell Precision M90", STAC_9200_DELL_M23),
1397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1398 "unknown Dell", STAC_9200_DELL_M22),
1399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1400 "unknown Dell", STAC_9200_DELL_M22),
1401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1402 "unknown Dell", STAC_9200_DELL_M22),
1403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1404 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1405 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1406 "unknown Dell", STAC_9200_DELL_D23),
1407 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1408 "unknown Dell", STAC_9200_DELL_D23),
1409 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1410 "unknown Dell", STAC_9200_DELL_D21),
1411 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1412 "unknown Dell", STAC_9200_DELL_D23),
1413 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1414 "unknown Dell", STAC_9200_DELL_D21),
1415 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1416 "unknown Dell", STAC_9200_DELL_M25),
1417 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1418 "unknown Dell", STAC_9200_DELL_M25),
1419 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1420 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1421 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1422 "unknown Dell", STAC_9200_DELL_M26),
1423 /* Panasonic */
1424 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1425 /* Gateway machines needs EAPD to be set on resume */
1426 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1427 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1428 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1429 /* OQO Mobile */
1430 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1431 {} /* terminator */
1432 };
1433
1434 static const struct hda_pintbl ref925x_pin_configs[] = {
1435 { 0x07, 0x40c003f0 },
1436 { 0x08, 0x424503f2 },
1437 { 0x0a, 0x01813022 },
1438 { 0x0b, 0x02a19021 },
1439 { 0x0c, 0x90a70320 },
1440 { 0x0d, 0x02214210 },
1441 { 0x10, 0x01019020 },
1442 { 0x11, 0x9033032e },
1443 {}
1444 };
1445
1446 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1447 { 0x07, 0x40c003f4 },
1448 { 0x08, 0x424503f2 },
1449 { 0x0a, 0x400000f3 },
1450 { 0x0b, 0x02a19020 },
1451 { 0x0c, 0x40a000f0 },
1452 { 0x0d, 0x90100210 },
1453 { 0x10, 0x400003f1 },
1454 { 0x11, 0x9033032e },
1455 {}
1456 };
1457
1458 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1459 { 0x07, 0x40c003f4 },
1460 { 0x08, 0x424503f2 },
1461 { 0x0a, 0x400000f3 },
1462 { 0x0b, 0x02a19020 },
1463 { 0x0c, 0x40a000f0 },
1464 { 0x0d, 0x90100210 },
1465 { 0x10, 0x400003f1 },
1466 { 0x11, 0x9033032e },
1467 {}
1468 };
1469
1470 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1471 { 0x07, 0x40c003f4 },
1472 { 0x08, 0x424503f2 },
1473 { 0x0a, 0x400000f3 },
1474 { 0x0b, 0x02a19020 },
1475 { 0x0c, 0x40a000f0 },
1476 { 0x0d, 0x90100210 },
1477 { 0x10, 0x400003f1 },
1478 { 0x11, 0x9033032e },
1479 {}
1480 };
1481
1482 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1483 { 0x07, 0x40c003f4 },
1484 { 0x08, 0x424503f2 },
1485 { 0x0a, 0x400000f3 },
1486 { 0x0b, 0x02a19020 },
1487 { 0x0c, 0x40a000f0 },
1488 { 0x0d, 0x90100210 },
1489 { 0x10, 0x400003f1 },
1490 { 0x11, 0x9033032e },
1491 {}
1492 };
1493
1494 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1495 { 0x07, 0x40c003f4 },
1496 { 0x08, 0x424503f2 },
1497 { 0x0a, 0x400000f3 },
1498 { 0x0b, 0x02a19020 },
1499 { 0x0c, 0x40a000f0 },
1500 { 0x0d, 0x90100210 },
1501 { 0x10, 0x400003f1 },
1502 { 0x11, 0x503303f3 },
1503 {}
1504 };
1505
1506 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1507 { 0x07, 0x40c003f4 },
1508 { 0x08, 0x424503f2 },
1509 { 0x0a, 0x400000f3 },
1510 { 0x0b, 0x02a19020 },
1511 { 0x0c, 0x40a000f0 },
1512 { 0x0d, 0x90100210 },
1513 { 0x10, 0x400003f1 },
1514 { 0x11, 0x9033032e },
1515 {}
1516 };
1517
1518 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1519 { 0x07, 0x40c003f4 },
1520 { 0x08, 0x424503f2 },
1521 { 0x0a, 0x400000f3 },
1522 { 0x0b, 0x02a19020 },
1523 { 0x0c, 0x40a000f0 },
1524 { 0x0d, 0x90100210 },
1525 { 0x10, 0x400003f1 },
1526 { 0x11, 0x90330320 },
1527 {}
1528 };
1529
1530 static const struct hda_fixup stac925x_fixups[] = {
1531 [STAC_REF] = {
1532 .type = HDA_FIXUP_PINS,
1533 .v.pins = ref925x_pin_configs,
1534 },
1535 [STAC_M1] = {
1536 .type = HDA_FIXUP_PINS,
1537 .v.pins = stac925xM1_pin_configs,
1538 },
1539 [STAC_M1_2] = {
1540 .type = HDA_FIXUP_PINS,
1541 .v.pins = stac925xM1_2_pin_configs,
1542 },
1543 [STAC_M2] = {
1544 .type = HDA_FIXUP_PINS,
1545 .v.pins = stac925xM2_pin_configs,
1546 },
1547 [STAC_M2_2] = {
1548 .type = HDA_FIXUP_PINS,
1549 .v.pins = stac925xM2_2_pin_configs,
1550 },
1551 [STAC_M3] = {
1552 .type = HDA_FIXUP_PINS,
1553 .v.pins = stac925xM3_pin_configs,
1554 },
1555 [STAC_M5] = {
1556 .type = HDA_FIXUP_PINS,
1557 .v.pins = stac925xM5_pin_configs,
1558 },
1559 [STAC_M6] = {
1560 .type = HDA_FIXUP_PINS,
1561 .v.pins = stac925xM6_pin_configs,
1562 },
1563 };
1564
1565 static const struct hda_model_fixup stac925x_models[] = {
1566 { .id = STAC_REF, .name = "ref" },
1567 { .id = STAC_M1, .name = "m1" },
1568 { .id = STAC_M1_2, .name = "m1-2" },
1569 { .id = STAC_M2, .name = "m2" },
1570 { .id = STAC_M2_2, .name = "m2-2" },
1571 { .id = STAC_M3, .name = "m3" },
1572 { .id = STAC_M5, .name = "m5" },
1573 { .id = STAC_M6, .name = "m6" },
1574 {}
1575 };
1576
1577 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1578 /* SigmaTel reference board */
1579 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1580 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1581 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1582
1583 /* Default table for unknown ID */
1584 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1585
1586 /* gateway machines are checked via codec ssid */
1587 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1588 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1589 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1590 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1591 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1592 /* Not sure about the brand name for those */
1593 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1594 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1595 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1596 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1597 {} /* terminator */
1598 };
1599
1600 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1601 { 0x0a, 0x02214030 },
1602 { 0x0b, 0x02a19040 },
1603 { 0x0c, 0x01a19020 },
1604 { 0x0d, 0x02214030 },
1605 { 0x0e, 0x0181302e },
1606 { 0x0f, 0x01014010 },
1607 { 0x10, 0x01014020 },
1608 { 0x11, 0x01014030 },
1609 { 0x12, 0x02319040 },
1610 { 0x13, 0x90a000f0 },
1611 { 0x14, 0x90a000f0 },
1612 { 0x22, 0x01452050 },
1613 { 0x23, 0x01452050 },
1614 {}
1615 };
1616
1617 static const struct hda_pintbl dell_m6_pin_configs[] = {
1618 { 0x0a, 0x0321101f },
1619 { 0x0b, 0x4f00000f },
1620 { 0x0c, 0x4f0000f0 },
1621 { 0x0d, 0x90170110 },
1622 { 0x0e, 0x03a11020 },
1623 { 0x0f, 0x0321101f },
1624 { 0x10, 0x4f0000f0 },
1625 { 0x11, 0x4f0000f0 },
1626 { 0x12, 0x4f0000f0 },
1627 { 0x13, 0x90a60160 },
1628 { 0x14, 0x4f0000f0 },
1629 { 0x22, 0x4f0000f0 },
1630 { 0x23, 0x4f0000f0 },
1631 {}
1632 };
1633
1634 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1635 { 0x0a, 0x0321101f },
1636 { 0x0b, 0x0321101f },
1637 { 0x0c, 0x03a11020 },
1638 { 0x0d, 0x03014020 },
1639 { 0x0e, 0x90170110 },
1640 { 0x0f, 0x4f0000f0 },
1641 { 0x10, 0x4f0000f0 },
1642 { 0x11, 0x4f0000f0 },
1643 { 0x12, 0x4f0000f0 },
1644 { 0x13, 0x90a60160 },
1645 { 0x14, 0x4f0000f0 },
1646 { 0x22, 0x4f0000f0 },
1647 { 0x23, 0x904601b0 },
1648 {}
1649 };
1650
1651 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1652 { 0x0a, 0x02214230 },
1653 { 0x0b, 0x02A19240 },
1654 { 0x0c, 0x01013214 },
1655 { 0x0d, 0x01014210 },
1656 { 0x0e, 0x01A19250 },
1657 { 0x0f, 0x01011212 },
1658 { 0x10, 0x01016211 },
1659 {}
1660 };
1661
1662 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1663 const struct hda_fixup *fix, int action)
1664 {
1665 struct sigmatel_spec *spec = codec->spec;
1666
1667 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1668 return;
1669
1670 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1671 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1672 }
1673
1674 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1675 {
1676 struct sigmatel_spec *spec = codec->spec;
1677
1678 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1679 spec->eapd_switch = 0;
1680 }
1681
1682 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1683 const struct hda_fixup *fix, int action)
1684 {
1685 struct sigmatel_spec *spec = codec->spec;
1686
1687 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1688 return;
1689
1690 stac92hd73xx_fixup_dell(codec);
1691 snd_hda_add_verbs(codec, dell_eq_core_init);
1692 spec->volknob_init = 1;
1693 }
1694
1695 /* Analog Mics */
1696 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1697 const struct hda_fixup *fix, int action)
1698 {
1699 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1700 return;
1701
1702 stac92hd73xx_fixup_dell(codec);
1703 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1704 }
1705
1706 /* Digital Mics */
1707 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1708 const struct hda_fixup *fix, int action)
1709 {
1710 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1711 return;
1712
1713 stac92hd73xx_fixup_dell(codec);
1714 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1715 }
1716
1717 /* Both */
1718 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1719 const struct hda_fixup *fix, int action)
1720 {
1721 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1722 return;
1723
1724 stac92hd73xx_fixup_dell(codec);
1725 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1726 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1727 }
1728
1729 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1730 const struct hda_fixup *fix, int action)
1731 {
1732 struct sigmatel_spec *spec = codec->spec;
1733
1734 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1735 return;
1736
1737 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1738 spec->eapd_switch = 0;
1739 }
1740
1741 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1742 const struct hda_fixup *fix, int action)
1743 {
1744 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1745 codec->no_jack_detect = 1;
1746 }
1747
1748 static const struct hda_fixup stac92hd73xx_fixups[] = {
1749 [STAC_92HD73XX_REF] = {
1750 .type = HDA_FIXUP_FUNC,
1751 .v.func = stac92hd73xx_fixup_ref,
1752 },
1753 [STAC_DELL_M6_AMIC] = {
1754 .type = HDA_FIXUP_FUNC,
1755 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1756 },
1757 [STAC_DELL_M6_DMIC] = {
1758 .type = HDA_FIXUP_FUNC,
1759 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1760 },
1761 [STAC_DELL_M6_BOTH] = {
1762 .type = HDA_FIXUP_FUNC,
1763 .v.func = stac92hd73xx_fixup_dell_m6_both,
1764 },
1765 [STAC_DELL_EQ] = {
1766 .type = HDA_FIXUP_FUNC,
1767 .v.func = stac92hd73xx_fixup_dell_eq,
1768 },
1769 [STAC_ALIENWARE_M17X] = {
1770 .type = HDA_FIXUP_FUNC,
1771 .v.func = stac92hd73xx_fixup_alienware_m17x,
1772 },
1773 [STAC_92HD73XX_INTEL] = {
1774 .type = HDA_FIXUP_PINS,
1775 .v.pins = intel_dg45id_pin_configs,
1776 },
1777 [STAC_92HD73XX_NO_JD] = {
1778 .type = HDA_FIXUP_FUNC,
1779 .v.func = stac92hd73xx_fixup_no_jd,
1780 }
1781 };
1782
1783 static const struct hda_model_fixup stac92hd73xx_models[] = {
1784 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1785 { .id = STAC_92HD73XX_REF, .name = "ref" },
1786 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1787 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1788 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1789 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1790 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1791 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1792 {}
1793 };
1794
1795 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1796 /* SigmaTel reference board */
1797 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1798 "DFI LanParty", STAC_92HD73XX_REF),
1799 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1800 "DFI LanParty", STAC_92HD73XX_REF),
1801 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1802 "Intel DG45ID", STAC_92HD73XX_INTEL),
1803 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1804 "Intel DG45FC", STAC_92HD73XX_INTEL),
1805 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1806 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1807 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1808 "unknown Dell", STAC_DELL_M6_DMIC),
1809 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1810 "unknown Dell", STAC_DELL_M6_BOTH),
1811 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1812 "unknown Dell", STAC_DELL_M6_BOTH),
1813 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1814 "unknown Dell", STAC_DELL_M6_AMIC),
1815 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1816 "unknown Dell", STAC_DELL_M6_AMIC),
1817 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1818 "unknown Dell", STAC_DELL_M6_DMIC),
1819 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1820 "unknown Dell", STAC_DELL_M6_DMIC),
1821 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1822 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1823 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1824 "Dell Studio 17", STAC_DELL_M6_DMIC),
1825 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1826 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1827 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1828 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1829 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1830 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1831 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1832 "Dell Studio 1558", STAC_DELL_M6_DMIC),
1833 /* codec SSID matching */
1834 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1835 "Alienware M17x", STAC_ALIENWARE_M17X),
1836 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1837 "Alienware M17x", STAC_ALIENWARE_M17X),
1838 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1839 "Alienware M17x R3", STAC_DELL_EQ),
1840 {} /* terminator */
1841 };
1842
1843 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1844 { 0x0a, 0x02214030 },
1845 { 0x0b, 0x02211010 },
1846 { 0x0c, 0x02a19020 },
1847 { 0x0d, 0x02170130 },
1848 { 0x0e, 0x01014050 },
1849 { 0x0f, 0x01819040 },
1850 { 0x10, 0x01014020 },
1851 { 0x11, 0x90a3014e },
1852 { 0x1f, 0x01451160 },
1853 { 0x20, 0x98560170 },
1854 {}
1855 };
1856
1857 static const struct hda_pintbl dell_s14_pin_configs[] = {
1858 { 0x0a, 0x0221403f },
1859 { 0x0b, 0x0221101f },
1860 { 0x0c, 0x02a19020 },
1861 { 0x0d, 0x90170110 },
1862 { 0x0e, 0x40f000f0 },
1863 { 0x0f, 0x40f000f0 },
1864 { 0x10, 0x40f000f0 },
1865 { 0x11, 0x90a60160 },
1866 { 0x1f, 0x40f000f0 },
1867 { 0x20, 0x40f000f0 },
1868 {}
1869 };
1870
1871 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
1872 { 0x0a, 0x02a11020 },
1873 { 0x0b, 0x0221101f },
1874 { 0x0c, 0x400000f0 },
1875 { 0x0d, 0x90170110 },
1876 { 0x0e, 0x400000f1 },
1877 { 0x0f, 0x400000f2 },
1878 { 0x10, 0x400000f3 },
1879 { 0x11, 0x90a60160 },
1880 { 0x1f, 0x400000f4 },
1881 { 0x20, 0x400000f5 },
1882 {}
1883 };
1884
1885 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
1886 { 0x0a, 0x03a12050 },
1887 { 0x0b, 0x0321201f },
1888 { 0x0c, 0x40f000f0 },
1889 { 0x0d, 0x90170110 },
1890 { 0x0e, 0x40f000f0 },
1891 { 0x0f, 0x40f000f0 },
1892 { 0x10, 0x90170110 },
1893 { 0x11, 0xd5a30140 },
1894 { 0x1f, 0x40f000f0 },
1895 { 0x20, 0x40f000f0 },
1896 {}
1897 };
1898
1899 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
1900 { 0x0a, 0x01813050 },
1901 { 0x0b, 0x0421201f },
1902 { 0x0c, 0x04a1205e },
1903 { 0x0d, 0x96130310 },
1904 { 0x0e, 0x96130310 },
1905 { 0x0f, 0x0101401f },
1906 { 0x10, 0x1111611f },
1907 { 0x11, 0xd5a30130 },
1908 {}
1909 };
1910
1911 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
1912 { 0x0a, 0x40f000f0 },
1913 { 0x0b, 0x0221101f },
1914 { 0x0c, 0x02a11020 },
1915 { 0x0d, 0x92170110 },
1916 { 0x0e, 0x40f000f0 },
1917 { 0x0f, 0x92170110 },
1918 { 0x10, 0x40f000f0 },
1919 { 0x11, 0xd5a30130 },
1920 { 0x1f, 0x40f000f0 },
1921 { 0x20, 0x40f000f0 },
1922 {}
1923 };
1924
1925 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
1926 const struct hda_fixup *fix, int action)
1927 {
1928 struct sigmatel_spec *spec = codec->spec;
1929
1930 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1931 return;
1932
1933 if (hp_bnb2011_with_dock(codec)) {
1934 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
1935 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
1936 }
1937
1938 if (find_mute_led_cfg(codec, spec->default_polarity))
1939 snd_printd("mute LED gpio %d polarity %d\n",
1940 spec->gpio_led,
1941 spec->gpio_led_polarity);
1942 }
1943
1944 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
1945 const struct hda_fixup *fix, int action)
1946 {
1947 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1948 return;
1949
1950 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
1951 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
1952 }
1953
1954 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
1955 const struct hda_fixup *fix, int action)
1956 {
1957 struct sigmatel_spec *spec = codec->spec;
1958
1959 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1960 spec->default_polarity = 0;
1961 }
1962
1963 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
1964 const struct hda_fixup *fix, int action)
1965 {
1966 struct sigmatel_spec *spec = codec->spec;
1967
1968 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1969 spec->default_polarity = 1;
1970 }
1971
1972 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
1973 const struct hda_fixup *fix, int action)
1974 {
1975 struct sigmatel_spec *spec = codec->spec;
1976
1977 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1978 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
1979 }
1980
1981 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
1982 const struct hda_fixup *fix, int action)
1983 {
1984 struct sigmatel_spec *spec = codec->spec;
1985
1986 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1987 spec->headset_jack = 1;
1988 }
1989
1990 static const struct hda_fixup stac92hd83xxx_fixups[] = {
1991 [STAC_92HD83XXX_REF] = {
1992 .type = HDA_FIXUP_PINS,
1993 .v.pins = ref92hd83xxx_pin_configs,
1994 },
1995 [STAC_92HD83XXX_PWR_REF] = {
1996 .type = HDA_FIXUP_PINS,
1997 .v.pins = ref92hd83xxx_pin_configs,
1998 },
1999 [STAC_DELL_S14] = {
2000 .type = HDA_FIXUP_PINS,
2001 .v.pins = dell_s14_pin_configs,
2002 },
2003 [STAC_DELL_VOSTRO_3500] = {
2004 .type = HDA_FIXUP_PINS,
2005 .v.pins = dell_vostro_3500_pin_configs,
2006 },
2007 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2008 .type = HDA_FIXUP_PINS,
2009 .v.pins = hp_cNB11_intquad_pin_configs,
2010 .chained = true,
2011 .chain_id = STAC_92HD83XXX_HP,
2012 },
2013 [STAC_92HD83XXX_HP] = {
2014 .type = HDA_FIXUP_FUNC,
2015 .v.func = stac92hd83xxx_fixup_hp,
2016 },
2017 [STAC_HP_DV7_4000] = {
2018 .type = HDA_FIXUP_PINS,
2019 .v.pins = hp_dv7_4000_pin_configs,
2020 .chained = true,
2021 .chain_id = STAC_92HD83XXX_HP,
2022 },
2023 [STAC_HP_ZEPHYR] = {
2024 .type = HDA_FIXUP_FUNC,
2025 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2026 .chained = true,
2027 .chain_id = STAC_92HD83XXX_HP,
2028 },
2029 [STAC_92HD83XXX_HP_LED] = {
2030 .type = HDA_FIXUP_FUNC,
2031 .v.func = stac92hd83xxx_fixup_hp_led,
2032 .chained = true,
2033 .chain_id = STAC_92HD83XXX_HP,
2034 },
2035 [STAC_92HD83XXX_HP_INV_LED] = {
2036 .type = HDA_FIXUP_FUNC,
2037 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2038 .chained = true,
2039 .chain_id = STAC_92HD83XXX_HP,
2040 },
2041 [STAC_92HD83XXX_HP_MIC_LED] = {
2042 .type = HDA_FIXUP_FUNC,
2043 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2044 .chained = true,
2045 .chain_id = STAC_92HD83XXX_HP,
2046 },
2047 [STAC_92HD83XXX_HEADSET_JACK] = {
2048 .type = HDA_FIXUP_FUNC,
2049 .v.func = stac92hd83xxx_fixup_headset_jack,
2050 },
2051 [STAC_HP_ENVY_BASS] = {
2052 .type = HDA_FIXUP_PINS,
2053 .v.pins = (const struct hda_pintbl[]) {
2054 { 0x0f, 0x90170111 },
2055 {}
2056 },
2057 },
2058 };
2059
2060 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2061 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2062 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2063 { .id = STAC_DELL_S14, .name = "dell-s14" },
2064 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2065 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2066 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2067 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2068 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2069 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2070 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2071 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2072 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2073 {}
2074 };
2075
2076 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2077 /* SigmaTel reference board */
2078 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2079 "DFI LanParty", STAC_92HD83XXX_REF),
2080 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2081 "DFI LanParty", STAC_92HD83XXX_REF),
2082 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2083 "unknown Dell", STAC_DELL_S14),
2084 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2085 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2086 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2087 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2088 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2089 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2090 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2091 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2092 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2093 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2094 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2095 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2096 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2097 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2098 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2099 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2100 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2101 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2102 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2103 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2104 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2105 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2106 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2107 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2108 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2109 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2110 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2111 "HP Pavilion dv7", STAC_HP_DV7_4000),
2112 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2113 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2114 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2115 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2116 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2117 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2118 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2119 "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
2120 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2121 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2122 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2123 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2124 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2125 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2126 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2127 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2128 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2129 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2130 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2131 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2132 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2133 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2134 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2135 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2136 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2137 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2138 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2139 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2140 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2141 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2142 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2143 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2144 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2145 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2146 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2147 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2148 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2149 "HP", STAC_HP_ZEPHYR),
2150 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2151 "HP Mini", STAC_92HD83XXX_HP_LED),
2152 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2153 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2154 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2155 "HP Mini", STAC_92HD83XXX_HP_LED),
2156 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2157 {} /* terminator */
2158 };
2159
2160 /* HP dv7 bass switch - GPIO5 */
2161 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2162 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2163 struct snd_ctl_elem_value *ucontrol)
2164 {
2165 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2166 struct sigmatel_spec *spec = codec->spec;
2167 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2168 return 0;
2169 }
2170
2171 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2172 struct snd_ctl_elem_value *ucontrol)
2173 {
2174 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2175 struct sigmatel_spec *spec = codec->spec;
2176 unsigned int gpio_data;
2177
2178 gpio_data = (spec->gpio_data & ~0x20) |
2179 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2180 if (gpio_data == spec->gpio_data)
2181 return 0;
2182 spec->gpio_data = gpio_data;
2183 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2184 return 1;
2185 }
2186
2187 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2188 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2189 .info = stac_hp_bass_gpio_info,
2190 .get = stac_hp_bass_gpio_get,
2191 .put = stac_hp_bass_gpio_put,
2192 };
2193
2194 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2195 {
2196 struct sigmatel_spec *spec = codec->spec;
2197
2198 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2199 &stac_hp_bass_sw_ctrl))
2200 return -ENOMEM;
2201
2202 spec->gpio_mask |= 0x20;
2203 spec->gpio_dir |= 0x20;
2204 spec->gpio_data |= 0x20;
2205 return 0;
2206 }
2207
2208 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2209 { 0x0a, 0x02214030 },
2210 { 0x0b, 0x02a19040 },
2211 { 0x0c, 0x01a19020 },
2212 { 0x0d, 0x01014010 },
2213 { 0x0e, 0x0181302e },
2214 { 0x0f, 0x01014010 },
2215 { 0x14, 0x01019020 },
2216 { 0x18, 0x90a000f0 },
2217 { 0x19, 0x90a000f0 },
2218 { 0x1e, 0x01452050 },
2219 { 0x1f, 0x01452050 },
2220 {}
2221 };
2222
2223 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2224 { 0x0a, 0x0421101f },
2225 { 0x0b, 0x04a11221 },
2226 { 0x0c, 0x40f000f0 },
2227 { 0x0d, 0x90170110 },
2228 { 0x0e, 0x23a1902e },
2229 { 0x0f, 0x23014250 },
2230 { 0x14, 0x40f000f0 },
2231 { 0x18, 0x90a000f0 },
2232 { 0x19, 0x40f000f0 },
2233 { 0x1e, 0x4f0000f0 },
2234 { 0x1f, 0x4f0000f0 },
2235 {}
2236 };
2237
2238 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2239 { 0x0a, 0x0421101f },
2240 { 0x0b, 0x04a11221 },
2241 { 0x0c, 0x90a70330 },
2242 { 0x0d, 0x90170110 },
2243 { 0x0e, 0x23a1902e },
2244 { 0x0f, 0x23014250 },
2245 { 0x14, 0x40f000f0 },
2246 { 0x18, 0x40f000f0 },
2247 { 0x19, 0x40f000f0 },
2248 { 0x1e, 0x044413b0 },
2249 { 0x1f, 0x044413b0 },
2250 {}
2251 };
2252
2253 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2254 { 0x0a, 0x0421101f },
2255 { 0x0b, 0x04a11221 },
2256 { 0x0c, 0x90a70330 },
2257 { 0x0d, 0x90170110 },
2258 { 0x0e, 0x40f000f0 },
2259 { 0x0f, 0x40f000f0 },
2260 { 0x14, 0x40f000f0 },
2261 { 0x18, 0x90a000f0 },
2262 { 0x19, 0x40f000f0 },
2263 { 0x1e, 0x044413b0 },
2264 { 0x1f, 0x044413b0 },
2265 {}
2266 };
2267
2268 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2269 const struct hda_fixup *fix, int action)
2270 {
2271 struct sigmatel_spec *spec = codec->spec;
2272
2273 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2274 return;
2275
2276 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2277 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2278 }
2279
2280 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
2281 const struct hda_fixup *fix, int action)
2282 {
2283 struct sigmatel_spec *spec = codec->spec;
2284 struct hda_jack_tbl *jack;
2285
2286 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2287 return;
2288
2289 /* Enable VREF power saving on GPIO1 detect */
2290 snd_hda_codec_write_cache(codec, codec->afg, 0,
2291 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
2292 snd_hda_jack_detect_enable_callback(codec, codec->afg,
2293 STAC_VREF_EVENT,
2294 stac_vref_event);
2295 jack = snd_hda_jack_tbl_get(codec, codec->afg);
2296 if (jack)
2297 jack->private_data = 0x02;
2298
2299 spec->gpio_mask |= 0x02;
2300
2301 /* enable internal microphone */
2302 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
2303 }
2304
2305 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
2306 const struct hda_fixup *fix, int action)
2307 {
2308 struct sigmatel_spec *spec = codec->spec;
2309
2310 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2311 return;
2312 spec->gpio_led = 0x01;
2313 }
2314
2315 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
2316 const struct hda_fixup *fix, int action)
2317 {
2318 unsigned int cap;
2319
2320 switch (action) {
2321 case HDA_FIXUP_ACT_PRE_PROBE:
2322 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
2323 break;
2324
2325 case HDA_FIXUP_ACT_PROBE:
2326 /* enable bass on HP dv7 */
2327 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
2328 cap &= AC_GPIO_IO_COUNT;
2329 if (cap >= 6)
2330 stac_add_hp_bass_switch(codec);
2331 break;
2332 }
2333 }
2334
2335 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
2336 const struct hda_fixup *fix, int action)
2337 {
2338 struct sigmatel_spec *spec = codec->spec;
2339
2340 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2341 return;
2342 spec->gpio_led = 0x08;
2343 }
2344
2345
2346 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
2347 const struct hda_fixup *fix, int action)
2348 {
2349 struct sigmatel_spec *spec = codec->spec;
2350
2351 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2352 return;
2353
2354 if (hp_blike_system(codec->subsystem_id)) {
2355 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
2356 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
2357 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
2358 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
2359 /* It was changed in the BIOS to just satisfy MS DTM.
2360 * Lets turn it back into slaved HP
2361 */
2362 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
2363 | (AC_JACK_HP_OUT <<
2364 AC_DEFCFG_DEVICE_SHIFT);
2365 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
2366 | AC_DEFCFG_SEQUENCE)))
2367 | 0x1f;
2368 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
2369 }
2370 }
2371
2372 if (find_mute_led_cfg(codec, 1))
2373 snd_printd("mute LED gpio %d polarity %d\n",
2374 spec->gpio_led,
2375 spec->gpio_led_polarity);
2376
2377 }
2378
2379 static const struct hda_fixup stac92hd71bxx_fixups[] = {
2380 [STAC_92HD71BXX_REF] = {
2381 .type = HDA_FIXUP_FUNC,
2382 .v.func = stac92hd71bxx_fixup_ref,
2383 },
2384 [STAC_DELL_M4_1] = {
2385 .type = HDA_FIXUP_PINS,
2386 .v.pins = dell_m4_1_pin_configs,
2387 },
2388 [STAC_DELL_M4_2] = {
2389 .type = HDA_FIXUP_PINS,
2390 .v.pins = dell_m4_2_pin_configs,
2391 },
2392 [STAC_DELL_M4_3] = {
2393 .type = HDA_FIXUP_PINS,
2394 .v.pins = dell_m4_3_pin_configs,
2395 },
2396 [STAC_HP_M4] = {
2397 .type = HDA_FIXUP_FUNC,
2398 .v.func = stac92hd71bxx_fixup_hp_m4,
2399 .chained = true,
2400 .chain_id = STAC_92HD71BXX_HP,
2401 },
2402 [STAC_HP_DV4] = {
2403 .type = HDA_FIXUP_FUNC,
2404 .v.func = stac92hd71bxx_fixup_hp_dv4,
2405 .chained = true,
2406 .chain_id = STAC_HP_DV5,
2407 },
2408 [STAC_HP_DV5] = {
2409 .type = HDA_FIXUP_FUNC,
2410 .v.func = stac92hd71bxx_fixup_hp_dv5,
2411 .chained = true,
2412 .chain_id = STAC_92HD71BXX_HP,
2413 },
2414 [STAC_HP_HDX] = {
2415 .type = HDA_FIXUP_FUNC,
2416 .v.func = stac92hd71bxx_fixup_hp_hdx,
2417 .chained = true,
2418 .chain_id = STAC_92HD71BXX_HP,
2419 },
2420 [STAC_92HD71BXX_HP] = {
2421 .type = HDA_FIXUP_FUNC,
2422 .v.func = stac92hd71bxx_fixup_hp,
2423 },
2424 };
2425
2426 static const struct hda_model_fixup stac92hd71bxx_models[] = {
2427 { .id = STAC_92HD71BXX_REF, .name = "ref" },
2428 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
2429 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
2430 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
2431 { .id = STAC_HP_M4, .name = "hp-m4" },
2432 { .id = STAC_HP_DV4, .name = "hp-dv4" },
2433 { .id = STAC_HP_DV5, .name = "hp-dv5" },
2434 { .id = STAC_HP_HDX, .name = "hp-hdx" },
2435 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
2436 {}
2437 };
2438
2439 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
2440 /* SigmaTel reference board */
2441 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2442 "DFI LanParty", STAC_92HD71BXX_REF),
2443 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2444 "DFI LanParty", STAC_92HD71BXX_REF),
2445 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
2446 "HP", STAC_HP_DV5),
2447 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
2448 "HP", STAC_HP_DV5),
2449 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2450 "HP dv4-7", STAC_HP_DV4),
2451 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
2452 "HP dv4-7", STAC_HP_DV5),
2453 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
2454 "HP HDX", STAC_HP_HDX), /* HDX18 */
2455 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2456 "HP mini 1000", STAC_HP_M4),
2457 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
2458 "HP HDX", STAC_HP_HDX), /* HDX16 */
2459 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
2460 "HP dv6", STAC_HP_DV5),
2461 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
2462 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
2463 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
2464 "HP DV6", STAC_HP_DV5),
2465 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
2466 "HP", STAC_HP_DV5),
2467 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
2468 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
2469 "unknown Dell", STAC_DELL_M4_1),
2470 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
2471 "unknown Dell", STAC_DELL_M4_1),
2472 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
2473 "unknown Dell", STAC_DELL_M4_1),
2474 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
2475 "unknown Dell", STAC_DELL_M4_1),
2476 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
2477 "unknown Dell", STAC_DELL_M4_1),
2478 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
2479 "unknown Dell", STAC_DELL_M4_1),
2480 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
2481 "unknown Dell", STAC_DELL_M4_1),
2482 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
2483 "unknown Dell", STAC_DELL_M4_2),
2484 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
2485 "unknown Dell", STAC_DELL_M4_2),
2486 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
2487 "unknown Dell", STAC_DELL_M4_2),
2488 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
2489 "unknown Dell", STAC_DELL_M4_2),
2490 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
2491 "unknown Dell", STAC_DELL_M4_3),
2492 {} /* terminator */
2493 };
2494
2495 static const struct hda_pintbl ref922x_pin_configs[] = {
2496 { 0x0a, 0x01014010 },
2497 { 0x0b, 0x01016011 },
2498 { 0x0c, 0x01012012 },
2499 { 0x0d, 0x0221401f },
2500 { 0x0e, 0x01813122 },
2501 { 0x0f, 0x01011014 },
2502 { 0x10, 0x01441030 },
2503 { 0x11, 0x01c41030 },
2504 { 0x15, 0x40000100 },
2505 { 0x1b, 0x40000100 },
2506 {}
2507 };
2508
2509 /*
2510 STAC 922X pin configs for
2511 102801A7
2512 102801AB
2513 102801A9
2514 102801D1
2515 102801D2
2516 */
2517 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
2518 { 0x0a, 0x02214030 },
2519 { 0x0b, 0x01a19021 },
2520 { 0x0c, 0x01111012 },
2521 { 0x0d, 0x01114010 },
2522 { 0x0e, 0x02a19020 },
2523 { 0x0f, 0x01117011 },
2524 { 0x10, 0x400001f0 },
2525 { 0x11, 0x400001f1 },
2526 { 0x15, 0x01813122 },
2527 { 0x1b, 0x400001f2 },
2528 {}
2529 };
2530
2531 /*
2532 STAC 922X pin configs for
2533 102801AC
2534 102801D0
2535 */
2536 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
2537 { 0x0a, 0x02214030 },
2538 { 0x0b, 0x01a19021 },
2539 { 0x0c, 0x01111012 },
2540 { 0x0d, 0x01114010 },
2541 { 0x0e, 0x02a19020 },
2542 { 0x0f, 0x01117011 },
2543 { 0x10, 0x01451140 },
2544 { 0x11, 0x400001f0 },
2545 { 0x15, 0x01813122 },
2546 { 0x1b, 0x400001f1 },
2547 {}
2548 };
2549
2550 /*
2551 STAC 922X pin configs for
2552 102801BF
2553 */
2554 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
2555 { 0x0a, 0x0321101f },
2556 { 0x0b, 0x01112024 },
2557 { 0x0c, 0x01111222 },
2558 { 0x0d, 0x91174220 },
2559 { 0x0e, 0x03a11050 },
2560 { 0x0f, 0x01116221 },
2561 { 0x10, 0x90a70330 },
2562 { 0x11, 0x01452340 },
2563 { 0x15, 0x40C003f1 },
2564 { 0x1b, 0x405003f0 },
2565 {}
2566 };
2567
2568 /*
2569 STAC 9221 A1 pin configs for
2570 102801D7 (Dell XPS M1210)
2571 */
2572 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
2573 { 0x0a, 0x02211211 },
2574 { 0x0b, 0x408103ff },
2575 { 0x0c, 0x02a1123e },
2576 { 0x0d, 0x90100310 },
2577 { 0x0e, 0x408003f1 },
2578 { 0x0f, 0x0221121f },
2579 { 0x10, 0x03451340 },
2580 { 0x11, 0x40c003f2 },
2581 { 0x15, 0x508003f3 },
2582 { 0x1b, 0x405003f4 },
2583 {}
2584 };
2585
2586 static const struct hda_pintbl d945gtp3_pin_configs[] = {
2587 { 0x0a, 0x0221401f },
2588 { 0x0b, 0x01a19022 },
2589 { 0x0c, 0x01813021 },
2590 { 0x0d, 0x01014010 },
2591 { 0x0e, 0x40000100 },
2592 { 0x0f, 0x40000100 },
2593 { 0x10, 0x40000100 },
2594 { 0x11, 0x40000100 },
2595 { 0x15, 0x02a19120 },
2596 { 0x1b, 0x40000100 },
2597 {}
2598 };
2599
2600 static const struct hda_pintbl d945gtp5_pin_configs[] = {
2601 { 0x0a, 0x0221401f },
2602 { 0x0b, 0x01011012 },
2603 { 0x0c, 0x01813024 },
2604 { 0x0d, 0x01014010 },
2605 { 0x0e, 0x01a19021 },
2606 { 0x0f, 0x01016011 },
2607 { 0x10, 0x01452130 },
2608 { 0x11, 0x40000100 },
2609 { 0x15, 0x02a19320 },
2610 { 0x1b, 0x40000100 },
2611 {}
2612 };
2613
2614 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
2615 { 0x0a, 0x0121e21f },
2616 { 0x0b, 0x400000ff },
2617 { 0x0c, 0x9017e110 },
2618 { 0x0d, 0x400000fd },
2619 { 0x0e, 0x400000fe },
2620 { 0x0f, 0x0181e020 },
2621 { 0x10, 0x1145e030 },
2622 { 0x11, 0x11c5e240 },
2623 { 0x15, 0x400000fc },
2624 { 0x1b, 0x400000fb },
2625 {}
2626 };
2627
2628 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
2629 { 0x0a, 0x0121e21f },
2630 { 0x0b, 0x90a7012e },
2631 { 0x0c, 0x9017e110 },
2632 { 0x0d, 0x400000fd },
2633 { 0x0e, 0x400000fe },
2634 { 0x0f, 0x0181e020 },
2635 { 0x10, 0x1145e230 },
2636 { 0x11, 0x500000fa },
2637 { 0x15, 0x400000fc },
2638 { 0x1b, 0x400000fb },
2639 {}
2640 };
2641
2642 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
2643 { 0x0a, 0x0121e21f },
2644 { 0x0b, 0x90a7012e },
2645 { 0x0c, 0x9017e110 },
2646 { 0x0d, 0x400000fd },
2647 { 0x0e, 0x400000fe },
2648 { 0x0f, 0x0181e020 },
2649 { 0x10, 0x1145e230 },
2650 { 0x11, 0x11c5e240 },
2651 { 0x15, 0x400000fc },
2652 { 0x1b, 0x400000fb },
2653 {}
2654 };
2655
2656 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
2657 { 0x0a, 0x0321e21f },
2658 { 0x0b, 0x03a1e02e },
2659 { 0x0c, 0x9017e110 },
2660 { 0x0d, 0x9017e11f },
2661 { 0x0e, 0x400000fe },
2662 { 0x0f, 0x0381e020 },
2663 { 0x10, 0x1345e230 },
2664 { 0x11, 0x13c5e240 },
2665 { 0x15, 0x400000fc },
2666 { 0x1b, 0x400000fb },
2667 {}
2668 };
2669
2670 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
2671 { 0x0a, 0x0321e21f },
2672 { 0x0b, 0x03a1e02e },
2673 { 0x0c, 0x9017e110 },
2674 { 0x0d, 0x9017e11f },
2675 { 0x0e, 0x400000fe },
2676 { 0x0f, 0x0381e020 },
2677 { 0x10, 0x1345e230 },
2678 { 0x11, 0x13c5e240 },
2679 { 0x15, 0x400000fc },
2680 { 0x1b, 0x400000fb },
2681 {}
2682 };
2683
2684 static const struct hda_pintbl ecs202_pin_configs[] = {
2685 { 0x0a, 0x0221401f },
2686 { 0x0b, 0x02a19020 },
2687 { 0x0c, 0x01a19020 },
2688 { 0x0d, 0x01114010 },
2689 { 0x0e, 0x408000f0 },
2690 { 0x0f, 0x01813022 },
2691 { 0x10, 0x074510a0 },
2692 { 0x11, 0x40c400f1 },
2693 { 0x15, 0x9037012e },
2694 { 0x1b, 0x40e000f2 },
2695 {}
2696 };
2697
2698 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
2699 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
2700 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
2701 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
2702 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
2703 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
2704 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
2705 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
2706 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
2707 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
2708 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
2709 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
2710 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
2711 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
2712 {}
2713 };
2714
2715 static const struct hda_fixup stac922x_fixups[];
2716
2717 /* remap the fixup from codec SSID and apply it */
2718 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
2719 const struct hda_fixup *fix,
2720 int action)
2721 {
2722 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2723 return;
2724 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
2725 stac922x_fixups);
2726 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
2727 snd_hda_apply_fixup(codec, action);
2728 }
2729
2730 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
2731 const struct hda_fixup *fix,
2732 int action)
2733 {
2734 struct sigmatel_spec *spec = codec->spec;
2735
2736 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2737 spec->gpio_mask = spec->gpio_dir = 0x03;
2738 spec->gpio_data = 0x03;
2739 }
2740 }
2741
2742 static const struct hda_fixup stac922x_fixups[] = {
2743 [STAC_D945_REF] = {
2744 .type = HDA_FIXUP_PINS,
2745 .v.pins = ref922x_pin_configs,
2746 },
2747 [STAC_D945GTP3] = {
2748 .type = HDA_FIXUP_PINS,
2749 .v.pins = d945gtp3_pin_configs,
2750 },
2751 [STAC_D945GTP5] = {
2752 .type = HDA_FIXUP_PINS,
2753 .v.pins = d945gtp5_pin_configs,
2754 },
2755 [STAC_INTEL_MAC_AUTO] = {
2756 .type = HDA_FIXUP_FUNC,
2757 .v.func = stac922x_fixup_intel_mac_auto,
2758 },
2759 [STAC_INTEL_MAC_V1] = {
2760 .type = HDA_FIXUP_PINS,
2761 .v.pins = intel_mac_v1_pin_configs,
2762 .chained = true,
2763 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2764 },
2765 [STAC_INTEL_MAC_V2] = {
2766 .type = HDA_FIXUP_PINS,
2767 .v.pins = intel_mac_v2_pin_configs,
2768 .chained = true,
2769 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2770 },
2771 [STAC_INTEL_MAC_V3] = {
2772 .type = HDA_FIXUP_PINS,
2773 .v.pins = intel_mac_v3_pin_configs,
2774 .chained = true,
2775 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2776 },
2777 [STAC_INTEL_MAC_V4] = {
2778 .type = HDA_FIXUP_PINS,
2779 .v.pins = intel_mac_v4_pin_configs,
2780 .chained = true,
2781 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2782 },
2783 [STAC_INTEL_MAC_V5] = {
2784 .type = HDA_FIXUP_PINS,
2785 .v.pins = intel_mac_v5_pin_configs,
2786 .chained = true,
2787 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2788 },
2789 [STAC_922X_INTEL_MAC_GPIO] = {
2790 .type = HDA_FIXUP_FUNC,
2791 .v.func = stac922x_fixup_intel_mac_gpio,
2792 },
2793 [STAC_ECS_202] = {
2794 .type = HDA_FIXUP_PINS,
2795 .v.pins = ecs202_pin_configs,
2796 },
2797 [STAC_922X_DELL_D81] = {
2798 .type = HDA_FIXUP_PINS,
2799 .v.pins = dell_922x_d81_pin_configs,
2800 },
2801 [STAC_922X_DELL_D82] = {
2802 .type = HDA_FIXUP_PINS,
2803 .v.pins = dell_922x_d82_pin_configs,
2804 },
2805 [STAC_922X_DELL_M81] = {
2806 .type = HDA_FIXUP_PINS,
2807 .v.pins = dell_922x_m81_pin_configs,
2808 },
2809 [STAC_922X_DELL_M82] = {
2810 .type = HDA_FIXUP_PINS,
2811 .v.pins = dell_922x_m82_pin_configs,
2812 },
2813 };
2814
2815 static const struct hda_model_fixup stac922x_models[] = {
2816 { .id = STAC_D945_REF, .name = "ref" },
2817 { .id = STAC_D945GTP5, .name = "5stack" },
2818 { .id = STAC_D945GTP3, .name = "3stack" },
2819 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
2820 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
2821 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
2822 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
2823 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
2824 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
2825 { .id = STAC_ECS_202, .name = "ecs202" },
2826 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
2827 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
2828 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
2829 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
2830 /* for backward compatibility */
2831 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
2832 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
2833 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
2834 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
2835 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
2836 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
2837 {}
2838 };
2839
2840 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
2841 /* SigmaTel reference board */
2842 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2843 "DFI LanParty", STAC_D945_REF),
2844 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2845 "DFI LanParty", STAC_D945_REF),
2846 /* Intel 945G based systems */
2847 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2848 "Intel D945G", STAC_D945GTP3),
2849 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2850 "Intel D945G", STAC_D945GTP3),
2851 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2852 "Intel D945G", STAC_D945GTP3),
2853 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2854 "Intel D945G", STAC_D945GTP3),
2855 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2856 "Intel D945G", STAC_D945GTP3),
2857 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2858 "Intel D945G", STAC_D945GTP3),
2859 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2860 "Intel D945G", STAC_D945GTP3),
2861 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2862 "Intel D945G", STAC_D945GTP3),
2863 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2864 "Intel D945G", STAC_D945GTP3),
2865 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2866 "Intel D945G", STAC_D945GTP3),
2867 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2868 "Intel D945G", STAC_D945GTP3),
2869 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2870 "Intel D945G", STAC_D945GTP3),
2871 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2872 "Intel D945G", STAC_D945GTP3),
2873 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2874 "Intel D945G", STAC_D945GTP3),
2875 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2876 "Intel D945G", STAC_D945GTP3),
2877 /* Intel D945G 5-stack systems */
2878 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2879 "Intel D945G", STAC_D945GTP5),
2880 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2881 "Intel D945G", STAC_D945GTP5),
2882 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2883 "Intel D945G", STAC_D945GTP5),
2884 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2885 "Intel D945G", STAC_D945GTP5),
2886 /* Intel 945P based systems */
2887 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2888 "Intel D945P", STAC_D945GTP3),
2889 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2890 "Intel D945P", STAC_D945GTP3),
2891 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2892 "Intel D945P", STAC_D945GTP3),
2893 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2894 "Intel D945P", STAC_D945GTP3),
2895 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2896 "Intel D945P", STAC_D945GTP3),
2897 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2898 "Intel D945P", STAC_D945GTP5),
2899 /* other intel */
2900 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2901 "Intel D945", STAC_D945_REF),
2902 /* other systems */
2903
2904 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
2905 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
2906
2907 /* Dell systems */
2908 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2909 "unknown Dell", STAC_922X_DELL_D81),
2910 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2911 "unknown Dell", STAC_922X_DELL_D81),
2912 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2913 "unknown Dell", STAC_922X_DELL_D81),
2914 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2915 "unknown Dell", STAC_922X_DELL_D82),
2916 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2917 "unknown Dell", STAC_922X_DELL_M81),
2918 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2919 "unknown Dell", STAC_922X_DELL_D82),
2920 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2921 "unknown Dell", STAC_922X_DELL_D81),
2922 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2923 "unknown Dell", STAC_922X_DELL_D81),
2924 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2925 "Dell XPS M1210", STAC_922X_DELL_M82),
2926 /* ECS/PC Chips boards */
2927 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
2928 "ECS/PC chips", STAC_ECS_202),
2929 {} /* terminator */
2930 };
2931
2932 static const struct hda_pintbl ref927x_pin_configs[] = {
2933 { 0x0a, 0x02214020 },
2934 { 0x0b, 0x02a19080 },
2935 { 0x0c, 0x0181304e },
2936 { 0x0d, 0x01014010 },
2937 { 0x0e, 0x01a19040 },
2938 { 0x0f, 0x01011012 },
2939 { 0x10, 0x01016011 },
2940 { 0x11, 0x0101201f },
2941 { 0x12, 0x183301f0 },
2942 { 0x13, 0x18a001f0 },
2943 { 0x14, 0x18a001f0 },
2944 { 0x21, 0x01442070 },
2945 { 0x22, 0x01c42190 },
2946 { 0x23, 0x40000100 },
2947 {}
2948 };
2949
2950 static const struct hda_pintbl d965_3st_pin_configs[] = {
2951 { 0x0a, 0x0221401f },
2952 { 0x0b, 0x02a19120 },
2953 { 0x0c, 0x40000100 },
2954 { 0x0d, 0x01014011 },
2955 { 0x0e, 0x01a19021 },
2956 { 0x0f, 0x01813024 },
2957 { 0x10, 0x40000100 },
2958 { 0x11, 0x40000100 },
2959 { 0x12, 0x40000100 },
2960 { 0x13, 0x40000100 },
2961 { 0x14, 0x40000100 },
2962 { 0x21, 0x40000100 },
2963 { 0x22, 0x40000100 },
2964 { 0x23, 0x40000100 },
2965 {}
2966 };
2967
2968 static const struct hda_pintbl d965_5st_pin_configs[] = {
2969 { 0x0a, 0x02214020 },
2970 { 0x0b, 0x02a19080 },
2971 { 0x0c, 0x0181304e },
2972 { 0x0d, 0x01014010 },
2973 { 0x0e, 0x01a19040 },
2974 { 0x0f, 0x01011012 },
2975 { 0x10, 0x01016011 },
2976 { 0x11, 0x40000100 },
2977 { 0x12, 0x40000100 },
2978 { 0x13, 0x40000100 },
2979 { 0x14, 0x40000100 },
2980 { 0x21, 0x01442070 },
2981 { 0x22, 0x40000100 },
2982 { 0x23, 0x40000100 },
2983 {}
2984 };
2985
2986 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
2987 { 0x0a, 0x40000100 },
2988 { 0x0b, 0x40000100 },
2989 { 0x0c, 0x0181304e },
2990 { 0x0d, 0x01014010 },
2991 { 0x0e, 0x01a19040 },
2992 { 0x0f, 0x01011012 },
2993 { 0x10, 0x01016011 },
2994 { 0x11, 0x40000100 },
2995 { 0x12, 0x40000100 },
2996 { 0x13, 0x40000100 },
2997 { 0x14, 0x40000100 },
2998 { 0x21, 0x01442070 },
2999 { 0x22, 0x40000100 },
3000 { 0x23, 0x40000100 },
3001 {}
3002 };
3003
3004 static const struct hda_pintbl dell_3st_pin_configs[] = {
3005 { 0x0a, 0x02211230 },
3006 { 0x0b, 0x02a11220 },
3007 { 0x0c, 0x01a19040 },
3008 { 0x0d, 0x01114210 },
3009 { 0x0e, 0x01111212 },
3010 { 0x0f, 0x01116211 },
3011 { 0x10, 0x01813050 },
3012 { 0x11, 0x01112214 },
3013 { 0x12, 0x403003fa },
3014 { 0x13, 0x90a60040 },
3015 { 0x14, 0x90a60040 },
3016 { 0x21, 0x404003fb },
3017 { 0x22, 0x40c003fc },
3018 { 0x23, 0x40000100 },
3019 {}
3020 };
3021
3022 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3023 const struct hda_fixup *fix, int action)
3024 {
3025 /* no jack detecion for ref-no-jd model */
3026 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3027 codec->no_jack_detect = 1;
3028 }
3029
3030 static void stac927x_fixup_ref(struct hda_codec *codec,
3031 const struct hda_fixup *fix, int action)
3032 {
3033 struct sigmatel_spec *spec = codec->spec;
3034
3035 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3036 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3037 spec->eapd_mask = spec->gpio_mask = 0;
3038 spec->gpio_dir = spec->gpio_data = 0;
3039 }
3040 }
3041
3042 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3043 const struct hda_fixup *fix, int action)
3044 {
3045 struct sigmatel_spec *spec = codec->spec;
3046
3047 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3048 return;
3049
3050 if (codec->subsystem_id != 0x1028022f) {
3051 /* GPIO2 High = Enable EAPD */
3052 spec->eapd_mask = spec->gpio_mask = 0x04;
3053 spec->gpio_dir = spec->gpio_data = 0x04;
3054 }
3055
3056 snd_hda_add_verbs(codec, dell_3st_core_init);
3057 spec->volknob_init = 1;
3058 }
3059
3060 static void stac927x_fixup_volknob(struct hda_codec *codec,
3061 const struct hda_fixup *fix, int action)
3062 {
3063 struct sigmatel_spec *spec = codec->spec;
3064
3065 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3066 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3067 spec->volknob_init = 1;
3068 }
3069 }
3070
3071 static const struct hda_fixup stac927x_fixups[] = {
3072 [STAC_D965_REF_NO_JD] = {
3073 .type = HDA_FIXUP_FUNC,
3074 .v.func = stac927x_fixup_ref_no_jd,
3075 .chained = true,
3076 .chain_id = STAC_D965_REF,
3077 },
3078 [STAC_D965_REF] = {
3079 .type = HDA_FIXUP_FUNC,
3080 .v.func = stac927x_fixup_ref,
3081 },
3082 [STAC_D965_3ST] = {
3083 .type = HDA_FIXUP_PINS,
3084 .v.pins = d965_3st_pin_configs,
3085 .chained = true,
3086 .chain_id = STAC_D965_VERBS,
3087 },
3088 [STAC_D965_5ST] = {
3089 .type = HDA_FIXUP_PINS,
3090 .v.pins = d965_5st_pin_configs,
3091 .chained = true,
3092 .chain_id = STAC_D965_VERBS,
3093 },
3094 [STAC_D965_VERBS] = {
3095 .type = HDA_FIXUP_VERBS,
3096 .v.verbs = d965_core_init,
3097 },
3098 [STAC_D965_5ST_NO_FP] = {
3099 .type = HDA_FIXUP_PINS,
3100 .v.pins = d965_5st_no_fp_pin_configs,
3101 },
3102 [STAC_DELL_3ST] = {
3103 .type = HDA_FIXUP_PINS,
3104 .v.pins = dell_3st_pin_configs,
3105 .chained = true,
3106 .chain_id = STAC_927X_DELL_DMIC,
3107 },
3108 [STAC_DELL_BIOS] = {
3109 .type = HDA_FIXUP_PINS,
3110 .v.pins = (const struct hda_pintbl[]) {
3111 /* configure the analog microphone on some laptops */
3112 { 0x0c, 0x90a79130 },
3113 /* correct the front output jack as a hp out */
3114 { 0x0f, 0x0227011f },
3115 /* correct the front input jack as a mic */
3116 { 0x0e, 0x02a79130 },
3117 {}
3118 },
3119 .chained = true,
3120 .chain_id = STAC_927X_DELL_DMIC,
3121 },
3122 [STAC_DELL_BIOS_SPDIF] = {
3123 .type = HDA_FIXUP_PINS,
3124 .v.pins = (const struct hda_pintbl[]) {
3125 /* correct the device field to SPDIF out */
3126 { 0x21, 0x01442070 },
3127 {}
3128 },
3129 .chained = true,
3130 .chain_id = STAC_DELL_BIOS,
3131 },
3132 [STAC_927X_DELL_DMIC] = {
3133 .type = HDA_FIXUP_FUNC,
3134 .v.func = stac927x_fixup_dell_dmic,
3135 },
3136 [STAC_927X_VOLKNOB] = {
3137 .type = HDA_FIXUP_FUNC,
3138 .v.func = stac927x_fixup_volknob,
3139 },
3140 };
3141
3142 static const struct hda_model_fixup stac927x_models[] = {
3143 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3144 { .id = STAC_D965_REF, .name = "ref" },
3145 { .id = STAC_D965_3ST, .name = "3stack" },
3146 { .id = STAC_D965_5ST, .name = "5stack" },
3147 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3148 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3149 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3150 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3151 {}
3152 };
3153
3154 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3155 /* SigmaTel reference board */
3156 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3157 "DFI LanParty", STAC_D965_REF),
3158 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3159 "DFI LanParty", STAC_D965_REF),
3160 /* Intel 946 based systems */
3161 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3163 /* 965 based 3 stack systems */
3164 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3165 "Intel D965", STAC_D965_3ST),
3166 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3167 "Intel D965", STAC_D965_3ST),
3168 /* Dell 3 stack systems */
3169 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3172 /* Dell 3 stack systems with verb table in BIOS */
3173 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3182 /* 965 based 5 stack systems */
3183 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3184 "Intel D965", STAC_D965_5ST),
3185 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3186 "Intel D965", STAC_D965_5ST),
3187 /* volume-knob fixes */
3188 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3189 {} /* terminator */
3190 };
3191
3192 static const struct hda_pintbl ref9205_pin_configs[] = {
3193 { 0x0a, 0x40000100 },
3194 { 0x0b, 0x40000100 },
3195 { 0x0c, 0x01016011 },
3196 { 0x0d, 0x01014010 },
3197 { 0x0e, 0x01813122 },
3198 { 0x0f, 0x01a19021 },
3199 { 0x14, 0x01019020 },
3200 { 0x16, 0x40000100 },
3201 { 0x17, 0x90a000f0 },
3202 { 0x18, 0x90a000f0 },
3203 { 0x21, 0x01441030 },
3204 { 0x22, 0x01c41030 },
3205 {}
3206 };
3207
3208 /*
3209 STAC 9205 pin configs for
3210 102801F1
3211 102801F2
3212 102801FC
3213 102801FD
3214 10280204
3215 1028021F
3216 10280228 (Dell Vostro 1500)
3217 10280229 (Dell Vostro 1700)
3218 */
3219 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3220 { 0x0a, 0x0321101F },
3221 { 0x0b, 0x03A11020 },
3222 { 0x0c, 0x400003FA },
3223 { 0x0d, 0x90170310 },
3224 { 0x0e, 0x400003FB },
3225 { 0x0f, 0x400003FC },
3226 { 0x14, 0x400003FD },
3227 { 0x16, 0x40F000F9 },
3228 { 0x17, 0x90A60330 },
3229 { 0x18, 0x400003FF },
3230 { 0x21, 0x0144131F },
3231 { 0x22, 0x40C003FE },
3232 {}
3233 };
3234
3235 /*
3236 STAC 9205 pin configs for
3237 102801F9
3238 102801FA
3239 102801FE
3240 102801FF (Dell Precision M4300)
3241 10280206
3242 10280200
3243 10280201
3244 */
3245 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3246 { 0x0a, 0x0321101f },
3247 { 0x0b, 0x03a11020 },
3248 { 0x0c, 0x90a70330 },
3249 { 0x0d, 0x90170310 },
3250 { 0x0e, 0x400000fe },
3251 { 0x0f, 0x400000ff },
3252 { 0x14, 0x400000fd },
3253 { 0x16, 0x40f000f9 },
3254 { 0x17, 0x400000fa },
3255 { 0x18, 0x400000fc },
3256 { 0x21, 0x0144131f },
3257 { 0x22, 0x40c003f8 },
3258 /* Enable SPDIF in/out */
3259 { 0x1f, 0x01441030 },
3260 { 0x20, 0x1c410030 },
3261 {}
3262 };
3263
3264 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3265 { 0x0a, 0x0421101f },
3266 { 0x0b, 0x04a11020 },
3267 { 0x0c, 0x400003fa },
3268 { 0x0d, 0x90170310 },
3269 { 0x0e, 0x400003fb },
3270 { 0x0f, 0x400003fc },
3271 { 0x14, 0x400003fd },
3272 { 0x16, 0x400003f9 },
3273 { 0x17, 0x90a60330 },
3274 { 0x18, 0x400003ff },
3275 { 0x21, 0x01441340 },
3276 { 0x22, 0x40c003fe },
3277 {}
3278 };
3279
3280 static void stac9205_fixup_ref(struct hda_codec *codec,
3281 const struct hda_fixup *fix, int action)
3282 {
3283 struct sigmatel_spec *spec = codec->spec;
3284
3285 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3286 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
3287 /* SPDIF-In enabled */
3288 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
3289 }
3290 }
3291
3292 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
3293 const struct hda_fixup *fix, int action)
3294 {
3295 struct sigmatel_spec *spec = codec->spec;
3296 struct hda_jack_tbl *jack;
3297
3298 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3299 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
3300
3301 /* Enable unsol response for GPIO4/Dock HP connection */
3302 snd_hda_codec_write_cache(codec, codec->afg, 0,
3303 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3304 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3305 STAC_VREF_EVENT,
3306 stac_vref_event);
3307 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3308 if (jack)
3309 jack->private_data = 0x01;
3310
3311 spec->gpio_dir = 0x0b;
3312 spec->eapd_mask = 0x01;
3313 spec->gpio_mask = 0x1b;
3314 spec->gpio_mute = 0x10;
3315 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
3316 * GPIO3 Low = DRM
3317 */
3318 spec->gpio_data = 0x01;
3319 }
3320 }
3321
3322 static void stac9205_fixup_eapd(struct hda_codec *codec,
3323 const struct hda_fixup *fix, int action)
3324 {
3325 struct sigmatel_spec *spec = codec->spec;
3326
3327 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3328 spec->eapd_switch = 0;
3329 }
3330
3331 static const struct hda_fixup stac9205_fixups[] = {
3332 [STAC_9205_REF] = {
3333 .type = HDA_FIXUP_FUNC,
3334 .v.func = stac9205_fixup_ref,
3335 },
3336 [STAC_9205_DELL_M42] = {
3337 .type = HDA_FIXUP_PINS,
3338 .v.pins = dell_9205_m42_pin_configs,
3339 },
3340 [STAC_9205_DELL_M43] = {
3341 .type = HDA_FIXUP_FUNC,
3342 .v.func = stac9205_fixup_dell_m43,
3343 },
3344 [STAC_9205_DELL_M44] = {
3345 .type = HDA_FIXUP_PINS,
3346 .v.pins = dell_9205_m44_pin_configs,
3347 },
3348 [STAC_9205_EAPD] = {
3349 .type = HDA_FIXUP_FUNC,
3350 .v.func = stac9205_fixup_eapd,
3351 },
3352 {}
3353 };
3354
3355 static const struct hda_model_fixup stac9205_models[] = {
3356 { .id = STAC_9205_REF, .name = "ref" },
3357 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
3358 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
3359 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
3360 { .id = STAC_9205_EAPD, .name = "eapd" },
3361 {}
3362 };
3363
3364 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
3365 /* SigmaTel reference board */
3366 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3367 "DFI LanParty", STAC_9205_REF),
3368 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
3369 "SigmaTel", STAC_9205_REF),
3370 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3371 "DFI LanParty", STAC_9205_REF),
3372 /* Dell */
3373 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
3374 "unknown Dell", STAC_9205_DELL_M42),
3375 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
3376 "unknown Dell", STAC_9205_DELL_M42),
3377 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
3378 "Dell Precision", STAC_9205_DELL_M43),
3379 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
3380 "Dell Precision", STAC_9205_DELL_M43),
3381 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
3382 "Dell Precision", STAC_9205_DELL_M43),
3383 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
3384 "unknown Dell", STAC_9205_DELL_M42),
3385 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
3386 "unknown Dell", STAC_9205_DELL_M42),
3387 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
3388 "Dell Precision", STAC_9205_DELL_M43),
3389 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
3390 "Dell Precision M4300", STAC_9205_DELL_M43),
3391 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
3392 "unknown Dell", STAC_9205_DELL_M42),
3393 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
3394 "Dell Precision", STAC_9205_DELL_M43),
3395 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
3396 "Dell Precision", STAC_9205_DELL_M43),
3397 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
3398 "Dell Precision", STAC_9205_DELL_M43),
3399 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
3400 "Dell Inspiron", STAC_9205_DELL_M44),
3401 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
3402 "Dell Vostro 1500", STAC_9205_DELL_M42),
3403 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
3404 "Dell Vostro 1700", STAC_9205_DELL_M42),
3405 /* Gateway */
3406 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
3407 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
3408 {} /* terminator */
3409 };
3410
3411 static int stac_parse_auto_config(struct hda_codec *codec)
3412 {
3413 struct sigmatel_spec *spec = codec->spec;
3414 int err;
3415
3416 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
3417 if (err < 0)
3418 return err;
3419
3420 /* add hooks */
3421 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
3422 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
3423
3424 spec->gen.automute_hook = stac_update_outputs;
3425 spec->gen.hp_automute_hook = stac_hp_automute;
3426 spec->gen.line_automute_hook = stac_line_automute;
3427
3428 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
3429 if (err < 0)
3430 return err;
3431
3432 /* minimum value is actually mute */
3433 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
3434
3435 /* setup analog beep controls */
3436 if (spec->anabeep_nid > 0) {
3437 err = stac_auto_create_beep_ctls(codec,
3438 spec->anabeep_nid);
3439 if (err < 0)
3440 return err;
3441 }
3442
3443 /* setup digital beep controls and input device */
3444 #ifdef CONFIG_SND_HDA_INPUT_BEEP
3445 if (spec->digbeep_nid > 0) {
3446 hda_nid_t nid = spec->digbeep_nid;
3447 unsigned int caps;
3448
3449 err = stac_auto_create_beep_ctls(codec, nid);
3450 if (err < 0)
3451 return err;
3452 err = snd_hda_attach_beep_device(codec, nid);
3453 if (err < 0)
3454 return err;
3455 if (codec->beep) {
3456 /* IDT/STAC codecs have linear beep tone parameter */
3457 codec->beep->linear_tone = spec->linear_tone_beep;
3458 /* if no beep switch is available, make its own one */
3459 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3460 if (!(caps & AC_AMPCAP_MUTE)) {
3461 err = stac_beep_switch_ctl(codec);
3462 if (err < 0)
3463 return err;
3464 }
3465 }
3466 }
3467 #endif
3468
3469 if (spec->gpio_led)
3470 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
3471
3472 if (spec->aloopback_ctl &&
3473 snd_hda_get_bool_hint(codec, "loopback") == 1) {
3474 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
3475 return -ENOMEM;
3476 }
3477
3478 stac_init_power_map(codec);
3479
3480 return 0;
3481 }
3482
3483
3484 static int stac_init(struct hda_codec *codec)
3485 {
3486 struct sigmatel_spec *spec = codec->spec;
3487 unsigned int gpio;
3488 int i;
3489
3490 /* override some hints */
3491 stac_store_hints(codec);
3492
3493 /* set up GPIO */
3494 gpio = spec->gpio_data;
3495 /* turn on EAPD statically when spec->eapd_switch isn't set.
3496 * otherwise, unsol event will turn it on/off dynamically
3497 */
3498 if (!spec->eapd_switch)
3499 gpio |= spec->eapd_mask;
3500 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3501
3502 snd_hda_gen_init(codec);
3503
3504 /* sync the power-map */
3505 if (spec->num_pwrs)
3506 snd_hda_codec_write(codec, codec->afg, 0,
3507 AC_VERB_IDT_SET_POWER_MAP,
3508 spec->power_map_bits);
3509
3510 /* power down inactive ADCs */
3511 if (spec->powerdown_adcs) {
3512 for (i = 0; i < spec->gen.num_all_adcs; i++) {
3513 if (spec->active_adcs & (1 << i))
3514 continue;
3515 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
3516 AC_VERB_SET_POWER_STATE,
3517 AC_PWRST_D3);
3518 }
3519 }
3520
3521 /* power down unused DACs */
3522 for (i = 0; i < spec->gen.num_all_dacs; i++) {
3523 if (!snd_hda_get_nid_path(codec, spec->gen.all_dacs[i], 0))
3524 snd_hda_codec_write(codec, spec->gen.all_dacs[i], 0,
3525 AC_VERB_SET_POWER_STATE,
3526 AC_PWRST_D3);
3527 }
3528
3529 return 0;
3530 }
3531
3532 static void stac_shutup(struct hda_codec *codec)
3533 {
3534 struct sigmatel_spec *spec = codec->spec;
3535
3536 snd_hda_shutup_pins(codec);
3537
3538 if (spec->eapd_mask)
3539 stac_gpio_set(codec, spec->gpio_mask,
3540 spec->gpio_dir, spec->gpio_data &
3541 ~spec->eapd_mask);
3542 }
3543
3544 static void stac_free(struct hda_codec *codec)
3545 {
3546 struct sigmatel_spec *spec = codec->spec;
3547
3548 if (!spec)
3549 return;
3550
3551 snd_hda_gen_spec_free(&spec->gen);
3552 kfree(spec);
3553 snd_hda_detach_beep_device(codec);
3554 }
3555
3556 #ifdef CONFIG_PROC_FS
3557 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
3558 struct hda_codec *codec, hda_nid_t nid)
3559 {
3560 if (nid == codec->afg)
3561 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
3562 snd_hda_codec_read(codec, nid, 0,
3563 AC_VERB_IDT_GET_POWER_MAP, 0));
3564 }
3565
3566 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
3567 struct hda_codec *codec,
3568 unsigned int verb)
3569 {
3570 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
3571 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
3572 }
3573
3574 /* stac92hd71bxx, stac92hd73xx */
3575 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
3576 struct hda_codec *codec, hda_nid_t nid)
3577 {
3578 stac92hd_proc_hook(buffer, codec, nid);
3579 if (nid == codec->afg)
3580 analog_loop_proc_hook(buffer, codec, 0xfa0);
3581 }
3582
3583 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
3584 struct hda_codec *codec, hda_nid_t nid)
3585 {
3586 if (nid == codec->afg)
3587 analog_loop_proc_hook(buffer, codec, 0xfe0);
3588 }
3589
3590 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
3591 struct hda_codec *codec, hda_nid_t nid)
3592 {
3593 if (nid == codec->afg)
3594 analog_loop_proc_hook(buffer, codec, 0xfeb);
3595 }
3596 #else
3597 #define stac92hd_proc_hook NULL
3598 #define stac92hd7x_proc_hook NULL
3599 #define stac9205_proc_hook NULL
3600 #define stac927x_proc_hook NULL
3601 #endif
3602
3603 #ifdef CONFIG_PM
3604 static int stac_resume(struct hda_codec *codec)
3605 {
3606 codec->patch_ops.init(codec);
3607 snd_hda_codec_resume_amp(codec);
3608 snd_hda_codec_resume_cache(codec);
3609 return 0;
3610 }
3611
3612 static int stac_suspend(struct hda_codec *codec)
3613 {
3614 stac_shutup(codec);
3615 return 0;
3616 }
3617
3618 static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
3619 unsigned int power_state)
3620 {
3621 unsigned int afg_power_state = power_state;
3622 struct sigmatel_spec *spec = codec->spec;
3623
3624 if (power_state == AC_PWRST_D3) {
3625 if (spec->vref_mute_led_nid) {
3626 /* with vref-out pin used for mute led control
3627 * codec AFG is prevented from D3 state
3628 */
3629 afg_power_state = AC_PWRST_D1;
3630 }
3631 /* this delay seems necessary to avoid click noise at power-down */
3632 msleep(100);
3633 }
3634 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
3635 afg_power_state);
3636 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
3637 }
3638 #else
3639 #define stac_suspend NULL
3640 #define stac_resume NULL
3641 #define stac_set_power_state NULL
3642 #endif /* CONFIG_PM */
3643
3644 static const struct hda_codec_ops stac_patch_ops = {
3645 .build_controls = snd_hda_gen_build_controls,
3646 .build_pcms = snd_hda_gen_build_pcms,
3647 .init = stac_init,
3648 .free = stac_free,
3649 .unsol_event = snd_hda_jack_unsol_event,
3650 #ifdef CONFIG_PM
3651 .suspend = stac_suspend,
3652 .resume = stac_resume,
3653 #endif
3654 .reboot_notify = stac_shutup,
3655 };
3656
3657 static int alloc_stac_spec(struct hda_codec *codec)
3658 {
3659 struct sigmatel_spec *spec;
3660
3661 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3662 if (!spec)
3663 return -ENOMEM;
3664 snd_hda_gen_spec_init(&spec->gen);
3665 codec->spec = spec;
3666 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
3667 return 0;
3668 }
3669
3670 static int patch_stac9200(struct hda_codec *codec)
3671 {
3672 struct sigmatel_spec *spec;
3673 int err;
3674
3675 err = alloc_stac_spec(codec);
3676 if (err < 0)
3677 return err;
3678
3679 spec = codec->spec;
3680 spec->linear_tone_beep = 1;
3681 spec->gen.own_eapd_ctl = 1;
3682
3683 codec->patch_ops = stac_patch_ops;
3684
3685 snd_hda_add_verbs(codec, stac9200_eapd_init);
3686
3687 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
3688 stac9200_fixups);
3689 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3690
3691 err = stac_parse_auto_config(codec);
3692 if (err < 0) {
3693 stac_free(codec);
3694 return err;
3695 }
3696
3697 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3698
3699 return 0;
3700 }
3701
3702 static int patch_stac925x(struct hda_codec *codec)
3703 {
3704 struct sigmatel_spec *spec;
3705 int err;
3706
3707 err = alloc_stac_spec(codec);
3708 if (err < 0)
3709 return err;
3710
3711 spec = codec->spec;
3712 spec->linear_tone_beep = 1;
3713 spec->gen.own_eapd_ctl = 1;
3714
3715 codec->patch_ops = stac_patch_ops;
3716
3717 snd_hda_add_verbs(codec, stac925x_core_init);
3718
3719 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
3720 stac925x_fixups);
3721 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3722
3723 err = stac_parse_auto_config(codec);
3724 if (err < 0) {
3725 stac_free(codec);
3726 return err;
3727 }
3728
3729 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3730
3731 return 0;
3732 }
3733
3734 static int patch_stac92hd73xx(struct hda_codec *codec)
3735 {
3736 struct sigmatel_spec *spec;
3737 int err;
3738 int num_dacs;
3739
3740 err = alloc_stac_spec(codec);
3741 if (err < 0)
3742 return err;
3743
3744 spec = codec->spec;
3745 spec->linear_tone_beep = 0;
3746
3747 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
3748 if (num_dacs < 3 || num_dacs > 5) {
3749 printk(KERN_WARNING "hda_codec: Could not determine "
3750 "number of channels defaulting to DAC count\n");
3751 num_dacs = 5;
3752 }
3753
3754 switch (num_dacs) {
3755 case 0x3: /* 6 Channel */
3756 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
3757 break;
3758 case 0x4: /* 8 Channel */
3759 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
3760 break;
3761 case 0x5: /* 10 Channel */
3762 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
3763 break;
3764 }
3765
3766 spec->aloopback_mask = 0x01;
3767 spec->aloopback_shift = 8;
3768
3769 spec->digbeep_nid = 0x1c;
3770
3771 /* GPIO0 High = Enable EAPD */
3772 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
3773 spec->gpio_data = 0x01;
3774
3775 spec->eapd_switch = 1;
3776
3777 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3778 spec->pwr_nids = stac92hd73xx_pwr_nids;
3779
3780 spec->gen.own_eapd_ctl = 1;
3781
3782 codec->patch_ops = stac_patch_ops;
3783
3784 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
3785 stac92hd73xx_fixups);
3786 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3787
3788 if (!spec->volknob_init)
3789 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
3790
3791 err = stac_parse_auto_config(codec);
3792 if (err < 0) {
3793 stac_free(codec);
3794 return err;
3795 }
3796
3797 codec->proc_widget_hook = stac92hd7x_proc_hook;
3798
3799 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3800
3801 return 0;
3802 }
3803
3804 static void stac_setup_gpio(struct hda_codec *codec)
3805 {
3806 struct sigmatel_spec *spec = codec->spec;
3807
3808 if (spec->gpio_led) {
3809 if (!spec->vref_mute_led_nid) {
3810 spec->gpio_mask |= spec->gpio_led;
3811 spec->gpio_dir |= spec->gpio_led;
3812 spec->gpio_data |= spec->gpio_led;
3813 } else {
3814 codec->patch_ops.set_power_state =
3815 stac_set_power_state;
3816 }
3817 }
3818
3819 if (spec->mic_mute_led_gpio) {
3820 spec->gpio_mask |= spec->mic_mute_led_gpio;
3821 spec->gpio_dir |= spec->mic_mute_led_gpio;
3822 spec->mic_mute_led_on = true;
3823 spec->gpio_data |= spec->mic_mute_led_gpio;
3824
3825 spec->gen.cap_sync_hook = stac_capture_led_hook;
3826 }
3827 }
3828
3829 static int patch_stac92hd83xxx(struct hda_codec *codec)
3830 {
3831 struct sigmatel_spec *spec;
3832 int err;
3833
3834 err = alloc_stac_spec(codec);
3835 if (err < 0)
3836 return err;
3837
3838 codec->epss = 0; /* longer delay needed for D3 */
3839
3840 spec = codec->spec;
3841 spec->linear_tone_beep = 0;
3842 spec->gen.own_eapd_ctl = 1;
3843
3844 spec->digbeep_nid = 0x21;
3845 spec->pwr_nids = stac92hd83xxx_pwr_nids;
3846 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
3847 spec->default_polarity = -1; /* no default cfg */
3848
3849 codec->patch_ops = stac_patch_ops;
3850
3851 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
3852
3853 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
3854 stac92hd83xxx_fixups);
3855 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3856
3857 stac_setup_gpio(codec);
3858
3859 err = stac_parse_auto_config(codec);
3860 if (err < 0) {
3861 stac_free(codec);
3862 return err;
3863 }
3864
3865 codec->proc_widget_hook = stac92hd_proc_hook;
3866
3867 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3868
3869 return 0;
3870 }
3871
3872 static int patch_stac92hd71bxx(struct hda_codec *codec)
3873 {
3874 struct sigmatel_spec *spec;
3875 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
3876 int err;
3877
3878 err = alloc_stac_spec(codec);
3879 if (err < 0)
3880 return err;
3881
3882 spec = codec->spec;
3883 spec->linear_tone_beep = 0;
3884 spec->gen.own_eapd_ctl = 1;
3885
3886 codec->patch_ops = stac_patch_ops;
3887
3888 /* GPIO0 = EAPD */
3889 spec->gpio_mask = 0x01;
3890 spec->gpio_dir = 0x01;
3891 spec->gpio_data = 0x01;
3892
3893 switch (codec->vendor_id) {
3894 case 0x111d76b6: /* 4 Port without Analog Mixer */
3895 case 0x111d76b7:
3896 unmute_init++;
3897 break;
3898 case 0x111d7608: /* 5 Port with Analog Mixer */
3899 if ((codec->revision_id & 0xf) == 0 ||
3900 (codec->revision_id & 0xf) == 1)
3901 spec->stream_delay = 40; /* 40 milliseconds */
3902
3903 /* disable VSW */
3904 unmute_init++;
3905 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
3906 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
3907 break;
3908 case 0x111d7603: /* 6 Port with Analog Mixer */
3909 if ((codec->revision_id & 0xf) == 1)
3910 spec->stream_delay = 40; /* 40 milliseconds */
3911
3912 break;
3913 }
3914
3915 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
3916 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
3917
3918 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
3919 snd_hda_sequence_write_cache(codec, unmute_init);
3920
3921 spec->aloopback_ctl = &stac92hd71bxx_loopback;
3922 spec->aloopback_mask = 0x50;
3923 spec->aloopback_shift = 0;
3924
3925 spec->powerdown_adcs = 1;
3926 spec->digbeep_nid = 0x26;
3927 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3928 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3929
3930 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
3931 stac92hd71bxx_fixups);
3932 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3933
3934 stac_setup_gpio(codec);
3935
3936 err = stac_parse_auto_config(codec);
3937 if (err < 0) {
3938 stac_free(codec);
3939 return err;
3940 }
3941
3942 codec->proc_widget_hook = stac92hd7x_proc_hook;
3943
3944 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3945
3946 return 0;
3947 }
3948
3949 static int patch_stac922x(struct hda_codec *codec)
3950 {
3951 struct sigmatel_spec *spec;
3952 int err;
3953
3954 err = alloc_stac_spec(codec);
3955 if (err < 0)
3956 return err;
3957
3958 spec = codec->spec;
3959 spec->linear_tone_beep = 1;
3960 spec->gen.own_eapd_ctl = 1;
3961
3962 codec->patch_ops = stac_patch_ops;
3963
3964 snd_hda_add_verbs(codec, stac922x_core_init);
3965
3966 /* Fix Mux capture level; max to 2 */
3967 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3968 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3969 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3970 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3971 (0 << AC_AMPCAP_MUTE_SHIFT));
3972
3973 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
3974 stac922x_fixups);
3975 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3976
3977 err = stac_parse_auto_config(codec);
3978 if (err < 0) {
3979 stac_free(codec);
3980 return err;
3981 }
3982
3983 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3984
3985 return 0;
3986 }
3987
3988 static int patch_stac927x(struct hda_codec *codec)
3989 {
3990 struct sigmatel_spec *spec;
3991 int err;
3992
3993 err = alloc_stac_spec(codec);
3994 if (err < 0)
3995 return err;
3996
3997 spec = codec->spec;
3998 spec->linear_tone_beep = 1;
3999 spec->gen.own_eapd_ctl = 1;
4000
4001 spec->digbeep_nid = 0x23;
4002
4003 /* GPIO0 High = Enable EAPD */
4004 spec->eapd_mask = spec->gpio_mask = 0x01;
4005 spec->gpio_dir = spec->gpio_data = 0x01;
4006
4007 spec->aloopback_ctl = &stac927x_loopback;
4008 spec->aloopback_mask = 0x40;
4009 spec->aloopback_shift = 0;
4010 spec->eapd_switch = 1;
4011
4012 codec->patch_ops = stac_patch_ops;
4013
4014 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4015 stac927x_fixups);
4016 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4017
4018 if (!spec->volknob_init)
4019 snd_hda_add_verbs(codec, stac927x_core_init);
4020
4021 err = stac_parse_auto_config(codec);
4022 if (err < 0) {
4023 stac_free(codec);
4024 return err;
4025 }
4026
4027 codec->proc_widget_hook = stac927x_proc_hook;
4028
4029 /*
4030 * !!FIXME!!
4031 * The STAC927x seem to require fairly long delays for certain
4032 * command sequences. With too short delays (even if the answer
4033 * is set to RIRB properly), it results in the silence output
4034 * on some hardwares like Dell.
4035 *
4036 * The below flag enables the longer delay (see get_response
4037 * in hda_intel.c).
4038 */
4039 codec->bus->needs_damn_long_delay = 1;
4040
4041 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4042
4043 return 0;
4044 }
4045
4046 static int patch_stac9205(struct hda_codec *codec)
4047 {
4048 struct sigmatel_spec *spec;
4049 int err;
4050
4051 err = alloc_stac_spec(codec);
4052 if (err < 0)
4053 return err;
4054
4055 spec = codec->spec;
4056 spec->linear_tone_beep = 1;
4057 spec->gen.own_eapd_ctl = 1;
4058
4059 spec->digbeep_nid = 0x23;
4060
4061 snd_hda_add_verbs(codec, stac9205_core_init);
4062 spec->aloopback_ctl = &stac9205_loopback;
4063
4064 spec->aloopback_mask = 0x40;
4065 spec->aloopback_shift = 0;
4066
4067 /* GPIO0 High = EAPD */
4068 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4069 spec->gpio_data = 0x01;
4070
4071 /* Turn on/off EAPD per HP plugging */
4072 spec->eapd_switch = 1;
4073
4074 codec->patch_ops = stac_patch_ops;
4075
4076 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4077 stac9205_fixups);
4078 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4079
4080 err = stac_parse_auto_config(codec);
4081 if (err < 0) {
4082 stac_free(codec);
4083 return err;
4084 }
4085
4086 codec->proc_widget_hook = stac9205_proc_hook;
4087
4088 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4089
4090 return 0;
4091 }
4092
4093 /*
4094 * STAC9872 hack
4095 */
4096
4097 static const struct hda_verb stac9872_core_init[] = {
4098 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4099 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4100 {}
4101 };
4102
4103 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4104 { 0x0a, 0x03211020 },
4105 { 0x0b, 0x411111f0 },
4106 { 0x0c, 0x411111f0 },
4107 { 0x0d, 0x03a15030 },
4108 { 0x0e, 0x411111f0 },
4109 { 0x0f, 0x90170110 },
4110 { 0x11, 0x411111f0 },
4111 { 0x13, 0x411111f0 },
4112 { 0x14, 0x90a7013e },
4113 {}
4114 };
4115
4116 static const struct hda_model_fixup stac9872_models[] = {
4117 { .id = STAC_9872_VAIO, .name = "vaio" },
4118 {}
4119 };
4120
4121 static const struct hda_fixup stac9872_fixups[] = {
4122 [STAC_9872_VAIO] = {
4123 .type = HDA_FIXUP_PINS,
4124 .v.pins = stac9872_vaio_pin_configs,
4125 },
4126 };
4127
4128 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
4129 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4130 "Sony VAIO F/S", STAC_9872_VAIO),
4131 {} /* terminator */
4132 };
4133
4134 static int patch_stac9872(struct hda_codec *codec)
4135 {
4136 struct sigmatel_spec *spec;
4137 int err;
4138
4139 err = alloc_stac_spec(codec);
4140 if (err < 0)
4141 return err;
4142
4143 spec = codec->spec;
4144 spec->linear_tone_beep = 1;
4145 spec->gen.own_eapd_ctl = 1;
4146
4147 codec->patch_ops = stac_patch_ops;
4148
4149 snd_hda_add_verbs(codec, stac9872_core_init);
4150
4151 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4152 stac9872_fixups);
4153 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4154
4155 err = stac_parse_auto_config(codec);
4156 if (err < 0) {
4157 stac_free(codec);
4158 return -EINVAL;
4159 }
4160
4161 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4162
4163 return 0;
4164 }
4165
4166
4167 /*
4168 * patch entries
4169 */
4170 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4171 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4172 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4173 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4174 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4175 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4176 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4177 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4178 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4179 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4180 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4181 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4182 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4183 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4184 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4185 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4186 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4187 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4188 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4189 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4190 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4191 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4192 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4193 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4194 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4195 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4196 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4197 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4198 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4199 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
4200 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4201 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
4202 /* The following does not take into account .id=0x83847661 when subsys =
4203 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4204 * currently not fully supported.
4205 */
4206 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4207 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4208 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
4209 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
4210 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4211 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4212 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4213 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4214 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4215 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4216 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4217 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
4218 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4219 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4220 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
4221 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
4222 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
4223 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
4224 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
4225 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
4226 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
4227 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
4228 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
4229 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
4230 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4231 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
4232 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4233 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4234 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4235 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4236 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4237 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4238 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4239 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4240 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4241 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
4242 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
4243 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
4244 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
4245 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
4246 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
4247 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
4248 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
4249 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
4250 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
4251 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
4252 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
4253 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
4254 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
4255 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
4256 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
4257 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4258 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
4259 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
4260 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
4261 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
4262 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
4263 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
4264 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
4265 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
4266 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
4267 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
4268 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
4269 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
4270 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
4271 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
4272 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
4273 {} /* terminator */
4274 };
4275
4276 MODULE_ALIAS("snd-hda-codec-id:8384*");
4277 MODULE_ALIAS("snd-hda-codec-id:111d*");
4278
4279 MODULE_LICENSE("GPL");
4280 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
4281
4282 static struct hda_codec_preset_list sigmatel_list = {
4283 .preset = snd_hda_preset_sigmatel,
4284 .owner = THIS_MODULE,
4285 };
4286
4287 static int __init patch_sigmatel_init(void)
4288 {
4289 return snd_hda_add_codec_preset(&sigmatel_list);
4290 }
4291
4292 static void __exit patch_sigmatel_exit(void)
4293 {
4294 snd_hda_delete_codec_preset(&sigmatel_list);
4295 }
4296
4297 module_init(patch_sigmatel_init)
4298 module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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