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[deliverable/linux.git] / sound / pci / hda / patch_sigmatel.c
1 /*
2 * Universal Interface for Intel High Definition Audio Codec
3 *
4 * HD audio interface patch for SigmaTel STAC92xx
5 *
6 * Copyright (c) 2005 Embedded Alley Solutions, Inc.
7 * Matt Porter <mporter@embeddedalley.com>
8 *
9 * Based on patch_cmedia.c and patch_realtek.c
10 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
11 *
12 * This driver is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or
15 * (at your option) any later version.
16 *
17 * This driver is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
25 */
26
27 #include <linux/init.h>
28 #include <linux/delay.h>
29 #include <linux/slab.h>
30 #include <linux/pci.h>
31 #include <linux/dmi.h>
32 #include <linux/module.h>
33 #include <sound/core.h>
34 #include <sound/asoundef.h>
35 #include <sound/jack.h>
36 #include <sound/tlv.h>
37 #include "hda_codec.h"
38 #include "hda_local.h"
39 #include "hda_auto_parser.h"
40 #include "hda_beep.h"
41 #include "hda_jack.h"
42 #include "hda_generic.h"
43
44 enum {
45 STAC_VREF_EVENT = 8,
46 STAC_PWR_EVENT,
47 };
48
49 enum {
50 STAC_REF,
51 STAC_9200_OQO,
52 STAC_9200_DELL_D21,
53 STAC_9200_DELL_D22,
54 STAC_9200_DELL_D23,
55 STAC_9200_DELL_M21,
56 STAC_9200_DELL_M22,
57 STAC_9200_DELL_M23,
58 STAC_9200_DELL_M24,
59 STAC_9200_DELL_M25,
60 STAC_9200_DELL_M26,
61 STAC_9200_DELL_M27,
62 STAC_9200_M4,
63 STAC_9200_M4_2,
64 STAC_9200_PANASONIC,
65 STAC_9200_EAPD_INIT,
66 STAC_9200_MODELS
67 };
68
69 enum {
70 STAC_9205_REF,
71 STAC_9205_DELL_M42,
72 STAC_9205_DELL_M43,
73 STAC_9205_DELL_M44,
74 STAC_9205_EAPD,
75 STAC_9205_MODELS
76 };
77
78 enum {
79 STAC_92HD73XX_NO_JD, /* no jack-detection */
80 STAC_92HD73XX_REF,
81 STAC_92HD73XX_INTEL,
82 STAC_DELL_M6_AMIC,
83 STAC_DELL_M6_DMIC,
84 STAC_DELL_M6_BOTH,
85 STAC_DELL_EQ,
86 STAC_ALIENWARE_M17X,
87 STAC_92HD73XX_MODELS
88 };
89
90 enum {
91 STAC_92HD83XXX_REF,
92 STAC_92HD83XXX_PWR_REF,
93 STAC_DELL_S14,
94 STAC_DELL_VOSTRO_3500,
95 STAC_92HD83XXX_HP_cNB11_INTQUAD,
96 STAC_HP_DV7_4000,
97 STAC_HP_ZEPHYR,
98 STAC_92HD83XXX_HP_LED,
99 STAC_92HD83XXX_HP_INV_LED,
100 STAC_92HD83XXX_HP_MIC_LED,
101 STAC_92HD83XXX_HEADSET_JACK,
102 STAC_92HD83XXX_HP,
103 STAC_HP_ENVY_BASS,
104 STAC_92HD83XXX_MODELS
105 };
106
107 enum {
108 STAC_92HD71BXX_REF,
109 STAC_DELL_M4_1,
110 STAC_DELL_M4_2,
111 STAC_DELL_M4_3,
112 STAC_HP_M4,
113 STAC_HP_DV4,
114 STAC_HP_DV5,
115 STAC_HP_HDX,
116 STAC_92HD71BXX_HP,
117 STAC_92HD71BXX_NO_DMIC,
118 STAC_92HD71BXX_NO_SMUX,
119 STAC_92HD71BXX_MODELS
120 };
121
122 enum {
123 STAC_925x_REF,
124 STAC_M1,
125 STAC_M1_2,
126 STAC_M2,
127 STAC_M2_2,
128 STAC_M3,
129 STAC_M5,
130 STAC_M6,
131 STAC_925x_MODELS
132 };
133
134 enum {
135 STAC_D945_REF,
136 STAC_D945GTP3,
137 STAC_D945GTP5,
138 STAC_INTEL_MAC_V1,
139 STAC_INTEL_MAC_V2,
140 STAC_INTEL_MAC_V3,
141 STAC_INTEL_MAC_V4,
142 STAC_INTEL_MAC_V5,
143 STAC_INTEL_MAC_AUTO,
144 STAC_ECS_202,
145 STAC_922X_DELL_D81,
146 STAC_922X_DELL_D82,
147 STAC_922X_DELL_M81,
148 STAC_922X_DELL_M82,
149 STAC_922X_INTEL_MAC_GPIO,
150 STAC_922X_MODELS
151 };
152
153 enum {
154 STAC_D965_REF_NO_JD, /* no jack-detection */
155 STAC_D965_REF,
156 STAC_D965_3ST,
157 STAC_D965_5ST,
158 STAC_D965_5ST_NO_FP,
159 STAC_D965_VERBS,
160 STAC_DELL_3ST,
161 STAC_DELL_BIOS,
162 STAC_DELL_BIOS_SPDIF,
163 STAC_927X_DELL_DMIC,
164 STAC_927X_VOLKNOB,
165 STAC_927X_MODELS
166 };
167
168 enum {
169 STAC_9872_VAIO,
170 STAC_9872_MODELS
171 };
172
173 struct sigmatel_spec {
174 struct hda_gen_spec gen;
175
176 unsigned int eapd_switch: 1;
177 unsigned int linear_tone_beep:1;
178 unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
179 unsigned int volknob_init:1; /* special volume-knob initialization */
180 unsigned int powerdown_adcs:1;
181
182 /* gpio lines */
183 unsigned int eapd_mask;
184 unsigned int gpio_mask;
185 unsigned int gpio_dir;
186 unsigned int gpio_data;
187 unsigned int gpio_mute;
188 unsigned int gpio_led;
189 unsigned int gpio_led_polarity;
190 unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
191 unsigned int vref_led;
192 int default_polarity;
193
194 unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
195 bool mic_mute_led_on; /* current mic mute state */
196
197 /* stream */
198 unsigned int stream_delay;
199
200 /* analog loopback */
201 const struct snd_kcontrol_new *aloopback_ctl;
202 unsigned int aloopback;
203 unsigned char aloopback_mask;
204 unsigned char aloopback_shift;
205
206 /* power management */
207 unsigned int power_map_bits;
208 unsigned int num_pwrs;
209 const hda_nid_t *pwr_nids;
210 unsigned int active_adcs;
211
212 /* beep widgets */
213 hda_nid_t anabeep_nid;
214 hda_nid_t digbeep_nid;
215 };
216
217 #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
218 #define AC_VERB_IDT_GET_POWER_MAP 0xfec
219
220 static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
221 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
222 0x0f, 0x10, 0x11
223 };
224
225 static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
226 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
227 0x0f, 0x10
228 };
229
230 static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
231 0x0a, 0x0d, 0x0f
232 };
233
234
235 /*
236 * PCM hooks
237 */
238 static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
239 struct hda_codec *codec,
240 struct snd_pcm_substream *substream,
241 int action)
242 {
243 struct sigmatel_spec *spec = codec->spec;
244 if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
245 msleep(spec->stream_delay);
246 }
247
248 static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
249 struct hda_codec *codec,
250 struct snd_pcm_substream *substream,
251 int action)
252 {
253 struct sigmatel_spec *spec = codec->spec;
254 int i, idx = 0;
255
256 if (!spec->powerdown_adcs)
257 return;
258
259 for (i = 0; i < spec->gen.num_all_adcs; i++) {
260 if (spec->gen.all_adcs[i] == hinfo->nid) {
261 idx = i;
262 break;
263 }
264 }
265
266 switch (action) {
267 case HDA_GEN_PCM_ACT_OPEN:
268 msleep(40);
269 snd_hda_codec_write(codec, hinfo->nid, 0,
270 AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
271 spec->active_adcs |= (1 << idx);
272 break;
273 case HDA_GEN_PCM_ACT_CLOSE:
274 snd_hda_codec_write(codec, hinfo->nid, 0,
275 AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
276 spec->active_adcs &= ~(1 << idx);
277 break;
278 }
279 }
280
281 /*
282 * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
283 * funky external mute control using GPIO pins.
284 */
285
286 static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
287 unsigned int dir_mask, unsigned int data)
288 {
289 unsigned int gpiostate, gpiomask, gpiodir;
290
291 snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
292
293 gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
294 AC_VERB_GET_GPIO_DATA, 0);
295 gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
296
297 gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
298 AC_VERB_GET_GPIO_MASK, 0);
299 gpiomask |= mask;
300
301 gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
302 AC_VERB_GET_GPIO_DIRECTION, 0);
303 gpiodir |= dir_mask;
304
305 /* Configure GPIOx as CMOS */
306 snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
307
308 snd_hda_codec_write(codec, codec->afg, 0,
309 AC_VERB_SET_GPIO_MASK, gpiomask);
310 snd_hda_codec_read(codec, codec->afg, 0,
311 AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
312
313 msleep(1);
314
315 snd_hda_codec_read(codec, codec->afg, 0,
316 AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
317 }
318
319 /* hook for controlling mic-mute LED GPIO */
320 static void stac_capture_led_hook(struct hda_codec *codec,
321 struct snd_ctl_elem_value *ucontrol)
322 {
323 struct sigmatel_spec *spec = codec->spec;
324 bool mute;
325
326 if (!ucontrol)
327 return;
328
329 mute = !(ucontrol->value.integer.value[0] ||
330 ucontrol->value.integer.value[1]);
331 if (spec->mic_mute_led_on != mute) {
332 spec->mic_mute_led_on = mute;
333 if (mute)
334 spec->gpio_data |= spec->mic_mute_led_gpio;
335 else
336 spec->gpio_data &= ~spec->mic_mute_led_gpio;
337 stac_gpio_set(codec, spec->gpio_mask,
338 spec->gpio_dir, spec->gpio_data);
339 }
340 }
341
342 static int stac_vrefout_set(struct hda_codec *codec,
343 hda_nid_t nid, unsigned int new_vref)
344 {
345 int error, pinctl;
346
347 snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
348 pinctl = snd_hda_codec_read(codec, nid, 0,
349 AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
350
351 if (pinctl < 0)
352 return pinctl;
353
354 pinctl &= 0xff;
355 pinctl &= ~AC_PINCTL_VREFEN;
356 pinctl |= (new_vref & AC_PINCTL_VREFEN);
357
358 error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
359 if (error < 0)
360 return error;
361
362 return 1;
363 }
364
365 /* update mute-LED accoring to the master switch */
366 static void stac_update_led_status(struct hda_codec *codec, int enabled)
367 {
368 struct sigmatel_spec *spec = codec->spec;
369 int muted = !enabled;
370
371 if (!spec->gpio_led)
372 return;
373
374 /* LED state is inverted on these systems */
375 if (spec->gpio_led_polarity)
376 muted = !muted;
377
378 if (!spec->vref_mute_led_nid) {
379 if (muted)
380 spec->gpio_data |= spec->gpio_led;
381 else
382 spec->gpio_data &= ~spec->gpio_led;
383 stac_gpio_set(codec, spec->gpio_mask,
384 spec->gpio_dir, spec->gpio_data);
385 } else {
386 spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
387 stac_vrefout_set(codec, spec->vref_mute_led_nid,
388 spec->vref_led);
389 }
390 }
391
392 /* vmaster hook to update mute LED */
393 static void stac_vmaster_hook(void *private_data, int val)
394 {
395 stac_update_led_status(private_data, val);
396 }
397
398 /* automute hook to handle GPIO mute and EAPD updates */
399 static void stac_update_outputs(struct hda_codec *codec)
400 {
401 struct sigmatel_spec *spec = codec->spec;
402
403 if (spec->gpio_mute)
404 spec->gen.master_mute =
405 !(snd_hda_codec_read(codec, codec->afg, 0,
406 AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
407
408 snd_hda_gen_update_outputs(codec);
409
410 if (spec->eapd_mask && spec->eapd_switch) {
411 unsigned int val = spec->gpio_data;
412 if (spec->gen.speaker_muted)
413 val &= ~spec->eapd_mask;
414 else
415 val |= spec->eapd_mask;
416 if (spec->gpio_data != val)
417 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
418 val);
419 }
420 }
421
422 static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
423 bool enable, bool do_write)
424 {
425 struct sigmatel_spec *spec = codec->spec;
426 unsigned int idx, val;
427
428 for (idx = 0; idx < spec->num_pwrs; idx++) {
429 if (spec->pwr_nids[idx] == nid)
430 break;
431 }
432 if (idx >= spec->num_pwrs)
433 return;
434
435 idx = 1 << idx;
436
437 val = spec->power_map_bits;
438 if (enable)
439 val &= ~idx;
440 else
441 val |= idx;
442
443 /* power down unused output ports */
444 if (val != spec->power_map_bits) {
445 spec->power_map_bits = val;
446 if (do_write)
447 snd_hda_codec_write(codec, codec->afg, 0,
448 AC_VERB_IDT_SET_POWER_MAP, val);
449 }
450 }
451
452 /* update power bit per jack plug/unplug */
453 static void jack_update_power(struct hda_codec *codec,
454 struct hda_jack_tbl *jack)
455 {
456 struct sigmatel_spec *spec = codec->spec;
457 int i;
458
459 if (!spec->num_pwrs)
460 return;
461
462 if (jack && jack->nid) {
463 stac_toggle_power_map(codec, jack->nid,
464 snd_hda_jack_detect(codec, jack->nid),
465 true);
466 return;
467 }
468
469 /* update all jacks */
470 for (i = 0; i < spec->num_pwrs; i++) {
471 hda_nid_t nid = spec->pwr_nids[i];
472 jack = snd_hda_jack_tbl_get(codec, nid);
473 if (!jack || !jack->action)
474 continue;
475 if (jack->action == STAC_PWR_EVENT ||
476 jack->action <= HDA_GEN_LAST_EVENT)
477 stac_toggle_power_map(codec, nid,
478 snd_hda_jack_detect(codec, nid),
479 false);
480 }
481
482 snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
483 spec->power_map_bits);
484 }
485
486 static void stac_hp_automute(struct hda_codec *codec,
487 struct hda_jack_tbl *jack)
488 {
489 snd_hda_gen_hp_automute(codec, jack);
490 jack_update_power(codec, jack);
491 }
492
493 static void stac_line_automute(struct hda_codec *codec,
494 struct hda_jack_tbl *jack)
495 {
496 snd_hda_gen_line_automute(codec, jack);
497 jack_update_power(codec, jack);
498 }
499
500 static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
501 {
502 unsigned int data;
503
504 data = snd_hda_codec_read(codec, codec->afg, 0,
505 AC_VERB_GET_GPIO_DATA, 0);
506 /* toggle VREF state based on GPIOx status */
507 snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
508 !!(data & (1 << event->private_data)));
509 }
510
511 /* initialize the power map and enable the power event to jacks that
512 * haven't been assigned to automute
513 */
514 static void stac_init_power_map(struct hda_codec *codec)
515 {
516 struct sigmatel_spec *spec = codec->spec;
517 int i;
518
519 for (i = 0; i < spec->num_pwrs; i++) {
520 hda_nid_t nid = spec->pwr_nids[i];
521 unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
522 def_conf = get_defcfg_connect(def_conf);
523 if (snd_hda_jack_tbl_get(codec, nid))
524 continue;
525 if (def_conf == AC_JACK_PORT_COMPLEX &&
526 !(spec->vref_mute_led_nid == nid ||
527 is_jack_detectable(codec, nid))) {
528 snd_hda_jack_detect_enable_callback(codec, nid,
529 STAC_PWR_EVENT,
530 jack_update_power);
531 } else {
532 if (def_conf == AC_JACK_PORT_NONE)
533 stac_toggle_power_map(codec, nid, false, false);
534 else
535 stac_toggle_power_map(codec, nid, true, false);
536 }
537 }
538 }
539
540 /*
541 */
542
543 static inline bool get_int_hint(struct hda_codec *codec, const char *key,
544 int *valp)
545 {
546 return !snd_hda_get_int_hint(codec, key, valp);
547 }
548
549 /* override some hints from the hwdep entry */
550 static void stac_store_hints(struct hda_codec *codec)
551 {
552 struct sigmatel_spec *spec = codec->spec;
553 int val;
554
555 if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
556 spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
557 spec->gpio_mask;
558 }
559 if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
560 spec->gpio_mask &= spec->gpio_mask;
561 if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
562 spec->gpio_dir &= spec->gpio_mask;
563 if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
564 spec->eapd_mask &= spec->gpio_mask;
565 if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
566 spec->gpio_mute &= spec->gpio_mask;
567 val = snd_hda_get_bool_hint(codec, "eapd_switch");
568 if (val >= 0)
569 spec->eapd_switch = val;
570 }
571
572 /*
573 * loopback controls
574 */
575
576 #define stac_aloopback_info snd_ctl_boolean_mono_info
577
578 static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
579 struct snd_ctl_elem_value *ucontrol)
580 {
581 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
582 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
583 struct sigmatel_spec *spec = codec->spec;
584
585 ucontrol->value.integer.value[0] = !!(spec->aloopback &
586 (spec->aloopback_mask << idx));
587 return 0;
588 }
589
590 static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
591 struct snd_ctl_elem_value *ucontrol)
592 {
593 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
594 struct sigmatel_spec *spec = codec->spec;
595 unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
596 unsigned int dac_mode;
597 unsigned int val, idx_val;
598
599 idx_val = spec->aloopback_mask << idx;
600 if (ucontrol->value.integer.value[0])
601 val = spec->aloopback | idx_val;
602 else
603 val = spec->aloopback & ~idx_val;
604 if (spec->aloopback == val)
605 return 0;
606
607 spec->aloopback = val;
608
609 /* Only return the bits defined by the shift value of the
610 * first two bytes of the mask
611 */
612 dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
613 kcontrol->private_value & 0xFFFF, 0x0);
614 dac_mode >>= spec->aloopback_shift;
615
616 if (spec->aloopback & idx_val) {
617 snd_hda_power_up(codec);
618 dac_mode |= idx_val;
619 } else {
620 snd_hda_power_down(codec);
621 dac_mode &= ~idx_val;
622 }
623
624 snd_hda_codec_write_cache(codec, codec->afg, 0,
625 kcontrol->private_value >> 16, dac_mode);
626
627 return 1;
628 }
629
630 #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
631 { \
632 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
633 .name = "Analog Loopback", \
634 .count = cnt, \
635 .info = stac_aloopback_info, \
636 .get = stac_aloopback_get, \
637 .put = stac_aloopback_put, \
638 .private_value = verb_read | (verb_write << 16), \
639 }
640
641 /*
642 * Mute LED handling on HP laptops
643 */
644
645 /* check whether it's a HP laptop with a docking port */
646 static bool hp_bnb2011_with_dock(struct hda_codec *codec)
647 {
648 if (codec->vendor_id != 0x111d7605 &&
649 codec->vendor_id != 0x111d76d1)
650 return false;
651
652 switch (codec->subsystem_id) {
653 case 0x103c1618:
654 case 0x103c1619:
655 case 0x103c161a:
656 case 0x103c161b:
657 case 0x103c161c:
658 case 0x103c161d:
659 case 0x103c161e:
660 case 0x103c161f:
661
662 case 0x103c162a:
663 case 0x103c162b:
664
665 case 0x103c1630:
666 case 0x103c1631:
667
668 case 0x103c1633:
669 case 0x103c1634:
670 case 0x103c1635:
671
672 case 0x103c3587:
673 case 0x103c3588:
674 case 0x103c3589:
675 case 0x103c358a:
676
677 case 0x103c3667:
678 case 0x103c3668:
679 case 0x103c3669:
680
681 return true;
682 }
683 return false;
684 }
685
686 static bool hp_blike_system(u32 subsystem_id)
687 {
688 switch (subsystem_id) {
689 case 0x103c1520:
690 case 0x103c1521:
691 case 0x103c1523:
692 case 0x103c1524:
693 case 0x103c1525:
694 case 0x103c1722:
695 case 0x103c1723:
696 case 0x103c1724:
697 case 0x103c1725:
698 case 0x103c1726:
699 case 0x103c1727:
700 case 0x103c1728:
701 case 0x103c1729:
702 case 0x103c172a:
703 case 0x103c172b:
704 case 0x103c307e:
705 case 0x103c307f:
706 case 0x103c3080:
707 case 0x103c3081:
708 case 0x103c7007:
709 case 0x103c7008:
710 return true;
711 }
712 return false;
713 }
714
715 static void set_hp_led_gpio(struct hda_codec *codec)
716 {
717 struct sigmatel_spec *spec = codec->spec;
718 unsigned int gpio;
719
720 if (spec->gpio_led)
721 return;
722
723 gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
724 gpio &= AC_GPIO_IO_COUNT;
725 if (gpio > 3)
726 spec->gpio_led = 0x08; /* GPIO 3 */
727 else
728 spec->gpio_led = 0x01; /* GPIO 0 */
729 }
730
731 /*
732 * This method searches for the mute LED GPIO configuration
733 * provided as OEM string in SMBIOS. The format of that string
734 * is HP_Mute_LED_P_G or HP_Mute_LED_P
735 * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
736 * that corresponds to the NOT muted state of the master volume
737 * and G is the index of the GPIO to use as the mute LED control (0..9)
738 * If _G portion is missing it is assigned based on the codec ID
739 *
740 * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
741 * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
742 *
743 *
744 * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
745 * SMBIOS - at least the ones I have seen do not have them - which include
746 * my own system (HP Pavilion dv6-1110ax) and my cousin's
747 * HP Pavilion dv9500t CTO.
748 * Need more information on whether it is true across the entire series.
749 * -- kunal
750 */
751 static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
752 {
753 struct sigmatel_spec *spec = codec->spec;
754 const struct dmi_device *dev = NULL;
755
756 if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
757 get_int_hint(codec, "gpio_led_polarity",
758 &spec->gpio_led_polarity);
759 return 1;
760 }
761
762 while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
763 if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
764 &spec->gpio_led_polarity,
765 &spec->gpio_led) == 2) {
766 unsigned int max_gpio;
767 max_gpio = snd_hda_param_read(codec, codec->afg,
768 AC_PAR_GPIO_CAP);
769 max_gpio &= AC_GPIO_IO_COUNT;
770 if (spec->gpio_led < max_gpio)
771 spec->gpio_led = 1 << spec->gpio_led;
772 else
773 spec->vref_mute_led_nid = spec->gpio_led;
774 return 1;
775 }
776 if (sscanf(dev->name, "HP_Mute_LED_%d",
777 &spec->gpio_led_polarity) == 1) {
778 set_hp_led_gpio(codec);
779 return 1;
780 }
781 /* BIOS bug: unfilled OEM string */
782 if (strstr(dev->name, "HP_Mute_LED_P_G")) {
783 set_hp_led_gpio(codec);
784 if (default_polarity >= 0)
785 spec->gpio_led_polarity = default_polarity;
786 else
787 spec->gpio_led_polarity = 1;
788 return 1;
789 }
790 }
791
792 /*
793 * Fallback case - if we don't find the DMI strings,
794 * we statically set the GPIO - if not a B-series system
795 * and default polarity is provided
796 */
797 if (!hp_blike_system(codec->subsystem_id) &&
798 (default_polarity == 0 || default_polarity == 1)) {
799 set_hp_led_gpio(codec);
800 spec->gpio_led_polarity = default_polarity;
801 return 1;
802 }
803 return 0;
804 }
805
806 /*
807 * PC beep controls
808 */
809
810 /* create PC beep volume controls */
811 static int stac_auto_create_beep_ctls(struct hda_codec *codec,
812 hda_nid_t nid)
813 {
814 struct sigmatel_spec *spec = codec->spec;
815 u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
816 struct snd_kcontrol_new *knew;
817 static struct snd_kcontrol_new abeep_mute_ctl =
818 HDA_CODEC_MUTE(NULL, 0, 0, 0);
819 static struct snd_kcontrol_new dbeep_mute_ctl =
820 HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
821 static struct snd_kcontrol_new beep_vol_ctl =
822 HDA_CODEC_VOLUME(NULL, 0, 0, 0);
823
824 /* check for mute support for the the amp */
825 if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
826 const struct snd_kcontrol_new *temp;
827 if (spec->anabeep_nid == nid)
828 temp = &abeep_mute_ctl;
829 else
830 temp = &dbeep_mute_ctl;
831 knew = snd_hda_gen_add_kctl(&spec->gen,
832 "Beep Playback Switch", temp);
833 if (!knew)
834 return -ENOMEM;
835 knew->private_value =
836 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
837 }
838
839 /* check to see if there is volume support for the amp */
840 if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
841 knew = snd_hda_gen_add_kctl(&spec->gen,
842 "Beep Playback Volume",
843 &beep_vol_ctl);
844 if (!knew)
845 return -ENOMEM;
846 knew->private_value =
847 HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
848 }
849 return 0;
850 }
851
852 #ifdef CONFIG_SND_HDA_INPUT_BEEP
853 #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
854
855 static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
856 struct snd_ctl_elem_value *ucontrol)
857 {
858 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
859 ucontrol->value.integer.value[0] = codec->beep->enabled;
860 return 0;
861 }
862
863 static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
864 struct snd_ctl_elem_value *ucontrol)
865 {
866 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
867 return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
868 }
869
870 static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
871 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
872 .name = "Beep Playback Switch",
873 .info = stac_dig_beep_switch_info,
874 .get = stac_dig_beep_switch_get,
875 .put = stac_dig_beep_switch_put,
876 };
877
878 static int stac_beep_switch_ctl(struct hda_codec *codec)
879 {
880 struct sigmatel_spec *spec = codec->spec;
881
882 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
883 return -ENOMEM;
884 return 0;
885 }
886 #endif
887
888 /*
889 */
890
891 static const struct hda_verb stac9200_core_init[] = {
892 /* set dac0mux for dac converter */
893 { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
894 {}
895 };
896
897 static const struct hda_verb stac9200_eapd_init[] = {
898 /* set dac0mux for dac converter */
899 {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
900 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
901 {}
902 };
903
904 static const struct hda_verb dell_eq_core_init[] = {
905 /* set master volume to max value without distortion
906 * and direct control */
907 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
908 {}
909 };
910
911 static const struct hda_verb stac92hd73xx_core_init[] = {
912 /* set master volume and direct control */
913 { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
914 {}
915 };
916
917 static const struct hda_verb stac92hd83xxx_core_init[] = {
918 /* power state controls amps */
919 { 0x01, AC_VERB_SET_EAPD, 1 << 2},
920 {}
921 };
922
923 static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
924 { 0x22, 0x785, 0x43 },
925 { 0x22, 0x782, 0xe0 },
926 { 0x22, 0x795, 0x00 },
927 {}
928 };
929
930 static const struct hda_verb stac92hd71bxx_core_init[] = {
931 /* set master volume and direct control */
932 { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
933 {}
934 };
935
936 static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
937 /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
938 { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
939 { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
940 { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
941 {}
942 };
943
944 static const struct hda_verb stac925x_core_init[] = {
945 /* set dac0mux for dac converter */
946 { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
947 /* mute the master volume */
948 { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
949 {}
950 };
951
952 static const struct hda_verb stac922x_core_init[] = {
953 /* set master volume and direct control */
954 { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
955 {}
956 };
957
958 static const struct hda_verb d965_core_init[] = {
959 /* unmute node 0x1b */
960 { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
961 /* select node 0x03 as DAC */
962 { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
963 {}
964 };
965
966 static const struct hda_verb dell_3st_core_init[] = {
967 /* don't set delta bit */
968 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
969 /* unmute node 0x1b */
970 {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
971 /* select node 0x03 as DAC */
972 {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
973 {}
974 };
975
976 static const struct hda_verb stac927x_core_init[] = {
977 /* set master volume and direct control */
978 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
979 /* enable analog pc beep path */
980 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
981 {}
982 };
983
984 static const struct hda_verb stac927x_volknob_core_init[] = {
985 /* don't set delta bit */
986 {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
987 /* enable analog pc beep path */
988 {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
989 {}
990 };
991
992 static const struct hda_verb stac9205_core_init[] = {
993 /* set master volume and direct control */
994 { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
995 /* enable analog pc beep path */
996 { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
997 {}
998 };
999
1000 static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
1001 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
1002
1003 static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
1004 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
1005
1006 static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
1007 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
1008
1009 static const struct snd_kcontrol_new stac92hd71bxx_loopback =
1010 STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
1011
1012 static const struct snd_kcontrol_new stac9205_loopback =
1013 STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
1014
1015 static const struct snd_kcontrol_new stac927x_loopback =
1016 STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
1017
1018 static const struct hda_pintbl ref9200_pin_configs[] = {
1019 { 0x08, 0x01c47010 },
1020 { 0x09, 0x01447010 },
1021 { 0x0d, 0x0221401f },
1022 { 0x0e, 0x01114010 },
1023 { 0x0f, 0x02a19020 },
1024 { 0x10, 0x01a19021 },
1025 { 0x11, 0x90100140 },
1026 { 0x12, 0x01813122 },
1027 {}
1028 };
1029
1030 static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
1031 { 0x08, 0x400000fe },
1032 { 0x09, 0x404500f4 },
1033 { 0x0d, 0x400100f0 },
1034 { 0x0e, 0x90110010 },
1035 { 0x0f, 0x400100f1 },
1036 { 0x10, 0x02a1902e },
1037 { 0x11, 0x500000f2 },
1038 { 0x12, 0x500000f3 },
1039 {}
1040 };
1041
1042 static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
1043 { 0x08, 0x400000fe },
1044 { 0x09, 0x404500f4 },
1045 { 0x0d, 0x400100f0 },
1046 { 0x0e, 0x90110010 },
1047 { 0x0f, 0x400100f1 },
1048 { 0x10, 0x02a1902e },
1049 { 0x11, 0x500000f2 },
1050 { 0x12, 0x500000f3 },
1051 {}
1052 };
1053
1054 /*
1055 STAC 9200 pin configs for
1056 102801A8
1057 102801DE
1058 102801E8
1059 */
1060 static const struct hda_pintbl dell9200_d21_pin_configs[] = {
1061 { 0x08, 0x400001f0 },
1062 { 0x09, 0x400001f1 },
1063 { 0x0d, 0x02214030 },
1064 { 0x0e, 0x01014010 },
1065 { 0x0f, 0x02a19020 },
1066 { 0x10, 0x01a19021 },
1067 { 0x11, 0x90100140 },
1068 { 0x12, 0x01813122 },
1069 {}
1070 };
1071
1072 /*
1073 STAC 9200 pin configs for
1074 102801C0
1075 102801C1
1076 */
1077 static const struct hda_pintbl dell9200_d22_pin_configs[] = {
1078 { 0x08, 0x400001f0 },
1079 { 0x09, 0x400001f1 },
1080 { 0x0d, 0x0221401f },
1081 { 0x0e, 0x01014010 },
1082 { 0x0f, 0x01813020 },
1083 { 0x10, 0x02a19021 },
1084 { 0x11, 0x90100140 },
1085 { 0x12, 0x400001f2 },
1086 {}
1087 };
1088
1089 /*
1090 STAC 9200 pin configs for
1091 102801C4 (Dell Dimension E310)
1092 102801C5
1093 102801C7
1094 102801D9
1095 102801DA
1096 102801E3
1097 */
1098 static const struct hda_pintbl dell9200_d23_pin_configs[] = {
1099 { 0x08, 0x400001f0 },
1100 { 0x09, 0x400001f1 },
1101 { 0x0d, 0x0221401f },
1102 { 0x0e, 0x01014010 },
1103 { 0x0f, 0x01813020 },
1104 { 0x10, 0x01a19021 },
1105 { 0x11, 0x90100140 },
1106 { 0x12, 0x400001f2 },
1107 {}
1108 };
1109
1110
1111 /*
1112 STAC 9200-32 pin configs for
1113 102801B5 (Dell Inspiron 630m)
1114 102801D8 (Dell Inspiron 640m)
1115 */
1116 static const struct hda_pintbl dell9200_m21_pin_configs[] = {
1117 { 0x08, 0x40c003fa },
1118 { 0x09, 0x03441340 },
1119 { 0x0d, 0x0321121f },
1120 { 0x0e, 0x90170310 },
1121 { 0x0f, 0x408003fb },
1122 { 0x10, 0x03a11020 },
1123 { 0x11, 0x401003fc },
1124 { 0x12, 0x403003fd },
1125 {}
1126 };
1127
1128 /*
1129 STAC 9200-32 pin configs for
1130 102801C2 (Dell Latitude D620)
1131 102801C8
1132 102801CC (Dell Latitude D820)
1133 102801D4
1134 102801D6
1135 */
1136 static const struct hda_pintbl dell9200_m22_pin_configs[] = {
1137 { 0x08, 0x40c003fa },
1138 { 0x09, 0x0144131f },
1139 { 0x0d, 0x0321121f },
1140 { 0x0e, 0x90170310 },
1141 { 0x0f, 0x90a70321 },
1142 { 0x10, 0x03a11020 },
1143 { 0x11, 0x401003fb },
1144 { 0x12, 0x40f000fc },
1145 {}
1146 };
1147
1148 /*
1149 STAC 9200-32 pin configs for
1150 102801CE (Dell XPS M1710)
1151 102801CF (Dell Precision M90)
1152 */
1153 static const struct hda_pintbl dell9200_m23_pin_configs[] = {
1154 { 0x08, 0x40c003fa },
1155 { 0x09, 0x01441340 },
1156 { 0x0d, 0x0421421f },
1157 { 0x0e, 0x90170310 },
1158 { 0x0f, 0x408003fb },
1159 { 0x10, 0x04a1102e },
1160 { 0x11, 0x90170311 },
1161 { 0x12, 0x403003fc },
1162 {}
1163 };
1164
1165 /*
1166 STAC 9200-32 pin configs for
1167 102801C9
1168 102801CA
1169 102801CB (Dell Latitude 120L)
1170 102801D3
1171 */
1172 static const struct hda_pintbl dell9200_m24_pin_configs[] = {
1173 { 0x08, 0x40c003fa },
1174 { 0x09, 0x404003fb },
1175 { 0x0d, 0x0321121f },
1176 { 0x0e, 0x90170310 },
1177 { 0x0f, 0x408003fc },
1178 { 0x10, 0x03a11020 },
1179 { 0x11, 0x401003fd },
1180 { 0x12, 0x403003fe },
1181 {}
1182 };
1183
1184 /*
1185 STAC 9200-32 pin configs for
1186 102801BD (Dell Inspiron E1505n)
1187 102801EE
1188 102801EF
1189 */
1190 static const struct hda_pintbl dell9200_m25_pin_configs[] = {
1191 { 0x08, 0x40c003fa },
1192 { 0x09, 0x01441340 },
1193 { 0x0d, 0x0421121f },
1194 { 0x0e, 0x90170310 },
1195 { 0x0f, 0x408003fb },
1196 { 0x10, 0x04a11020 },
1197 { 0x11, 0x401003fc },
1198 { 0x12, 0x403003fd },
1199 {}
1200 };
1201
1202 /*
1203 STAC 9200-32 pin configs for
1204 102801F5 (Dell Inspiron 1501)
1205 102801F6
1206 */
1207 static const struct hda_pintbl dell9200_m26_pin_configs[] = {
1208 { 0x08, 0x40c003fa },
1209 { 0x09, 0x404003fb },
1210 { 0x0d, 0x0421121f },
1211 { 0x0e, 0x90170310 },
1212 { 0x0f, 0x408003fc },
1213 { 0x10, 0x04a11020 },
1214 { 0x11, 0x401003fd },
1215 { 0x12, 0x403003fe },
1216 {}
1217 };
1218
1219 /*
1220 STAC 9200-32
1221 102801CD (Dell Inspiron E1705/9400)
1222 */
1223 static const struct hda_pintbl dell9200_m27_pin_configs[] = {
1224 { 0x08, 0x40c003fa },
1225 { 0x09, 0x01441340 },
1226 { 0x0d, 0x0421121f },
1227 { 0x0e, 0x90170310 },
1228 { 0x0f, 0x90170310 },
1229 { 0x10, 0x04a11020 },
1230 { 0x11, 0x90170310 },
1231 { 0x12, 0x40f003fc },
1232 {}
1233 };
1234
1235 static const struct hda_pintbl oqo9200_pin_configs[] = {
1236 { 0x08, 0x40c000f0 },
1237 { 0x09, 0x404000f1 },
1238 { 0x0d, 0x0221121f },
1239 { 0x0e, 0x02211210 },
1240 { 0x0f, 0x90170111 },
1241 { 0x10, 0x90a70120 },
1242 { 0x11, 0x400000f2 },
1243 { 0x12, 0x400000f3 },
1244 {}
1245 };
1246
1247
1248 static void stac9200_fixup_panasonic(struct hda_codec *codec,
1249 const struct hda_fixup *fix, int action)
1250 {
1251 struct sigmatel_spec *spec = codec->spec;
1252
1253 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
1254 spec->gpio_mask = spec->gpio_dir = 0x09;
1255 spec->gpio_data = 0x00;
1256 /* CF-74 has no headphone detection, and the driver should *NOT*
1257 * do detection and HP/speaker toggle because the hardware does it.
1258 */
1259 spec->gen.suppress_auto_mute = 1;
1260 }
1261 }
1262
1263
1264 static const struct hda_fixup stac9200_fixups[] = {
1265 [STAC_REF] = {
1266 .type = HDA_FIXUP_PINS,
1267 .v.pins = ref9200_pin_configs,
1268 },
1269 [STAC_9200_OQO] = {
1270 .type = HDA_FIXUP_PINS,
1271 .v.pins = oqo9200_pin_configs,
1272 .chained = true,
1273 .chain_id = STAC_9200_EAPD_INIT,
1274 },
1275 [STAC_9200_DELL_D21] = {
1276 .type = HDA_FIXUP_PINS,
1277 .v.pins = dell9200_d21_pin_configs,
1278 },
1279 [STAC_9200_DELL_D22] = {
1280 .type = HDA_FIXUP_PINS,
1281 .v.pins = dell9200_d22_pin_configs,
1282 },
1283 [STAC_9200_DELL_D23] = {
1284 .type = HDA_FIXUP_PINS,
1285 .v.pins = dell9200_d23_pin_configs,
1286 },
1287 [STAC_9200_DELL_M21] = {
1288 .type = HDA_FIXUP_PINS,
1289 .v.pins = dell9200_m21_pin_configs,
1290 },
1291 [STAC_9200_DELL_M22] = {
1292 .type = HDA_FIXUP_PINS,
1293 .v.pins = dell9200_m22_pin_configs,
1294 },
1295 [STAC_9200_DELL_M23] = {
1296 .type = HDA_FIXUP_PINS,
1297 .v.pins = dell9200_m23_pin_configs,
1298 },
1299 [STAC_9200_DELL_M24] = {
1300 .type = HDA_FIXUP_PINS,
1301 .v.pins = dell9200_m24_pin_configs,
1302 },
1303 [STAC_9200_DELL_M25] = {
1304 .type = HDA_FIXUP_PINS,
1305 .v.pins = dell9200_m25_pin_configs,
1306 },
1307 [STAC_9200_DELL_M26] = {
1308 .type = HDA_FIXUP_PINS,
1309 .v.pins = dell9200_m26_pin_configs,
1310 },
1311 [STAC_9200_DELL_M27] = {
1312 .type = HDA_FIXUP_PINS,
1313 .v.pins = dell9200_m27_pin_configs,
1314 },
1315 [STAC_9200_M4] = {
1316 .type = HDA_FIXUP_PINS,
1317 .v.pins = gateway9200_m4_pin_configs,
1318 .chained = true,
1319 .chain_id = STAC_9200_EAPD_INIT,
1320 },
1321 [STAC_9200_M4_2] = {
1322 .type = HDA_FIXUP_PINS,
1323 .v.pins = gateway9200_m4_2_pin_configs,
1324 .chained = true,
1325 .chain_id = STAC_9200_EAPD_INIT,
1326 },
1327 [STAC_9200_PANASONIC] = {
1328 .type = HDA_FIXUP_FUNC,
1329 .v.func = stac9200_fixup_panasonic,
1330 },
1331 [STAC_9200_EAPD_INIT] = {
1332 .type = HDA_FIXUP_VERBS,
1333 .v.verbs = (const struct hda_verb[]) {
1334 {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
1335 {}
1336 },
1337 },
1338 };
1339
1340 static const struct hda_model_fixup stac9200_models[] = {
1341 { .id = STAC_REF, .name = "ref" },
1342 { .id = STAC_9200_OQO, .name = "oqo" },
1343 { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
1344 { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
1345 { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
1346 { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
1347 { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
1348 { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
1349 { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
1350 { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
1351 { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
1352 { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
1353 { .id = STAC_9200_M4, .name = "gateway-m4" },
1354 { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
1355 { .id = STAC_9200_PANASONIC, .name = "panasonic" },
1356 {}
1357 };
1358
1359 static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
1360 /* SigmaTel reference board */
1361 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1362 "DFI LanParty", STAC_REF),
1363 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1364 "DFI LanParty", STAC_REF),
1365 /* Dell laptops have BIOS problem */
1366 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
1367 "unknown Dell", STAC_9200_DELL_D21),
1368 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
1369 "Dell Inspiron 630m", STAC_9200_DELL_M21),
1370 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
1371 "Dell Inspiron E1505n", STAC_9200_DELL_M25),
1372 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
1373 "unknown Dell", STAC_9200_DELL_D22),
1374 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
1375 "unknown Dell", STAC_9200_DELL_D22),
1376 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
1377 "Dell Latitude D620", STAC_9200_DELL_M22),
1378 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
1379 "unknown Dell", STAC_9200_DELL_D23),
1380 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
1381 "unknown Dell", STAC_9200_DELL_D23),
1382 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
1383 "unknown Dell", STAC_9200_DELL_M22),
1384 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
1385 "unknown Dell", STAC_9200_DELL_M24),
1386 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
1387 "unknown Dell", STAC_9200_DELL_M24),
1388 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
1389 "Dell Latitude 120L", STAC_9200_DELL_M24),
1390 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
1391 "Dell Latitude D820", STAC_9200_DELL_M22),
1392 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
1393 "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
1394 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
1395 "Dell XPS M1710", STAC_9200_DELL_M23),
1396 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
1397 "Dell Precision M90", STAC_9200_DELL_M23),
1398 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
1399 "unknown Dell", STAC_9200_DELL_M22),
1400 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
1401 "unknown Dell", STAC_9200_DELL_M22),
1402 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
1403 "unknown Dell", STAC_9200_DELL_M22),
1404 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
1405 "Dell Inspiron 640m", STAC_9200_DELL_M21),
1406 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
1407 "unknown Dell", STAC_9200_DELL_D23),
1408 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
1409 "unknown Dell", STAC_9200_DELL_D23),
1410 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
1411 "unknown Dell", STAC_9200_DELL_D21),
1412 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
1413 "unknown Dell", STAC_9200_DELL_D23),
1414 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
1415 "unknown Dell", STAC_9200_DELL_D21),
1416 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
1417 "unknown Dell", STAC_9200_DELL_M25),
1418 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
1419 "unknown Dell", STAC_9200_DELL_M25),
1420 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
1421 "Dell Inspiron 1501", STAC_9200_DELL_M26),
1422 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
1423 "unknown Dell", STAC_9200_DELL_M26),
1424 /* Panasonic */
1425 SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
1426 /* Gateway machines needs EAPD to be set on resume */
1427 SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
1428 SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
1429 SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
1430 /* OQO Mobile */
1431 SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
1432 {} /* terminator */
1433 };
1434
1435 static const struct hda_pintbl ref925x_pin_configs[] = {
1436 { 0x07, 0x40c003f0 },
1437 { 0x08, 0x424503f2 },
1438 { 0x0a, 0x01813022 },
1439 { 0x0b, 0x02a19021 },
1440 { 0x0c, 0x90a70320 },
1441 { 0x0d, 0x02214210 },
1442 { 0x10, 0x01019020 },
1443 { 0x11, 0x9033032e },
1444 {}
1445 };
1446
1447 static const struct hda_pintbl stac925xM1_pin_configs[] = {
1448 { 0x07, 0x40c003f4 },
1449 { 0x08, 0x424503f2 },
1450 { 0x0a, 0x400000f3 },
1451 { 0x0b, 0x02a19020 },
1452 { 0x0c, 0x40a000f0 },
1453 { 0x0d, 0x90100210 },
1454 { 0x10, 0x400003f1 },
1455 { 0x11, 0x9033032e },
1456 {}
1457 };
1458
1459 static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
1460 { 0x07, 0x40c003f4 },
1461 { 0x08, 0x424503f2 },
1462 { 0x0a, 0x400000f3 },
1463 { 0x0b, 0x02a19020 },
1464 { 0x0c, 0x40a000f0 },
1465 { 0x0d, 0x90100210 },
1466 { 0x10, 0x400003f1 },
1467 { 0x11, 0x9033032e },
1468 {}
1469 };
1470
1471 static const struct hda_pintbl stac925xM2_pin_configs[] = {
1472 { 0x07, 0x40c003f4 },
1473 { 0x08, 0x424503f2 },
1474 { 0x0a, 0x400000f3 },
1475 { 0x0b, 0x02a19020 },
1476 { 0x0c, 0x40a000f0 },
1477 { 0x0d, 0x90100210 },
1478 { 0x10, 0x400003f1 },
1479 { 0x11, 0x9033032e },
1480 {}
1481 };
1482
1483 static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
1484 { 0x07, 0x40c003f4 },
1485 { 0x08, 0x424503f2 },
1486 { 0x0a, 0x400000f3 },
1487 { 0x0b, 0x02a19020 },
1488 { 0x0c, 0x40a000f0 },
1489 { 0x0d, 0x90100210 },
1490 { 0x10, 0x400003f1 },
1491 { 0x11, 0x9033032e },
1492 {}
1493 };
1494
1495 static const struct hda_pintbl stac925xM3_pin_configs[] = {
1496 { 0x07, 0x40c003f4 },
1497 { 0x08, 0x424503f2 },
1498 { 0x0a, 0x400000f3 },
1499 { 0x0b, 0x02a19020 },
1500 { 0x0c, 0x40a000f0 },
1501 { 0x0d, 0x90100210 },
1502 { 0x10, 0x400003f1 },
1503 { 0x11, 0x503303f3 },
1504 {}
1505 };
1506
1507 static const struct hda_pintbl stac925xM5_pin_configs[] = {
1508 { 0x07, 0x40c003f4 },
1509 { 0x08, 0x424503f2 },
1510 { 0x0a, 0x400000f3 },
1511 { 0x0b, 0x02a19020 },
1512 { 0x0c, 0x40a000f0 },
1513 { 0x0d, 0x90100210 },
1514 { 0x10, 0x400003f1 },
1515 { 0x11, 0x9033032e },
1516 {}
1517 };
1518
1519 static const struct hda_pintbl stac925xM6_pin_configs[] = {
1520 { 0x07, 0x40c003f4 },
1521 { 0x08, 0x424503f2 },
1522 { 0x0a, 0x400000f3 },
1523 { 0x0b, 0x02a19020 },
1524 { 0x0c, 0x40a000f0 },
1525 { 0x0d, 0x90100210 },
1526 { 0x10, 0x400003f1 },
1527 { 0x11, 0x90330320 },
1528 {}
1529 };
1530
1531 static const struct hda_fixup stac925x_fixups[] = {
1532 [STAC_REF] = {
1533 .type = HDA_FIXUP_PINS,
1534 .v.pins = ref925x_pin_configs,
1535 },
1536 [STAC_M1] = {
1537 .type = HDA_FIXUP_PINS,
1538 .v.pins = stac925xM1_pin_configs,
1539 },
1540 [STAC_M1_2] = {
1541 .type = HDA_FIXUP_PINS,
1542 .v.pins = stac925xM1_2_pin_configs,
1543 },
1544 [STAC_M2] = {
1545 .type = HDA_FIXUP_PINS,
1546 .v.pins = stac925xM2_pin_configs,
1547 },
1548 [STAC_M2_2] = {
1549 .type = HDA_FIXUP_PINS,
1550 .v.pins = stac925xM2_2_pin_configs,
1551 },
1552 [STAC_M3] = {
1553 .type = HDA_FIXUP_PINS,
1554 .v.pins = stac925xM3_pin_configs,
1555 },
1556 [STAC_M5] = {
1557 .type = HDA_FIXUP_PINS,
1558 .v.pins = stac925xM5_pin_configs,
1559 },
1560 [STAC_M6] = {
1561 .type = HDA_FIXUP_PINS,
1562 .v.pins = stac925xM6_pin_configs,
1563 },
1564 };
1565
1566 static const struct hda_model_fixup stac925x_models[] = {
1567 { .id = STAC_REF, .name = "ref" },
1568 { .id = STAC_M1, .name = "m1" },
1569 { .id = STAC_M1_2, .name = "m1-2" },
1570 { .id = STAC_M2, .name = "m2" },
1571 { .id = STAC_M2_2, .name = "m2-2" },
1572 { .id = STAC_M3, .name = "m3" },
1573 { .id = STAC_M5, .name = "m5" },
1574 { .id = STAC_M6, .name = "m6" },
1575 {}
1576 };
1577
1578 static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
1579 /* SigmaTel reference board */
1580 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
1581 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
1582 SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
1583
1584 /* Default table for unknown ID */
1585 SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
1586
1587 /* gateway machines are checked via codec ssid */
1588 SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
1589 SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
1590 SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
1591 SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
1592 SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
1593 /* Not sure about the brand name for those */
1594 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
1595 SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
1596 SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
1597 SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
1598 {} /* terminator */
1599 };
1600
1601 static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
1602 { 0x0a, 0x02214030 },
1603 { 0x0b, 0x02a19040 },
1604 { 0x0c, 0x01a19020 },
1605 { 0x0d, 0x02214030 },
1606 { 0x0e, 0x0181302e },
1607 { 0x0f, 0x01014010 },
1608 { 0x10, 0x01014020 },
1609 { 0x11, 0x01014030 },
1610 { 0x12, 0x02319040 },
1611 { 0x13, 0x90a000f0 },
1612 { 0x14, 0x90a000f0 },
1613 { 0x22, 0x01452050 },
1614 { 0x23, 0x01452050 },
1615 {}
1616 };
1617
1618 static const struct hda_pintbl dell_m6_pin_configs[] = {
1619 { 0x0a, 0x0321101f },
1620 { 0x0b, 0x4f00000f },
1621 { 0x0c, 0x4f0000f0 },
1622 { 0x0d, 0x90170110 },
1623 { 0x0e, 0x03a11020 },
1624 { 0x0f, 0x0321101f },
1625 { 0x10, 0x4f0000f0 },
1626 { 0x11, 0x4f0000f0 },
1627 { 0x12, 0x4f0000f0 },
1628 { 0x13, 0x90a60160 },
1629 { 0x14, 0x4f0000f0 },
1630 { 0x22, 0x4f0000f0 },
1631 { 0x23, 0x4f0000f0 },
1632 {}
1633 };
1634
1635 static const struct hda_pintbl alienware_m17x_pin_configs[] = {
1636 { 0x0a, 0x0321101f },
1637 { 0x0b, 0x0321101f },
1638 { 0x0c, 0x03a11020 },
1639 { 0x0d, 0x03014020 },
1640 { 0x0e, 0x90170110 },
1641 { 0x0f, 0x4f0000f0 },
1642 { 0x10, 0x4f0000f0 },
1643 { 0x11, 0x4f0000f0 },
1644 { 0x12, 0x4f0000f0 },
1645 { 0x13, 0x90a60160 },
1646 { 0x14, 0x4f0000f0 },
1647 { 0x22, 0x4f0000f0 },
1648 { 0x23, 0x904601b0 },
1649 {}
1650 };
1651
1652 static const struct hda_pintbl intel_dg45id_pin_configs[] = {
1653 { 0x0a, 0x02214230 },
1654 { 0x0b, 0x02A19240 },
1655 { 0x0c, 0x01013214 },
1656 { 0x0d, 0x01014210 },
1657 { 0x0e, 0x01A19250 },
1658 { 0x0f, 0x01011212 },
1659 { 0x10, 0x01016211 },
1660 {}
1661 };
1662
1663 static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
1664 const struct hda_fixup *fix, int action)
1665 {
1666 struct sigmatel_spec *spec = codec->spec;
1667
1668 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1669 return;
1670
1671 snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
1672 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
1673 }
1674
1675 static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
1676 {
1677 struct sigmatel_spec *spec = codec->spec;
1678
1679 snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
1680 spec->eapd_switch = 0;
1681 }
1682
1683 static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
1684 const struct hda_fixup *fix, int action)
1685 {
1686 struct sigmatel_spec *spec = codec->spec;
1687
1688 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1689 return;
1690
1691 stac92hd73xx_fixup_dell(codec);
1692 snd_hda_add_verbs(codec, dell_eq_core_init);
1693 spec->volknob_init = 1;
1694 }
1695
1696 /* Analog Mics */
1697 static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
1698 const struct hda_fixup *fix, int action)
1699 {
1700 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1701 return;
1702
1703 stac92hd73xx_fixup_dell(codec);
1704 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1705 }
1706
1707 /* Digital Mics */
1708 static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
1709 const struct hda_fixup *fix, int action)
1710 {
1711 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1712 return;
1713
1714 stac92hd73xx_fixup_dell(codec);
1715 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1716 }
1717
1718 /* Both */
1719 static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
1720 const struct hda_fixup *fix, int action)
1721 {
1722 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1723 return;
1724
1725 stac92hd73xx_fixup_dell(codec);
1726 snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
1727 snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
1728 }
1729
1730 static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
1731 const struct hda_fixup *fix, int action)
1732 {
1733 struct sigmatel_spec *spec = codec->spec;
1734
1735 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1736 return;
1737
1738 snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
1739 spec->eapd_switch = 0;
1740 }
1741
1742 static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
1743 const struct hda_fixup *fix, int action)
1744 {
1745 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1746 codec->no_jack_detect = 1;
1747 }
1748
1749 static const struct hda_fixup stac92hd73xx_fixups[] = {
1750 [STAC_92HD73XX_REF] = {
1751 .type = HDA_FIXUP_FUNC,
1752 .v.func = stac92hd73xx_fixup_ref,
1753 },
1754 [STAC_DELL_M6_AMIC] = {
1755 .type = HDA_FIXUP_FUNC,
1756 .v.func = stac92hd73xx_fixup_dell_m6_amic,
1757 },
1758 [STAC_DELL_M6_DMIC] = {
1759 .type = HDA_FIXUP_FUNC,
1760 .v.func = stac92hd73xx_fixup_dell_m6_dmic,
1761 },
1762 [STAC_DELL_M6_BOTH] = {
1763 .type = HDA_FIXUP_FUNC,
1764 .v.func = stac92hd73xx_fixup_dell_m6_both,
1765 },
1766 [STAC_DELL_EQ] = {
1767 .type = HDA_FIXUP_FUNC,
1768 .v.func = stac92hd73xx_fixup_dell_eq,
1769 },
1770 [STAC_ALIENWARE_M17X] = {
1771 .type = HDA_FIXUP_FUNC,
1772 .v.func = stac92hd73xx_fixup_alienware_m17x,
1773 },
1774 [STAC_92HD73XX_INTEL] = {
1775 .type = HDA_FIXUP_PINS,
1776 .v.pins = intel_dg45id_pin_configs,
1777 },
1778 [STAC_92HD73XX_NO_JD] = {
1779 .type = HDA_FIXUP_FUNC,
1780 .v.func = stac92hd73xx_fixup_no_jd,
1781 }
1782 };
1783
1784 static const struct hda_model_fixup stac92hd73xx_models[] = {
1785 { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
1786 { .id = STAC_92HD73XX_REF, .name = "ref" },
1787 { .id = STAC_92HD73XX_INTEL, .name = "intel" },
1788 { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
1789 { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
1790 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1791 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1792 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1793 {}
1794 };
1795
1796 static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1797 /* SigmaTel reference board */
1798 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
1799 "DFI LanParty", STAC_92HD73XX_REF),
1800 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
1801 "DFI LanParty", STAC_92HD73XX_REF),
1802 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
1803 "Intel DG45ID", STAC_92HD73XX_INTEL),
1804 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
1805 "Intel DG45FC", STAC_92HD73XX_INTEL),
1806 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
1807 "Dell Studio 1535", STAC_DELL_M6_DMIC),
1808 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
1809 "unknown Dell", STAC_DELL_M6_DMIC),
1810 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
1811 "unknown Dell", STAC_DELL_M6_BOTH),
1812 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
1813 "unknown Dell", STAC_DELL_M6_BOTH),
1814 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
1815 "unknown Dell", STAC_DELL_M6_AMIC),
1816 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
1817 "unknown Dell", STAC_DELL_M6_AMIC),
1818 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
1819 "unknown Dell", STAC_DELL_M6_DMIC),
1820 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
1821 "unknown Dell", STAC_DELL_M6_DMIC),
1822 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
1823 "Dell Studio 1537", STAC_DELL_M6_DMIC),
1824 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
1825 "Dell Studio 17", STAC_DELL_M6_DMIC),
1826 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
1827 "Dell Studio 1555", STAC_DELL_M6_DMIC),
1828 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
1829 "Dell Studio 1557", STAC_DELL_M6_DMIC),
1830 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
1831 "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
1832 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
1833 "Dell Studio 1558", STAC_DELL_M6_DMIC),
1834 /* codec SSID matching */
1835 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
1836 "Alienware M17x", STAC_ALIENWARE_M17X),
1837 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
1838 "Alienware M17x", STAC_ALIENWARE_M17X),
1839 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
1840 "Alienware M17x R3", STAC_DELL_EQ),
1841 {} /* terminator */
1842 };
1843
1844 static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
1845 { 0x0a, 0x02214030 },
1846 { 0x0b, 0x02211010 },
1847 { 0x0c, 0x02a19020 },
1848 { 0x0d, 0x02170130 },
1849 { 0x0e, 0x01014050 },
1850 { 0x0f, 0x01819040 },
1851 { 0x10, 0x01014020 },
1852 { 0x11, 0x90a3014e },
1853 { 0x1f, 0x01451160 },
1854 { 0x20, 0x98560170 },
1855 {}
1856 };
1857
1858 static const struct hda_pintbl dell_s14_pin_configs[] = {
1859 { 0x0a, 0x0221403f },
1860 { 0x0b, 0x0221101f },
1861 { 0x0c, 0x02a19020 },
1862 { 0x0d, 0x90170110 },
1863 { 0x0e, 0x40f000f0 },
1864 { 0x0f, 0x40f000f0 },
1865 { 0x10, 0x40f000f0 },
1866 { 0x11, 0x90a60160 },
1867 { 0x1f, 0x40f000f0 },
1868 { 0x20, 0x40f000f0 },
1869 {}
1870 };
1871
1872 static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
1873 { 0x0a, 0x02a11020 },
1874 { 0x0b, 0x0221101f },
1875 { 0x0c, 0x400000f0 },
1876 { 0x0d, 0x90170110 },
1877 { 0x0e, 0x400000f1 },
1878 { 0x0f, 0x400000f2 },
1879 { 0x10, 0x400000f3 },
1880 { 0x11, 0x90a60160 },
1881 { 0x1f, 0x400000f4 },
1882 { 0x20, 0x400000f5 },
1883 {}
1884 };
1885
1886 static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
1887 { 0x0a, 0x03a12050 },
1888 { 0x0b, 0x0321201f },
1889 { 0x0c, 0x40f000f0 },
1890 { 0x0d, 0x90170110 },
1891 { 0x0e, 0x40f000f0 },
1892 { 0x0f, 0x40f000f0 },
1893 { 0x10, 0x90170110 },
1894 { 0x11, 0xd5a30140 },
1895 { 0x1f, 0x40f000f0 },
1896 { 0x20, 0x40f000f0 },
1897 {}
1898 };
1899
1900 static const struct hda_pintbl hp_zephyr_pin_configs[] = {
1901 { 0x0a, 0x01813050 },
1902 { 0x0b, 0x0421201f },
1903 { 0x0c, 0x04a1205e },
1904 { 0x0d, 0x96130310 },
1905 { 0x0e, 0x96130310 },
1906 { 0x0f, 0x0101401f },
1907 { 0x10, 0x1111611f },
1908 { 0x11, 0xd5a30130 },
1909 {}
1910 };
1911
1912 static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
1913 { 0x0a, 0x40f000f0 },
1914 { 0x0b, 0x0221101f },
1915 { 0x0c, 0x02a11020 },
1916 { 0x0d, 0x92170110 },
1917 { 0x0e, 0x40f000f0 },
1918 { 0x0f, 0x92170110 },
1919 { 0x10, 0x40f000f0 },
1920 { 0x11, 0xd5a30130 },
1921 { 0x1f, 0x40f000f0 },
1922 { 0x20, 0x40f000f0 },
1923 {}
1924 };
1925
1926 static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
1927 const struct hda_fixup *fix, int action)
1928 {
1929 struct sigmatel_spec *spec = codec->spec;
1930
1931 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1932 return;
1933
1934 if (hp_bnb2011_with_dock(codec)) {
1935 snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
1936 snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
1937 }
1938
1939 if (find_mute_led_cfg(codec, spec->default_polarity))
1940 snd_printd("mute LED gpio %d polarity %d\n",
1941 spec->gpio_led,
1942 spec->gpio_led_polarity);
1943 }
1944
1945 static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
1946 const struct hda_fixup *fix, int action)
1947 {
1948 if (action != HDA_FIXUP_ACT_PRE_PROBE)
1949 return;
1950
1951 snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
1952 snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
1953 }
1954
1955 static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
1956 const struct hda_fixup *fix, int action)
1957 {
1958 struct sigmatel_spec *spec = codec->spec;
1959
1960 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1961 spec->default_polarity = 0;
1962 }
1963
1964 static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
1965 const struct hda_fixup *fix, int action)
1966 {
1967 struct sigmatel_spec *spec = codec->spec;
1968
1969 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1970 spec->default_polarity = 1;
1971 }
1972
1973 static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
1974 const struct hda_fixup *fix, int action)
1975 {
1976 struct sigmatel_spec *spec = codec->spec;
1977
1978 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1979 spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
1980 }
1981
1982 static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
1983 const struct hda_fixup *fix, int action)
1984 {
1985 struct sigmatel_spec *spec = codec->spec;
1986
1987 if (action == HDA_FIXUP_ACT_PRE_PROBE)
1988 spec->headset_jack = 1;
1989 }
1990
1991 static const struct hda_fixup stac92hd83xxx_fixups[] = {
1992 [STAC_92HD83XXX_REF] = {
1993 .type = HDA_FIXUP_PINS,
1994 .v.pins = ref92hd83xxx_pin_configs,
1995 },
1996 [STAC_92HD83XXX_PWR_REF] = {
1997 .type = HDA_FIXUP_PINS,
1998 .v.pins = ref92hd83xxx_pin_configs,
1999 },
2000 [STAC_DELL_S14] = {
2001 .type = HDA_FIXUP_PINS,
2002 .v.pins = dell_s14_pin_configs,
2003 },
2004 [STAC_DELL_VOSTRO_3500] = {
2005 .type = HDA_FIXUP_PINS,
2006 .v.pins = dell_vostro_3500_pin_configs,
2007 },
2008 [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
2009 .type = HDA_FIXUP_PINS,
2010 .v.pins = hp_cNB11_intquad_pin_configs,
2011 .chained = true,
2012 .chain_id = STAC_92HD83XXX_HP,
2013 },
2014 [STAC_92HD83XXX_HP] = {
2015 .type = HDA_FIXUP_FUNC,
2016 .v.func = stac92hd83xxx_fixup_hp,
2017 },
2018 [STAC_HP_DV7_4000] = {
2019 .type = HDA_FIXUP_PINS,
2020 .v.pins = hp_dv7_4000_pin_configs,
2021 .chained = true,
2022 .chain_id = STAC_92HD83XXX_HP,
2023 },
2024 [STAC_HP_ZEPHYR] = {
2025 .type = HDA_FIXUP_FUNC,
2026 .v.func = stac92hd83xxx_fixup_hp_zephyr,
2027 .chained = true,
2028 .chain_id = STAC_92HD83XXX_HP,
2029 },
2030 [STAC_92HD83XXX_HP_LED] = {
2031 .type = HDA_FIXUP_FUNC,
2032 .v.func = stac92hd83xxx_fixup_hp_led,
2033 .chained = true,
2034 .chain_id = STAC_92HD83XXX_HP,
2035 },
2036 [STAC_92HD83XXX_HP_INV_LED] = {
2037 .type = HDA_FIXUP_FUNC,
2038 .v.func = stac92hd83xxx_fixup_hp_inv_led,
2039 .chained = true,
2040 .chain_id = STAC_92HD83XXX_HP,
2041 },
2042 [STAC_92HD83XXX_HP_MIC_LED] = {
2043 .type = HDA_FIXUP_FUNC,
2044 .v.func = stac92hd83xxx_fixup_hp_mic_led,
2045 .chained = true,
2046 .chain_id = STAC_92HD83XXX_HP,
2047 },
2048 [STAC_92HD83XXX_HEADSET_JACK] = {
2049 .type = HDA_FIXUP_FUNC,
2050 .v.func = stac92hd83xxx_fixup_headset_jack,
2051 },
2052 [STAC_HP_ENVY_BASS] = {
2053 .type = HDA_FIXUP_PINS,
2054 .v.pins = (const struct hda_pintbl[]) {
2055 { 0x0f, 0x90170111 },
2056 {}
2057 },
2058 },
2059 };
2060
2061 static const struct hda_model_fixup stac92hd83xxx_models[] = {
2062 { .id = STAC_92HD83XXX_REF, .name = "ref" },
2063 { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
2064 { .id = STAC_DELL_S14, .name = "dell-s14" },
2065 { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
2066 { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
2067 { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
2068 { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
2069 { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
2070 { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
2071 { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
2072 { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
2073 { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
2074 {}
2075 };
2076
2077 static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
2078 /* SigmaTel reference board */
2079 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2080 "DFI LanParty", STAC_92HD83XXX_REF),
2081 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2082 "DFI LanParty", STAC_92HD83XXX_REF),
2083 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
2084 "unknown Dell", STAC_DELL_S14),
2085 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
2086 "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
2087 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
2088 "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
2089 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
2090 "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
2091 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
2092 "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
2093 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
2094 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2095 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
2096 "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
2097 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
2098 "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
2099 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
2100 "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
2101 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
2102 "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
2103 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
2104 "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
2105 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
2106 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2107 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
2108 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2109 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
2110 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2111 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
2112 "HP Pavilion dv7", STAC_HP_DV7_4000),
2113 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
2114 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2115 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
2116 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2117 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
2118 "HP Envy Spectre", STAC_HP_ENVY_BASS),
2119 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
2120 "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
2121 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
2122 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2123 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
2124 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2125 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
2126 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2127 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
2128 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2129 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
2130 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2131 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
2132 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2133 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
2134 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2135 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
2136 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2137 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
2138 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2139 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
2140 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2141 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
2142 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2143 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
2144 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2145 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
2146 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2147 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
2148 "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
2149 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
2150 "HP", STAC_HP_ZEPHYR),
2151 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
2152 "HP Mini", STAC_92HD83XXX_HP_LED),
2153 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
2154 "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
2155 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
2156 "HP Mini", STAC_92HD83XXX_HP_LED),
2157 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
2158 {} /* terminator */
2159 };
2160
2161 /* HP dv7 bass switch - GPIO5 */
2162 #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
2163 static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
2164 struct snd_ctl_elem_value *ucontrol)
2165 {
2166 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2167 struct sigmatel_spec *spec = codec->spec;
2168 ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
2169 return 0;
2170 }
2171
2172 static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
2173 struct snd_ctl_elem_value *ucontrol)
2174 {
2175 struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
2176 struct sigmatel_spec *spec = codec->spec;
2177 unsigned int gpio_data;
2178
2179 gpio_data = (spec->gpio_data & ~0x20) |
2180 (ucontrol->value.integer.value[0] ? 0x20 : 0);
2181 if (gpio_data == spec->gpio_data)
2182 return 0;
2183 spec->gpio_data = gpio_data;
2184 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
2185 return 1;
2186 }
2187
2188 static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
2189 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2190 .info = stac_hp_bass_gpio_info,
2191 .get = stac_hp_bass_gpio_get,
2192 .put = stac_hp_bass_gpio_put,
2193 };
2194
2195 static int stac_add_hp_bass_switch(struct hda_codec *codec)
2196 {
2197 struct sigmatel_spec *spec = codec->spec;
2198
2199 if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
2200 &stac_hp_bass_sw_ctrl))
2201 return -ENOMEM;
2202
2203 spec->gpio_mask |= 0x20;
2204 spec->gpio_dir |= 0x20;
2205 spec->gpio_data |= 0x20;
2206 return 0;
2207 }
2208
2209 static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
2210 { 0x0a, 0x02214030 },
2211 { 0x0b, 0x02a19040 },
2212 { 0x0c, 0x01a19020 },
2213 { 0x0d, 0x01014010 },
2214 { 0x0e, 0x0181302e },
2215 { 0x0f, 0x01014010 },
2216 { 0x14, 0x01019020 },
2217 { 0x18, 0x90a000f0 },
2218 { 0x19, 0x90a000f0 },
2219 { 0x1e, 0x01452050 },
2220 { 0x1f, 0x01452050 },
2221 {}
2222 };
2223
2224 static const struct hda_pintbl dell_m4_1_pin_configs[] = {
2225 { 0x0a, 0x0421101f },
2226 { 0x0b, 0x04a11221 },
2227 { 0x0c, 0x40f000f0 },
2228 { 0x0d, 0x90170110 },
2229 { 0x0e, 0x23a1902e },
2230 { 0x0f, 0x23014250 },
2231 { 0x14, 0x40f000f0 },
2232 { 0x18, 0x90a000f0 },
2233 { 0x19, 0x40f000f0 },
2234 { 0x1e, 0x4f0000f0 },
2235 { 0x1f, 0x4f0000f0 },
2236 {}
2237 };
2238
2239 static const struct hda_pintbl dell_m4_2_pin_configs[] = {
2240 { 0x0a, 0x0421101f },
2241 { 0x0b, 0x04a11221 },
2242 { 0x0c, 0x90a70330 },
2243 { 0x0d, 0x90170110 },
2244 { 0x0e, 0x23a1902e },
2245 { 0x0f, 0x23014250 },
2246 { 0x14, 0x40f000f0 },
2247 { 0x18, 0x40f000f0 },
2248 { 0x19, 0x40f000f0 },
2249 { 0x1e, 0x044413b0 },
2250 { 0x1f, 0x044413b0 },
2251 {}
2252 };
2253
2254 static const struct hda_pintbl dell_m4_3_pin_configs[] = {
2255 { 0x0a, 0x0421101f },
2256 { 0x0b, 0x04a11221 },
2257 { 0x0c, 0x90a70330 },
2258 { 0x0d, 0x90170110 },
2259 { 0x0e, 0x40f000f0 },
2260 { 0x0f, 0x40f000f0 },
2261 { 0x14, 0x40f000f0 },
2262 { 0x18, 0x90a000f0 },
2263 { 0x19, 0x40f000f0 },
2264 { 0x1e, 0x044413b0 },
2265 { 0x1f, 0x044413b0 },
2266 {}
2267 };
2268
2269 static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
2270 const struct hda_fixup *fix, int action)
2271 {
2272 struct sigmatel_spec *spec = codec->spec;
2273
2274 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2275 return;
2276
2277 snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
2278 spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
2279 }
2280
2281 static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
2282 const struct hda_fixup *fix, int action)
2283 {
2284 struct sigmatel_spec *spec = codec->spec;
2285 struct hda_jack_tbl *jack;
2286
2287 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2288 return;
2289
2290 /* Enable VREF power saving on GPIO1 detect */
2291 snd_hda_codec_write_cache(codec, codec->afg, 0,
2292 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
2293 snd_hda_jack_detect_enable_callback(codec, codec->afg,
2294 STAC_VREF_EVENT,
2295 stac_vref_event);
2296 jack = snd_hda_jack_tbl_get(codec, codec->afg);
2297 if (jack)
2298 jack->private_data = 0x02;
2299
2300 spec->gpio_mask |= 0x02;
2301
2302 /* enable internal microphone */
2303 snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
2304 }
2305
2306 static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
2307 const struct hda_fixup *fix, int action)
2308 {
2309 struct sigmatel_spec *spec = codec->spec;
2310
2311 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2312 return;
2313 spec->gpio_led = 0x01;
2314 }
2315
2316 static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
2317 const struct hda_fixup *fix, int action)
2318 {
2319 unsigned int cap;
2320
2321 switch (action) {
2322 case HDA_FIXUP_ACT_PRE_PROBE:
2323 snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
2324 break;
2325
2326 case HDA_FIXUP_ACT_PROBE:
2327 /* enable bass on HP dv7 */
2328 cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
2329 cap &= AC_GPIO_IO_COUNT;
2330 if (cap >= 6)
2331 stac_add_hp_bass_switch(codec);
2332 break;
2333 }
2334 }
2335
2336 static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
2337 const struct hda_fixup *fix, int action)
2338 {
2339 struct sigmatel_spec *spec = codec->spec;
2340
2341 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2342 return;
2343 spec->gpio_led = 0x08;
2344 }
2345
2346
2347 static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
2348 const struct hda_fixup *fix, int action)
2349 {
2350 struct sigmatel_spec *spec = codec->spec;
2351
2352 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2353 return;
2354
2355 if (hp_blike_system(codec->subsystem_id)) {
2356 unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
2357 if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
2358 get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
2359 get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
2360 /* It was changed in the BIOS to just satisfy MS DTM.
2361 * Lets turn it back into slaved HP
2362 */
2363 pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
2364 | (AC_JACK_HP_OUT <<
2365 AC_DEFCFG_DEVICE_SHIFT);
2366 pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
2367 | AC_DEFCFG_SEQUENCE)))
2368 | 0x1f;
2369 snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
2370 }
2371 }
2372
2373 if (find_mute_led_cfg(codec, 1))
2374 snd_printd("mute LED gpio %d polarity %d\n",
2375 spec->gpio_led,
2376 spec->gpio_led_polarity);
2377
2378 }
2379
2380 static const struct hda_fixup stac92hd71bxx_fixups[] = {
2381 [STAC_92HD71BXX_REF] = {
2382 .type = HDA_FIXUP_FUNC,
2383 .v.func = stac92hd71bxx_fixup_ref,
2384 },
2385 [STAC_DELL_M4_1] = {
2386 .type = HDA_FIXUP_PINS,
2387 .v.pins = dell_m4_1_pin_configs,
2388 },
2389 [STAC_DELL_M4_2] = {
2390 .type = HDA_FIXUP_PINS,
2391 .v.pins = dell_m4_2_pin_configs,
2392 },
2393 [STAC_DELL_M4_3] = {
2394 .type = HDA_FIXUP_PINS,
2395 .v.pins = dell_m4_3_pin_configs,
2396 },
2397 [STAC_HP_M4] = {
2398 .type = HDA_FIXUP_FUNC,
2399 .v.func = stac92hd71bxx_fixup_hp_m4,
2400 .chained = true,
2401 .chain_id = STAC_92HD71BXX_HP,
2402 },
2403 [STAC_HP_DV4] = {
2404 .type = HDA_FIXUP_FUNC,
2405 .v.func = stac92hd71bxx_fixup_hp_dv4,
2406 .chained = true,
2407 .chain_id = STAC_HP_DV5,
2408 },
2409 [STAC_HP_DV5] = {
2410 .type = HDA_FIXUP_FUNC,
2411 .v.func = stac92hd71bxx_fixup_hp_dv5,
2412 .chained = true,
2413 .chain_id = STAC_92HD71BXX_HP,
2414 },
2415 [STAC_HP_HDX] = {
2416 .type = HDA_FIXUP_FUNC,
2417 .v.func = stac92hd71bxx_fixup_hp_hdx,
2418 .chained = true,
2419 .chain_id = STAC_92HD71BXX_HP,
2420 },
2421 [STAC_92HD71BXX_HP] = {
2422 .type = HDA_FIXUP_FUNC,
2423 .v.func = stac92hd71bxx_fixup_hp,
2424 },
2425 };
2426
2427 static const struct hda_model_fixup stac92hd71bxx_models[] = {
2428 { .id = STAC_92HD71BXX_REF, .name = "ref" },
2429 { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
2430 { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
2431 { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
2432 { .id = STAC_HP_M4, .name = "hp-m4" },
2433 { .id = STAC_HP_DV4, .name = "hp-dv4" },
2434 { .id = STAC_HP_DV5, .name = "hp-dv5" },
2435 { .id = STAC_HP_HDX, .name = "hp-hdx" },
2436 { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
2437 {}
2438 };
2439
2440 static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
2441 /* SigmaTel reference board */
2442 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2443 "DFI LanParty", STAC_92HD71BXX_REF),
2444 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2445 "DFI LanParty", STAC_92HD71BXX_REF),
2446 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
2447 "HP", STAC_HP_DV5),
2448 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
2449 "HP", STAC_HP_DV5),
2450 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
2451 "HP dv4-7", STAC_HP_DV4),
2452 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
2453 "HP dv4-7", STAC_HP_DV5),
2454 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
2455 "HP HDX", STAC_HP_HDX), /* HDX18 */
2456 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
2457 "HP mini 1000", STAC_HP_M4),
2458 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
2459 "HP HDX", STAC_HP_HDX), /* HDX16 */
2460 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
2461 "HP dv6", STAC_HP_DV5),
2462 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
2463 "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
2464 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
2465 "HP DV6", STAC_HP_DV5),
2466 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
2467 "HP", STAC_HP_DV5),
2468 SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
2469 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
2470 "unknown Dell", STAC_DELL_M4_1),
2471 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
2472 "unknown Dell", STAC_DELL_M4_1),
2473 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
2474 "unknown Dell", STAC_DELL_M4_1),
2475 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
2476 "unknown Dell", STAC_DELL_M4_1),
2477 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
2478 "unknown Dell", STAC_DELL_M4_1),
2479 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
2480 "unknown Dell", STAC_DELL_M4_1),
2481 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
2482 "unknown Dell", STAC_DELL_M4_1),
2483 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
2484 "unknown Dell", STAC_DELL_M4_2),
2485 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
2486 "unknown Dell", STAC_DELL_M4_2),
2487 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
2488 "unknown Dell", STAC_DELL_M4_2),
2489 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
2490 "unknown Dell", STAC_DELL_M4_2),
2491 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
2492 "unknown Dell", STAC_DELL_M4_3),
2493 {} /* terminator */
2494 };
2495
2496 static const struct hda_pintbl ref922x_pin_configs[] = {
2497 { 0x0a, 0x01014010 },
2498 { 0x0b, 0x01016011 },
2499 { 0x0c, 0x01012012 },
2500 { 0x0d, 0x0221401f },
2501 { 0x0e, 0x01813122 },
2502 { 0x0f, 0x01011014 },
2503 { 0x10, 0x01441030 },
2504 { 0x11, 0x01c41030 },
2505 { 0x15, 0x40000100 },
2506 { 0x1b, 0x40000100 },
2507 {}
2508 };
2509
2510 /*
2511 STAC 922X pin configs for
2512 102801A7
2513 102801AB
2514 102801A9
2515 102801D1
2516 102801D2
2517 */
2518 static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
2519 { 0x0a, 0x02214030 },
2520 { 0x0b, 0x01a19021 },
2521 { 0x0c, 0x01111012 },
2522 { 0x0d, 0x01114010 },
2523 { 0x0e, 0x02a19020 },
2524 { 0x0f, 0x01117011 },
2525 { 0x10, 0x400001f0 },
2526 { 0x11, 0x400001f1 },
2527 { 0x15, 0x01813122 },
2528 { 0x1b, 0x400001f2 },
2529 {}
2530 };
2531
2532 /*
2533 STAC 922X pin configs for
2534 102801AC
2535 102801D0
2536 */
2537 static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
2538 { 0x0a, 0x02214030 },
2539 { 0x0b, 0x01a19021 },
2540 { 0x0c, 0x01111012 },
2541 { 0x0d, 0x01114010 },
2542 { 0x0e, 0x02a19020 },
2543 { 0x0f, 0x01117011 },
2544 { 0x10, 0x01451140 },
2545 { 0x11, 0x400001f0 },
2546 { 0x15, 0x01813122 },
2547 { 0x1b, 0x400001f1 },
2548 {}
2549 };
2550
2551 /*
2552 STAC 922X pin configs for
2553 102801BF
2554 */
2555 static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
2556 { 0x0a, 0x0321101f },
2557 { 0x0b, 0x01112024 },
2558 { 0x0c, 0x01111222 },
2559 { 0x0d, 0x91174220 },
2560 { 0x0e, 0x03a11050 },
2561 { 0x0f, 0x01116221 },
2562 { 0x10, 0x90a70330 },
2563 { 0x11, 0x01452340 },
2564 { 0x15, 0x40C003f1 },
2565 { 0x1b, 0x405003f0 },
2566 {}
2567 };
2568
2569 /*
2570 STAC 9221 A1 pin configs for
2571 102801D7 (Dell XPS M1210)
2572 */
2573 static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
2574 { 0x0a, 0x02211211 },
2575 { 0x0b, 0x408103ff },
2576 { 0x0c, 0x02a1123e },
2577 { 0x0d, 0x90100310 },
2578 { 0x0e, 0x408003f1 },
2579 { 0x0f, 0x0221121f },
2580 { 0x10, 0x03451340 },
2581 { 0x11, 0x40c003f2 },
2582 { 0x15, 0x508003f3 },
2583 { 0x1b, 0x405003f4 },
2584 {}
2585 };
2586
2587 static const struct hda_pintbl d945gtp3_pin_configs[] = {
2588 { 0x0a, 0x0221401f },
2589 { 0x0b, 0x01a19022 },
2590 { 0x0c, 0x01813021 },
2591 { 0x0d, 0x01014010 },
2592 { 0x0e, 0x40000100 },
2593 { 0x0f, 0x40000100 },
2594 { 0x10, 0x40000100 },
2595 { 0x11, 0x40000100 },
2596 { 0x15, 0x02a19120 },
2597 { 0x1b, 0x40000100 },
2598 {}
2599 };
2600
2601 static const struct hda_pintbl d945gtp5_pin_configs[] = {
2602 { 0x0a, 0x0221401f },
2603 { 0x0b, 0x01011012 },
2604 { 0x0c, 0x01813024 },
2605 { 0x0d, 0x01014010 },
2606 { 0x0e, 0x01a19021 },
2607 { 0x0f, 0x01016011 },
2608 { 0x10, 0x01452130 },
2609 { 0x11, 0x40000100 },
2610 { 0x15, 0x02a19320 },
2611 { 0x1b, 0x40000100 },
2612 {}
2613 };
2614
2615 static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
2616 { 0x0a, 0x0121e21f },
2617 { 0x0b, 0x400000ff },
2618 { 0x0c, 0x9017e110 },
2619 { 0x0d, 0x400000fd },
2620 { 0x0e, 0x400000fe },
2621 { 0x0f, 0x0181e020 },
2622 { 0x10, 0x1145e030 },
2623 { 0x11, 0x11c5e240 },
2624 { 0x15, 0x400000fc },
2625 { 0x1b, 0x400000fb },
2626 {}
2627 };
2628
2629 static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
2630 { 0x0a, 0x0121e21f },
2631 { 0x0b, 0x90a7012e },
2632 { 0x0c, 0x9017e110 },
2633 { 0x0d, 0x400000fd },
2634 { 0x0e, 0x400000fe },
2635 { 0x0f, 0x0181e020 },
2636 { 0x10, 0x1145e230 },
2637 { 0x11, 0x500000fa },
2638 { 0x15, 0x400000fc },
2639 { 0x1b, 0x400000fb },
2640 {}
2641 };
2642
2643 static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
2644 { 0x0a, 0x0121e21f },
2645 { 0x0b, 0x90a7012e },
2646 { 0x0c, 0x9017e110 },
2647 { 0x0d, 0x400000fd },
2648 { 0x0e, 0x400000fe },
2649 { 0x0f, 0x0181e020 },
2650 { 0x10, 0x1145e230 },
2651 { 0x11, 0x11c5e240 },
2652 { 0x15, 0x400000fc },
2653 { 0x1b, 0x400000fb },
2654 {}
2655 };
2656
2657 static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
2658 { 0x0a, 0x0321e21f },
2659 { 0x0b, 0x03a1e02e },
2660 { 0x0c, 0x9017e110 },
2661 { 0x0d, 0x9017e11f },
2662 { 0x0e, 0x400000fe },
2663 { 0x0f, 0x0381e020 },
2664 { 0x10, 0x1345e230 },
2665 { 0x11, 0x13c5e240 },
2666 { 0x15, 0x400000fc },
2667 { 0x1b, 0x400000fb },
2668 {}
2669 };
2670
2671 static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
2672 { 0x0a, 0x0321e21f },
2673 { 0x0b, 0x03a1e02e },
2674 { 0x0c, 0x9017e110 },
2675 { 0x0d, 0x9017e11f },
2676 { 0x0e, 0x400000fe },
2677 { 0x0f, 0x0381e020 },
2678 { 0x10, 0x1345e230 },
2679 { 0x11, 0x13c5e240 },
2680 { 0x15, 0x400000fc },
2681 { 0x1b, 0x400000fb },
2682 {}
2683 };
2684
2685 static const struct hda_pintbl ecs202_pin_configs[] = {
2686 { 0x0a, 0x0221401f },
2687 { 0x0b, 0x02a19020 },
2688 { 0x0c, 0x01a19020 },
2689 { 0x0d, 0x01114010 },
2690 { 0x0e, 0x408000f0 },
2691 { 0x0f, 0x01813022 },
2692 { 0x10, 0x074510a0 },
2693 { 0x11, 0x40c400f1 },
2694 { 0x15, 0x9037012e },
2695 { 0x1b, 0x40e000f2 },
2696 {}
2697 };
2698
2699 /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
2700 static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
2701 SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
2702 SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
2703 SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
2704 SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
2705 SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
2706 SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
2707 SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
2708 SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
2709 SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
2710 SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
2711 SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
2712 SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
2713 {}
2714 };
2715
2716 static const struct hda_fixup stac922x_fixups[];
2717
2718 /* remap the fixup from codec SSID and apply it */
2719 static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
2720 const struct hda_fixup *fix,
2721 int action)
2722 {
2723 if (action != HDA_FIXUP_ACT_PRE_PROBE)
2724 return;
2725 snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
2726 stac922x_fixups);
2727 if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
2728 snd_hda_apply_fixup(codec, action);
2729 }
2730
2731 static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
2732 const struct hda_fixup *fix,
2733 int action)
2734 {
2735 struct sigmatel_spec *spec = codec->spec;
2736
2737 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
2738 spec->gpio_mask = spec->gpio_dir = 0x03;
2739 spec->gpio_data = 0x03;
2740 }
2741 }
2742
2743 static const struct hda_fixup stac922x_fixups[] = {
2744 [STAC_D945_REF] = {
2745 .type = HDA_FIXUP_PINS,
2746 .v.pins = ref922x_pin_configs,
2747 },
2748 [STAC_D945GTP3] = {
2749 .type = HDA_FIXUP_PINS,
2750 .v.pins = d945gtp3_pin_configs,
2751 },
2752 [STAC_D945GTP5] = {
2753 .type = HDA_FIXUP_PINS,
2754 .v.pins = d945gtp5_pin_configs,
2755 },
2756 [STAC_INTEL_MAC_AUTO] = {
2757 .type = HDA_FIXUP_FUNC,
2758 .v.func = stac922x_fixup_intel_mac_auto,
2759 },
2760 [STAC_INTEL_MAC_V1] = {
2761 .type = HDA_FIXUP_PINS,
2762 .v.pins = intel_mac_v1_pin_configs,
2763 .chained = true,
2764 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2765 },
2766 [STAC_INTEL_MAC_V2] = {
2767 .type = HDA_FIXUP_PINS,
2768 .v.pins = intel_mac_v2_pin_configs,
2769 .chained = true,
2770 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2771 },
2772 [STAC_INTEL_MAC_V3] = {
2773 .type = HDA_FIXUP_PINS,
2774 .v.pins = intel_mac_v3_pin_configs,
2775 .chained = true,
2776 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2777 },
2778 [STAC_INTEL_MAC_V4] = {
2779 .type = HDA_FIXUP_PINS,
2780 .v.pins = intel_mac_v4_pin_configs,
2781 .chained = true,
2782 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2783 },
2784 [STAC_INTEL_MAC_V5] = {
2785 .type = HDA_FIXUP_PINS,
2786 .v.pins = intel_mac_v5_pin_configs,
2787 .chained = true,
2788 .chain_id = STAC_922X_INTEL_MAC_GPIO,
2789 },
2790 [STAC_922X_INTEL_MAC_GPIO] = {
2791 .type = HDA_FIXUP_FUNC,
2792 .v.func = stac922x_fixup_intel_mac_gpio,
2793 },
2794 [STAC_ECS_202] = {
2795 .type = HDA_FIXUP_PINS,
2796 .v.pins = ecs202_pin_configs,
2797 },
2798 [STAC_922X_DELL_D81] = {
2799 .type = HDA_FIXUP_PINS,
2800 .v.pins = dell_922x_d81_pin_configs,
2801 },
2802 [STAC_922X_DELL_D82] = {
2803 .type = HDA_FIXUP_PINS,
2804 .v.pins = dell_922x_d82_pin_configs,
2805 },
2806 [STAC_922X_DELL_M81] = {
2807 .type = HDA_FIXUP_PINS,
2808 .v.pins = dell_922x_m81_pin_configs,
2809 },
2810 [STAC_922X_DELL_M82] = {
2811 .type = HDA_FIXUP_PINS,
2812 .v.pins = dell_922x_m82_pin_configs,
2813 },
2814 };
2815
2816 static const struct hda_model_fixup stac922x_models[] = {
2817 { .id = STAC_D945_REF, .name = "ref" },
2818 { .id = STAC_D945GTP5, .name = "5stack" },
2819 { .id = STAC_D945GTP3, .name = "3stack" },
2820 { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
2821 { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
2822 { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
2823 { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
2824 { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
2825 { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
2826 { .id = STAC_ECS_202, .name = "ecs202" },
2827 { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
2828 { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
2829 { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
2830 { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
2831 /* for backward compatibility */
2832 { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
2833 { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
2834 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
2835 { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
2836 { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
2837 { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
2838 {}
2839 };
2840
2841 static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
2842 /* SigmaTel reference board */
2843 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
2844 "DFI LanParty", STAC_D945_REF),
2845 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
2846 "DFI LanParty", STAC_D945_REF),
2847 /* Intel 945G based systems */
2848 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
2849 "Intel D945G", STAC_D945GTP3),
2850 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
2851 "Intel D945G", STAC_D945GTP3),
2852 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
2853 "Intel D945G", STAC_D945GTP3),
2854 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
2855 "Intel D945G", STAC_D945GTP3),
2856 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
2857 "Intel D945G", STAC_D945GTP3),
2858 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
2859 "Intel D945G", STAC_D945GTP3),
2860 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
2861 "Intel D945G", STAC_D945GTP3),
2862 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
2863 "Intel D945G", STAC_D945GTP3),
2864 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
2865 "Intel D945G", STAC_D945GTP3),
2866 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
2867 "Intel D945G", STAC_D945GTP3),
2868 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
2869 "Intel D945G", STAC_D945GTP3),
2870 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
2871 "Intel D945G", STAC_D945GTP3),
2872 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
2873 "Intel D945G", STAC_D945GTP3),
2874 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
2875 "Intel D945G", STAC_D945GTP3),
2876 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
2877 "Intel D945G", STAC_D945GTP3),
2878 /* Intel D945G 5-stack systems */
2879 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
2880 "Intel D945G", STAC_D945GTP5),
2881 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
2882 "Intel D945G", STAC_D945GTP5),
2883 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
2884 "Intel D945G", STAC_D945GTP5),
2885 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
2886 "Intel D945G", STAC_D945GTP5),
2887 /* Intel 945P based systems */
2888 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
2889 "Intel D945P", STAC_D945GTP3),
2890 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
2891 "Intel D945P", STAC_D945GTP3),
2892 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
2893 "Intel D945P", STAC_D945GTP3),
2894 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
2895 "Intel D945P", STAC_D945GTP3),
2896 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
2897 "Intel D945P", STAC_D945GTP3),
2898 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
2899 "Intel D945P", STAC_D945GTP5),
2900 /* other intel */
2901 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
2902 "Intel D945", STAC_D945_REF),
2903 /* other systems */
2904
2905 /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
2906 SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
2907
2908 /* Dell systems */
2909 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
2910 "unknown Dell", STAC_922X_DELL_D81),
2911 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
2912 "unknown Dell", STAC_922X_DELL_D81),
2913 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
2914 "unknown Dell", STAC_922X_DELL_D81),
2915 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
2916 "unknown Dell", STAC_922X_DELL_D82),
2917 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
2918 "unknown Dell", STAC_922X_DELL_M81),
2919 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
2920 "unknown Dell", STAC_922X_DELL_D82),
2921 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
2922 "unknown Dell", STAC_922X_DELL_D81),
2923 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
2924 "unknown Dell", STAC_922X_DELL_D81),
2925 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
2926 "Dell XPS M1210", STAC_922X_DELL_M82),
2927 /* ECS/PC Chips boards */
2928 SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
2929 "ECS/PC chips", STAC_ECS_202),
2930 {} /* terminator */
2931 };
2932
2933 static const struct hda_pintbl ref927x_pin_configs[] = {
2934 { 0x0a, 0x02214020 },
2935 { 0x0b, 0x02a19080 },
2936 { 0x0c, 0x0181304e },
2937 { 0x0d, 0x01014010 },
2938 { 0x0e, 0x01a19040 },
2939 { 0x0f, 0x01011012 },
2940 { 0x10, 0x01016011 },
2941 { 0x11, 0x0101201f },
2942 { 0x12, 0x183301f0 },
2943 { 0x13, 0x18a001f0 },
2944 { 0x14, 0x18a001f0 },
2945 { 0x21, 0x01442070 },
2946 { 0x22, 0x01c42190 },
2947 { 0x23, 0x40000100 },
2948 {}
2949 };
2950
2951 static const struct hda_pintbl d965_3st_pin_configs[] = {
2952 { 0x0a, 0x0221401f },
2953 { 0x0b, 0x02a19120 },
2954 { 0x0c, 0x40000100 },
2955 { 0x0d, 0x01014011 },
2956 { 0x0e, 0x01a19021 },
2957 { 0x0f, 0x01813024 },
2958 { 0x10, 0x40000100 },
2959 { 0x11, 0x40000100 },
2960 { 0x12, 0x40000100 },
2961 { 0x13, 0x40000100 },
2962 { 0x14, 0x40000100 },
2963 { 0x21, 0x40000100 },
2964 { 0x22, 0x40000100 },
2965 { 0x23, 0x40000100 },
2966 {}
2967 };
2968
2969 static const struct hda_pintbl d965_5st_pin_configs[] = {
2970 { 0x0a, 0x02214020 },
2971 { 0x0b, 0x02a19080 },
2972 { 0x0c, 0x0181304e },
2973 { 0x0d, 0x01014010 },
2974 { 0x0e, 0x01a19040 },
2975 { 0x0f, 0x01011012 },
2976 { 0x10, 0x01016011 },
2977 { 0x11, 0x40000100 },
2978 { 0x12, 0x40000100 },
2979 { 0x13, 0x40000100 },
2980 { 0x14, 0x40000100 },
2981 { 0x21, 0x01442070 },
2982 { 0x22, 0x40000100 },
2983 { 0x23, 0x40000100 },
2984 {}
2985 };
2986
2987 static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
2988 { 0x0a, 0x40000100 },
2989 { 0x0b, 0x40000100 },
2990 { 0x0c, 0x0181304e },
2991 { 0x0d, 0x01014010 },
2992 { 0x0e, 0x01a19040 },
2993 { 0x0f, 0x01011012 },
2994 { 0x10, 0x01016011 },
2995 { 0x11, 0x40000100 },
2996 { 0x12, 0x40000100 },
2997 { 0x13, 0x40000100 },
2998 { 0x14, 0x40000100 },
2999 { 0x21, 0x01442070 },
3000 { 0x22, 0x40000100 },
3001 { 0x23, 0x40000100 },
3002 {}
3003 };
3004
3005 static const struct hda_pintbl dell_3st_pin_configs[] = {
3006 { 0x0a, 0x02211230 },
3007 { 0x0b, 0x02a11220 },
3008 { 0x0c, 0x01a19040 },
3009 { 0x0d, 0x01114210 },
3010 { 0x0e, 0x01111212 },
3011 { 0x0f, 0x01116211 },
3012 { 0x10, 0x01813050 },
3013 { 0x11, 0x01112214 },
3014 { 0x12, 0x403003fa },
3015 { 0x13, 0x90a60040 },
3016 { 0x14, 0x90a60040 },
3017 { 0x21, 0x404003fb },
3018 { 0x22, 0x40c003fc },
3019 { 0x23, 0x40000100 },
3020 {}
3021 };
3022
3023 static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
3024 const struct hda_fixup *fix, int action)
3025 {
3026 /* no jack detecion for ref-no-jd model */
3027 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3028 codec->no_jack_detect = 1;
3029 }
3030
3031 static void stac927x_fixup_ref(struct hda_codec *codec,
3032 const struct hda_fixup *fix, int action)
3033 {
3034 struct sigmatel_spec *spec = codec->spec;
3035
3036 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3037 snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
3038 spec->eapd_mask = spec->gpio_mask = 0;
3039 spec->gpio_dir = spec->gpio_data = 0;
3040 }
3041 }
3042
3043 static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
3044 const struct hda_fixup *fix, int action)
3045 {
3046 struct sigmatel_spec *spec = codec->spec;
3047
3048 if (action != HDA_FIXUP_ACT_PRE_PROBE)
3049 return;
3050
3051 if (codec->subsystem_id != 0x1028022f) {
3052 /* GPIO2 High = Enable EAPD */
3053 spec->eapd_mask = spec->gpio_mask = 0x04;
3054 spec->gpio_dir = spec->gpio_data = 0x04;
3055 }
3056
3057 snd_hda_add_verbs(codec, dell_3st_core_init);
3058 spec->volknob_init = 1;
3059 }
3060
3061 static void stac927x_fixup_volknob(struct hda_codec *codec,
3062 const struct hda_fixup *fix, int action)
3063 {
3064 struct sigmatel_spec *spec = codec->spec;
3065
3066 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3067 snd_hda_add_verbs(codec, stac927x_volknob_core_init);
3068 spec->volknob_init = 1;
3069 }
3070 }
3071
3072 static const struct hda_fixup stac927x_fixups[] = {
3073 [STAC_D965_REF_NO_JD] = {
3074 .type = HDA_FIXUP_FUNC,
3075 .v.func = stac927x_fixup_ref_no_jd,
3076 .chained = true,
3077 .chain_id = STAC_D965_REF,
3078 },
3079 [STAC_D965_REF] = {
3080 .type = HDA_FIXUP_FUNC,
3081 .v.func = stac927x_fixup_ref,
3082 },
3083 [STAC_D965_3ST] = {
3084 .type = HDA_FIXUP_PINS,
3085 .v.pins = d965_3st_pin_configs,
3086 .chained = true,
3087 .chain_id = STAC_D965_VERBS,
3088 },
3089 [STAC_D965_5ST] = {
3090 .type = HDA_FIXUP_PINS,
3091 .v.pins = d965_5st_pin_configs,
3092 .chained = true,
3093 .chain_id = STAC_D965_VERBS,
3094 },
3095 [STAC_D965_VERBS] = {
3096 .type = HDA_FIXUP_VERBS,
3097 .v.verbs = d965_core_init,
3098 },
3099 [STAC_D965_5ST_NO_FP] = {
3100 .type = HDA_FIXUP_PINS,
3101 .v.pins = d965_5st_no_fp_pin_configs,
3102 },
3103 [STAC_DELL_3ST] = {
3104 .type = HDA_FIXUP_PINS,
3105 .v.pins = dell_3st_pin_configs,
3106 .chained = true,
3107 .chain_id = STAC_927X_DELL_DMIC,
3108 },
3109 [STAC_DELL_BIOS] = {
3110 .type = HDA_FIXUP_PINS,
3111 .v.pins = (const struct hda_pintbl[]) {
3112 /* configure the analog microphone on some laptops */
3113 { 0x0c, 0x90a79130 },
3114 /* correct the front output jack as a hp out */
3115 { 0x0f, 0x0227011f },
3116 /* correct the front input jack as a mic */
3117 { 0x0e, 0x02a79130 },
3118 {}
3119 },
3120 .chained = true,
3121 .chain_id = STAC_927X_DELL_DMIC,
3122 },
3123 [STAC_DELL_BIOS_SPDIF] = {
3124 .type = HDA_FIXUP_PINS,
3125 .v.pins = (const struct hda_pintbl[]) {
3126 /* correct the device field to SPDIF out */
3127 { 0x21, 0x01442070 },
3128 {}
3129 },
3130 .chained = true,
3131 .chain_id = STAC_DELL_BIOS,
3132 },
3133 [STAC_927X_DELL_DMIC] = {
3134 .type = HDA_FIXUP_FUNC,
3135 .v.func = stac927x_fixup_dell_dmic,
3136 },
3137 [STAC_927X_VOLKNOB] = {
3138 .type = HDA_FIXUP_FUNC,
3139 .v.func = stac927x_fixup_volknob,
3140 },
3141 };
3142
3143 static const struct hda_model_fixup stac927x_models[] = {
3144 { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
3145 { .id = STAC_D965_REF, .name = "ref" },
3146 { .id = STAC_D965_3ST, .name = "3stack" },
3147 { .id = STAC_D965_5ST, .name = "5stack" },
3148 { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
3149 { .id = STAC_DELL_3ST, .name = "dell-3stack" },
3150 { .id = STAC_DELL_BIOS, .name = "dell-bios" },
3151 { .id = STAC_927X_VOLKNOB, .name = "volknob" },
3152 {}
3153 };
3154
3155 static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
3156 /* SigmaTel reference board */
3157 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3158 "DFI LanParty", STAC_D965_REF),
3159 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3160 "DFI LanParty", STAC_D965_REF),
3161 /* Intel 946 based systems */
3162 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
3163 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
3164 /* 965 based 3 stack systems */
3165 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
3166 "Intel D965", STAC_D965_3ST),
3167 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
3168 "Intel D965", STAC_D965_3ST),
3169 /* Dell 3 stack systems */
3170 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
3171 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
3172 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
3173 /* Dell 3 stack systems with verb table in BIOS */
3174 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
3175 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
3176 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
3177 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
3178 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
3179 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
3180 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
3181 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
3182 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
3183 /* 965 based 5 stack systems */
3184 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
3185 "Intel D965", STAC_D965_5ST),
3186 SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
3187 "Intel D965", STAC_D965_5ST),
3188 /* volume-knob fixes */
3189 SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
3190 {} /* terminator */
3191 };
3192
3193 static const struct hda_pintbl ref9205_pin_configs[] = {
3194 { 0x0a, 0x40000100 },
3195 { 0x0b, 0x40000100 },
3196 { 0x0c, 0x01016011 },
3197 { 0x0d, 0x01014010 },
3198 { 0x0e, 0x01813122 },
3199 { 0x0f, 0x01a19021 },
3200 { 0x14, 0x01019020 },
3201 { 0x16, 0x40000100 },
3202 { 0x17, 0x90a000f0 },
3203 { 0x18, 0x90a000f0 },
3204 { 0x21, 0x01441030 },
3205 { 0x22, 0x01c41030 },
3206 {}
3207 };
3208
3209 /*
3210 STAC 9205 pin configs for
3211 102801F1
3212 102801F2
3213 102801FC
3214 102801FD
3215 10280204
3216 1028021F
3217 10280228 (Dell Vostro 1500)
3218 10280229 (Dell Vostro 1700)
3219 */
3220 static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
3221 { 0x0a, 0x0321101F },
3222 { 0x0b, 0x03A11020 },
3223 { 0x0c, 0x400003FA },
3224 { 0x0d, 0x90170310 },
3225 { 0x0e, 0x400003FB },
3226 { 0x0f, 0x400003FC },
3227 { 0x14, 0x400003FD },
3228 { 0x16, 0x40F000F9 },
3229 { 0x17, 0x90A60330 },
3230 { 0x18, 0x400003FF },
3231 { 0x21, 0x0144131F },
3232 { 0x22, 0x40C003FE },
3233 {}
3234 };
3235
3236 /*
3237 STAC 9205 pin configs for
3238 102801F9
3239 102801FA
3240 102801FE
3241 102801FF (Dell Precision M4300)
3242 10280206
3243 10280200
3244 10280201
3245 */
3246 static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
3247 { 0x0a, 0x0321101f },
3248 { 0x0b, 0x03a11020 },
3249 { 0x0c, 0x90a70330 },
3250 { 0x0d, 0x90170310 },
3251 { 0x0e, 0x400000fe },
3252 { 0x0f, 0x400000ff },
3253 { 0x14, 0x400000fd },
3254 { 0x16, 0x40f000f9 },
3255 { 0x17, 0x400000fa },
3256 { 0x18, 0x400000fc },
3257 { 0x21, 0x0144131f },
3258 { 0x22, 0x40c003f8 },
3259 /* Enable SPDIF in/out */
3260 { 0x1f, 0x01441030 },
3261 { 0x20, 0x1c410030 },
3262 {}
3263 };
3264
3265 static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
3266 { 0x0a, 0x0421101f },
3267 { 0x0b, 0x04a11020 },
3268 { 0x0c, 0x400003fa },
3269 { 0x0d, 0x90170310 },
3270 { 0x0e, 0x400003fb },
3271 { 0x0f, 0x400003fc },
3272 { 0x14, 0x400003fd },
3273 { 0x16, 0x400003f9 },
3274 { 0x17, 0x90a60330 },
3275 { 0x18, 0x400003ff },
3276 { 0x21, 0x01441340 },
3277 { 0x22, 0x40c003fe },
3278 {}
3279 };
3280
3281 static void stac9205_fixup_ref(struct hda_codec *codec,
3282 const struct hda_fixup *fix, int action)
3283 {
3284 struct sigmatel_spec *spec = codec->spec;
3285
3286 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3287 snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
3288 /* SPDIF-In enabled */
3289 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
3290 }
3291 }
3292
3293 static void stac9205_fixup_dell_m43(struct hda_codec *codec,
3294 const struct hda_fixup *fix, int action)
3295 {
3296 struct sigmatel_spec *spec = codec->spec;
3297 struct hda_jack_tbl *jack;
3298
3299 if (action == HDA_FIXUP_ACT_PRE_PROBE) {
3300 snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
3301
3302 /* Enable unsol response for GPIO4/Dock HP connection */
3303 snd_hda_codec_write_cache(codec, codec->afg, 0,
3304 AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
3305 snd_hda_jack_detect_enable_callback(codec, codec->afg,
3306 STAC_VREF_EVENT,
3307 stac_vref_event);
3308 jack = snd_hda_jack_tbl_get(codec, codec->afg);
3309 if (jack)
3310 jack->private_data = 0x01;
3311
3312 spec->gpio_dir = 0x0b;
3313 spec->eapd_mask = 0x01;
3314 spec->gpio_mask = 0x1b;
3315 spec->gpio_mute = 0x10;
3316 /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
3317 * GPIO3 Low = DRM
3318 */
3319 spec->gpio_data = 0x01;
3320 }
3321 }
3322
3323 static void stac9205_fixup_eapd(struct hda_codec *codec,
3324 const struct hda_fixup *fix, int action)
3325 {
3326 struct sigmatel_spec *spec = codec->spec;
3327
3328 if (action == HDA_FIXUP_ACT_PRE_PROBE)
3329 spec->eapd_switch = 0;
3330 }
3331
3332 static const struct hda_fixup stac9205_fixups[] = {
3333 [STAC_9205_REF] = {
3334 .type = HDA_FIXUP_FUNC,
3335 .v.func = stac9205_fixup_ref,
3336 },
3337 [STAC_9205_DELL_M42] = {
3338 .type = HDA_FIXUP_PINS,
3339 .v.pins = dell_9205_m42_pin_configs,
3340 },
3341 [STAC_9205_DELL_M43] = {
3342 .type = HDA_FIXUP_FUNC,
3343 .v.func = stac9205_fixup_dell_m43,
3344 },
3345 [STAC_9205_DELL_M44] = {
3346 .type = HDA_FIXUP_PINS,
3347 .v.pins = dell_9205_m44_pin_configs,
3348 },
3349 [STAC_9205_EAPD] = {
3350 .type = HDA_FIXUP_FUNC,
3351 .v.func = stac9205_fixup_eapd,
3352 },
3353 {}
3354 };
3355
3356 static const struct hda_model_fixup stac9205_models[] = {
3357 { .id = STAC_9205_REF, .name = "ref" },
3358 { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
3359 { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
3360 { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
3361 { .id = STAC_9205_EAPD, .name = "eapd" },
3362 {}
3363 };
3364
3365 static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
3366 /* SigmaTel reference board */
3367 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
3368 "DFI LanParty", STAC_9205_REF),
3369 SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
3370 "SigmaTel", STAC_9205_REF),
3371 SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
3372 "DFI LanParty", STAC_9205_REF),
3373 /* Dell */
3374 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
3375 "unknown Dell", STAC_9205_DELL_M42),
3376 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
3377 "unknown Dell", STAC_9205_DELL_M42),
3378 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
3379 "Dell Precision", STAC_9205_DELL_M43),
3380 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
3381 "Dell Precision", STAC_9205_DELL_M43),
3382 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
3383 "Dell Precision", STAC_9205_DELL_M43),
3384 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
3385 "unknown Dell", STAC_9205_DELL_M42),
3386 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
3387 "unknown Dell", STAC_9205_DELL_M42),
3388 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
3389 "Dell Precision", STAC_9205_DELL_M43),
3390 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
3391 "Dell Precision M4300", STAC_9205_DELL_M43),
3392 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
3393 "unknown Dell", STAC_9205_DELL_M42),
3394 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
3395 "Dell Precision", STAC_9205_DELL_M43),
3396 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
3397 "Dell Precision", STAC_9205_DELL_M43),
3398 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
3399 "Dell Precision", STAC_9205_DELL_M43),
3400 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
3401 "Dell Inspiron", STAC_9205_DELL_M44),
3402 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
3403 "Dell Vostro 1500", STAC_9205_DELL_M42),
3404 SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
3405 "Dell Vostro 1700", STAC_9205_DELL_M42),
3406 /* Gateway */
3407 SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
3408 SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
3409 {} /* terminator */
3410 };
3411
3412 static int stac_parse_auto_config(struct hda_codec *codec)
3413 {
3414 struct sigmatel_spec *spec = codec->spec;
3415 int err;
3416
3417 err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
3418 if (err < 0)
3419 return err;
3420
3421 /* add hooks */
3422 spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
3423 spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
3424
3425 spec->gen.automute_hook = stac_update_outputs;
3426 spec->gen.hp_automute_hook = stac_hp_automute;
3427 spec->gen.line_automute_hook = stac_line_automute;
3428
3429 err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
3430 if (err < 0)
3431 return err;
3432
3433 /* minimum value is actually mute */
3434 spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
3435
3436 /* setup analog beep controls */
3437 if (spec->anabeep_nid > 0) {
3438 err = stac_auto_create_beep_ctls(codec,
3439 spec->anabeep_nid);
3440 if (err < 0)
3441 return err;
3442 }
3443
3444 /* setup digital beep controls and input device */
3445 #ifdef CONFIG_SND_HDA_INPUT_BEEP
3446 if (spec->digbeep_nid > 0) {
3447 hda_nid_t nid = spec->digbeep_nid;
3448 unsigned int caps;
3449
3450 err = stac_auto_create_beep_ctls(codec, nid);
3451 if (err < 0)
3452 return err;
3453 err = snd_hda_attach_beep_device(codec, nid);
3454 if (err < 0)
3455 return err;
3456 if (codec->beep) {
3457 /* IDT/STAC codecs have linear beep tone parameter */
3458 codec->beep->linear_tone = spec->linear_tone_beep;
3459 /* if no beep switch is available, make its own one */
3460 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
3461 if (!(caps & AC_AMPCAP_MUTE)) {
3462 err = stac_beep_switch_ctl(codec);
3463 if (err < 0)
3464 return err;
3465 }
3466 }
3467 }
3468 #endif
3469
3470 if (spec->gpio_led)
3471 spec->gen.vmaster_mute.hook = stac_vmaster_hook;
3472
3473 if (spec->aloopback_ctl &&
3474 snd_hda_get_bool_hint(codec, "loopback") == 1) {
3475 if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
3476 return -ENOMEM;
3477 }
3478
3479 stac_init_power_map(codec);
3480
3481 return 0;
3482 }
3483
3484
3485 static int stac_init(struct hda_codec *codec)
3486 {
3487 struct sigmatel_spec *spec = codec->spec;
3488 unsigned int gpio;
3489 int i;
3490
3491 /* override some hints */
3492 stac_store_hints(codec);
3493
3494 /* set up GPIO */
3495 gpio = spec->gpio_data;
3496 /* turn on EAPD statically when spec->eapd_switch isn't set.
3497 * otherwise, unsol event will turn it on/off dynamically
3498 */
3499 if (!spec->eapd_switch)
3500 gpio |= spec->eapd_mask;
3501 stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
3502
3503 snd_hda_gen_init(codec);
3504
3505 /* sync the power-map */
3506 if (spec->num_pwrs)
3507 snd_hda_codec_write(codec, codec->afg, 0,
3508 AC_VERB_IDT_SET_POWER_MAP,
3509 spec->power_map_bits);
3510
3511 /* power down inactive ADCs */
3512 if (spec->powerdown_adcs) {
3513 for (i = 0; i < spec->gen.num_all_adcs; i++) {
3514 if (spec->active_adcs & (1 << i))
3515 continue;
3516 snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
3517 AC_VERB_SET_POWER_STATE,
3518 AC_PWRST_D3);
3519 }
3520 }
3521
3522 /* power down unused DACs */
3523 for (i = 0; i < spec->gen.num_all_dacs; i++) {
3524 if (!snd_hda_get_nid_path(codec, spec->gen.all_dacs[i], 0))
3525 snd_hda_codec_write(codec, spec->gen.all_dacs[i], 0,
3526 AC_VERB_SET_POWER_STATE,
3527 AC_PWRST_D3);
3528 }
3529
3530 return 0;
3531 }
3532
3533 static void stac_shutup(struct hda_codec *codec)
3534 {
3535 struct sigmatel_spec *spec = codec->spec;
3536
3537 snd_hda_shutup_pins(codec);
3538
3539 if (spec->eapd_mask)
3540 stac_gpio_set(codec, spec->gpio_mask,
3541 spec->gpio_dir, spec->gpio_data &
3542 ~spec->eapd_mask);
3543 }
3544
3545 static void stac_free(struct hda_codec *codec)
3546 {
3547 struct sigmatel_spec *spec = codec->spec;
3548
3549 if (!spec)
3550 return;
3551
3552 snd_hda_gen_spec_free(&spec->gen);
3553 kfree(spec);
3554 snd_hda_detach_beep_device(codec);
3555 }
3556
3557 #ifdef CONFIG_PROC_FS
3558 static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
3559 struct hda_codec *codec, hda_nid_t nid)
3560 {
3561 if (nid == codec->afg)
3562 snd_iprintf(buffer, "Power-Map: 0x%02x\n",
3563 snd_hda_codec_read(codec, nid, 0,
3564 AC_VERB_IDT_GET_POWER_MAP, 0));
3565 }
3566
3567 static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
3568 struct hda_codec *codec,
3569 unsigned int verb)
3570 {
3571 snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
3572 snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
3573 }
3574
3575 /* stac92hd71bxx, stac92hd73xx */
3576 static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
3577 struct hda_codec *codec, hda_nid_t nid)
3578 {
3579 stac92hd_proc_hook(buffer, codec, nid);
3580 if (nid == codec->afg)
3581 analog_loop_proc_hook(buffer, codec, 0xfa0);
3582 }
3583
3584 static void stac9205_proc_hook(struct snd_info_buffer *buffer,
3585 struct hda_codec *codec, hda_nid_t nid)
3586 {
3587 if (nid == codec->afg)
3588 analog_loop_proc_hook(buffer, codec, 0xfe0);
3589 }
3590
3591 static void stac927x_proc_hook(struct snd_info_buffer *buffer,
3592 struct hda_codec *codec, hda_nid_t nid)
3593 {
3594 if (nid == codec->afg)
3595 analog_loop_proc_hook(buffer, codec, 0xfeb);
3596 }
3597 #else
3598 #define stac92hd_proc_hook NULL
3599 #define stac92hd7x_proc_hook NULL
3600 #define stac9205_proc_hook NULL
3601 #define stac927x_proc_hook NULL
3602 #endif
3603
3604 #ifdef CONFIG_PM
3605 static int stac_resume(struct hda_codec *codec)
3606 {
3607 codec->patch_ops.init(codec);
3608 snd_hda_codec_resume_amp(codec);
3609 snd_hda_codec_resume_cache(codec);
3610 return 0;
3611 }
3612
3613 static int stac_suspend(struct hda_codec *codec)
3614 {
3615 stac_shutup(codec);
3616 return 0;
3617 }
3618
3619 static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
3620 unsigned int power_state)
3621 {
3622 unsigned int afg_power_state = power_state;
3623 struct sigmatel_spec *spec = codec->spec;
3624
3625 if (power_state == AC_PWRST_D3) {
3626 if (spec->vref_mute_led_nid) {
3627 /* with vref-out pin used for mute led control
3628 * codec AFG is prevented from D3 state
3629 */
3630 afg_power_state = AC_PWRST_D1;
3631 }
3632 /* this delay seems necessary to avoid click noise at power-down */
3633 msleep(100);
3634 }
3635 snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
3636 afg_power_state);
3637 snd_hda_codec_set_power_to_all(codec, fg, power_state, true);
3638 }
3639 #else
3640 #define stac_suspend NULL
3641 #define stac_resume NULL
3642 #define stac_set_power_state NULL
3643 #endif /* CONFIG_PM */
3644
3645 static const struct hda_codec_ops stac_patch_ops = {
3646 .build_controls = snd_hda_gen_build_controls,
3647 .build_pcms = snd_hda_gen_build_pcms,
3648 .init = stac_init,
3649 .free = stac_free,
3650 .unsol_event = snd_hda_jack_unsol_event,
3651 #ifdef CONFIG_PM
3652 .suspend = stac_suspend,
3653 .resume = stac_resume,
3654 #endif
3655 .reboot_notify = stac_shutup,
3656 };
3657
3658 static int alloc_stac_spec(struct hda_codec *codec)
3659 {
3660 struct sigmatel_spec *spec;
3661
3662 spec = kzalloc(sizeof(*spec), GFP_KERNEL);
3663 if (!spec)
3664 return -ENOMEM;
3665 snd_hda_gen_spec_init(&spec->gen);
3666 codec->spec = spec;
3667 codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
3668 return 0;
3669 }
3670
3671 static int patch_stac9200(struct hda_codec *codec)
3672 {
3673 struct sigmatel_spec *spec;
3674 int err;
3675
3676 err = alloc_stac_spec(codec);
3677 if (err < 0)
3678 return err;
3679
3680 spec = codec->spec;
3681 spec->linear_tone_beep = 1;
3682 spec->gen.own_eapd_ctl = 1;
3683
3684 codec->patch_ops = stac_patch_ops;
3685
3686 snd_hda_add_verbs(codec, stac9200_eapd_init);
3687
3688 snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
3689 stac9200_fixups);
3690 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3691
3692 err = stac_parse_auto_config(codec);
3693 if (err < 0) {
3694 stac_free(codec);
3695 return err;
3696 }
3697
3698 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3699
3700 return 0;
3701 }
3702
3703 static int patch_stac925x(struct hda_codec *codec)
3704 {
3705 struct sigmatel_spec *spec;
3706 int err;
3707
3708 err = alloc_stac_spec(codec);
3709 if (err < 0)
3710 return err;
3711
3712 spec = codec->spec;
3713 spec->linear_tone_beep = 1;
3714 spec->gen.own_eapd_ctl = 1;
3715
3716 codec->patch_ops = stac_patch_ops;
3717
3718 snd_hda_add_verbs(codec, stac925x_core_init);
3719
3720 snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
3721 stac925x_fixups);
3722 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3723
3724 err = stac_parse_auto_config(codec);
3725 if (err < 0) {
3726 stac_free(codec);
3727 return err;
3728 }
3729
3730 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3731
3732 return 0;
3733 }
3734
3735 static int patch_stac92hd73xx(struct hda_codec *codec)
3736 {
3737 struct sigmatel_spec *spec;
3738 int err;
3739 int num_dacs;
3740
3741 err = alloc_stac_spec(codec);
3742 if (err < 0)
3743 return err;
3744
3745 spec = codec->spec;
3746 spec->linear_tone_beep = 0;
3747
3748 num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
3749 if (num_dacs < 3 || num_dacs > 5) {
3750 printk(KERN_WARNING "hda_codec: Could not determine "
3751 "number of channels defaulting to DAC count\n");
3752 num_dacs = 5;
3753 }
3754
3755 switch (num_dacs) {
3756 case 0x3: /* 6 Channel */
3757 spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
3758 break;
3759 case 0x4: /* 8 Channel */
3760 spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
3761 break;
3762 case 0x5: /* 10 Channel */
3763 spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
3764 break;
3765 }
3766
3767 spec->aloopback_mask = 0x01;
3768 spec->aloopback_shift = 8;
3769
3770 spec->digbeep_nid = 0x1c;
3771
3772 /* GPIO0 High = Enable EAPD */
3773 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
3774 spec->gpio_data = 0x01;
3775
3776 spec->eapd_switch = 1;
3777
3778 spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
3779 spec->pwr_nids = stac92hd73xx_pwr_nids;
3780
3781 spec->gen.own_eapd_ctl = 1;
3782
3783 codec->patch_ops = stac_patch_ops;
3784
3785 snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
3786 stac92hd73xx_fixups);
3787 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3788
3789 if (!spec->volknob_init)
3790 snd_hda_add_verbs(codec, stac92hd73xx_core_init);
3791
3792 err = stac_parse_auto_config(codec);
3793 if (err < 0) {
3794 stac_free(codec);
3795 return err;
3796 }
3797
3798 codec->proc_widget_hook = stac92hd7x_proc_hook;
3799
3800 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3801
3802 return 0;
3803 }
3804
3805 static void stac_setup_gpio(struct hda_codec *codec)
3806 {
3807 struct sigmatel_spec *spec = codec->spec;
3808
3809 if (spec->gpio_led) {
3810 if (!spec->vref_mute_led_nid) {
3811 spec->gpio_mask |= spec->gpio_led;
3812 spec->gpio_dir |= spec->gpio_led;
3813 spec->gpio_data |= spec->gpio_led;
3814 } else {
3815 codec->patch_ops.set_power_state =
3816 stac_set_power_state;
3817 }
3818 }
3819
3820 if (spec->mic_mute_led_gpio) {
3821 spec->gpio_mask |= spec->mic_mute_led_gpio;
3822 spec->gpio_dir |= spec->mic_mute_led_gpio;
3823 spec->mic_mute_led_on = true;
3824 spec->gpio_data |= spec->mic_mute_led_gpio;
3825
3826 spec->gen.cap_sync_hook = stac_capture_led_hook;
3827 }
3828 }
3829
3830 static int patch_stac92hd83xxx(struct hda_codec *codec)
3831 {
3832 struct sigmatel_spec *spec;
3833 int err;
3834
3835 err = alloc_stac_spec(codec);
3836 if (err < 0)
3837 return err;
3838
3839 codec->epss = 0; /* longer delay needed for D3 */
3840
3841 spec = codec->spec;
3842 spec->linear_tone_beep = 0;
3843 spec->gen.own_eapd_ctl = 1;
3844
3845 spec->digbeep_nid = 0x21;
3846 spec->pwr_nids = stac92hd83xxx_pwr_nids;
3847 spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
3848 spec->default_polarity = -1; /* no default cfg */
3849
3850 codec->patch_ops = stac_patch_ops;
3851
3852 snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
3853
3854 snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
3855 stac92hd83xxx_fixups);
3856 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3857
3858 stac_setup_gpio(codec);
3859
3860 err = stac_parse_auto_config(codec);
3861 if (err < 0) {
3862 stac_free(codec);
3863 return err;
3864 }
3865
3866 codec->proc_widget_hook = stac92hd_proc_hook;
3867
3868 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3869
3870 return 0;
3871 }
3872
3873 static int patch_stac92hd71bxx(struct hda_codec *codec)
3874 {
3875 struct sigmatel_spec *spec;
3876 const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
3877 int err;
3878
3879 err = alloc_stac_spec(codec);
3880 if (err < 0)
3881 return err;
3882
3883 spec = codec->spec;
3884 spec->linear_tone_beep = 0;
3885 spec->gen.own_eapd_ctl = 1;
3886
3887 codec->patch_ops = stac_patch_ops;
3888
3889 /* GPIO0 = EAPD */
3890 spec->gpio_mask = 0x01;
3891 spec->gpio_dir = 0x01;
3892 spec->gpio_data = 0x01;
3893
3894 switch (codec->vendor_id) {
3895 case 0x111d76b6: /* 4 Port without Analog Mixer */
3896 case 0x111d76b7:
3897 unmute_init++;
3898 break;
3899 case 0x111d7608: /* 5 Port with Analog Mixer */
3900 if ((codec->revision_id & 0xf) == 0 ||
3901 (codec->revision_id & 0xf) == 1)
3902 spec->stream_delay = 40; /* 40 milliseconds */
3903
3904 /* disable VSW */
3905 unmute_init++;
3906 snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
3907 snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
3908 break;
3909 case 0x111d7603: /* 6 Port with Analog Mixer */
3910 if ((codec->revision_id & 0xf) == 1)
3911 spec->stream_delay = 40; /* 40 milliseconds */
3912
3913 break;
3914 }
3915
3916 if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
3917 snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
3918
3919 if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
3920 snd_hda_sequence_write_cache(codec, unmute_init);
3921
3922 spec->aloopback_ctl = &stac92hd71bxx_loopback;
3923 spec->aloopback_mask = 0x50;
3924 spec->aloopback_shift = 0;
3925
3926 spec->powerdown_adcs = 1;
3927 spec->digbeep_nid = 0x26;
3928 spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
3929 spec->pwr_nids = stac92hd71bxx_pwr_nids;
3930
3931 snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
3932 stac92hd71bxx_fixups);
3933 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3934
3935 stac_setup_gpio(codec);
3936
3937 err = stac_parse_auto_config(codec);
3938 if (err < 0) {
3939 stac_free(codec);
3940 return err;
3941 }
3942
3943 codec->proc_widget_hook = stac92hd7x_proc_hook;
3944
3945 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3946
3947 return 0;
3948 }
3949
3950 static int patch_stac922x(struct hda_codec *codec)
3951 {
3952 struct sigmatel_spec *spec;
3953 int err;
3954
3955 err = alloc_stac_spec(codec);
3956 if (err < 0)
3957 return err;
3958
3959 spec = codec->spec;
3960 spec->linear_tone_beep = 1;
3961 spec->gen.own_eapd_ctl = 1;
3962
3963 codec->patch_ops = stac_patch_ops;
3964
3965 snd_hda_add_verbs(codec, stac922x_core_init);
3966
3967 /* Fix Mux capture level; max to 2 */
3968 snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
3969 (0 << AC_AMPCAP_OFFSET_SHIFT) |
3970 (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
3971 (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
3972 (0 << AC_AMPCAP_MUTE_SHIFT));
3973
3974 snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
3975 stac922x_fixups);
3976 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
3977
3978 err = stac_parse_auto_config(codec);
3979 if (err < 0) {
3980 stac_free(codec);
3981 return err;
3982 }
3983
3984 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
3985
3986 return 0;
3987 }
3988
3989 static int patch_stac927x(struct hda_codec *codec)
3990 {
3991 struct sigmatel_spec *spec;
3992 int err;
3993
3994 err = alloc_stac_spec(codec);
3995 if (err < 0)
3996 return err;
3997
3998 spec = codec->spec;
3999 spec->linear_tone_beep = 1;
4000 spec->gen.own_eapd_ctl = 1;
4001
4002 spec->digbeep_nid = 0x23;
4003
4004 /* GPIO0 High = Enable EAPD */
4005 spec->eapd_mask = spec->gpio_mask = 0x01;
4006 spec->gpio_dir = spec->gpio_data = 0x01;
4007
4008 spec->aloopback_ctl = &stac927x_loopback;
4009 spec->aloopback_mask = 0x40;
4010 spec->aloopback_shift = 0;
4011 spec->eapd_switch = 1;
4012
4013 codec->patch_ops = stac_patch_ops;
4014
4015 snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
4016 stac927x_fixups);
4017 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4018
4019 if (!spec->volknob_init)
4020 snd_hda_add_verbs(codec, stac927x_core_init);
4021
4022 err = stac_parse_auto_config(codec);
4023 if (err < 0) {
4024 stac_free(codec);
4025 return err;
4026 }
4027
4028 codec->proc_widget_hook = stac927x_proc_hook;
4029
4030 /*
4031 * !!FIXME!!
4032 * The STAC927x seem to require fairly long delays for certain
4033 * command sequences. With too short delays (even if the answer
4034 * is set to RIRB properly), it results in the silence output
4035 * on some hardwares like Dell.
4036 *
4037 * The below flag enables the longer delay (see get_response
4038 * in hda_intel.c).
4039 */
4040 codec->bus->needs_damn_long_delay = 1;
4041
4042 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4043
4044 return 0;
4045 }
4046
4047 static int patch_stac9205(struct hda_codec *codec)
4048 {
4049 struct sigmatel_spec *spec;
4050 int err;
4051
4052 err = alloc_stac_spec(codec);
4053 if (err < 0)
4054 return err;
4055
4056 spec = codec->spec;
4057 spec->linear_tone_beep = 1;
4058 spec->gen.own_eapd_ctl = 1;
4059
4060 spec->digbeep_nid = 0x23;
4061
4062 snd_hda_add_verbs(codec, stac9205_core_init);
4063 spec->aloopback_ctl = &stac9205_loopback;
4064
4065 spec->aloopback_mask = 0x40;
4066 spec->aloopback_shift = 0;
4067
4068 /* GPIO0 High = EAPD */
4069 spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
4070 spec->gpio_data = 0x01;
4071
4072 /* Turn on/off EAPD per HP plugging */
4073 spec->eapd_switch = 1;
4074
4075 codec->patch_ops = stac_patch_ops;
4076
4077 snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
4078 stac9205_fixups);
4079 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4080
4081 err = stac_parse_auto_config(codec);
4082 if (err < 0) {
4083 stac_free(codec);
4084 return err;
4085 }
4086
4087 codec->proc_widget_hook = stac9205_proc_hook;
4088
4089 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4090
4091 return 0;
4092 }
4093
4094 /*
4095 * STAC9872 hack
4096 */
4097
4098 static const struct hda_verb stac9872_core_init[] = {
4099 {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
4100 {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
4101 {}
4102 };
4103
4104 static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
4105 { 0x0a, 0x03211020 },
4106 { 0x0b, 0x411111f0 },
4107 { 0x0c, 0x411111f0 },
4108 { 0x0d, 0x03a15030 },
4109 { 0x0e, 0x411111f0 },
4110 { 0x0f, 0x90170110 },
4111 { 0x11, 0x411111f0 },
4112 { 0x13, 0x411111f0 },
4113 { 0x14, 0x90a7013e },
4114 {}
4115 };
4116
4117 static const struct hda_model_fixup stac9872_models[] = {
4118 { .id = STAC_9872_VAIO, .name = "vaio" },
4119 {}
4120 };
4121
4122 static const struct hda_fixup stac9872_fixups[] = {
4123 [STAC_9872_VAIO] = {
4124 .type = HDA_FIXUP_PINS,
4125 .v.pins = stac9872_vaio_pin_configs,
4126 },
4127 };
4128
4129 static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
4130 SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
4131 "Sony VAIO F/S", STAC_9872_VAIO),
4132 {} /* terminator */
4133 };
4134
4135 static int patch_stac9872(struct hda_codec *codec)
4136 {
4137 struct sigmatel_spec *spec;
4138 int err;
4139
4140 err = alloc_stac_spec(codec);
4141 if (err < 0)
4142 return err;
4143
4144 spec = codec->spec;
4145 spec->linear_tone_beep = 1;
4146 spec->gen.own_eapd_ctl = 1;
4147
4148 codec->patch_ops = stac_patch_ops;
4149
4150 snd_hda_add_verbs(codec, stac9872_core_init);
4151
4152 snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
4153 stac9872_fixups);
4154 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
4155
4156 err = stac_parse_auto_config(codec);
4157 if (err < 0) {
4158 stac_free(codec);
4159 return -EINVAL;
4160 }
4161
4162 snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
4163
4164 return 0;
4165 }
4166
4167
4168 /*
4169 * patch entries
4170 */
4171 static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
4172 { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
4173 { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
4174 { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
4175 { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
4176 { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
4177 { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
4178 { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
4179 { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
4180 { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
4181 { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
4182 { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
4183 { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
4184 { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
4185 { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
4186 { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
4187 { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
4188 { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
4189 { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
4190 { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
4191 { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
4192 { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
4193 { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
4194 { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
4195 { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
4196 { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
4197 { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
4198 { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
4199 { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
4200 { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
4201 { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
4202 { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
4203 /* The following does not take into account .id=0x83847661 when subsys =
4204 * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
4205 * currently not fully supported.
4206 */
4207 { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
4208 { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
4209 { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
4210 { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
4211 { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
4212 { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
4213 { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
4214 { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
4215 { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
4216 { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
4217 { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
4218 { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
4219 { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
4220 { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
4221 { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
4222 { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
4223 { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
4224 { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
4225 { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
4226 { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
4227 { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
4228 { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
4229 { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
4230 { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
4231 { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
4232 { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
4233 { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
4234 { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4235 { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
4236 { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4237 { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
4238 { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4239 { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
4240 { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4241 { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
4242 { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
4243 { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
4244 { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
4245 { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
4246 { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
4247 { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
4248 { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
4249 { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
4250 { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
4251 { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
4252 { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
4253 { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
4254 { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
4255 { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
4256 { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
4257 { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
4258 { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
4259 { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
4260 { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
4261 { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
4262 { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
4263 { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
4264 { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
4265 { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
4266 { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
4267 { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
4268 { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
4269 { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
4270 { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
4271 { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
4272 { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
4273 { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
4274 {} /* terminator */
4275 };
4276
4277 MODULE_ALIAS("snd-hda-codec-id:8384*");
4278 MODULE_ALIAS("snd-hda-codec-id:111d*");
4279
4280 MODULE_LICENSE("GPL");
4281 MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
4282
4283 static struct hda_codec_preset_list sigmatel_list = {
4284 .preset = snd_hda_preset_sigmatel,
4285 .owner = THIS_MODULE,
4286 };
4287
4288 static int __init patch_sigmatel_init(void)
4289 {
4290 return snd_hda_add_codec_preset(&sigmatel_list);
4291 }
4292
4293 static void __exit patch_sigmatel_exit(void)
4294 {
4295 snd_hda_delete_codec_preset(&sigmatel_list);
4296 }
4297
4298 module_init(patch_sigmatel_init)
4299 module_exit(patch_sigmatel_exit)
Linux kernel - Deliverables
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