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Merge commit 'Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux'
[deliverable/linux.git] / sound / pci / ice1712 / ice1712.c
1 /*
2 * ALSA driver for ICEnsemble ICE1712 (Envy24)
3 *
4 * Copyright (c) 2000 Jaroslav Kysela <perex@perex.cz>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 *
20 */
21
22 /*
23 NOTES:
24 - spdif nonaudio consumer mode does not work (at least with my
25 Sony STR-DB830)
26 */
27
28 /*
29 * Changes:
30 *
31 * 2002.09.09 Takashi Iwai <tiwai@suse.de>
32 * split the code to several files. each low-level routine
33 * is stored in the local file and called from registration
34 * function from card_info struct.
35 *
36 * 2002.11.26 James Stafford <jstafford@ampltd.com>
37 * Added support for VT1724 (Envy24HT)
38 * I have left out support for 176.4 and 192 KHz for the moment.
39 * I also haven't done anything with the internal S/PDIF transmitter or the MPU-401
40 *
41 * 2003.02.20 Taksahi Iwai <tiwai@suse.de>
42 * Split vt1724 part to an independent driver.
43 * The GPIO is accessed through the callback functions now.
44 *
45 * 2004.03.31 Doug McLain <nostar@comcast.net>
46 * Added support for Event Electronics EZ8 card to hoontech.c.
47 */
48
49
50 #include <linux/delay.h>
51 #include <linux/interrupt.h>
52 #include <linux/init.h>
53 #include <linux/pci.h>
54 #include <linux/dma-mapping.h>
55 #include <linux/slab.h>
56 #include <linux/module.h>
57 #include <linux/mutex.h>
58
59 #include <sound/core.h>
60 #include <sound/cs8427.h>
61 #include <sound/info.h>
62 #include <sound/initval.h>
63 #include <sound/tlv.h>
64
65 #include <sound/asoundef.h>
66
67 #include "ice1712.h"
68
69 /* lowlevel routines */
70 #include "delta.h"
71 #include "ews.h"
72 #include "hoontech.h"
73
74 MODULE_AUTHOR("Jaroslav Kysela <perex@perex.cz>");
75 MODULE_DESCRIPTION("ICEnsemble ICE1712 (Envy24)");
76 MODULE_LICENSE("GPL");
77 MODULE_SUPPORTED_DEVICE("{"
78 HOONTECH_DEVICE_DESC
79 DELTA_DEVICE_DESC
80 EWS_DEVICE_DESC
81 "{ICEnsemble,Generic ICE1712},"
82 "{ICEnsemble,Generic Envy24}}");
83
84 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
85 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
86 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;/* Enable this card */
87 static char *model[SNDRV_CARDS];
88 static bool omni[SNDRV_CARDS]; /* Delta44 & 66 Omni I/O support */
89 static int cs8427_timeout[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = 500}; /* CS8427 S/PDIF transceiver reset timeout value in msec */
90 static int dxr_enable[SNDRV_CARDS]; /* DXR enable for DMX6FIRE */
91
92 module_param_array(index, int, NULL, 0444);
93 MODULE_PARM_DESC(index, "Index value for ICE1712 soundcard.");
94 module_param_array(id, charp, NULL, 0444);
95 MODULE_PARM_DESC(id, "ID string for ICE1712 soundcard.");
96 module_param_array(enable, bool, NULL, 0444);
97 MODULE_PARM_DESC(enable, "Enable ICE1712 soundcard.");
98 module_param_array(omni, bool, NULL, 0444);
99 MODULE_PARM_DESC(omni, "Enable Midiman M-Audio Delta Omni I/O support.");
100 module_param_array(cs8427_timeout, int, NULL, 0444);
101 MODULE_PARM_DESC(cs8427_timeout, "Define reset timeout for cs8427 chip in msec resolution.");
102 module_param_array(model, charp, NULL, 0444);
103 MODULE_PARM_DESC(model, "Use the given board model.");
104 module_param_array(dxr_enable, int, NULL, 0444);
105 MODULE_PARM_DESC(dxr_enable, "Enable DXR support for Terratec DMX6FIRE.");
106
107
108 static DEFINE_PCI_DEVICE_TABLE(snd_ice1712_ids) = {
109 { PCI_VDEVICE(ICE, PCI_DEVICE_ID_ICE_1712), 0 }, /* ICE1712 */
110 { 0, }
111 };
112
113 MODULE_DEVICE_TABLE(pci, snd_ice1712_ids);
114
115 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice);
116 static int snd_ice1712_build_controls(struct snd_ice1712 *ice);
117
118 static int PRO_RATE_LOCKED;
119 static int PRO_RATE_RESET = 1;
120 static unsigned int PRO_RATE_DEFAULT = 44100;
121
122 /*
123 * Basic I/O
124 */
125
126 /* check whether the clock mode is spdif-in */
127 static inline int is_spdif_master(struct snd_ice1712 *ice)
128 {
129 return (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER) ? 1 : 0;
130 }
131
132 static inline int is_pro_rate_locked(struct snd_ice1712 *ice)
133 {
134 return is_spdif_master(ice) || PRO_RATE_LOCKED;
135 }
136
137 static inline void snd_ice1712_ds_write(struct snd_ice1712 *ice, u8 channel, u8 addr, u32 data)
138 {
139 outb((channel << 4) | addr, ICEDS(ice, INDEX));
140 outl(data, ICEDS(ice, DATA));
141 }
142
143 static inline u32 snd_ice1712_ds_read(struct snd_ice1712 *ice, u8 channel, u8 addr)
144 {
145 outb((channel << 4) | addr, ICEDS(ice, INDEX));
146 return inl(ICEDS(ice, DATA));
147 }
148
149 static void snd_ice1712_ac97_write(struct snd_ac97 *ac97,
150 unsigned short reg,
151 unsigned short val)
152 {
153 struct snd_ice1712 *ice = ac97->private_data;
154 int tm;
155 unsigned char old_cmd = 0;
156
157 for (tm = 0; tm < 0x10000; tm++) {
158 old_cmd = inb(ICEREG(ice, AC97_CMD));
159 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
160 continue;
161 if (!(old_cmd & ICE1712_AC97_READY))
162 continue;
163 break;
164 }
165 outb(reg, ICEREG(ice, AC97_INDEX));
166 outw(val, ICEREG(ice, AC97_DATA));
167 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
168 outb(old_cmd | ICE1712_AC97_WRITE, ICEREG(ice, AC97_CMD));
169 for (tm = 0; tm < 0x10000; tm++)
170 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
171 break;
172 }
173
174 static unsigned short snd_ice1712_ac97_read(struct snd_ac97 *ac97,
175 unsigned short reg)
176 {
177 struct snd_ice1712 *ice = ac97->private_data;
178 int tm;
179 unsigned char old_cmd = 0;
180
181 for (tm = 0; tm < 0x10000; tm++) {
182 old_cmd = inb(ICEREG(ice, AC97_CMD));
183 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
184 continue;
185 if (!(old_cmd & ICE1712_AC97_READY))
186 continue;
187 break;
188 }
189 outb(reg, ICEREG(ice, AC97_INDEX));
190 outb(old_cmd | ICE1712_AC97_READ, ICEREG(ice, AC97_CMD));
191 for (tm = 0; tm < 0x10000; tm++)
192 if ((inb(ICEREG(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
193 break;
194 if (tm >= 0x10000) /* timeout */
195 return ~0;
196 return inw(ICEREG(ice, AC97_DATA));
197 }
198
199 /*
200 * pro ac97 section
201 */
202
203 static void snd_ice1712_pro_ac97_write(struct snd_ac97 *ac97,
204 unsigned short reg,
205 unsigned short val)
206 {
207 struct snd_ice1712 *ice = ac97->private_data;
208 int tm;
209 unsigned char old_cmd = 0;
210
211 for (tm = 0; tm < 0x10000; tm++) {
212 old_cmd = inb(ICEMT(ice, AC97_CMD));
213 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
214 continue;
215 if (!(old_cmd & ICE1712_AC97_READY))
216 continue;
217 break;
218 }
219 outb(reg, ICEMT(ice, AC97_INDEX));
220 outw(val, ICEMT(ice, AC97_DATA));
221 old_cmd &= ~(ICE1712_AC97_PBK_VSR | ICE1712_AC97_CAP_VSR);
222 outb(old_cmd | ICE1712_AC97_WRITE, ICEMT(ice, AC97_CMD));
223 for (tm = 0; tm < 0x10000; tm++)
224 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_WRITE) == 0)
225 break;
226 }
227
228
229 static unsigned short snd_ice1712_pro_ac97_read(struct snd_ac97 *ac97,
230 unsigned short reg)
231 {
232 struct snd_ice1712 *ice = ac97->private_data;
233 int tm;
234 unsigned char old_cmd = 0;
235
236 for (tm = 0; tm < 0x10000; tm++) {
237 old_cmd = inb(ICEMT(ice, AC97_CMD));
238 if (old_cmd & (ICE1712_AC97_WRITE | ICE1712_AC97_READ))
239 continue;
240 if (!(old_cmd & ICE1712_AC97_READY))
241 continue;
242 break;
243 }
244 outb(reg, ICEMT(ice, AC97_INDEX));
245 outb(old_cmd | ICE1712_AC97_READ, ICEMT(ice, AC97_CMD));
246 for (tm = 0; tm < 0x10000; tm++)
247 if ((inb(ICEMT(ice, AC97_CMD)) & ICE1712_AC97_READ) == 0)
248 break;
249 if (tm >= 0x10000) /* timeout */
250 return ~0;
251 return inw(ICEMT(ice, AC97_DATA));
252 }
253
254 /*
255 * consumer ac97 digital mix
256 */
257 #define snd_ice1712_digmix_route_ac97_info snd_ctl_boolean_mono_info
258
259 static int snd_ice1712_digmix_route_ac97_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
260 {
261 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
262
263 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_ROUTECTRL)) & ICE1712_ROUTE_AC97 ? 1 : 0;
264 return 0;
265 }
266
267 static int snd_ice1712_digmix_route_ac97_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
268 {
269 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
270 unsigned char val, nval;
271
272 spin_lock_irq(&ice->reg_lock);
273 val = inb(ICEMT(ice, MONITOR_ROUTECTRL));
274 nval = val & ~ICE1712_ROUTE_AC97;
275 if (ucontrol->value.integer.value[0])
276 nval |= ICE1712_ROUTE_AC97;
277 outb(nval, ICEMT(ice, MONITOR_ROUTECTRL));
278 spin_unlock_irq(&ice->reg_lock);
279 return val != nval;
280 }
281
282 static struct snd_kcontrol_new snd_ice1712_mixer_digmix_route_ac97 = {
283 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
284 .name = "Digital Mixer To AC97",
285 .info = snd_ice1712_digmix_route_ac97_info,
286 .get = snd_ice1712_digmix_route_ac97_get,
287 .put = snd_ice1712_digmix_route_ac97_put,
288 };
289
290
291 /*
292 * gpio operations
293 */
294 static void snd_ice1712_set_gpio_dir(struct snd_ice1712 *ice, unsigned int data)
295 {
296 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, data);
297 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
298 }
299
300 static unsigned int snd_ice1712_get_gpio_dir(struct snd_ice1712 *ice)
301 {
302 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION);
303 }
304
305 static unsigned int snd_ice1712_get_gpio_mask(struct snd_ice1712 *ice)
306 {
307 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK);
308 }
309
310 static void snd_ice1712_set_gpio_mask(struct snd_ice1712 *ice, unsigned int data)
311 {
312 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, data);
313 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
314 }
315
316 static unsigned int snd_ice1712_get_gpio_data(struct snd_ice1712 *ice)
317 {
318 return snd_ice1712_read(ice, ICE1712_IREG_GPIO_DATA);
319 }
320
321 static void snd_ice1712_set_gpio_data(struct snd_ice1712 *ice, unsigned int val)
322 {
323 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA, val);
324 inb(ICEREG(ice, DATA)); /* dummy read for pci-posting */
325 }
326
327 /*
328 *
329 * CS8427 interface
330 *
331 */
332
333 /*
334 * change the input clock selection
335 * spdif_clock = 1 - IEC958 input, 0 - Envy24
336 */
337 static int snd_ice1712_cs8427_set_input_clock(struct snd_ice1712 *ice, int spdif_clock)
338 {
339 unsigned char reg[2] = { 0x80 | 4, 0 }; /* CS8427 auto increment | register number 4 + data */
340 unsigned char val, nval;
341 int res = 0;
342
343 snd_i2c_lock(ice->i2c);
344 if (snd_i2c_sendbytes(ice->cs8427, reg, 1) != 1) {
345 snd_i2c_unlock(ice->i2c);
346 return -EIO;
347 }
348 if (snd_i2c_readbytes(ice->cs8427, &val, 1) != 1) {
349 snd_i2c_unlock(ice->i2c);
350 return -EIO;
351 }
352 nval = val & 0xf0;
353 if (spdif_clock)
354 nval |= 0x01;
355 else
356 nval |= 0x04;
357 if (val != nval) {
358 reg[1] = nval;
359 if (snd_i2c_sendbytes(ice->cs8427, reg, 2) != 2) {
360 res = -EIO;
361 } else {
362 res++;
363 }
364 }
365 snd_i2c_unlock(ice->i2c);
366 return res;
367 }
368
369 /*
370 * spdif callbacks
371 */
372 static void open_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
373 {
374 snd_cs8427_iec958_active(ice->cs8427, 1);
375 }
376
377 static void close_cs8427(struct snd_ice1712 *ice, struct snd_pcm_substream *substream)
378 {
379 snd_cs8427_iec958_active(ice->cs8427, 0);
380 }
381
382 static void setup_cs8427(struct snd_ice1712 *ice, int rate)
383 {
384 snd_cs8427_iec958_pcm(ice->cs8427, rate);
385 }
386
387 /*
388 * create and initialize callbacks for cs8427 interface
389 */
390 int snd_ice1712_init_cs8427(struct snd_ice1712 *ice, int addr)
391 {
392 int err;
393
394 err = snd_cs8427_create(ice->i2c, addr,
395 (ice->cs8427_timeout * HZ) / 1000, &ice->cs8427);
396 if (err < 0) {
397 snd_printk(KERN_ERR "CS8427 initialization failed\n");
398 return err;
399 }
400 ice->spdif.ops.open = open_cs8427;
401 ice->spdif.ops.close = close_cs8427;
402 ice->spdif.ops.setup_rate = setup_cs8427;
403 return 0;
404 }
405
406 static void snd_ice1712_set_input_clock_source(struct snd_ice1712 *ice, int spdif_is_master)
407 {
408 /* change CS8427 clock source too */
409 if (ice->cs8427)
410 snd_ice1712_cs8427_set_input_clock(ice, spdif_is_master);
411 /* notify ak4524 chip as well */
412 if (spdif_is_master) {
413 unsigned int i;
414 for (i = 0; i < ice->akm_codecs; i++) {
415 if (ice->akm[i].ops.set_rate_val)
416 ice->akm[i].ops.set_rate_val(&ice->akm[i], 0);
417 }
418 }
419 }
420
421 /*
422 * Interrupt handler
423 */
424
425 static irqreturn_t snd_ice1712_interrupt(int irq, void *dev_id)
426 {
427 struct snd_ice1712 *ice = dev_id;
428 unsigned char status;
429 int handled = 0;
430
431 while (1) {
432 status = inb(ICEREG(ice, IRQSTAT));
433 if (status == 0)
434 break;
435 handled = 1;
436 if (status & ICE1712_IRQ_MPU1) {
437 if (ice->rmidi[0])
438 snd_mpu401_uart_interrupt(irq, ice->rmidi[0]->private_data);
439 outb(ICE1712_IRQ_MPU1, ICEREG(ice, IRQSTAT));
440 status &= ~ICE1712_IRQ_MPU1;
441 }
442 if (status & ICE1712_IRQ_TIMER)
443 outb(ICE1712_IRQ_TIMER, ICEREG(ice, IRQSTAT));
444 if (status & ICE1712_IRQ_MPU2) {
445 if (ice->rmidi[1])
446 snd_mpu401_uart_interrupt(irq, ice->rmidi[1]->private_data);
447 outb(ICE1712_IRQ_MPU2, ICEREG(ice, IRQSTAT));
448 status &= ~ICE1712_IRQ_MPU2;
449 }
450 if (status & ICE1712_IRQ_PROPCM) {
451 unsigned char mtstat = inb(ICEMT(ice, IRQ));
452 if (mtstat & ICE1712_MULTI_PBKSTATUS) {
453 if (ice->playback_pro_substream)
454 snd_pcm_period_elapsed(ice->playback_pro_substream);
455 outb(ICE1712_MULTI_PBKSTATUS, ICEMT(ice, IRQ));
456 }
457 if (mtstat & ICE1712_MULTI_CAPSTATUS) {
458 if (ice->capture_pro_substream)
459 snd_pcm_period_elapsed(ice->capture_pro_substream);
460 outb(ICE1712_MULTI_CAPSTATUS, ICEMT(ice, IRQ));
461 }
462 }
463 if (status & ICE1712_IRQ_FM)
464 outb(ICE1712_IRQ_FM, ICEREG(ice, IRQSTAT));
465 if (status & ICE1712_IRQ_PBKDS) {
466 u32 idx;
467 u16 pbkstatus;
468 struct snd_pcm_substream *substream;
469 pbkstatus = inw(ICEDS(ice, INTSTAT));
470 /* printk(KERN_DEBUG "pbkstatus = 0x%x\n", pbkstatus); */
471 for (idx = 0; idx < 6; idx++) {
472 if ((pbkstatus & (3 << (idx * 2))) == 0)
473 continue;
474 substream = ice->playback_con_substream_ds[idx];
475 if (substream != NULL)
476 snd_pcm_period_elapsed(substream);
477 outw(3 << (idx * 2), ICEDS(ice, INTSTAT));
478 }
479 outb(ICE1712_IRQ_PBKDS, ICEREG(ice, IRQSTAT));
480 }
481 if (status & ICE1712_IRQ_CONCAP) {
482 if (ice->capture_con_substream)
483 snd_pcm_period_elapsed(ice->capture_con_substream);
484 outb(ICE1712_IRQ_CONCAP, ICEREG(ice, IRQSTAT));
485 }
486 if (status & ICE1712_IRQ_CONPBK) {
487 if (ice->playback_con_substream)
488 snd_pcm_period_elapsed(ice->playback_con_substream);
489 outb(ICE1712_IRQ_CONPBK, ICEREG(ice, IRQSTAT));
490 }
491 }
492 return IRQ_RETVAL(handled);
493 }
494
495
496 /*
497 * PCM part - misc
498 */
499
500 static int snd_ice1712_hw_params(struct snd_pcm_substream *substream,
501 struct snd_pcm_hw_params *hw_params)
502 {
503 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
504 }
505
506 static int snd_ice1712_hw_free(struct snd_pcm_substream *substream)
507 {
508 return snd_pcm_lib_free_pages(substream);
509 }
510
511 /*
512 * PCM part - consumer I/O
513 */
514
515 static int snd_ice1712_playback_trigger(struct snd_pcm_substream *substream,
516 int cmd)
517 {
518 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
519 int result = 0;
520 u32 tmp;
521
522 spin_lock(&ice->reg_lock);
523 tmp = snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL);
524 if (cmd == SNDRV_PCM_TRIGGER_START) {
525 tmp |= 1;
526 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
527 tmp &= ~1;
528 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
529 tmp |= 2;
530 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
531 tmp &= ~2;
532 } else {
533 result = -EINVAL;
534 }
535 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
536 spin_unlock(&ice->reg_lock);
537 return result;
538 }
539
540 static int snd_ice1712_playback_ds_trigger(struct snd_pcm_substream *substream,
541 int cmd)
542 {
543 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
544 int result = 0;
545 u32 tmp;
546
547 spin_lock(&ice->reg_lock);
548 tmp = snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL);
549 if (cmd == SNDRV_PCM_TRIGGER_START) {
550 tmp |= 1;
551 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
552 tmp &= ~1;
553 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH) {
554 tmp |= 2;
555 } else if (cmd == SNDRV_PCM_TRIGGER_PAUSE_RELEASE) {
556 tmp &= ~2;
557 } else {
558 result = -EINVAL;
559 }
560 snd_ice1712_ds_write(ice, substream->number * 2, ICE1712_DSC_CONTROL, tmp);
561 spin_unlock(&ice->reg_lock);
562 return result;
563 }
564
565 static int snd_ice1712_capture_trigger(struct snd_pcm_substream *substream,
566 int cmd)
567 {
568 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
569 int result = 0;
570 u8 tmp;
571
572 spin_lock(&ice->reg_lock);
573 tmp = snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL);
574 if (cmd == SNDRV_PCM_TRIGGER_START) {
575 tmp |= 1;
576 } else if (cmd == SNDRV_PCM_TRIGGER_STOP) {
577 tmp &= ~1;
578 } else {
579 result = -EINVAL;
580 }
581 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
582 spin_unlock(&ice->reg_lock);
583 return result;
584 }
585
586 static int snd_ice1712_playback_prepare(struct snd_pcm_substream *substream)
587 {
588 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
589 struct snd_pcm_runtime *runtime = substream->runtime;
590 u32 period_size, buf_size, rate, tmp;
591
592 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
593 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
594 tmp = 0x0000;
595 if (snd_pcm_format_width(runtime->format) == 16)
596 tmp |= 0x10;
597 if (runtime->channels == 2)
598 tmp |= 0x08;
599 rate = (runtime->rate * 8192) / 375;
600 if (rate > 0x000fffff)
601 rate = 0x000fffff;
602 spin_lock_irq(&ice->reg_lock);
603 outb(0, ice->ddma_port + 15);
604 outb(ICE1712_DMA_MODE_WRITE | ICE1712_DMA_AUTOINIT, ice->ddma_port + 0x0b);
605 outl(runtime->dma_addr, ice->ddma_port + 0);
606 outw(buf_size, ice->ddma_port + 4);
607 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_LO, rate & 0xff);
608 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_MID, (rate >> 8) & 0xff);
609 snd_ice1712_write(ice, ICE1712_IREG_PBK_RATE_HI, (rate >> 16) & 0xff);
610 snd_ice1712_write(ice, ICE1712_IREG_PBK_CTRL, tmp);
611 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_LO, period_size & 0xff);
612 snd_ice1712_write(ice, ICE1712_IREG_PBK_COUNT_HI, period_size >> 8);
613 snd_ice1712_write(ice, ICE1712_IREG_PBK_LEFT, 0);
614 snd_ice1712_write(ice, ICE1712_IREG_PBK_RIGHT, 0);
615 spin_unlock_irq(&ice->reg_lock);
616 return 0;
617 }
618
619 static int snd_ice1712_playback_ds_prepare(struct snd_pcm_substream *substream)
620 {
621 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
622 struct snd_pcm_runtime *runtime = substream->runtime;
623 u32 period_size, buf_size, rate, tmp, chn;
624
625 period_size = snd_pcm_lib_period_bytes(substream) - 1;
626 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
627 tmp = 0x0064;
628 if (snd_pcm_format_width(runtime->format) == 16)
629 tmp &= ~0x04;
630 if (runtime->channels == 2)
631 tmp |= 0x08;
632 rate = (runtime->rate * 8192) / 375;
633 if (rate > 0x000fffff)
634 rate = 0x000fffff;
635 ice->playback_con_active_buf[substream->number] = 0;
636 ice->playback_con_virt_addr[substream->number] = runtime->dma_addr;
637 chn = substream->number * 2;
638 spin_lock_irq(&ice->reg_lock);
639 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR0, runtime->dma_addr);
640 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT0, period_size);
641 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_ADDR1, runtime->dma_addr + (runtime->periods > 1 ? period_size + 1 : 0));
642 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_COUNT1, period_size);
643 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_RATE, rate);
644 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_VOLUME, 0);
645 snd_ice1712_ds_write(ice, chn, ICE1712_DSC_CONTROL, tmp);
646 if (runtime->channels == 2) {
647 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_RATE, rate);
648 snd_ice1712_ds_write(ice, chn + 1, ICE1712_DSC_VOLUME, 0);
649 }
650 spin_unlock_irq(&ice->reg_lock);
651 return 0;
652 }
653
654 static int snd_ice1712_capture_prepare(struct snd_pcm_substream *substream)
655 {
656 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
657 struct snd_pcm_runtime *runtime = substream->runtime;
658 u32 period_size, buf_size;
659 u8 tmp;
660
661 period_size = (snd_pcm_lib_period_bytes(substream) >> 2) - 1;
662 buf_size = snd_pcm_lib_buffer_bytes(substream) - 1;
663 tmp = 0x06;
664 if (snd_pcm_format_width(runtime->format) == 16)
665 tmp &= ~0x04;
666 if (runtime->channels == 2)
667 tmp &= ~0x02;
668 spin_lock_irq(&ice->reg_lock);
669 outl(ice->capture_con_virt_addr = runtime->dma_addr, ICEREG(ice, CONCAP_ADDR));
670 outw(buf_size, ICEREG(ice, CONCAP_COUNT));
671 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_HI, period_size >> 8);
672 snd_ice1712_write(ice, ICE1712_IREG_CAP_COUNT_LO, period_size & 0xff);
673 snd_ice1712_write(ice, ICE1712_IREG_CAP_CTRL, tmp);
674 spin_unlock_irq(&ice->reg_lock);
675 snd_ac97_set_rate(ice->ac97, AC97_PCM_LR_ADC_RATE, runtime->rate);
676 return 0;
677 }
678
679 static snd_pcm_uframes_t snd_ice1712_playback_pointer(struct snd_pcm_substream *substream)
680 {
681 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
682 struct snd_pcm_runtime *runtime = substream->runtime;
683 size_t ptr;
684
685 if (!(snd_ice1712_read(ice, ICE1712_IREG_PBK_CTRL) & 1))
686 return 0;
687 ptr = runtime->buffer_size - inw(ice->ddma_port + 4);
688 if (ptr == runtime->buffer_size)
689 ptr = 0;
690 return bytes_to_frames(substream->runtime, ptr);
691 }
692
693 static snd_pcm_uframes_t snd_ice1712_playback_ds_pointer(struct snd_pcm_substream *substream)
694 {
695 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
696 u8 addr;
697 size_t ptr;
698
699 if (!(snd_ice1712_ds_read(ice, substream->number * 2, ICE1712_DSC_CONTROL) & 1))
700 return 0;
701 if (ice->playback_con_active_buf[substream->number])
702 addr = ICE1712_DSC_ADDR1;
703 else
704 addr = ICE1712_DSC_ADDR0;
705 ptr = snd_ice1712_ds_read(ice, substream->number * 2, addr) -
706 ice->playback_con_virt_addr[substream->number];
707 if (ptr == substream->runtime->buffer_size)
708 ptr = 0;
709 return bytes_to_frames(substream->runtime, ptr);
710 }
711
712 static snd_pcm_uframes_t snd_ice1712_capture_pointer(struct snd_pcm_substream *substream)
713 {
714 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
715 size_t ptr;
716
717 if (!(snd_ice1712_read(ice, ICE1712_IREG_CAP_CTRL) & 1))
718 return 0;
719 ptr = inl(ICEREG(ice, CONCAP_ADDR)) - ice->capture_con_virt_addr;
720 if (ptr == substream->runtime->buffer_size)
721 ptr = 0;
722 return bytes_to_frames(substream->runtime, ptr);
723 }
724
725 static const struct snd_pcm_hardware snd_ice1712_playback = {
726 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
727 SNDRV_PCM_INFO_BLOCK_TRANSFER |
728 SNDRV_PCM_INFO_MMAP_VALID |
729 SNDRV_PCM_INFO_PAUSE),
730 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
731 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
732 .rate_min = 4000,
733 .rate_max = 48000,
734 .channels_min = 1,
735 .channels_max = 2,
736 .buffer_bytes_max = (64*1024),
737 .period_bytes_min = 64,
738 .period_bytes_max = (64*1024),
739 .periods_min = 1,
740 .periods_max = 1024,
741 .fifo_size = 0,
742 };
743
744 static const struct snd_pcm_hardware snd_ice1712_playback_ds = {
745 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
746 SNDRV_PCM_INFO_BLOCK_TRANSFER |
747 SNDRV_PCM_INFO_MMAP_VALID |
748 SNDRV_PCM_INFO_PAUSE),
749 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
750 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
751 .rate_min = 4000,
752 .rate_max = 48000,
753 .channels_min = 1,
754 .channels_max = 2,
755 .buffer_bytes_max = (128*1024),
756 .period_bytes_min = 64,
757 .period_bytes_max = (128*1024),
758 .periods_min = 2,
759 .periods_max = 2,
760 .fifo_size = 0,
761 };
762
763 static const struct snd_pcm_hardware snd_ice1712_capture = {
764 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
765 SNDRV_PCM_INFO_BLOCK_TRANSFER |
766 SNDRV_PCM_INFO_MMAP_VALID),
767 .formats = SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
768 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
769 .rate_min = 4000,
770 .rate_max = 48000,
771 .channels_min = 1,
772 .channels_max = 2,
773 .buffer_bytes_max = (64*1024),
774 .period_bytes_min = 64,
775 .period_bytes_max = (64*1024),
776 .periods_min = 1,
777 .periods_max = 1024,
778 .fifo_size = 0,
779 };
780
781 static int snd_ice1712_playback_open(struct snd_pcm_substream *substream)
782 {
783 struct snd_pcm_runtime *runtime = substream->runtime;
784 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
785
786 ice->playback_con_substream = substream;
787 runtime->hw = snd_ice1712_playback;
788 return 0;
789 }
790
791 static int snd_ice1712_playback_ds_open(struct snd_pcm_substream *substream)
792 {
793 struct snd_pcm_runtime *runtime = substream->runtime;
794 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
795 u32 tmp;
796
797 ice->playback_con_substream_ds[substream->number] = substream;
798 runtime->hw = snd_ice1712_playback_ds;
799 spin_lock_irq(&ice->reg_lock);
800 tmp = inw(ICEDS(ice, INTMASK)) & ~(1 << (substream->number * 2));
801 outw(tmp, ICEDS(ice, INTMASK));
802 spin_unlock_irq(&ice->reg_lock);
803 return 0;
804 }
805
806 static int snd_ice1712_capture_open(struct snd_pcm_substream *substream)
807 {
808 struct snd_pcm_runtime *runtime = substream->runtime;
809 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
810
811 ice->capture_con_substream = substream;
812 runtime->hw = snd_ice1712_capture;
813 runtime->hw.rates = ice->ac97->rates[AC97_RATES_ADC];
814 if (!(runtime->hw.rates & SNDRV_PCM_RATE_8000))
815 runtime->hw.rate_min = 48000;
816 return 0;
817 }
818
819 static int snd_ice1712_playback_close(struct snd_pcm_substream *substream)
820 {
821 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
822
823 ice->playback_con_substream = NULL;
824 return 0;
825 }
826
827 static int snd_ice1712_playback_ds_close(struct snd_pcm_substream *substream)
828 {
829 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
830 u32 tmp;
831
832 spin_lock_irq(&ice->reg_lock);
833 tmp = inw(ICEDS(ice, INTMASK)) | (3 << (substream->number * 2));
834 outw(tmp, ICEDS(ice, INTMASK));
835 spin_unlock_irq(&ice->reg_lock);
836 ice->playback_con_substream_ds[substream->number] = NULL;
837 return 0;
838 }
839
840 static int snd_ice1712_capture_close(struct snd_pcm_substream *substream)
841 {
842 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
843
844 ice->capture_con_substream = NULL;
845 return 0;
846 }
847
848 static struct snd_pcm_ops snd_ice1712_playback_ops = {
849 .open = snd_ice1712_playback_open,
850 .close = snd_ice1712_playback_close,
851 .ioctl = snd_pcm_lib_ioctl,
852 .hw_params = snd_ice1712_hw_params,
853 .hw_free = snd_ice1712_hw_free,
854 .prepare = snd_ice1712_playback_prepare,
855 .trigger = snd_ice1712_playback_trigger,
856 .pointer = snd_ice1712_playback_pointer,
857 };
858
859 static struct snd_pcm_ops snd_ice1712_playback_ds_ops = {
860 .open = snd_ice1712_playback_ds_open,
861 .close = snd_ice1712_playback_ds_close,
862 .ioctl = snd_pcm_lib_ioctl,
863 .hw_params = snd_ice1712_hw_params,
864 .hw_free = snd_ice1712_hw_free,
865 .prepare = snd_ice1712_playback_ds_prepare,
866 .trigger = snd_ice1712_playback_ds_trigger,
867 .pointer = snd_ice1712_playback_ds_pointer,
868 };
869
870 static struct snd_pcm_ops snd_ice1712_capture_ops = {
871 .open = snd_ice1712_capture_open,
872 .close = snd_ice1712_capture_close,
873 .ioctl = snd_pcm_lib_ioctl,
874 .hw_params = snd_ice1712_hw_params,
875 .hw_free = snd_ice1712_hw_free,
876 .prepare = snd_ice1712_capture_prepare,
877 .trigger = snd_ice1712_capture_trigger,
878 .pointer = snd_ice1712_capture_pointer,
879 };
880
881 static int snd_ice1712_pcm(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
882 {
883 struct snd_pcm *pcm;
884 int err;
885
886 if (rpcm)
887 *rpcm = NULL;
888 err = snd_pcm_new(ice->card, "ICE1712 consumer", device, 1, 1, &pcm);
889 if (err < 0)
890 return err;
891
892 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ops);
893 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_ops);
894
895 pcm->private_data = ice;
896 pcm->info_flags = 0;
897 strcpy(pcm->name, "ICE1712 consumer");
898 ice->pcm = pcm;
899
900 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
901 snd_dma_pci_data(ice->pci), 64*1024, 64*1024);
902
903 if (rpcm)
904 *rpcm = pcm;
905
906 printk(KERN_WARNING "Consumer PCM code does not work well at the moment --jk\n");
907
908 return 0;
909 }
910
911 static int snd_ice1712_pcm_ds(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
912 {
913 struct snd_pcm *pcm;
914 int err;
915
916 if (rpcm)
917 *rpcm = NULL;
918 err = snd_pcm_new(ice->card, "ICE1712 consumer (DS)", device, 6, 0, &pcm);
919 if (err < 0)
920 return err;
921
922 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_ds_ops);
923
924 pcm->private_data = ice;
925 pcm->info_flags = 0;
926 strcpy(pcm->name, "ICE1712 consumer (DS)");
927 ice->pcm_ds = pcm;
928
929 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
930 snd_dma_pci_data(ice->pci), 64*1024, 128*1024);
931
932 if (rpcm)
933 *rpcm = pcm;
934
935 return 0;
936 }
937
938 /*
939 * PCM code - professional part (multitrack)
940 */
941
942 static unsigned int rates[] = { 8000, 9600, 11025, 12000, 16000, 22050, 24000,
943 32000, 44100, 48000, 64000, 88200, 96000 };
944
945 static struct snd_pcm_hw_constraint_list hw_constraints_rates = {
946 .count = ARRAY_SIZE(rates),
947 .list = rates,
948 .mask = 0,
949 };
950
951 static int snd_ice1712_pro_trigger(struct snd_pcm_substream *substream,
952 int cmd)
953 {
954 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
955 switch (cmd) {
956 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
957 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
958 {
959 unsigned int what;
960 unsigned int old;
961 if (substream->stream != SNDRV_PCM_STREAM_PLAYBACK)
962 return -EINVAL;
963 what = ICE1712_PLAYBACK_PAUSE;
964 snd_pcm_trigger_done(substream, substream);
965 spin_lock(&ice->reg_lock);
966 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
967 if (cmd == SNDRV_PCM_TRIGGER_PAUSE_PUSH)
968 old |= what;
969 else
970 old &= ~what;
971 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
972 spin_unlock(&ice->reg_lock);
973 break;
974 }
975 case SNDRV_PCM_TRIGGER_START:
976 case SNDRV_PCM_TRIGGER_STOP:
977 {
978 unsigned int what = 0;
979 unsigned int old;
980 struct snd_pcm_substream *s;
981
982 snd_pcm_group_for_each_entry(s, substream) {
983 if (s == ice->playback_pro_substream) {
984 what |= ICE1712_PLAYBACK_START;
985 snd_pcm_trigger_done(s, substream);
986 } else if (s == ice->capture_pro_substream) {
987 what |= ICE1712_CAPTURE_START_SHADOW;
988 snd_pcm_trigger_done(s, substream);
989 }
990 }
991 spin_lock(&ice->reg_lock);
992 old = inl(ICEMT(ice, PLAYBACK_CONTROL));
993 if (cmd == SNDRV_PCM_TRIGGER_START)
994 old |= what;
995 else
996 old &= ~what;
997 outl(old, ICEMT(ice, PLAYBACK_CONTROL));
998 spin_unlock(&ice->reg_lock);
999 break;
1000 }
1001 default:
1002 return -EINVAL;
1003 }
1004 return 0;
1005 }
1006
1007 /*
1008 */
1009 static void snd_ice1712_set_pro_rate(struct snd_ice1712 *ice, unsigned int rate, int force)
1010 {
1011 unsigned long flags;
1012 unsigned char val, old;
1013 unsigned int i;
1014
1015 switch (rate) {
1016 case 8000: val = 6; break;
1017 case 9600: val = 3; break;
1018 case 11025: val = 10; break;
1019 case 12000: val = 2; break;
1020 case 16000: val = 5; break;
1021 case 22050: val = 9; break;
1022 case 24000: val = 1; break;
1023 case 32000: val = 4; break;
1024 case 44100: val = 8; break;
1025 case 48000: val = 0; break;
1026 case 64000: val = 15; break;
1027 case 88200: val = 11; break;
1028 case 96000: val = 7; break;
1029 default:
1030 snd_BUG();
1031 val = 0;
1032 rate = 48000;
1033 break;
1034 }
1035
1036 spin_lock_irqsave(&ice->reg_lock, flags);
1037 if (inb(ICEMT(ice, PLAYBACK_CONTROL)) & (ICE1712_CAPTURE_START_SHADOW|
1038 ICE1712_PLAYBACK_PAUSE|
1039 ICE1712_PLAYBACK_START)) {
1040 __out:
1041 spin_unlock_irqrestore(&ice->reg_lock, flags);
1042 return;
1043 }
1044 if (!force && is_pro_rate_locked(ice))
1045 goto __out;
1046
1047 old = inb(ICEMT(ice, RATE));
1048 if (!force && old == val)
1049 goto __out;
1050 outb(val, ICEMT(ice, RATE));
1051 spin_unlock_irqrestore(&ice->reg_lock, flags);
1052
1053 if (ice->gpio.set_pro_rate)
1054 ice->gpio.set_pro_rate(ice, rate);
1055 for (i = 0; i < ice->akm_codecs; i++) {
1056 if (ice->akm[i].ops.set_rate_val)
1057 ice->akm[i].ops.set_rate_val(&ice->akm[i], rate);
1058 }
1059 if (ice->spdif.ops.setup_rate)
1060 ice->spdif.ops.setup_rate(ice, rate);
1061 }
1062
1063 static int snd_ice1712_playback_pro_prepare(struct snd_pcm_substream *substream)
1064 {
1065 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1066
1067 ice->playback_pro_size = snd_pcm_lib_buffer_bytes(substream);
1068 spin_lock_irq(&ice->reg_lock);
1069 outl(substream->runtime->dma_addr, ICEMT(ice, PLAYBACK_ADDR));
1070 outw((ice->playback_pro_size >> 2) - 1, ICEMT(ice, PLAYBACK_SIZE));
1071 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, PLAYBACK_COUNT));
1072 spin_unlock_irq(&ice->reg_lock);
1073
1074 return 0;
1075 }
1076
1077 static int snd_ice1712_playback_pro_hw_params(struct snd_pcm_substream *substream,
1078 struct snd_pcm_hw_params *hw_params)
1079 {
1080 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1081
1082 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1083 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1084 }
1085
1086 static int snd_ice1712_capture_pro_prepare(struct snd_pcm_substream *substream)
1087 {
1088 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1089
1090 ice->capture_pro_size = snd_pcm_lib_buffer_bytes(substream);
1091 spin_lock_irq(&ice->reg_lock);
1092 outl(substream->runtime->dma_addr, ICEMT(ice, CAPTURE_ADDR));
1093 outw((ice->capture_pro_size >> 2) - 1, ICEMT(ice, CAPTURE_SIZE));
1094 outw((snd_pcm_lib_period_bytes(substream) >> 2) - 1, ICEMT(ice, CAPTURE_COUNT));
1095 spin_unlock_irq(&ice->reg_lock);
1096 return 0;
1097 }
1098
1099 static int snd_ice1712_capture_pro_hw_params(struct snd_pcm_substream *substream,
1100 struct snd_pcm_hw_params *hw_params)
1101 {
1102 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1103
1104 snd_ice1712_set_pro_rate(ice, params_rate(hw_params), 0);
1105 return snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params));
1106 }
1107
1108 static snd_pcm_uframes_t snd_ice1712_playback_pro_pointer(struct snd_pcm_substream *substream)
1109 {
1110 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1111 size_t ptr;
1112
1113 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_PLAYBACK_START))
1114 return 0;
1115 ptr = ice->playback_pro_size - (inw(ICEMT(ice, PLAYBACK_SIZE)) << 2);
1116 if (ptr == substream->runtime->buffer_size)
1117 ptr = 0;
1118 return bytes_to_frames(substream->runtime, ptr);
1119 }
1120
1121 static snd_pcm_uframes_t snd_ice1712_capture_pro_pointer(struct snd_pcm_substream *substream)
1122 {
1123 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1124 size_t ptr;
1125
1126 if (!(inl(ICEMT(ice, PLAYBACK_CONTROL)) & ICE1712_CAPTURE_START_SHADOW))
1127 return 0;
1128 ptr = ice->capture_pro_size - (inw(ICEMT(ice, CAPTURE_SIZE)) << 2);
1129 if (ptr == substream->runtime->buffer_size)
1130 ptr = 0;
1131 return bytes_to_frames(substream->runtime, ptr);
1132 }
1133
1134 static const struct snd_pcm_hardware snd_ice1712_playback_pro = {
1135 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1136 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1137 SNDRV_PCM_INFO_MMAP_VALID |
1138 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1139 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1140 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1141 .rate_min = 4000,
1142 .rate_max = 96000,
1143 .channels_min = 10,
1144 .channels_max = 10,
1145 .buffer_bytes_max = (256*1024),
1146 .period_bytes_min = 10 * 4 * 2,
1147 .period_bytes_max = 131040,
1148 .periods_min = 1,
1149 .periods_max = 1024,
1150 .fifo_size = 0,
1151 };
1152
1153 static const struct snd_pcm_hardware snd_ice1712_capture_pro = {
1154 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
1155 SNDRV_PCM_INFO_BLOCK_TRANSFER |
1156 SNDRV_PCM_INFO_MMAP_VALID |
1157 SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_SYNC_START),
1158 .formats = SNDRV_PCM_FMTBIT_S32_LE,
1159 .rates = SNDRV_PCM_RATE_KNOT | SNDRV_PCM_RATE_8000_96000,
1160 .rate_min = 4000,
1161 .rate_max = 96000,
1162 .channels_min = 12,
1163 .channels_max = 12,
1164 .buffer_bytes_max = (256*1024),
1165 .period_bytes_min = 12 * 4 * 2,
1166 .period_bytes_max = 131040,
1167 .periods_min = 1,
1168 .periods_max = 1024,
1169 .fifo_size = 0,
1170 };
1171
1172 static int snd_ice1712_playback_pro_open(struct snd_pcm_substream *substream)
1173 {
1174 struct snd_pcm_runtime *runtime = substream->runtime;
1175 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1176
1177 ice->playback_pro_substream = substream;
1178 runtime->hw = snd_ice1712_playback_pro;
1179 snd_pcm_set_sync(substream);
1180 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1181 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1182 if (is_pro_rate_locked(ice)) {
1183 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1184 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1185 }
1186
1187 if (ice->spdif.ops.open)
1188 ice->spdif.ops.open(ice, substream);
1189
1190 return 0;
1191 }
1192
1193 static int snd_ice1712_capture_pro_open(struct snd_pcm_substream *substream)
1194 {
1195 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1196 struct snd_pcm_runtime *runtime = substream->runtime;
1197
1198 ice->capture_pro_substream = substream;
1199 runtime->hw = snd_ice1712_capture_pro;
1200 snd_pcm_set_sync(substream);
1201 snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
1202 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hw_constraints_rates);
1203 if (is_pro_rate_locked(ice)) {
1204 runtime->hw.rate_min = PRO_RATE_DEFAULT;
1205 runtime->hw.rate_max = PRO_RATE_DEFAULT;
1206 }
1207
1208 return 0;
1209 }
1210
1211 static int snd_ice1712_playback_pro_close(struct snd_pcm_substream *substream)
1212 {
1213 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1214
1215 if (PRO_RATE_RESET)
1216 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1217 ice->playback_pro_substream = NULL;
1218 if (ice->spdif.ops.close)
1219 ice->spdif.ops.close(ice, substream);
1220
1221 return 0;
1222 }
1223
1224 static int snd_ice1712_capture_pro_close(struct snd_pcm_substream *substream)
1225 {
1226 struct snd_ice1712 *ice = snd_pcm_substream_chip(substream);
1227
1228 if (PRO_RATE_RESET)
1229 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 0);
1230 ice->capture_pro_substream = NULL;
1231 return 0;
1232 }
1233
1234 static struct snd_pcm_ops snd_ice1712_playback_pro_ops = {
1235 .open = snd_ice1712_playback_pro_open,
1236 .close = snd_ice1712_playback_pro_close,
1237 .ioctl = snd_pcm_lib_ioctl,
1238 .hw_params = snd_ice1712_playback_pro_hw_params,
1239 .hw_free = snd_ice1712_hw_free,
1240 .prepare = snd_ice1712_playback_pro_prepare,
1241 .trigger = snd_ice1712_pro_trigger,
1242 .pointer = snd_ice1712_playback_pro_pointer,
1243 };
1244
1245 static struct snd_pcm_ops snd_ice1712_capture_pro_ops = {
1246 .open = snd_ice1712_capture_pro_open,
1247 .close = snd_ice1712_capture_pro_close,
1248 .ioctl = snd_pcm_lib_ioctl,
1249 .hw_params = snd_ice1712_capture_pro_hw_params,
1250 .hw_free = snd_ice1712_hw_free,
1251 .prepare = snd_ice1712_capture_pro_prepare,
1252 .trigger = snd_ice1712_pro_trigger,
1253 .pointer = snd_ice1712_capture_pro_pointer,
1254 };
1255
1256 static int snd_ice1712_pcm_profi(struct snd_ice1712 *ice, int device, struct snd_pcm **rpcm)
1257 {
1258 struct snd_pcm *pcm;
1259 int err;
1260
1261 if (rpcm)
1262 *rpcm = NULL;
1263 err = snd_pcm_new(ice->card, "ICE1712 multi", device, 1, 1, &pcm);
1264 if (err < 0)
1265 return err;
1266
1267 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_ice1712_playback_pro_ops);
1268 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_ice1712_capture_pro_ops);
1269
1270 pcm->private_data = ice;
1271 pcm->info_flags = 0;
1272 strcpy(pcm->name, "ICE1712 multi");
1273
1274 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1275 snd_dma_pci_data(ice->pci), 256*1024, 256*1024);
1276
1277 ice->pcm_pro = pcm;
1278 if (rpcm)
1279 *rpcm = pcm;
1280
1281 if (ice->cs8427) {
1282 /* assign channels to iec958 */
1283 err = snd_cs8427_iec958_build(ice->cs8427,
1284 pcm->streams[0].substream,
1285 pcm->streams[1].substream);
1286 if (err < 0)
1287 return err;
1288 }
1289
1290 err = snd_ice1712_build_pro_mixer(ice);
1291 if (err < 0)
1292 return err;
1293 return 0;
1294 }
1295
1296 /*
1297 * Mixer section
1298 */
1299
1300 static void snd_ice1712_update_volume(struct snd_ice1712 *ice, int index)
1301 {
1302 unsigned int vol = ice->pro_volumes[index];
1303 unsigned short val = 0;
1304
1305 val |= (vol & 0x8000) == 0 ? (96 - (vol & 0x7f)) : 0x7f;
1306 val |= ((vol & 0x80000000) == 0 ? (96 - ((vol >> 16) & 0x7f)) : 0x7f) << 8;
1307 outb(index, ICEMT(ice, MONITOR_INDEX));
1308 outw(val, ICEMT(ice, MONITOR_VOLUME));
1309 }
1310
1311 #define snd_ice1712_pro_mixer_switch_info snd_ctl_boolean_stereo_info
1312
1313 static int snd_ice1712_pro_mixer_switch_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1314 {
1315 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1316 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1317 kcontrol->private_value;
1318
1319 spin_lock_irq(&ice->reg_lock);
1320 ucontrol->value.integer.value[0] =
1321 !((ice->pro_volumes[priv_idx] >> 15) & 1);
1322 ucontrol->value.integer.value[1] =
1323 !((ice->pro_volumes[priv_idx] >> 31) & 1);
1324 spin_unlock_irq(&ice->reg_lock);
1325 return 0;
1326 }
1327
1328 static int snd_ice1712_pro_mixer_switch_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1329 {
1330 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1331 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1332 kcontrol->private_value;
1333 unsigned int nval, change;
1334
1335 nval = (ucontrol->value.integer.value[0] ? 0 : 0x00008000) |
1336 (ucontrol->value.integer.value[1] ? 0 : 0x80000000);
1337 spin_lock_irq(&ice->reg_lock);
1338 nval |= ice->pro_volumes[priv_idx] & ~0x80008000;
1339 change = nval != ice->pro_volumes[priv_idx];
1340 ice->pro_volumes[priv_idx] = nval;
1341 snd_ice1712_update_volume(ice, priv_idx);
1342 spin_unlock_irq(&ice->reg_lock);
1343 return change;
1344 }
1345
1346 static int snd_ice1712_pro_mixer_volume_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1347 {
1348 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1349 uinfo->count = 2;
1350 uinfo->value.integer.min = 0;
1351 uinfo->value.integer.max = 96;
1352 return 0;
1353 }
1354
1355 static int snd_ice1712_pro_mixer_volume_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1356 {
1357 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1358 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1359 kcontrol->private_value;
1360
1361 spin_lock_irq(&ice->reg_lock);
1362 ucontrol->value.integer.value[0] =
1363 (ice->pro_volumes[priv_idx] >> 0) & 127;
1364 ucontrol->value.integer.value[1] =
1365 (ice->pro_volumes[priv_idx] >> 16) & 127;
1366 spin_unlock_irq(&ice->reg_lock);
1367 return 0;
1368 }
1369
1370 static int snd_ice1712_pro_mixer_volume_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1371 {
1372 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1373 int priv_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id) +
1374 kcontrol->private_value;
1375 unsigned int nval, change;
1376
1377 nval = (ucontrol->value.integer.value[0] & 127) |
1378 ((ucontrol->value.integer.value[1] & 127) << 16);
1379 spin_lock_irq(&ice->reg_lock);
1380 nval |= ice->pro_volumes[priv_idx] & ~0x007f007f;
1381 change = nval != ice->pro_volumes[priv_idx];
1382 ice->pro_volumes[priv_idx] = nval;
1383 snd_ice1712_update_volume(ice, priv_idx);
1384 spin_unlock_irq(&ice->reg_lock);
1385 return change;
1386 }
1387
1388 static const DECLARE_TLV_DB_SCALE(db_scale_playback, -14400, 150, 0);
1389
1390 static struct snd_kcontrol_new snd_ice1712_multi_playback_ctrls[] = {
1391 {
1392 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1393 .name = "Multi Playback Switch",
1394 .info = snd_ice1712_pro_mixer_switch_info,
1395 .get = snd_ice1712_pro_mixer_switch_get,
1396 .put = snd_ice1712_pro_mixer_switch_put,
1397 .private_value = 0,
1398 .count = 10,
1399 },
1400 {
1401 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1402 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1403 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1404 .name = "Multi Playback Volume",
1405 .info = snd_ice1712_pro_mixer_volume_info,
1406 .get = snd_ice1712_pro_mixer_volume_get,
1407 .put = snd_ice1712_pro_mixer_volume_put,
1408 .private_value = 0,
1409 .count = 10,
1410 .tlv = { .p = db_scale_playback }
1411 },
1412 };
1413
1414 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_switch = {
1415 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1416 .name = "H/W Multi Capture Switch",
1417 .info = snd_ice1712_pro_mixer_switch_info,
1418 .get = snd_ice1712_pro_mixer_switch_get,
1419 .put = snd_ice1712_pro_mixer_switch_put,
1420 .private_value = 10,
1421 };
1422
1423 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_switch = {
1424 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1425 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, SWITCH),
1426 .info = snd_ice1712_pro_mixer_switch_info,
1427 .get = snd_ice1712_pro_mixer_switch_get,
1428 .put = snd_ice1712_pro_mixer_switch_put,
1429 .private_value = 18,
1430 .count = 2,
1431 };
1432
1433 static struct snd_kcontrol_new snd_ice1712_multi_capture_analog_volume = {
1434 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1435 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1436 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1437 .name = "H/W Multi Capture Volume",
1438 .info = snd_ice1712_pro_mixer_volume_info,
1439 .get = snd_ice1712_pro_mixer_volume_get,
1440 .put = snd_ice1712_pro_mixer_volume_put,
1441 .private_value = 10,
1442 .tlv = { .p = db_scale_playback }
1443 };
1444
1445 static struct snd_kcontrol_new snd_ice1712_multi_capture_spdif_volume = {
1446 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1447 .name = SNDRV_CTL_NAME_IEC958("Multi ", CAPTURE, VOLUME),
1448 .info = snd_ice1712_pro_mixer_volume_info,
1449 .get = snd_ice1712_pro_mixer_volume_get,
1450 .put = snd_ice1712_pro_mixer_volume_put,
1451 .private_value = 18,
1452 .count = 2,
1453 };
1454
1455 static int snd_ice1712_build_pro_mixer(struct snd_ice1712 *ice)
1456 {
1457 struct snd_card *card = ice->card;
1458 unsigned int idx;
1459 int err;
1460
1461 /* multi-channel mixer */
1462 for (idx = 0; idx < ARRAY_SIZE(snd_ice1712_multi_playback_ctrls); idx++) {
1463 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_playback_ctrls[idx], ice));
1464 if (err < 0)
1465 return err;
1466 }
1467
1468 if (ice->num_total_adcs > 0) {
1469 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_switch;
1470 tmp.count = ice->num_total_adcs;
1471 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1472 if (err < 0)
1473 return err;
1474 }
1475
1476 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_switch, ice));
1477 if (err < 0)
1478 return err;
1479
1480 if (ice->num_total_adcs > 0) {
1481 struct snd_kcontrol_new tmp = snd_ice1712_multi_capture_analog_volume;
1482 tmp.count = ice->num_total_adcs;
1483 err = snd_ctl_add(card, snd_ctl_new1(&tmp, ice));
1484 if (err < 0)
1485 return err;
1486 }
1487
1488 err = snd_ctl_add(card, snd_ctl_new1(&snd_ice1712_multi_capture_spdif_volume, ice));
1489 if (err < 0)
1490 return err;
1491
1492 /* initialize volumes */
1493 for (idx = 0; idx < 10; idx++) {
1494 ice->pro_volumes[idx] = 0x80008000; /* mute */
1495 snd_ice1712_update_volume(ice, idx);
1496 }
1497 for (idx = 10; idx < 10 + ice->num_total_adcs; idx++) {
1498 ice->pro_volumes[idx] = 0x80008000; /* mute */
1499 snd_ice1712_update_volume(ice, idx);
1500 }
1501 for (idx = 18; idx < 20; idx++) {
1502 ice->pro_volumes[idx] = 0x80008000; /* mute */
1503 snd_ice1712_update_volume(ice, idx);
1504 }
1505 return 0;
1506 }
1507
1508 static void snd_ice1712_mixer_free_ac97(struct snd_ac97 *ac97)
1509 {
1510 struct snd_ice1712 *ice = ac97->private_data;
1511 ice->ac97 = NULL;
1512 }
1513
1514 static int snd_ice1712_ac97_mixer(struct snd_ice1712 *ice)
1515 {
1516 int err, bus_num = 0;
1517 struct snd_ac97_template ac97;
1518 struct snd_ac97_bus *pbus;
1519 static struct snd_ac97_bus_ops con_ops = {
1520 .write = snd_ice1712_ac97_write,
1521 .read = snd_ice1712_ac97_read,
1522 };
1523 static struct snd_ac97_bus_ops pro_ops = {
1524 .write = snd_ice1712_pro_ac97_write,
1525 .read = snd_ice1712_pro_ac97_read,
1526 };
1527
1528 if (ice_has_con_ac97(ice)) {
1529 err = snd_ac97_bus(ice->card, bus_num++, &con_ops, NULL, &pbus);
1530 if (err < 0)
1531 return err;
1532 memset(&ac97, 0, sizeof(ac97));
1533 ac97.private_data = ice;
1534 ac97.private_free = snd_ice1712_mixer_free_ac97;
1535 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1536 if (err < 0)
1537 printk(KERN_WARNING "ice1712: cannot initialize ac97 for consumer, skipped\n");
1538 else {
1539 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_digmix_route_ac97, ice));
1540 if (err < 0)
1541 return err;
1542 return 0;
1543 }
1544 }
1545
1546 if (!(ice->eeprom.data[ICE_EEP1_ACLINK] & ICE1712_CFG_PRO_I2S)) {
1547 err = snd_ac97_bus(ice->card, bus_num, &pro_ops, NULL, &pbus);
1548 if (err < 0)
1549 return err;
1550 memset(&ac97, 0, sizeof(ac97));
1551 ac97.private_data = ice;
1552 ac97.private_free = snd_ice1712_mixer_free_ac97;
1553 err = snd_ac97_mixer(pbus, &ac97, &ice->ac97);
1554 if (err < 0)
1555 printk(KERN_WARNING "ice1712: cannot initialize pro ac97, skipped\n");
1556 else
1557 return 0;
1558 }
1559 /* I2S mixer only */
1560 strcat(ice->card->mixername, "ICE1712 - multitrack");
1561 return 0;
1562 }
1563
1564 /*
1565 *
1566 */
1567
1568 static inline unsigned int eeprom_double(struct snd_ice1712 *ice, int idx)
1569 {
1570 return (unsigned int)ice->eeprom.data[idx] | ((unsigned int)ice->eeprom.data[idx + 1] << 8);
1571 }
1572
1573 static void snd_ice1712_proc_read(struct snd_info_entry *entry,
1574 struct snd_info_buffer *buffer)
1575 {
1576 struct snd_ice1712 *ice = entry->private_data;
1577 unsigned int idx;
1578
1579 snd_iprintf(buffer, "%s\n\n", ice->card->longname);
1580 snd_iprintf(buffer, "EEPROM:\n");
1581
1582 snd_iprintf(buffer, " Subvendor : 0x%x\n", ice->eeprom.subvendor);
1583 snd_iprintf(buffer, " Size : %i bytes\n", ice->eeprom.size);
1584 snd_iprintf(buffer, " Version : %i\n", ice->eeprom.version);
1585 snd_iprintf(buffer, " Codec : 0x%x\n", ice->eeprom.data[ICE_EEP1_CODEC]);
1586 snd_iprintf(buffer, " ACLink : 0x%x\n", ice->eeprom.data[ICE_EEP1_ACLINK]);
1587 snd_iprintf(buffer, " I2S ID : 0x%x\n", ice->eeprom.data[ICE_EEP1_I2SID]);
1588 snd_iprintf(buffer, " S/PDIF : 0x%x\n", ice->eeprom.data[ICE_EEP1_SPDIF]);
1589 snd_iprintf(buffer, " GPIO mask : 0x%x\n", ice->eeprom.gpiomask);
1590 snd_iprintf(buffer, " GPIO state : 0x%x\n", ice->eeprom.gpiostate);
1591 snd_iprintf(buffer, " GPIO direction : 0x%x\n", ice->eeprom.gpiodir);
1592 snd_iprintf(buffer, " AC'97 main : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_MAIN_LO));
1593 snd_iprintf(buffer, " AC'97 pcm : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_PCM_LO));
1594 snd_iprintf(buffer, " AC'97 record : 0x%x\n", eeprom_double(ice, ICE_EEP1_AC97_REC_LO));
1595 snd_iprintf(buffer, " AC'97 record src : 0x%x\n", ice->eeprom.data[ICE_EEP1_AC97_RECSRC]);
1596 for (idx = 0; idx < 4; idx++)
1597 snd_iprintf(buffer, " DAC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_DAC_ID + idx]);
1598 for (idx = 0; idx < 4; idx++)
1599 snd_iprintf(buffer, " ADC ID #%i : 0x%x\n", idx, ice->eeprom.data[ICE_EEP1_ADC_ID + idx]);
1600 for (idx = 0x1c; idx < ice->eeprom.size; idx++)
1601 snd_iprintf(buffer, " Extra #%02i : 0x%x\n", idx, ice->eeprom.data[idx]);
1602
1603 snd_iprintf(buffer, "\nRegisters:\n");
1604 snd_iprintf(buffer, " PSDOUT03 : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_PSDOUT03)));
1605 snd_iprintf(buffer, " CAPTURE : 0x%08x\n", inl(ICEMT(ice, ROUTE_CAPTURE)));
1606 snd_iprintf(buffer, " SPDOUT : 0x%04x\n", (unsigned)inw(ICEMT(ice, ROUTE_SPDOUT)));
1607 snd_iprintf(buffer, " RATE : 0x%02x\n", (unsigned)inb(ICEMT(ice, RATE)));
1608 snd_iprintf(buffer, " GPIO_DATA : 0x%02x\n", (unsigned)snd_ice1712_get_gpio_data(ice));
1609 snd_iprintf(buffer, " GPIO_WRITE_MASK : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_WRITE_MASK));
1610 snd_iprintf(buffer, " GPIO_DIRECTION : 0x%02x\n", (unsigned)snd_ice1712_read(ice, ICE1712_IREG_GPIO_DIRECTION));
1611 }
1612
1613 static void snd_ice1712_proc_init(struct snd_ice1712 *ice)
1614 {
1615 struct snd_info_entry *entry;
1616
1617 if (!snd_card_proc_new(ice->card, "ice1712", &entry))
1618 snd_info_set_text_ops(entry, ice, snd_ice1712_proc_read);
1619 }
1620
1621 /*
1622 *
1623 */
1624
1625 static int snd_ice1712_eeprom_info(struct snd_kcontrol *kcontrol,
1626 struct snd_ctl_elem_info *uinfo)
1627 {
1628 uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
1629 uinfo->count = sizeof(struct snd_ice1712_eeprom);
1630 return 0;
1631 }
1632
1633 static int snd_ice1712_eeprom_get(struct snd_kcontrol *kcontrol,
1634 struct snd_ctl_elem_value *ucontrol)
1635 {
1636 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1637
1638 memcpy(ucontrol->value.bytes.data, &ice->eeprom, sizeof(ice->eeprom));
1639 return 0;
1640 }
1641
1642 static struct snd_kcontrol_new snd_ice1712_eeprom = {
1643 .iface = SNDRV_CTL_ELEM_IFACE_CARD,
1644 .name = "ICE1712 EEPROM",
1645 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1646 .info = snd_ice1712_eeprom_info,
1647 .get = snd_ice1712_eeprom_get
1648 };
1649
1650 /*
1651 */
1652 static int snd_ice1712_spdif_info(struct snd_kcontrol *kcontrol,
1653 struct snd_ctl_elem_info *uinfo)
1654 {
1655 uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1656 uinfo->count = 1;
1657 return 0;
1658 }
1659
1660 static int snd_ice1712_spdif_default_get(struct snd_kcontrol *kcontrol,
1661 struct snd_ctl_elem_value *ucontrol)
1662 {
1663 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1664 if (ice->spdif.ops.default_get)
1665 ice->spdif.ops.default_get(ice, ucontrol);
1666 return 0;
1667 }
1668
1669 static int snd_ice1712_spdif_default_put(struct snd_kcontrol *kcontrol,
1670 struct snd_ctl_elem_value *ucontrol)
1671 {
1672 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1673 if (ice->spdif.ops.default_put)
1674 return ice->spdif.ops.default_put(ice, ucontrol);
1675 return 0;
1676 }
1677
1678 static struct snd_kcontrol_new snd_ice1712_spdif_default =
1679 {
1680 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1681 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, DEFAULT),
1682 .info = snd_ice1712_spdif_info,
1683 .get = snd_ice1712_spdif_default_get,
1684 .put = snd_ice1712_spdif_default_put
1685 };
1686
1687 static int snd_ice1712_spdif_maskc_get(struct snd_kcontrol *kcontrol,
1688 struct snd_ctl_elem_value *ucontrol)
1689 {
1690 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1691 if (ice->spdif.ops.default_get) {
1692 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1693 IEC958_AES0_PROFESSIONAL |
1694 IEC958_AES0_CON_NOT_COPYRIGHT |
1695 IEC958_AES0_CON_EMPHASIS;
1696 ucontrol->value.iec958.status[1] = IEC958_AES1_CON_ORIGINAL |
1697 IEC958_AES1_CON_CATEGORY;
1698 ucontrol->value.iec958.status[3] = IEC958_AES3_CON_FS;
1699 } else {
1700 ucontrol->value.iec958.status[0] = 0xff;
1701 ucontrol->value.iec958.status[1] = 0xff;
1702 ucontrol->value.iec958.status[2] = 0xff;
1703 ucontrol->value.iec958.status[3] = 0xff;
1704 ucontrol->value.iec958.status[4] = 0xff;
1705 }
1706 return 0;
1707 }
1708
1709 static int snd_ice1712_spdif_maskp_get(struct snd_kcontrol *kcontrol,
1710 struct snd_ctl_elem_value *ucontrol)
1711 {
1712 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1713 if (ice->spdif.ops.default_get) {
1714 ucontrol->value.iec958.status[0] = IEC958_AES0_NONAUDIO |
1715 IEC958_AES0_PROFESSIONAL |
1716 IEC958_AES0_PRO_FS |
1717 IEC958_AES0_PRO_EMPHASIS;
1718 ucontrol->value.iec958.status[1] = IEC958_AES1_PRO_MODE;
1719 } else {
1720 ucontrol->value.iec958.status[0] = 0xff;
1721 ucontrol->value.iec958.status[1] = 0xff;
1722 ucontrol->value.iec958.status[2] = 0xff;
1723 ucontrol->value.iec958.status[3] = 0xff;
1724 ucontrol->value.iec958.status[4] = 0xff;
1725 }
1726 return 0;
1727 }
1728
1729 static struct snd_kcontrol_new snd_ice1712_spdif_maskc =
1730 {
1731 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1732 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1733 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, CON_MASK),
1734 .info = snd_ice1712_spdif_info,
1735 .get = snd_ice1712_spdif_maskc_get,
1736 };
1737
1738 static struct snd_kcontrol_new snd_ice1712_spdif_maskp =
1739 {
1740 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1741 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1742 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PRO_MASK),
1743 .info = snd_ice1712_spdif_info,
1744 .get = snd_ice1712_spdif_maskp_get,
1745 };
1746
1747 static int snd_ice1712_spdif_stream_get(struct snd_kcontrol *kcontrol,
1748 struct snd_ctl_elem_value *ucontrol)
1749 {
1750 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1751 if (ice->spdif.ops.stream_get)
1752 ice->spdif.ops.stream_get(ice, ucontrol);
1753 return 0;
1754 }
1755
1756 static int snd_ice1712_spdif_stream_put(struct snd_kcontrol *kcontrol,
1757 struct snd_ctl_elem_value *ucontrol)
1758 {
1759 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1760 if (ice->spdif.ops.stream_put)
1761 return ice->spdif.ops.stream_put(ice, ucontrol);
1762 return 0;
1763 }
1764
1765 static struct snd_kcontrol_new snd_ice1712_spdif_stream =
1766 {
1767 .access = (SNDRV_CTL_ELEM_ACCESS_READWRITE |
1768 SNDRV_CTL_ELEM_ACCESS_INACTIVE),
1769 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
1770 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, PCM_STREAM),
1771 .info = snd_ice1712_spdif_info,
1772 .get = snd_ice1712_spdif_stream_get,
1773 .put = snd_ice1712_spdif_stream_put
1774 };
1775
1776 int snd_ice1712_gpio_get(struct snd_kcontrol *kcontrol,
1777 struct snd_ctl_elem_value *ucontrol)
1778 {
1779 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1780 unsigned char mask = kcontrol->private_value & 0xff;
1781 int invert = (kcontrol->private_value & (1<<24)) ? 1 : 0;
1782
1783 snd_ice1712_save_gpio_status(ice);
1784 ucontrol->value.integer.value[0] =
1785 (snd_ice1712_gpio_read(ice) & mask ? 1 : 0) ^ invert;
1786 snd_ice1712_restore_gpio_status(ice);
1787 return 0;
1788 }
1789
1790 int snd_ice1712_gpio_put(struct snd_kcontrol *kcontrol,
1791 struct snd_ctl_elem_value *ucontrol)
1792 {
1793 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1794 unsigned char mask = kcontrol->private_value & 0xff;
1795 int invert = (kcontrol->private_value & (1<<24)) ? mask : 0;
1796 unsigned int val, nval;
1797
1798 if (kcontrol->private_value & (1 << 31))
1799 return -EPERM;
1800 nval = (ucontrol->value.integer.value[0] ? mask : 0) ^ invert;
1801 snd_ice1712_save_gpio_status(ice);
1802 val = snd_ice1712_gpio_read(ice);
1803 nval |= val & ~mask;
1804 if (val != nval)
1805 snd_ice1712_gpio_write(ice, nval);
1806 snd_ice1712_restore_gpio_status(ice);
1807 return val != nval;
1808 }
1809
1810 /*
1811 * rate
1812 */
1813 static int snd_ice1712_pro_internal_clock_info(struct snd_kcontrol *kcontrol,
1814 struct snd_ctl_elem_info *uinfo)
1815 {
1816 static const char * const texts[] = {
1817 "8000", /* 0: 6 */
1818 "9600", /* 1: 3 */
1819 "11025", /* 2: 10 */
1820 "12000", /* 3: 2 */
1821 "16000", /* 4: 5 */
1822 "22050", /* 5: 9 */
1823 "24000", /* 6: 1 */
1824 "32000", /* 7: 4 */
1825 "44100", /* 8: 8 */
1826 "48000", /* 9: 0 */
1827 "64000", /* 10: 15 */
1828 "88200", /* 11: 11 */
1829 "96000", /* 12: 7 */
1830 "IEC958 Input", /* 13: -- */
1831 };
1832 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1833 uinfo->count = 1;
1834 uinfo->value.enumerated.items = 14;
1835 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1836 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1837 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1838 return 0;
1839 }
1840
1841 static int snd_ice1712_pro_internal_clock_get(struct snd_kcontrol *kcontrol,
1842 struct snd_ctl_elem_value *ucontrol)
1843 {
1844 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1845 static const unsigned char xlate[16] = {
1846 9, 6, 3, 1, 7, 4, 0, 12, 8, 5, 2, 11, 255, 255, 255, 10
1847 };
1848 unsigned char val;
1849
1850 spin_lock_irq(&ice->reg_lock);
1851 if (is_spdif_master(ice)) {
1852 ucontrol->value.enumerated.item[0] = 13;
1853 } else {
1854 val = xlate[inb(ICEMT(ice, RATE)) & 15];
1855 if (val == 255) {
1856 snd_BUG();
1857 val = 0;
1858 }
1859 ucontrol->value.enumerated.item[0] = val;
1860 }
1861 spin_unlock_irq(&ice->reg_lock);
1862 return 0;
1863 }
1864
1865 static int snd_ice1712_pro_internal_clock_put(struct snd_kcontrol *kcontrol,
1866 struct snd_ctl_elem_value *ucontrol)
1867 {
1868 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1869 static const unsigned int xrate[13] = {
1870 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1871 32000, 44100, 48000, 64000, 88200, 96000
1872 };
1873 unsigned char oval;
1874 int change = 0;
1875
1876 spin_lock_irq(&ice->reg_lock);
1877 oval = inb(ICEMT(ice, RATE));
1878 if (ucontrol->value.enumerated.item[0] == 13) {
1879 outb(oval | ICE1712_SPDIF_MASTER, ICEMT(ice, RATE));
1880 } else {
1881 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1882 spin_unlock_irq(&ice->reg_lock);
1883 snd_ice1712_set_pro_rate(ice, PRO_RATE_DEFAULT, 1);
1884 spin_lock_irq(&ice->reg_lock);
1885 }
1886 change = inb(ICEMT(ice, RATE)) != oval;
1887 spin_unlock_irq(&ice->reg_lock);
1888
1889 if ((oval & ICE1712_SPDIF_MASTER) !=
1890 (inb(ICEMT(ice, RATE)) & ICE1712_SPDIF_MASTER))
1891 snd_ice1712_set_input_clock_source(ice, is_spdif_master(ice));
1892
1893 return change;
1894 }
1895
1896 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock = {
1897 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1898 .name = "Multi Track Internal Clock",
1899 .info = snd_ice1712_pro_internal_clock_info,
1900 .get = snd_ice1712_pro_internal_clock_get,
1901 .put = snd_ice1712_pro_internal_clock_put
1902 };
1903
1904 static int snd_ice1712_pro_internal_clock_default_info(struct snd_kcontrol *kcontrol,
1905 struct snd_ctl_elem_info *uinfo)
1906 {
1907 static const char * const texts[] = {
1908 "8000", /* 0: 6 */
1909 "9600", /* 1: 3 */
1910 "11025", /* 2: 10 */
1911 "12000", /* 3: 2 */
1912 "16000", /* 4: 5 */
1913 "22050", /* 5: 9 */
1914 "24000", /* 6: 1 */
1915 "32000", /* 7: 4 */
1916 "44100", /* 8: 8 */
1917 "48000", /* 9: 0 */
1918 "64000", /* 10: 15 */
1919 "88200", /* 11: 11 */
1920 "96000", /* 12: 7 */
1921 /* "IEC958 Input", 13: -- */
1922 };
1923 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1924 uinfo->count = 1;
1925 uinfo->value.enumerated.items = 13;
1926 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1927 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1928 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1929 return 0;
1930 }
1931
1932 static int snd_ice1712_pro_internal_clock_default_get(struct snd_kcontrol *kcontrol,
1933 struct snd_ctl_elem_value *ucontrol)
1934 {
1935 int val;
1936 static const unsigned int xrate[13] = {
1937 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1938 32000, 44100, 48000, 64000, 88200, 96000
1939 };
1940
1941 for (val = 0; val < 13; val++) {
1942 if (xrate[val] == PRO_RATE_DEFAULT)
1943 break;
1944 }
1945
1946 ucontrol->value.enumerated.item[0] = val;
1947 return 0;
1948 }
1949
1950 static int snd_ice1712_pro_internal_clock_default_put(struct snd_kcontrol *kcontrol,
1951 struct snd_ctl_elem_value *ucontrol)
1952 {
1953 static const unsigned int xrate[13] = {
1954 8000, 9600, 11025, 12000, 16000, 22050, 24000,
1955 32000, 44100, 48000, 64000, 88200, 96000
1956 };
1957 unsigned char oval;
1958 int change = 0;
1959
1960 oval = PRO_RATE_DEFAULT;
1961 PRO_RATE_DEFAULT = xrate[ucontrol->value.integer.value[0] % 13];
1962 change = PRO_RATE_DEFAULT != oval;
1963
1964 return change;
1965 }
1966
1967 static struct snd_kcontrol_new snd_ice1712_pro_internal_clock_default = {
1968 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1969 .name = "Multi Track Internal Clock Default",
1970 .info = snd_ice1712_pro_internal_clock_default_info,
1971 .get = snd_ice1712_pro_internal_clock_default_get,
1972 .put = snd_ice1712_pro_internal_clock_default_put
1973 };
1974
1975 #define snd_ice1712_pro_rate_locking_info snd_ctl_boolean_mono_info
1976
1977 static int snd_ice1712_pro_rate_locking_get(struct snd_kcontrol *kcontrol,
1978 struct snd_ctl_elem_value *ucontrol)
1979 {
1980 ucontrol->value.integer.value[0] = PRO_RATE_LOCKED;
1981 return 0;
1982 }
1983
1984 static int snd_ice1712_pro_rate_locking_put(struct snd_kcontrol *kcontrol,
1985 struct snd_ctl_elem_value *ucontrol)
1986 {
1987 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
1988 int change = 0, nval;
1989
1990 nval = ucontrol->value.integer.value[0] ? 1 : 0;
1991 spin_lock_irq(&ice->reg_lock);
1992 change = PRO_RATE_LOCKED != nval;
1993 PRO_RATE_LOCKED = nval;
1994 spin_unlock_irq(&ice->reg_lock);
1995 return change;
1996 }
1997
1998 static struct snd_kcontrol_new snd_ice1712_pro_rate_locking = {
1999 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2000 .name = "Multi Track Rate Locking",
2001 .info = snd_ice1712_pro_rate_locking_info,
2002 .get = snd_ice1712_pro_rate_locking_get,
2003 .put = snd_ice1712_pro_rate_locking_put
2004 };
2005
2006 #define snd_ice1712_pro_rate_reset_info snd_ctl_boolean_mono_info
2007
2008 static int snd_ice1712_pro_rate_reset_get(struct snd_kcontrol *kcontrol,
2009 struct snd_ctl_elem_value *ucontrol)
2010 {
2011 ucontrol->value.integer.value[0] = PRO_RATE_RESET;
2012 return 0;
2013 }
2014
2015 static int snd_ice1712_pro_rate_reset_put(struct snd_kcontrol *kcontrol,
2016 struct snd_ctl_elem_value *ucontrol)
2017 {
2018 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2019 int change = 0, nval;
2020
2021 nval = ucontrol->value.integer.value[0] ? 1 : 0;
2022 spin_lock_irq(&ice->reg_lock);
2023 change = PRO_RATE_RESET != nval;
2024 PRO_RATE_RESET = nval;
2025 spin_unlock_irq(&ice->reg_lock);
2026 return change;
2027 }
2028
2029 static struct snd_kcontrol_new snd_ice1712_pro_rate_reset = {
2030 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2031 .name = "Multi Track Rate Reset",
2032 .info = snd_ice1712_pro_rate_reset_info,
2033 .get = snd_ice1712_pro_rate_reset_get,
2034 .put = snd_ice1712_pro_rate_reset_put
2035 };
2036
2037 /*
2038 * routing
2039 */
2040 static int snd_ice1712_pro_route_info(struct snd_kcontrol *kcontrol,
2041 struct snd_ctl_elem_info *uinfo)
2042 {
2043 static const char * const texts[] = {
2044 "PCM Out", /* 0 */
2045 "H/W In 0", "H/W In 1", "H/W In 2", "H/W In 3", /* 1-4 */
2046 "H/W In 4", "H/W In 5", "H/W In 6", "H/W In 7", /* 5-8 */
2047 "IEC958 In L", "IEC958 In R", /* 9-10 */
2048 "Digital Mixer", /* 11 - optional */
2049 };
2050
2051 uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2052 uinfo->count = 1;
2053 uinfo->value.enumerated.items =
2054 snd_ctl_get_ioffidx(kcontrol, &uinfo->id) < 2 ? 12 : 11;
2055 if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2056 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2057 strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2058 return 0;
2059 }
2060
2061 static int snd_ice1712_pro_route_analog_get(struct snd_kcontrol *kcontrol,
2062 struct snd_ctl_elem_value *ucontrol)
2063 {
2064 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2065 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2066 unsigned int val, cval;
2067
2068 spin_lock_irq(&ice->reg_lock);
2069 val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2070 cval = inl(ICEMT(ice, ROUTE_CAPTURE));
2071 spin_unlock_irq(&ice->reg_lock);
2072
2073 val >>= ((idx % 2) * 8) + ((idx / 2) * 2);
2074 val &= 3;
2075 cval >>= ((idx / 2) * 8) + ((idx % 2) * 4);
2076 if (val == 1 && idx < 2)
2077 ucontrol->value.enumerated.item[0] = 11;
2078 else if (val == 2)
2079 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2080 else if (val == 3)
2081 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2082 else
2083 ucontrol->value.enumerated.item[0] = 0;
2084 return 0;
2085 }
2086
2087 static int snd_ice1712_pro_route_analog_put(struct snd_kcontrol *kcontrol,
2088 struct snd_ctl_elem_value *ucontrol)
2089 {
2090 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2091 int change, shift;
2092 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2093 unsigned int val, old_val, nval;
2094
2095 /* update PSDOUT */
2096 if (ucontrol->value.enumerated.item[0] >= 11)
2097 nval = idx < 2 ? 1 : 0; /* dig mixer (or pcm) */
2098 else if (ucontrol->value.enumerated.item[0] >= 9)
2099 nval = 3; /* spdif in */
2100 else if (ucontrol->value.enumerated.item[0] >= 1)
2101 nval = 2; /* analog in */
2102 else
2103 nval = 0; /* pcm */
2104 shift = ((idx % 2) * 8) + ((idx / 2) * 2);
2105 spin_lock_irq(&ice->reg_lock);
2106 val = old_val = inw(ICEMT(ice, ROUTE_PSDOUT03));
2107 val &= ~(0x03 << shift);
2108 val |= nval << shift;
2109 change = val != old_val;
2110 if (change)
2111 outw(val, ICEMT(ice, ROUTE_PSDOUT03));
2112 spin_unlock_irq(&ice->reg_lock);
2113 if (nval < 2) /* dig mixer of pcm */
2114 return change;
2115
2116 /* update CAPTURE */
2117 spin_lock_irq(&ice->reg_lock);
2118 val = old_val = inl(ICEMT(ice, ROUTE_CAPTURE));
2119 shift = ((idx / 2) * 8) + ((idx % 2) * 4);
2120 if (nval == 2) { /* analog in */
2121 nval = ucontrol->value.enumerated.item[0] - 1;
2122 val &= ~(0x07 << shift);
2123 val |= nval << shift;
2124 } else { /* spdif in */
2125 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2126 val &= ~(0x08 << shift);
2127 val |= nval << shift;
2128 }
2129 if (val != old_val) {
2130 change = 1;
2131 outl(val, ICEMT(ice, ROUTE_CAPTURE));
2132 }
2133 spin_unlock_irq(&ice->reg_lock);
2134 return change;
2135 }
2136
2137 static int snd_ice1712_pro_route_spdif_get(struct snd_kcontrol *kcontrol,
2138 struct snd_ctl_elem_value *ucontrol)
2139 {
2140 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2141 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2142 unsigned int val, cval;
2143 val = inw(ICEMT(ice, ROUTE_SPDOUT));
2144 cval = (val >> (idx * 4 + 8)) & 0x0f;
2145 val = (val >> (idx * 2)) & 0x03;
2146 if (val == 1)
2147 ucontrol->value.enumerated.item[0] = 11;
2148 else if (val == 2)
2149 ucontrol->value.enumerated.item[0] = (cval & 7) + 1;
2150 else if (val == 3)
2151 ucontrol->value.enumerated.item[0] = ((cval >> 3) & 1) + 9;
2152 else
2153 ucontrol->value.enumerated.item[0] = 0;
2154 return 0;
2155 }
2156
2157 static int snd_ice1712_pro_route_spdif_put(struct snd_kcontrol *kcontrol,
2158 struct snd_ctl_elem_value *ucontrol)
2159 {
2160 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2161 int change, shift;
2162 int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
2163 unsigned int val, old_val, nval;
2164
2165 /* update SPDOUT */
2166 spin_lock_irq(&ice->reg_lock);
2167 val = old_val = inw(ICEMT(ice, ROUTE_SPDOUT));
2168 if (ucontrol->value.enumerated.item[0] >= 11)
2169 nval = 1;
2170 else if (ucontrol->value.enumerated.item[0] >= 9)
2171 nval = 3;
2172 else if (ucontrol->value.enumerated.item[0] >= 1)
2173 nval = 2;
2174 else
2175 nval = 0;
2176 shift = idx * 2;
2177 val &= ~(0x03 << shift);
2178 val |= nval << shift;
2179 shift = idx * 4 + 8;
2180 if (nval == 2) {
2181 nval = ucontrol->value.enumerated.item[0] - 1;
2182 val &= ~(0x07 << shift);
2183 val |= nval << shift;
2184 } else if (nval == 3) {
2185 nval = (ucontrol->value.enumerated.item[0] - 9) << 3;
2186 val &= ~(0x08 << shift);
2187 val |= nval << shift;
2188 }
2189 change = val != old_val;
2190 if (change)
2191 outw(val, ICEMT(ice, ROUTE_SPDOUT));
2192 spin_unlock_irq(&ice->reg_lock);
2193 return change;
2194 }
2195
2196 static struct snd_kcontrol_new snd_ice1712_mixer_pro_analog_route = {
2197 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2198 .name = "H/W Playback Route",
2199 .info = snd_ice1712_pro_route_info,
2200 .get = snd_ice1712_pro_route_analog_get,
2201 .put = snd_ice1712_pro_route_analog_put,
2202 };
2203
2204 static struct snd_kcontrol_new snd_ice1712_mixer_pro_spdif_route = {
2205 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2206 .name = SNDRV_CTL_NAME_IEC958("", PLAYBACK, NONE) "Route",
2207 .info = snd_ice1712_pro_route_info,
2208 .get = snd_ice1712_pro_route_spdif_get,
2209 .put = snd_ice1712_pro_route_spdif_put,
2210 .count = 2,
2211 };
2212
2213
2214 static int snd_ice1712_pro_volume_rate_info(struct snd_kcontrol *kcontrol,
2215 struct snd_ctl_elem_info *uinfo)
2216 {
2217 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2218 uinfo->count = 1;
2219 uinfo->value.integer.min = 0;
2220 uinfo->value.integer.max = 255;
2221 return 0;
2222 }
2223
2224 static int snd_ice1712_pro_volume_rate_get(struct snd_kcontrol *kcontrol,
2225 struct snd_ctl_elem_value *ucontrol)
2226 {
2227 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2228
2229 ucontrol->value.integer.value[0] = inb(ICEMT(ice, MONITOR_RATE));
2230 return 0;
2231 }
2232
2233 static int snd_ice1712_pro_volume_rate_put(struct snd_kcontrol *kcontrol,
2234 struct snd_ctl_elem_value *ucontrol)
2235 {
2236 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2237 int change;
2238
2239 spin_lock_irq(&ice->reg_lock);
2240 change = inb(ICEMT(ice, MONITOR_RATE)) != ucontrol->value.integer.value[0];
2241 outb(ucontrol->value.integer.value[0], ICEMT(ice, MONITOR_RATE));
2242 spin_unlock_irq(&ice->reg_lock);
2243 return change;
2244 }
2245
2246 static struct snd_kcontrol_new snd_ice1712_mixer_pro_volume_rate = {
2247 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
2248 .name = "Multi Track Volume Rate",
2249 .info = snd_ice1712_pro_volume_rate_info,
2250 .get = snd_ice1712_pro_volume_rate_get,
2251 .put = snd_ice1712_pro_volume_rate_put
2252 };
2253
2254 static int snd_ice1712_pro_peak_info(struct snd_kcontrol *kcontrol,
2255 struct snd_ctl_elem_info *uinfo)
2256 {
2257 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2258 uinfo->count = 22;
2259 uinfo->value.integer.min = 0;
2260 uinfo->value.integer.max = 255;
2261 return 0;
2262 }
2263
2264 static int snd_ice1712_pro_peak_get(struct snd_kcontrol *kcontrol,
2265 struct snd_ctl_elem_value *ucontrol)
2266 {
2267 struct snd_ice1712 *ice = snd_kcontrol_chip(kcontrol);
2268 int idx;
2269
2270 spin_lock_irq(&ice->reg_lock);
2271 for (idx = 0; idx < 22; idx++) {
2272 outb(idx, ICEMT(ice, MONITOR_PEAKINDEX));
2273 ucontrol->value.integer.value[idx] = inb(ICEMT(ice, MONITOR_PEAKDATA));
2274 }
2275 spin_unlock_irq(&ice->reg_lock);
2276 return 0;
2277 }
2278
2279 static struct snd_kcontrol_new snd_ice1712_mixer_pro_peak = {
2280 .iface = SNDRV_CTL_ELEM_IFACE_PCM,
2281 .name = "Multi Track Peak",
2282 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
2283 .info = snd_ice1712_pro_peak_info,
2284 .get = snd_ice1712_pro_peak_get
2285 };
2286
2287 /*
2288 *
2289 */
2290
2291 /*
2292 * list of available boards
2293 */
2294 static struct snd_ice1712_card_info *card_tables[] = {
2295 snd_ice1712_hoontech_cards,
2296 snd_ice1712_delta_cards,
2297 snd_ice1712_ews_cards,
2298 NULL,
2299 };
2300
2301 static unsigned char snd_ice1712_read_i2c(struct snd_ice1712 *ice,
2302 unsigned char dev,
2303 unsigned char addr)
2304 {
2305 long t = 0x10000;
2306
2307 outb(addr, ICEREG(ice, I2C_BYTE_ADDR));
2308 outb(dev & ~ICE1712_I2C_WRITE, ICEREG(ice, I2C_DEV_ADDR));
2309 while (t-- > 0 && (inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_BUSY)) ;
2310 return inb(ICEREG(ice, I2C_DATA));
2311 }
2312
2313 static int snd_ice1712_read_eeprom(struct snd_ice1712 *ice,
2314 const char *modelname)
2315 {
2316 int dev = 0xa0; /* EEPROM device address */
2317 unsigned int i, size;
2318 struct snd_ice1712_card_info * const *tbl, *c;
2319
2320 if (!modelname || !*modelname) {
2321 ice->eeprom.subvendor = 0;
2322 if ((inb(ICEREG(ice, I2C_CTRL)) & ICE1712_I2C_EEPROM) != 0)
2323 ice->eeprom.subvendor = (snd_ice1712_read_i2c(ice, dev, 0x00) << 0) |
2324 (snd_ice1712_read_i2c(ice, dev, 0x01) << 8) |
2325 (snd_ice1712_read_i2c(ice, dev, 0x02) << 16) |
2326 (snd_ice1712_read_i2c(ice, dev, 0x03) << 24);
2327 if (ice->eeprom.subvendor == 0 ||
2328 ice->eeprom.subvendor == (unsigned int)-1) {
2329 /* invalid subvendor from EEPROM, try the PCI subststem ID instead */
2330 u16 vendor, device;
2331 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_VENDOR_ID, &vendor);
2332 pci_read_config_word(ice->pci, PCI_SUBSYSTEM_ID, &device);
2333 ice->eeprom.subvendor = ((unsigned int)swab16(vendor) << 16) | swab16(device);
2334 if (ice->eeprom.subvendor == 0 || ice->eeprom.subvendor == (unsigned int)-1) {
2335 printk(KERN_ERR "ice1712: No valid ID is found\n");
2336 return -ENXIO;
2337 }
2338 }
2339 }
2340 for (tbl = card_tables; *tbl; tbl++) {
2341 for (c = *tbl; c->subvendor; c++) {
2342 if (modelname && c->model && !strcmp(modelname, c->model)) {
2343 printk(KERN_INFO "ice1712: Using board model %s\n", c->name);
2344 ice->eeprom.subvendor = c->subvendor;
2345 } else if (c->subvendor != ice->eeprom.subvendor)
2346 continue;
2347 if (!c->eeprom_size || !c->eeprom_data)
2348 goto found;
2349 /* if the EEPROM is given by the driver, use it */
2350 snd_printdd("using the defined eeprom..\n");
2351 ice->eeprom.version = 1;
2352 ice->eeprom.size = c->eeprom_size + 6;
2353 memcpy(ice->eeprom.data, c->eeprom_data, c->eeprom_size);
2354 goto read_skipped;
2355 }
2356 }
2357 printk(KERN_WARNING "ice1712: No matching model found for ID 0x%x\n",
2358 ice->eeprom.subvendor);
2359
2360 found:
2361 ice->eeprom.size = snd_ice1712_read_i2c(ice, dev, 0x04);
2362 if (ice->eeprom.size < 6)
2363 ice->eeprom.size = 32; /* FIXME: any cards without the correct size? */
2364 else if (ice->eeprom.size > 32) {
2365 snd_printk(KERN_ERR "invalid EEPROM (size = %i)\n", ice->eeprom.size);
2366 return -EIO;
2367 }
2368 ice->eeprom.version = snd_ice1712_read_i2c(ice, dev, 0x05);
2369 if (ice->eeprom.version != 1) {
2370 snd_printk(KERN_ERR "invalid EEPROM version %i\n",
2371 ice->eeprom.version);
2372 /* return -EIO; */
2373 }
2374 size = ice->eeprom.size - 6;
2375 for (i = 0; i < size; i++)
2376 ice->eeprom.data[i] = snd_ice1712_read_i2c(ice, dev, i + 6);
2377
2378 read_skipped:
2379 ice->eeprom.gpiomask = ice->eeprom.data[ICE_EEP1_GPIO_MASK];
2380 ice->eeprom.gpiostate = ice->eeprom.data[ICE_EEP1_GPIO_STATE];
2381 ice->eeprom.gpiodir = ice->eeprom.data[ICE_EEP1_GPIO_DIR];
2382
2383 return 0;
2384 }
2385
2386
2387
2388 static int snd_ice1712_chip_init(struct snd_ice1712 *ice)
2389 {
2390 outb(ICE1712_RESET | ICE1712_NATIVE, ICEREG(ice, CONTROL));
2391 udelay(200);
2392 outb(ICE1712_NATIVE, ICEREG(ice, CONTROL));
2393 udelay(200);
2394 if (ice->eeprom.subvendor == ICE1712_SUBDEVICE_DMX6FIRE &&
2395 !ice->dxr_enable)
2396 /* Set eeprom value to limit active ADCs and DACs to 6;
2397 * Also disable AC97 as no hardware in standard 6fire card/box
2398 * Note: DXR extensions are not currently supported
2399 */
2400 ice->eeprom.data[ICE_EEP1_CODEC] = 0x3a;
2401 pci_write_config_byte(ice->pci, 0x60, ice->eeprom.data[ICE_EEP1_CODEC]);
2402 pci_write_config_byte(ice->pci, 0x61, ice->eeprom.data[ICE_EEP1_ACLINK]);
2403 pci_write_config_byte(ice->pci, 0x62, ice->eeprom.data[ICE_EEP1_I2SID]);
2404 pci_write_config_byte(ice->pci, 0x63, ice->eeprom.data[ICE_EEP1_SPDIF]);
2405 if (ice->eeprom.subvendor != ICE1712_SUBDEVICE_STDSP24) {
2406 ice->gpio.write_mask = ice->eeprom.gpiomask;
2407 ice->gpio.direction = ice->eeprom.gpiodir;
2408 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK,
2409 ice->eeprom.gpiomask);
2410 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION,
2411 ice->eeprom.gpiodir);
2412 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2413 ice->eeprom.gpiostate);
2414 } else {
2415 ice->gpio.write_mask = 0xc0;
2416 ice->gpio.direction = 0xff;
2417 snd_ice1712_write(ice, ICE1712_IREG_GPIO_WRITE_MASK, 0xc0);
2418 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DIRECTION, 0xff);
2419 snd_ice1712_write(ice, ICE1712_IREG_GPIO_DATA,
2420 ICE1712_STDSP24_CLOCK_BIT);
2421 }
2422 snd_ice1712_write(ice, ICE1712_IREG_PRO_POWERDOWN, 0);
2423 if (!(ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97)) {
2424 outb(ICE1712_AC97_WARM, ICEREG(ice, AC97_CMD));
2425 udelay(100);
2426 outb(0, ICEREG(ice, AC97_CMD));
2427 udelay(200);
2428 snd_ice1712_write(ice, ICE1712_IREG_CONSUMER_POWERDOWN, 0);
2429 }
2430 snd_ice1712_set_pro_rate(ice, 48000, 1);
2431
2432 return 0;
2433 }
2434
2435 int snd_ice1712_spdif_build_controls(struct snd_ice1712 *ice)
2436 {
2437 int err;
2438 struct snd_kcontrol *kctl;
2439
2440 if (snd_BUG_ON(!ice->pcm_pro))
2441 return -EIO;
2442 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_default, ice));
2443 if (err < 0)
2444 return err;
2445 kctl->id.device = ice->pcm_pro->device;
2446 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskc, ice));
2447 if (err < 0)
2448 return err;
2449 kctl->id.device = ice->pcm_pro->device;
2450 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_maskp, ice));
2451 if (err < 0)
2452 return err;
2453 kctl->id.device = ice->pcm_pro->device;
2454 err = snd_ctl_add(ice->card, kctl = snd_ctl_new1(&snd_ice1712_spdif_stream, ice));
2455 if (err < 0)
2456 return err;
2457 kctl->id.device = ice->pcm_pro->device;
2458 ice->spdif.stream_ctl = kctl;
2459 return 0;
2460 }
2461
2462
2463 static int snd_ice1712_build_controls(struct snd_ice1712 *ice)
2464 {
2465 int err;
2466
2467 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_eeprom, ice));
2468 if (err < 0)
2469 return err;
2470 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock, ice));
2471 if (err < 0)
2472 return err;
2473 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_internal_clock_default, ice));
2474 if (err < 0)
2475 return err;
2476
2477 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_locking, ice));
2478 if (err < 0)
2479 return err;
2480 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_pro_rate_reset, ice));
2481 if (err < 0)
2482 return err;
2483
2484 if (ice->num_total_dacs > 0) {
2485 struct snd_kcontrol_new tmp = snd_ice1712_mixer_pro_analog_route;
2486 tmp.count = ice->num_total_dacs;
2487 err = snd_ctl_add(ice->card, snd_ctl_new1(&tmp, ice));
2488 if (err < 0)
2489 return err;
2490 }
2491
2492 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_spdif_route, ice));
2493 if (err < 0)
2494 return err;
2495
2496 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_volume_rate, ice));
2497 if (err < 0)
2498 return err;
2499 err = snd_ctl_add(ice->card, snd_ctl_new1(&snd_ice1712_mixer_pro_peak, ice));
2500 if (err < 0)
2501 return err;
2502
2503 return 0;
2504 }
2505
2506 static int snd_ice1712_free(struct snd_ice1712 *ice)
2507 {
2508 if (!ice->port)
2509 goto __hw_end;
2510 /* mask all interrupts */
2511 outb(0xc0, ICEMT(ice, IRQ));
2512 outb(0xff, ICEREG(ice, IRQMASK));
2513 /* --- */
2514 __hw_end:
2515 if (ice->irq >= 0)
2516 free_irq(ice->irq, ice);
2517
2518 if (ice->port)
2519 pci_release_regions(ice->pci);
2520 snd_ice1712_akm4xxx_free(ice);
2521 pci_disable_device(ice->pci);
2522 kfree(ice->spec);
2523 kfree(ice);
2524 return 0;
2525 }
2526
2527 static int snd_ice1712_dev_free(struct snd_device *device)
2528 {
2529 struct snd_ice1712 *ice = device->device_data;
2530 return snd_ice1712_free(ice);
2531 }
2532
2533 static int snd_ice1712_create(struct snd_card *card,
2534 struct pci_dev *pci,
2535 const char *modelname,
2536 int omni,
2537 int cs8427_timeout,
2538 int dxr_enable,
2539 struct snd_ice1712 **r_ice1712)
2540 {
2541 struct snd_ice1712 *ice;
2542 int err;
2543 static struct snd_device_ops ops = {
2544 .dev_free = snd_ice1712_dev_free,
2545 };
2546
2547 *r_ice1712 = NULL;
2548
2549 /* enable PCI device */
2550 err = pci_enable_device(pci);
2551 if (err < 0)
2552 return err;
2553 /* check, if we can restrict PCI DMA transfers to 28 bits */
2554 if (pci_set_dma_mask(pci, DMA_BIT_MASK(28)) < 0 ||
2555 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(28)) < 0) {
2556 snd_printk(KERN_ERR "architecture does not support 28bit PCI busmaster DMA\n");
2557 pci_disable_device(pci);
2558 return -ENXIO;
2559 }
2560
2561 ice = kzalloc(sizeof(*ice), GFP_KERNEL);
2562 if (ice == NULL) {
2563 pci_disable_device(pci);
2564 return -ENOMEM;
2565 }
2566 ice->omni = omni ? 1 : 0;
2567 if (cs8427_timeout < 1)
2568 cs8427_timeout = 1;
2569 else if (cs8427_timeout > 1000)
2570 cs8427_timeout = 1000;
2571 ice->cs8427_timeout = cs8427_timeout;
2572 ice->dxr_enable = dxr_enable;
2573 spin_lock_init(&ice->reg_lock);
2574 mutex_init(&ice->gpio_mutex);
2575 mutex_init(&ice->i2c_mutex);
2576 mutex_init(&ice->open_mutex);
2577 ice->gpio.set_mask = snd_ice1712_set_gpio_mask;
2578 ice->gpio.get_mask = snd_ice1712_get_gpio_mask;
2579 ice->gpio.set_dir = snd_ice1712_set_gpio_dir;
2580 ice->gpio.get_dir = snd_ice1712_get_gpio_dir;
2581 ice->gpio.set_data = snd_ice1712_set_gpio_data;
2582 ice->gpio.get_data = snd_ice1712_get_gpio_data;
2583
2584 ice->spdif.cs8403_bits =
2585 ice->spdif.cs8403_stream_bits = (0x01 | /* consumer format */
2586 0x10 | /* no emphasis */
2587 0x20); /* PCM encoder/decoder */
2588 ice->card = card;
2589 ice->pci = pci;
2590 ice->irq = -1;
2591 pci_set_master(pci);
2592 pci_write_config_word(ice->pci, 0x40, 0x807f);
2593 pci_write_config_word(ice->pci, 0x42, 0x0006);
2594 snd_ice1712_proc_init(ice);
2595 synchronize_irq(pci->irq);
2596
2597 card->private_data = ice;
2598
2599 err = pci_request_regions(pci, "ICE1712");
2600 if (err < 0) {
2601 kfree(ice);
2602 pci_disable_device(pci);
2603 return err;
2604 }
2605 ice->port = pci_resource_start(pci, 0);
2606 ice->ddma_port = pci_resource_start(pci, 1);
2607 ice->dmapath_port = pci_resource_start(pci, 2);
2608 ice->profi_port = pci_resource_start(pci, 3);
2609
2610 if (request_irq(pci->irq, snd_ice1712_interrupt, IRQF_SHARED,
2611 KBUILD_MODNAME, ice)) {
2612 snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq);
2613 snd_ice1712_free(ice);
2614 return -EIO;
2615 }
2616
2617 ice->irq = pci->irq;
2618
2619 if (snd_ice1712_read_eeprom(ice, modelname) < 0) {
2620 snd_ice1712_free(ice);
2621 return -EIO;
2622 }
2623 if (snd_ice1712_chip_init(ice) < 0) {
2624 snd_ice1712_free(ice);
2625 return -EIO;
2626 }
2627
2628 /* unmask used interrupts */
2629 outb(((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) == 0 ?
2630 ICE1712_IRQ_MPU2 : 0) |
2631 ((ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_NO_CON_AC97) ?
2632 ICE1712_IRQ_PBKDS | ICE1712_IRQ_CONCAP | ICE1712_IRQ_CONPBK : 0),
2633 ICEREG(ice, IRQMASK));
2634 outb(0x00, ICEMT(ice, IRQ));
2635
2636 err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, ice, &ops);
2637 if (err < 0) {
2638 snd_ice1712_free(ice);
2639 return err;
2640 }
2641
2642 snd_card_set_dev(card, &pci->dev);
2643
2644 *r_ice1712 = ice;
2645 return 0;
2646 }
2647
2648
2649 /*
2650 *
2651 * Registration
2652 *
2653 */
2654
2655 static struct snd_ice1712_card_info no_matched;
2656
2657 static int snd_ice1712_probe(struct pci_dev *pci,
2658 const struct pci_device_id *pci_id)
2659 {
2660 static int dev;
2661 struct snd_card *card;
2662 struct snd_ice1712 *ice;
2663 int pcm_dev = 0, err;
2664 struct snd_ice1712_card_info * const *tbl, *c;
2665
2666 if (dev >= SNDRV_CARDS)
2667 return -ENODEV;
2668 if (!enable[dev]) {
2669 dev++;
2670 return -ENOENT;
2671 }
2672
2673 err = snd_card_create(index[dev], id[dev], THIS_MODULE, 0, &card);
2674 if (err < 0)
2675 return err;
2676
2677 strcpy(card->driver, "ICE1712");
2678 strcpy(card->shortname, "ICEnsemble ICE1712");
2679
2680 err = snd_ice1712_create(card, pci, model[dev], omni[dev],
2681 cs8427_timeout[dev], dxr_enable[dev], &ice);
2682 if (err < 0) {
2683 snd_card_free(card);
2684 return err;
2685 }
2686
2687 for (tbl = card_tables; *tbl; tbl++) {
2688 for (c = *tbl; c->subvendor; c++) {
2689 if (c->subvendor == ice->eeprom.subvendor) {
2690 ice->card_info = c;
2691 strcpy(card->shortname, c->name);
2692 if (c->driver) /* specific driver? */
2693 strcpy(card->driver, c->driver);
2694 if (c->chip_init) {
2695 err = c->chip_init(ice);
2696 if (err < 0) {
2697 snd_card_free(card);
2698 return err;
2699 }
2700 }
2701 goto __found;
2702 }
2703 }
2704 }
2705 c = &no_matched;
2706 __found:
2707
2708 err = snd_ice1712_pcm_profi(ice, pcm_dev++, NULL);
2709 if (err < 0) {
2710 snd_card_free(card);
2711 return err;
2712 }
2713
2714 if (ice_has_con_ac97(ice)) {
2715 err = snd_ice1712_pcm(ice, pcm_dev++, NULL);
2716 if (err < 0) {
2717 snd_card_free(card);
2718 return err;
2719 }
2720 }
2721
2722 err = snd_ice1712_ac97_mixer(ice);
2723 if (err < 0) {
2724 snd_card_free(card);
2725 return err;
2726 }
2727
2728 err = snd_ice1712_build_controls(ice);
2729 if (err < 0) {
2730 snd_card_free(card);
2731 return err;
2732 }
2733
2734 if (c->build_controls) {
2735 err = c->build_controls(ice);
2736 if (err < 0) {
2737 snd_card_free(card);
2738 return err;
2739 }
2740 }
2741
2742 if (ice_has_con_ac97(ice)) {
2743 err = snd_ice1712_pcm_ds(ice, pcm_dev++, NULL);
2744 if (err < 0) {
2745 snd_card_free(card);
2746 return err;
2747 }
2748 }
2749
2750 if (!c->no_mpu401) {
2751 err = snd_mpu401_uart_new(card, 0, MPU401_HW_ICE1712,
2752 ICEREG(ice, MPU1_CTRL),
2753 c->mpu401_1_info_flags |
2754 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2755 -1, &ice->rmidi[0]);
2756 if (err < 0) {
2757 snd_card_free(card);
2758 return err;
2759 }
2760 if (c->mpu401_1_name)
2761 /* Preferred name available in card_info */
2762 snprintf(ice->rmidi[0]->name,
2763 sizeof(ice->rmidi[0]->name),
2764 "%s %d", c->mpu401_1_name, card->number);
2765
2766 if (ice->eeprom.data[ICE_EEP1_CODEC] & ICE1712_CFG_2xMPU401) {
2767 /* 2nd port used */
2768 err = snd_mpu401_uart_new(card, 1, MPU401_HW_ICE1712,
2769 ICEREG(ice, MPU2_CTRL),
2770 c->mpu401_2_info_flags |
2771 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
2772 -1, &ice->rmidi[1]);
2773
2774 if (err < 0) {
2775 snd_card_free(card);
2776 return err;
2777 }
2778 if (c->mpu401_2_name)
2779 /* Preferred name available in card_info */
2780 snprintf(ice->rmidi[1]->name,
2781 sizeof(ice->rmidi[1]->name),
2782 "%s %d", c->mpu401_2_name,
2783 card->number);
2784 }
2785 }
2786
2787 snd_ice1712_set_input_clock_source(ice, 0);
2788
2789 sprintf(card->longname, "%s at 0x%lx, irq %i",
2790 card->shortname, ice->port, ice->irq);
2791
2792 err = snd_card_register(card);
2793 if (err < 0) {
2794 snd_card_free(card);
2795 return err;
2796 }
2797 pci_set_drvdata(pci, card);
2798 dev++;
2799 return 0;
2800 }
2801
2802 static void snd_ice1712_remove(struct pci_dev *pci)
2803 {
2804 struct snd_card *card = pci_get_drvdata(pci);
2805 struct snd_ice1712 *ice = card->private_data;
2806
2807 if (ice->card_info && ice->card_info->chip_exit)
2808 ice->card_info->chip_exit(ice);
2809 snd_card_free(card);
2810 }
2811
2812 static struct pci_driver ice1712_driver = {
2813 .name = KBUILD_MODNAME,
2814 .id_table = snd_ice1712_ids,
2815 .probe = snd_ice1712_probe,
2816 .remove = snd_ice1712_remove,
2817 };
2818
2819 module_pci_driver(ice1712_driver);
Linux kernel - Deliverables
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