2 * ALSA driver for RME Hammerfall DSP audio interface(s)
4 * Copyright (c) 2002 Paul Davis
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <sound/driver.h>
25 #include <linux/init.h>
26 #include <linux/delay.h>
27 #include <linux/interrupt.h>
28 #include <linux/slab.h>
29 #include <linux/pci.h>
30 #include <linux/firmware.h>
31 #include <linux/moduleparam.h>
33 #include <sound/core.h>
34 #include <sound/control.h>
35 #include <sound/pcm.h>
36 #include <sound/info.h>
37 #include <sound/asoundef.h>
38 #include <sound/rawmidi.h>
39 #include <sound/hwdep.h>
40 #include <sound/initval.h>
41 #include <sound/hdsp.h>
43 #include <asm/byteorder.h>
44 #include <asm/current.h>
47 static int index
[SNDRV_CARDS
] = SNDRV_DEFAULT_IDX
; /* Index 0-MAX */
48 static char *id
[SNDRV_CARDS
] = SNDRV_DEFAULT_STR
; /* ID for this card */
49 static int enable
[SNDRV_CARDS
] = SNDRV_DEFAULT_ENABLE_PNP
; /* Enable this card */
51 module_param_array(index
, int, NULL
, 0444);
52 MODULE_PARM_DESC(index
, "Index value for RME Hammerfall DSP interface.");
53 module_param_array(id
, charp
, NULL
, 0444);
54 MODULE_PARM_DESC(id
, "ID string for RME Hammerfall DSP interface.");
55 module_param_array(enable
, bool, NULL
, 0444);
56 MODULE_PARM_DESC(enable
, "Enable/disable specific Hammerfall DSP soundcards.");
57 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
58 MODULE_DESCRIPTION("RME Hammerfall DSP");
59 MODULE_LICENSE("GPL");
60 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
64 #define HDSP_MAX_CHANNELS 26
65 #define HDSP_MAX_DS_CHANNELS 14
66 #define HDSP_MAX_QS_CHANNELS 8
67 #define DIGIFACE_SS_CHANNELS 26
68 #define DIGIFACE_DS_CHANNELS 14
69 #define MULTIFACE_SS_CHANNELS 18
70 #define MULTIFACE_DS_CHANNELS 14
71 #define H9652_SS_CHANNELS 26
72 #define H9652_DS_CHANNELS 14
73 /* This does not include possible Analog Extension Boards
74 AEBs are detected at card initialization
76 #define H9632_SS_CHANNELS 12
77 #define H9632_DS_CHANNELS 8
78 #define H9632_QS_CHANNELS 4
80 /* Write registers. These are defined as byte-offsets from the iobase value.
82 #define HDSP_resetPointer 0
83 #define HDSP_freqReg 0
84 #define HDSP_outputBufferAddress 32
85 #define HDSP_inputBufferAddress 36
86 #define HDSP_controlRegister 64
87 #define HDSP_interruptConfirmation 96
88 #define HDSP_outputEnable 128
89 #define HDSP_control2Reg 256
90 #define HDSP_midiDataOut0 352
91 #define HDSP_midiDataOut1 356
92 #define HDSP_fifoData 368
93 #define HDSP_inputEnable 384
95 /* Read registers. These are defined as byte-offsets from the iobase value
98 #define HDSP_statusRegister 0
99 #define HDSP_timecode 128
100 #define HDSP_status2Register 192
101 #define HDSP_midiDataOut0 352
102 #define HDSP_midiDataOut1 356
103 #define HDSP_midiDataIn0 360
104 #define HDSP_midiDataIn1 364
105 #define HDSP_midiStatusOut0 384
106 #define HDSP_midiStatusOut1 388
107 #define HDSP_midiStatusIn0 392
108 #define HDSP_midiStatusIn1 396
109 #define HDSP_fifoStatus 400
111 /* the meters are regular i/o-mapped registers, but offset
112 considerably from the rest. the peak registers are reset
113 when read; the least-significant 4 bits are full-scale counters;
114 the actual peak value is in the most-significant 24 bits.
117 #define HDSP_playbackPeakLevel 4096 /* 26 * 32 bit values */
118 #define HDSP_inputPeakLevel 4224 /* 26 * 32 bit values */
119 #define HDSP_outputPeakLevel 4352 /* (26+2) * 32 bit values */
120 #define HDSP_playbackRmsLevel 4612 /* 26 * 64 bit values */
121 #define HDSP_inputRmsLevel 4868 /* 26 * 64 bit values */
124 /* This is for H9652 cards
125 Peak values are read downward from the base
126 Rms values are read upward
127 There are rms values for the outputs too
128 26*3 values are read in ss mode
129 14*3 in ds mode, with no gap between values
131 #define HDSP_9652_peakBase 7164
132 #define HDSP_9652_rmsBase 4096
134 /* c.f. the hdsp_9632_meters_t struct */
135 #define HDSP_9632_metersBase 4096
137 #define HDSP_IO_EXTENT 7168
139 /* control2 register bits */
141 #define HDSP_TMS 0x01
142 #define HDSP_TCK 0x02
143 #define HDSP_TDI 0x04
144 #define HDSP_JTAG 0x08
145 #define HDSP_PWDN 0x10
146 #define HDSP_PROGRAM 0x020
147 #define HDSP_CONFIG_MODE_0 0x040
148 #define HDSP_CONFIG_MODE_1 0x080
149 #define HDSP_VERSION_BIT 0x100
150 #define HDSP_BIGENDIAN_MODE 0x200
151 #define HDSP_RD_MULTIPLE 0x400
152 #define HDSP_9652_ENABLE_MIXER 0x800
153 #define HDSP_TDO 0x10000000
155 #define HDSP_S_PROGRAM (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
156 #define HDSP_S_LOAD (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
158 /* Control Register bits */
160 #define HDSP_Start (1<<0) /* start engine */
161 #define HDSP_Latency0 (1<<1) /* buffer size = 2^n where n is defined by Latency{2,1,0} */
162 #define HDSP_Latency1 (1<<2) /* [ see above ] */
163 #define HDSP_Latency2 (1<<3) /* [ see above ] */
164 #define HDSP_ClockModeMaster (1<<4) /* 1=Master, 0=Slave/Autosync */
165 #define HDSP_AudioInterruptEnable (1<<5) /* what do you think ? */
166 #define HDSP_Frequency0 (1<<6) /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
167 #define HDSP_Frequency1 (1<<7) /* 0=32kHz/64kHz/128kHz */
168 #define HDSP_DoubleSpeed (1<<8) /* 0=normal speed, 1=double speed */
169 #define HDSP_SPDIFProfessional (1<<9) /* 0=consumer, 1=professional */
170 #define HDSP_SPDIFEmphasis (1<<10) /* 0=none, 1=on */
171 #define HDSP_SPDIFNonAudio (1<<11) /* 0=off, 1=on */
172 #define HDSP_SPDIFOpticalOut (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
173 #define HDSP_SyncRef2 (1<<13)
174 #define HDSP_SPDIFInputSelect0 (1<<14)
175 #define HDSP_SPDIFInputSelect1 (1<<15)
176 #define HDSP_SyncRef0 (1<<16)
177 #define HDSP_SyncRef1 (1<<17)
178 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
179 #define HDSP_XLRBreakoutCable (1<<20) /* For H9632 cards */
180 #define HDSP_Midi0InterruptEnable (1<<22)
181 #define HDSP_Midi1InterruptEnable (1<<23)
182 #define HDSP_LineOut (1<<24)
183 #define HDSP_ADGain0 (1<<25) /* From here : H9632 specific */
184 #define HDSP_ADGain1 (1<<26)
185 #define HDSP_DAGain0 (1<<27)
186 #define HDSP_DAGain1 (1<<28)
187 #define HDSP_PhoneGain0 (1<<29)
188 #define HDSP_PhoneGain1 (1<<30)
189 #define HDSP_QuadSpeed (1<<31)
191 #define HDSP_ADGainMask (HDSP_ADGain0|HDSP_ADGain1)
192 #define HDSP_ADGainMinus10dBV HDSP_ADGainMask
193 #define HDSP_ADGainPlus4dBu (HDSP_ADGain0)
194 #define HDSP_ADGainLowGain 0
196 #define HDSP_DAGainMask (HDSP_DAGain0|HDSP_DAGain1)
197 #define HDSP_DAGainHighGain HDSP_DAGainMask
198 #define HDSP_DAGainPlus4dBu (HDSP_DAGain0)
199 #define HDSP_DAGainMinus10dBV 0
201 #define HDSP_PhoneGainMask (HDSP_PhoneGain0|HDSP_PhoneGain1)
202 #define HDSP_PhoneGain0dB HDSP_PhoneGainMask
203 #define HDSP_PhoneGainMinus6dB (HDSP_PhoneGain0)
204 #define HDSP_PhoneGainMinus12dB 0
206 #define HDSP_LatencyMask (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
207 #define HDSP_FrequencyMask (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
209 #define HDSP_SPDIFInputMask (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
210 #define HDSP_SPDIFInputADAT1 0
211 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
212 #define HDSP_SPDIFInputCdrom (HDSP_SPDIFInputSelect1)
213 #define HDSP_SPDIFInputAES (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
215 #define HDSP_SyncRefMask (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
216 #define HDSP_SyncRef_ADAT1 0
217 #define HDSP_SyncRef_ADAT2 (HDSP_SyncRef0)
218 #define HDSP_SyncRef_ADAT3 (HDSP_SyncRef1)
219 #define HDSP_SyncRef_SPDIF (HDSP_SyncRef0|HDSP_SyncRef1)
220 #define HDSP_SyncRef_WORD (HDSP_SyncRef2)
221 #define HDSP_SyncRef_ADAT_SYNC (HDSP_SyncRef0|HDSP_SyncRef2)
223 /* Sample Clock Sources */
225 #define HDSP_CLOCK_SOURCE_AUTOSYNC 0
226 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ 1
227 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ 2
228 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ 3
229 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ 4
230 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ 5
231 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ 6
232 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ 7
233 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ 8
234 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ 9
236 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
238 #define HDSP_SYNC_FROM_WORD 0
239 #define HDSP_SYNC_FROM_SPDIF 1
240 #define HDSP_SYNC_FROM_ADAT1 2
241 #define HDSP_SYNC_FROM_ADAT_SYNC 3
242 #define HDSP_SYNC_FROM_ADAT2 4
243 #define HDSP_SYNC_FROM_ADAT3 5
245 /* SyncCheck status */
247 #define HDSP_SYNC_CHECK_NO_LOCK 0
248 #define HDSP_SYNC_CHECK_LOCK 1
249 #define HDSP_SYNC_CHECK_SYNC 2
251 /* AutoSync references - used by "autosync_ref" control switch */
253 #define HDSP_AUTOSYNC_FROM_WORD 0
254 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
255 #define HDSP_AUTOSYNC_FROM_SPDIF 2
256 #define HDSP_AUTOSYNC_FROM_NONE 3
257 #define HDSP_AUTOSYNC_FROM_ADAT1 4
258 #define HDSP_AUTOSYNC_FROM_ADAT2 5
259 #define HDSP_AUTOSYNC_FROM_ADAT3 6
261 /* Possible sources of S/PDIF input */
263 #define HDSP_SPDIFIN_OPTICAL 0 /* optical (ADAT1) */
264 #define HDSP_SPDIFIN_COAXIAL 1 /* coaxial (RCA) */
265 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
266 #define HDSP_SPDIFIN_AES 3 /* xlr for H9632 (AES)*/
268 #define HDSP_Frequency32KHz HDSP_Frequency0
269 #define HDSP_Frequency44_1KHz HDSP_Frequency1
270 #define HDSP_Frequency48KHz (HDSP_Frequency1|HDSP_Frequency0)
271 #define HDSP_Frequency64KHz (HDSP_DoubleSpeed|HDSP_Frequency0)
272 #define HDSP_Frequency88_2KHz (HDSP_DoubleSpeed|HDSP_Frequency1)
273 #define HDSP_Frequency96KHz (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
274 /* For H9632 cards */
275 #define HDSP_Frequency128KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
276 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
277 #define HDSP_Frequency192KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
278 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
279 return 104857600000000 / rate; // 100 MHz
280 return 110100480000000 / rate; // 105 MHz
282 #define DDS_NUMERATOR 104857600000000ULL; /* = 2^20 * 10^8 */
284 #define hdsp_encode_latency(x) (((x)<<1) & HDSP_LatencyMask)
285 #define hdsp_decode_latency(x) (((x) & HDSP_LatencyMask)>>1)
287 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
288 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
290 /* Status Register bits */
292 #define HDSP_audioIRQPending (1<<0)
293 #define HDSP_Lock2 (1<<1) /* this is for Digiface and H9652 */
294 #define HDSP_spdifFrequency3 HDSP_Lock2 /* this is for H9632 only */
295 #define HDSP_Lock1 (1<<2)
296 #define HDSP_Lock0 (1<<3)
297 #define HDSP_SPDIFSync (1<<4)
298 #define HDSP_TimecodeLock (1<<5)
299 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
300 #define HDSP_Sync2 (1<<16)
301 #define HDSP_Sync1 (1<<17)
302 #define HDSP_Sync0 (1<<18)
303 #define HDSP_DoubleSpeedStatus (1<<19)
304 #define HDSP_ConfigError (1<<20)
305 #define HDSP_DllError (1<<21)
306 #define HDSP_spdifFrequency0 (1<<22)
307 #define HDSP_spdifFrequency1 (1<<23)
308 #define HDSP_spdifFrequency2 (1<<24)
309 #define HDSP_SPDIFErrorFlag (1<<25)
310 #define HDSP_BufferID (1<<26)
311 #define HDSP_TimecodeSync (1<<27)
312 #define HDSP_AEBO (1<<28) /* H9632 specific Analog Extension Boards */
313 #define HDSP_AEBI (1<<29) /* 0 = present, 1 = absent */
314 #define HDSP_midi0IRQPending (1<<30)
315 #define HDSP_midi1IRQPending (1<<31)
317 #define HDSP_spdifFrequencyMask (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
319 #define HDSP_spdifFrequency32KHz (HDSP_spdifFrequency0)
320 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
321 #define HDSP_spdifFrequency48KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
323 #define HDSP_spdifFrequency64KHz (HDSP_spdifFrequency2)
324 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
325 #define HDSP_spdifFrequency96KHz (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
327 /* This is for H9632 cards */
328 #define HDSP_spdifFrequency128KHz HDSP_spdifFrequencyMask
329 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
330 #define HDSP_spdifFrequency192KHz (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
332 /* Status2 Register bits */
334 #define HDSP_version0 (1<<0)
335 #define HDSP_version1 (1<<1)
336 #define HDSP_version2 (1<<2)
337 #define HDSP_wc_lock (1<<3)
338 #define HDSP_wc_sync (1<<4)
339 #define HDSP_inp_freq0 (1<<5)
340 #define HDSP_inp_freq1 (1<<6)
341 #define HDSP_inp_freq2 (1<<7)
342 #define HDSP_SelSyncRef0 (1<<8)
343 #define HDSP_SelSyncRef1 (1<<9)
344 #define HDSP_SelSyncRef2 (1<<10)
346 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
348 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
349 #define HDSP_systemFrequency32 (HDSP_inp_freq0)
350 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
351 #define HDSP_systemFrequency48 (HDSP_inp_freq0|HDSP_inp_freq1)
352 #define HDSP_systemFrequency64 (HDSP_inp_freq2)
353 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
354 #define HDSP_systemFrequency96 (HDSP_inp_freq1|HDSP_inp_freq2)
355 /* FIXME : more values for 9632 cards ? */
357 #define HDSP_SelSyncRefMask (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
358 #define HDSP_SelSyncRef_ADAT1 0
359 #define HDSP_SelSyncRef_ADAT2 (HDSP_SelSyncRef0)
360 #define HDSP_SelSyncRef_ADAT3 (HDSP_SelSyncRef1)
361 #define HDSP_SelSyncRef_SPDIF (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
362 #define HDSP_SelSyncRef_WORD (HDSP_SelSyncRef2)
363 #define HDSP_SelSyncRef_ADAT_SYNC (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
365 /* Card state flags */
367 #define HDSP_InitializationComplete (1<<0)
368 #define HDSP_FirmwareLoaded (1<<1)
369 #define HDSP_FirmwareCached (1<<2)
371 /* FIFO wait times, defined in terms of 1/10ths of msecs */
373 #define HDSP_LONG_WAIT 5000
374 #define HDSP_SHORT_WAIT 30
376 #define UNITY_GAIN 32768
377 #define MINUS_INFINITY_GAIN 0
379 /* the size of a substream (1 mono data stream) */
381 #define HDSP_CHANNEL_BUFFER_SAMPLES (16*1024)
382 #define HDSP_CHANNEL_BUFFER_BYTES (4*HDSP_CHANNEL_BUFFER_SAMPLES)
384 /* the size of the area we need to allocate for DMA transfers. the
385 size is the same regardless of the number of channels - the
386 Multiface still uses the same memory area.
388 Note that we allocate 1 more channel than is apparently needed
389 because the h/w seems to write 1 byte beyond the end of the last
393 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
394 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
396 /* use hotplug firmeare loader? */
397 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
398 #if !defined(HDSP_USE_HWDEP_LOADER) && !defined(CONFIG_SND_HDSP)
399 #define HDSP_FW_LOADER
403 struct hdsp_9632_meters
{
405 u32 playback_peak
[16];
409 u32 input_rms_low
[16];
410 u32 playback_rms_low
[16];
411 u32 output_rms_low
[16];
413 u32 input_rms_high
[16];
414 u32 playback_rms_high
[16];
415 u32 output_rms_high
[16];
416 u32 xxx_rms_high
[16];
422 struct snd_rawmidi
*rmidi
;
423 struct snd_rawmidi_substream
*input
;
424 struct snd_rawmidi_substream
*output
;
425 char istimer
; /* timer in use */
426 struct timer_list timer
;
433 struct snd_pcm_substream
*capture_substream
;
434 struct snd_pcm_substream
*playback_substream
;
435 struct hdsp_midi midi
[2];
436 struct tasklet_struct midi_tasklet
;
437 int use_midi_tasklet
;
439 u32 control_register
; /* cached value */
440 u32 control2_register
; /* cached value */
442 u32 creg_spdif_stream
;
443 int clock_source_locked
;
444 char *card_name
; /* digiface/multiface */
445 enum HDSP_IO_Type io_type
; /* ditto, but for code use */
446 unsigned short firmware_rev
;
447 unsigned short state
; /* stores state bits */
448 u32 firmware_cache
[24413]; /* this helps recover from accidental iobox power failure */
449 size_t period_bytes
; /* guess what this is */
450 unsigned char max_channels
;
451 unsigned char qs_in_channels
; /* quad speed mode for H9632 */
452 unsigned char ds_in_channels
;
453 unsigned char ss_in_channels
; /* different for multiface/digiface */
454 unsigned char qs_out_channels
;
455 unsigned char ds_out_channels
;
456 unsigned char ss_out_channels
;
458 struct snd_dma_buffer capture_dma_buf
;
459 struct snd_dma_buffer playback_dma_buf
;
460 unsigned char *capture_buffer
; /* suitably aligned address */
461 unsigned char *playback_buffer
; /* suitably aligned address */
466 int system_sample_rate
;
471 void __iomem
*iobase
;
472 struct snd_card
*card
;
474 struct snd_hwdep
*hwdep
;
476 struct snd_kcontrol
*spdif_ctl
;
477 unsigned short mixer_matrix
[HDSP_MATRIX_MIXER_SIZE
];
478 unsigned int dds_value
; /* last value written to freq register */
481 /* These tables map the ALSA channels 1..N to the channels that we
482 need to use in order to find the relevant channel buffer. RME
483 refer to this kind of mapping as between "the ADAT channel and
484 the DMA channel." We index it using the logical audio channel,
485 and the value is the DMA channel (i.e. channel buffer number)
486 where the data for that channel can be read/written from/to.
489 static char channel_map_df_ss
[HDSP_MAX_CHANNELS
] = {
490 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
491 18, 19, 20, 21, 22, 23, 24, 25
494 static char channel_map_mf_ss
[HDSP_MAX_CHANNELS
] = { /* Multiface */
496 0, 1, 2, 3, 4, 5, 6, 7,
498 16, 17, 18, 19, 20, 21, 22, 23,
501 -1, -1, -1, -1, -1, -1, -1, -1
504 static char channel_map_ds
[HDSP_MAX_CHANNELS
] = {
505 /* ADAT channels are remapped */
506 1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
507 /* channels 12 and 13 are S/PDIF */
509 /* others don't exist */
510 -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
513 static char channel_map_H9632_ss
[HDSP_MAX_CHANNELS
] = {
515 0, 1, 2, 3, 4, 5, 6, 7,
520 /* AO4S-192 and AI4S-192 extension boards */
522 /* others don't exist */
523 -1, -1, -1, -1, -1, -1, -1, -1,
527 static char channel_map_H9632_ds
[HDSP_MAX_CHANNELS
] = {
534 /* AO4S-192 and AI4S-192 extension boards */
536 /* others don't exist */
537 -1, -1, -1, -1, -1, -1, -1, -1,
538 -1, -1, -1, -1, -1, -1
541 static char channel_map_H9632_qs
[HDSP_MAX_CHANNELS
] = {
542 /* ADAT is disabled in this mode */
547 /* AO4S-192 and AI4S-192 extension boards */
549 /* others don't exist */
550 -1, -1, -1, -1, -1, -1, -1, -1,
551 -1, -1, -1, -1, -1, -1, -1, -1,
555 static int snd_hammerfall_get_buffer(struct pci_dev
*pci
, struct snd_dma_buffer
*dmab
, size_t size
)
557 dmab
->dev
.type
= SNDRV_DMA_TYPE_DEV
;
558 dmab
->dev
.dev
= snd_dma_pci_data(pci
);
559 if (snd_dma_get_reserved_buf(dmab
, snd_dma_pci_buf_id(pci
))) {
560 if (dmab
->bytes
>= size
)
563 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV
, snd_dma_pci_data(pci
),
569 static void snd_hammerfall_free_buffer(struct snd_dma_buffer
*dmab
, struct pci_dev
*pci
)
572 dmab
->dev
.dev
= NULL
; /* make it anonymous */
573 snd_dma_reserve_buf(dmab
, snd_dma_pci_buf_id(pci
));
578 static struct pci_device_id snd_hdsp_ids
[] = {
580 .vendor
= PCI_VENDOR_ID_XILINX
,
581 .device
= PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP
,
582 .subvendor
= PCI_ANY_ID
,
583 .subdevice
= PCI_ANY_ID
,
584 }, /* RME Hammerfall-DSP */
588 MODULE_DEVICE_TABLE(pci
, snd_hdsp_ids
);
591 static int snd_hdsp_create_alsa_devices(struct snd_card
*card
, struct hdsp
*hdsp
);
592 static int snd_hdsp_create_pcm(struct snd_card
*card
, struct hdsp
*hdsp
);
593 static int snd_hdsp_enable_io (struct hdsp
*hdsp
);
594 static void snd_hdsp_initialize_midi_flush (struct hdsp
*hdsp
);
595 static void snd_hdsp_initialize_channels (struct hdsp
*hdsp
);
596 static int hdsp_fifo_wait(struct hdsp
*hdsp
, int count
, int timeout
);
597 static int hdsp_autosync_ref(struct hdsp
*hdsp
);
598 static int snd_hdsp_set_defaults(struct hdsp
*hdsp
);
599 static void snd_hdsp_9652_enable_mixer (struct hdsp
*hdsp
);
601 static int hdsp_playback_to_output_key (struct hdsp
*hdsp
, int in
, int out
)
603 switch (hdsp
->firmware_rev
) {
605 return (64 * out
) + (32 + (in
));
609 return (32 * out
) + (16 + (in
));
611 return (52 * out
) + (26 + (in
));
615 static int hdsp_input_to_output_key (struct hdsp
*hdsp
, int in
, int out
)
617 switch (hdsp
->firmware_rev
) {
619 return (64 * out
) + in
;
623 return (32 * out
) + in
;
625 return (52 * out
) + in
;
629 static void hdsp_write(struct hdsp
*hdsp
, int reg
, int val
)
631 writel(val
, hdsp
->iobase
+ reg
);
634 static unsigned int hdsp_read(struct hdsp
*hdsp
, int reg
)
636 return readl (hdsp
->iobase
+ reg
);
639 static int hdsp_check_for_iobox (struct hdsp
*hdsp
)
642 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) return 0;
643 if (hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_ConfigError
) {
644 snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
645 hdsp
->state
&= ~HDSP_FirmwareLoaded
;
652 static int snd_hdsp_load_firmware_from_cache(struct hdsp
*hdsp
) {
657 if ((hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DllError
) != 0) {
659 snd_printk ("Hammerfall-DSP: loading firmware\n");
661 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_S_PROGRAM
);
662 hdsp_write (hdsp
, HDSP_fifoData
, 0);
664 if (hdsp_fifo_wait (hdsp
, 0, HDSP_LONG_WAIT
)) {
665 snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
669 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_S_LOAD
);
671 for (i
= 0; i
< 24413; ++i
) {
672 hdsp_write(hdsp
, HDSP_fifoData
, hdsp
->firmware_cache
[i
]);
673 if (hdsp_fifo_wait (hdsp
, 127, HDSP_LONG_WAIT
)) {
674 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
681 if (hdsp_fifo_wait (hdsp
, 0, HDSP_LONG_WAIT
)) {
682 snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
686 #ifdef SNDRV_BIG_ENDIAN
687 hdsp
->control2_register
= HDSP_BIGENDIAN_MODE
;
689 hdsp
->control2_register
= 0;
691 hdsp_write (hdsp
, HDSP_control2Reg
, hdsp
->control2_register
);
692 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
695 if (hdsp
->state
& HDSP_InitializationComplete
) {
696 snd_printk(KERN_INFO
"Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
697 spin_lock_irqsave(&hdsp
->lock
, flags
);
698 snd_hdsp_set_defaults(hdsp
);
699 spin_unlock_irqrestore(&hdsp
->lock
, flags
);
702 hdsp
->state
|= HDSP_FirmwareLoaded
;
707 static int hdsp_get_iobox_version (struct hdsp
*hdsp
)
709 if ((hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DllError
) != 0) {
711 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_PROGRAM
);
712 hdsp_write (hdsp
, HDSP_fifoData
, 0);
713 if (hdsp_fifo_wait (hdsp
, 0, HDSP_SHORT_WAIT
) < 0)
716 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_S_LOAD
);
717 hdsp_write (hdsp
, HDSP_fifoData
, 0);
719 if (hdsp_fifo_wait (hdsp
, 0, HDSP_SHORT_WAIT
)) {
720 hdsp
->io_type
= Multiface
;
721 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_VERSION_BIT
);
722 hdsp_write (hdsp
, HDSP_control2Reg
, HDSP_S_LOAD
);
723 hdsp_fifo_wait (hdsp
, 0, HDSP_SHORT_WAIT
);
725 hdsp
->io_type
= Digiface
;
728 /* firmware was already loaded, get iobox type */
729 if (hdsp_read(hdsp
, HDSP_status2Register
) & HDSP_version1
)
730 hdsp
->io_type
= Multiface
;
732 hdsp
->io_type
= Digiface
;
738 #ifdef HDSP_FW_LOADER
739 static int __devinit
hdsp_request_fw_loader(struct hdsp
*hdsp
);
742 static int hdsp_check_for_firmware (struct hdsp
*hdsp
, int load_on_demand
)
744 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
)
746 if ((hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DllError
) != 0) {
747 hdsp
->state
&= ~HDSP_FirmwareLoaded
;
748 if (! load_on_demand
)
750 snd_printk(KERN_ERR
"Hammerfall-DSP: firmware not present.\n");
751 /* try to load firmware */
752 if (! (hdsp
->state
& HDSP_FirmwareCached
)) {
753 #ifdef HDSP_FW_LOADER
754 if (! hdsp_request_fw_loader(hdsp
))
758 "Hammerfall-DSP: No firmware loaded nor "
759 "cached, please upload firmware.\n");
762 if (snd_hdsp_load_firmware_from_cache(hdsp
) != 0) {
764 "Hammerfall-DSP: Firmware loading from "
765 "cache failed, please upload manually.\n");
773 static int hdsp_fifo_wait(struct hdsp
*hdsp
, int count
, int timeout
)
777 /* the fifoStatus registers reports on how many words
778 are available in the command FIFO.
781 for (i
= 0; i
< timeout
; i
++) {
783 if ((int)(hdsp_read (hdsp
, HDSP_fifoStatus
) & 0xff) <= count
)
786 /* not very friendly, but we only do this during a firmware
787 load and changing the mixer, so we just put up with it.
793 snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
798 static int hdsp_read_gain (struct hdsp
*hdsp
, unsigned int addr
)
800 if (addr
>= HDSP_MATRIX_MIXER_SIZE
)
803 return hdsp
->mixer_matrix
[addr
];
806 static int hdsp_write_gain(struct hdsp
*hdsp
, unsigned int addr
, unsigned short data
)
810 if (addr
>= HDSP_MATRIX_MIXER_SIZE
)
813 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) {
815 /* from martin bjornsen:
817 "You can only write dwords to the
818 mixer memory which contain two
819 mixer values in the low and high
820 word. So if you want to change
821 value 0 you have to read value 1
822 from the cache and write both to
823 the first dword in the mixer
827 if (hdsp
->io_type
== H9632
&& addr
>= 512)
830 if (hdsp
->io_type
== H9652
&& addr
>= 1352)
833 hdsp
->mixer_matrix
[addr
] = data
;
836 /* `addr' addresses a 16-bit wide address, but
837 the address space accessed via hdsp_write
838 uses byte offsets. put another way, addr
839 varies from 0 to 1351, but to access the
840 corresponding memory location, we need
841 to access 0 to 2703 ...
845 hdsp_write (hdsp
, 4096 + (ad
*4),
846 (hdsp
->mixer_matrix
[(addr
&0x7fe)+1] << 16) +
847 hdsp
->mixer_matrix
[addr
&0x7fe]);
853 ad
= (addr
<< 16) + data
;
855 if (hdsp_fifo_wait(hdsp
, 127, HDSP_LONG_WAIT
))
858 hdsp_write (hdsp
, HDSP_fifoData
, ad
);
859 hdsp
->mixer_matrix
[addr
] = data
;
866 static int snd_hdsp_use_is_exclusive(struct hdsp
*hdsp
)
871 spin_lock_irqsave(&hdsp
->lock
, flags
);
872 if ((hdsp
->playback_pid
!= hdsp
->capture_pid
) &&
873 (hdsp
->playback_pid
>= 0) && (hdsp
->capture_pid
>= 0))
875 spin_unlock_irqrestore(&hdsp
->lock
, flags
);
879 static int hdsp_external_sample_rate (struct hdsp
*hdsp
)
881 unsigned int status2
= hdsp_read(hdsp
, HDSP_status2Register
);
882 unsigned int rate_bits
= status2
& HDSP_systemFrequencyMask
;
885 case HDSP_systemFrequency32
: return 32000;
886 case HDSP_systemFrequency44_1
: return 44100;
887 case HDSP_systemFrequency48
: return 48000;
888 case HDSP_systemFrequency64
: return 64000;
889 case HDSP_systemFrequency88_2
: return 88200;
890 case HDSP_systemFrequency96
: return 96000;
896 static int hdsp_spdif_sample_rate(struct hdsp
*hdsp
)
898 unsigned int status
= hdsp_read(hdsp
, HDSP_statusRegister
);
899 unsigned int rate_bits
= (status
& HDSP_spdifFrequencyMask
);
901 if (status
& HDSP_SPDIFErrorFlag
)
905 case HDSP_spdifFrequency32KHz
: return 32000;
906 case HDSP_spdifFrequency44_1KHz
: return 44100;
907 case HDSP_spdifFrequency48KHz
: return 48000;
908 case HDSP_spdifFrequency64KHz
: return 64000;
909 case HDSP_spdifFrequency88_2KHz
: return 88200;
910 case HDSP_spdifFrequency96KHz
: return 96000;
911 case HDSP_spdifFrequency128KHz
:
912 if (hdsp
->io_type
== H9632
) return 128000;
914 case HDSP_spdifFrequency176_4KHz
:
915 if (hdsp
->io_type
== H9632
) return 176400;
917 case HDSP_spdifFrequency192KHz
:
918 if (hdsp
->io_type
== H9632
) return 192000;
923 snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits
, status
);
927 static void hdsp_compute_period_size(struct hdsp
*hdsp
)
929 hdsp
->period_bytes
= 1 << ((hdsp_decode_latency(hdsp
->control_register
) + 8));
932 static snd_pcm_uframes_t
hdsp_hw_pointer(struct hdsp
*hdsp
)
936 position
= hdsp_read(hdsp
, HDSP_statusRegister
);
938 if (!hdsp
->precise_ptr
)
939 return (position
& HDSP_BufferID
) ? (hdsp
->period_bytes
/ 4) : 0;
941 position
&= HDSP_BufferPositionMask
;
943 position
&= (hdsp
->period_bytes
/2) - 1;
947 static void hdsp_reset_hw_pointer(struct hdsp
*hdsp
)
949 hdsp_write (hdsp
, HDSP_resetPointer
, 0);
950 if (hdsp
->io_type
== H9632
&& hdsp
->firmware_rev
>= 152)
951 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
952 * requires (?) to write again DDS value after a reset pointer
953 * (at least, it works like this) */
954 hdsp_write (hdsp
, HDSP_freqReg
, hdsp
->dds_value
);
957 static void hdsp_start_audio(struct hdsp
*s
)
959 s
->control_register
|= (HDSP_AudioInterruptEnable
| HDSP_Start
);
960 hdsp_write(s
, HDSP_controlRegister
, s
->control_register
);
963 static void hdsp_stop_audio(struct hdsp
*s
)
965 s
->control_register
&= ~(HDSP_Start
| HDSP_AudioInterruptEnable
);
966 hdsp_write(s
, HDSP_controlRegister
, s
->control_register
);
969 static void hdsp_silence_playback(struct hdsp
*hdsp
)
971 memset(hdsp
->playback_buffer
, 0, HDSP_DMA_AREA_BYTES
);
974 static int hdsp_set_interrupt_interval(struct hdsp
*s
, unsigned int frames
)
978 spin_lock_irq(&s
->lock
);
987 s
->control_register
&= ~HDSP_LatencyMask
;
988 s
->control_register
|= hdsp_encode_latency(n
);
990 hdsp_write(s
, HDSP_controlRegister
, s
->control_register
);
992 hdsp_compute_period_size(s
);
994 spin_unlock_irq(&s
->lock
);
999 static void hdsp_set_dds_value(struct hdsp
*hdsp
, int rate
)
1006 else if (rate
>= 56000)
1010 div64_32(&n
, rate
, &r
);
1011 /* n should be less than 2^32 for being written to FREQ register */
1012 snd_assert((n
>> 32) == 0);
1013 /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1014 value to write it after a reset */
1015 hdsp
->dds_value
= n
;
1016 hdsp_write(hdsp
, HDSP_freqReg
, hdsp
->dds_value
);
1019 static int hdsp_set_rate(struct hdsp
*hdsp
, int rate
, int called_internally
)
1021 int reject_if_open
= 0;
1025 /* ASSUMPTION: hdsp->lock is either held, or
1026 there is no need for it (e.g. during module
1030 if (!(hdsp
->control_register
& HDSP_ClockModeMaster
)) {
1031 if (called_internally
) {
1032 /* request from ctl or card initialization */
1033 snd_printk(KERN_ERR
"Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1036 /* hw_param request while in AutoSync mode */
1037 int external_freq
= hdsp_external_sample_rate(hdsp
);
1038 int spdif_freq
= hdsp_spdif_sample_rate(hdsp
);
1040 if ((spdif_freq
== external_freq
*2) && (hdsp_autosync_ref(hdsp
) >= HDSP_AUTOSYNC_FROM_ADAT1
))
1041 snd_printk(KERN_INFO
"Hammerfall-DSP: Detected ADAT in double speed mode\n");
1042 else if (hdsp
->io_type
== H9632
&& (spdif_freq
== external_freq
*4) && (hdsp_autosync_ref(hdsp
) >= HDSP_AUTOSYNC_FROM_ADAT1
))
1043 snd_printk(KERN_INFO
"Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1044 else if (rate
!= external_freq
) {
1045 snd_printk(KERN_INFO
"Hammerfall-DSP: No AutoSync source for requested rate\n");
1051 current_rate
= hdsp
->system_sample_rate
;
1053 /* Changing from a "single speed" to a "double speed" rate is
1054 not allowed if any substreams are open. This is because
1055 such a change causes a shift in the location of
1056 the DMA buffers and a reduction in the number of available
1059 Note that a similar but essentially insoluble problem
1060 exists for externally-driven rate changes. All we can do
1061 is to flag rate changes in the read/write routines. */
1063 if (rate
> 96000 && hdsp
->io_type
!= H9632
)
1068 if (current_rate
> 48000)
1070 rate_bits
= HDSP_Frequency32KHz
;
1073 if (current_rate
> 48000)
1075 rate_bits
= HDSP_Frequency44_1KHz
;
1078 if (current_rate
> 48000)
1080 rate_bits
= HDSP_Frequency48KHz
;
1083 if (current_rate
<= 48000 || current_rate
> 96000)
1085 rate_bits
= HDSP_Frequency64KHz
;
1088 if (current_rate
<= 48000 || current_rate
> 96000)
1090 rate_bits
= HDSP_Frequency88_2KHz
;
1093 if (current_rate
<= 48000 || current_rate
> 96000)
1095 rate_bits
= HDSP_Frequency96KHz
;
1098 if (current_rate
< 128000)
1100 rate_bits
= HDSP_Frequency128KHz
;
1103 if (current_rate
< 128000)
1105 rate_bits
= HDSP_Frequency176_4KHz
;
1108 if (current_rate
< 128000)
1110 rate_bits
= HDSP_Frequency192KHz
;
1116 if (reject_if_open
&& (hdsp
->capture_pid
>= 0 || hdsp
->playback_pid
>= 0)) {
1117 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1119 hdsp
->playback_pid
);
1123 hdsp
->control_register
&= ~HDSP_FrequencyMask
;
1124 hdsp
->control_register
|= rate_bits
;
1125 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1127 /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1128 if (hdsp
->io_type
== H9632
&& hdsp
->firmware_rev
>= 152)
1129 hdsp_set_dds_value(hdsp
, rate
);
1131 if (rate
>= 128000) {
1132 hdsp
->channel_map
= channel_map_H9632_qs
;
1133 } else if (rate
> 48000) {
1134 if (hdsp
->io_type
== H9632
)
1135 hdsp
->channel_map
= channel_map_H9632_ds
;
1137 hdsp
->channel_map
= channel_map_ds
;
1139 switch (hdsp
->io_type
) {
1141 hdsp
->channel_map
= channel_map_mf_ss
;
1145 hdsp
->channel_map
= channel_map_df_ss
;
1148 hdsp
->channel_map
= channel_map_H9632_ss
;
1151 /* should never happen */
1156 hdsp
->system_sample_rate
= rate
;
1161 /*----------------------------------------------------------------------------
1163 ----------------------------------------------------------------------------*/
1165 static unsigned char snd_hdsp_midi_read_byte (struct hdsp
*hdsp
, int id
)
1167 /* the hardware already does the relevant bit-mask with 0xff */
1169 return hdsp_read(hdsp
, HDSP_midiDataIn1
);
1171 return hdsp_read(hdsp
, HDSP_midiDataIn0
);
1174 static void snd_hdsp_midi_write_byte (struct hdsp
*hdsp
, int id
, int val
)
1176 /* the hardware already does the relevant bit-mask with 0xff */
1178 hdsp_write(hdsp
, HDSP_midiDataOut1
, val
);
1180 hdsp_write(hdsp
, HDSP_midiDataOut0
, val
);
1183 static int snd_hdsp_midi_input_available (struct hdsp
*hdsp
, int id
)
1186 return (hdsp_read(hdsp
, HDSP_midiStatusIn1
) & 0xff);
1188 return (hdsp_read(hdsp
, HDSP_midiStatusIn0
) & 0xff);
1191 static int snd_hdsp_midi_output_possible (struct hdsp
*hdsp
, int id
)
1193 int fifo_bytes_used
;
1196 fifo_bytes_used
= hdsp_read(hdsp
, HDSP_midiStatusOut1
) & 0xff;
1198 fifo_bytes_used
= hdsp_read(hdsp
, HDSP_midiStatusOut0
) & 0xff;
1200 if (fifo_bytes_used
< 128)
1201 return 128 - fifo_bytes_used
;
1206 static void snd_hdsp_flush_midi_input (struct hdsp
*hdsp
, int id
)
1208 while (snd_hdsp_midi_input_available (hdsp
, id
))
1209 snd_hdsp_midi_read_byte (hdsp
, id
);
1212 static int snd_hdsp_midi_output_write (struct hdsp_midi
*hmidi
)
1214 unsigned long flags
;
1218 unsigned char buf
[128];
1220 /* Output is not interrupt driven */
1222 spin_lock_irqsave (&hmidi
->lock
, flags
);
1223 if (hmidi
->output
) {
1224 if (!snd_rawmidi_transmit_empty (hmidi
->output
)) {
1225 if ((n_pending
= snd_hdsp_midi_output_possible (hmidi
->hdsp
, hmidi
->id
)) > 0) {
1226 if (n_pending
> (int)sizeof (buf
))
1227 n_pending
= sizeof (buf
);
1229 if ((to_write
= snd_rawmidi_transmit (hmidi
->output
, buf
, n_pending
)) > 0) {
1230 for (i
= 0; i
< to_write
; ++i
)
1231 snd_hdsp_midi_write_byte (hmidi
->hdsp
, hmidi
->id
, buf
[i
]);
1236 spin_unlock_irqrestore (&hmidi
->lock
, flags
);
1240 static int snd_hdsp_midi_input_read (struct hdsp_midi
*hmidi
)
1242 unsigned char buf
[128]; /* this buffer is designed to match the MIDI input FIFO size */
1243 unsigned long flags
;
1247 spin_lock_irqsave (&hmidi
->lock
, flags
);
1248 if ((n_pending
= snd_hdsp_midi_input_available (hmidi
->hdsp
, hmidi
->id
)) > 0) {
1250 if (n_pending
> (int)sizeof (buf
))
1251 n_pending
= sizeof (buf
);
1252 for (i
= 0; i
< n_pending
; ++i
)
1253 buf
[i
] = snd_hdsp_midi_read_byte (hmidi
->hdsp
, hmidi
->id
);
1255 snd_rawmidi_receive (hmidi
->input
, buf
, n_pending
);
1257 /* flush the MIDI input FIFO */
1259 snd_hdsp_midi_read_byte (hmidi
->hdsp
, hmidi
->id
);
1264 hmidi
->hdsp
->control_register
|= HDSP_Midi1InterruptEnable
;
1266 hmidi
->hdsp
->control_register
|= HDSP_Midi0InterruptEnable
;
1267 hdsp_write(hmidi
->hdsp
, HDSP_controlRegister
, hmidi
->hdsp
->control_register
);
1268 spin_unlock_irqrestore (&hmidi
->lock
, flags
);
1269 return snd_hdsp_midi_output_write (hmidi
);
1272 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream
*substream
, int up
)
1275 struct hdsp_midi
*hmidi
;
1276 unsigned long flags
;
1279 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1281 ie
= hmidi
->id
? HDSP_Midi1InterruptEnable
: HDSP_Midi0InterruptEnable
;
1282 spin_lock_irqsave (&hdsp
->lock
, flags
);
1284 if (!(hdsp
->control_register
& ie
)) {
1285 snd_hdsp_flush_midi_input (hdsp
, hmidi
->id
);
1286 hdsp
->control_register
|= ie
;
1289 hdsp
->control_register
&= ~ie
;
1290 tasklet_kill(&hdsp
->midi_tasklet
);
1293 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1294 spin_unlock_irqrestore (&hdsp
->lock
, flags
);
1297 static void snd_hdsp_midi_output_timer(unsigned long data
)
1299 struct hdsp_midi
*hmidi
= (struct hdsp_midi
*) data
;
1300 unsigned long flags
;
1302 snd_hdsp_midi_output_write(hmidi
);
1303 spin_lock_irqsave (&hmidi
->lock
, flags
);
1305 /* this does not bump hmidi->istimer, because the
1306 kernel automatically removed the timer when it
1307 expired, and we are now adding it back, thus
1308 leaving istimer wherever it was set before.
1311 if (hmidi
->istimer
) {
1312 hmidi
->timer
.expires
= 1 + jiffies
;
1313 add_timer(&hmidi
->timer
);
1316 spin_unlock_irqrestore (&hmidi
->lock
, flags
);
1319 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream
*substream
, int up
)
1321 struct hdsp_midi
*hmidi
;
1322 unsigned long flags
;
1324 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1325 spin_lock_irqsave (&hmidi
->lock
, flags
);
1327 if (!hmidi
->istimer
) {
1328 init_timer(&hmidi
->timer
);
1329 hmidi
->timer
.function
= snd_hdsp_midi_output_timer
;
1330 hmidi
->timer
.data
= (unsigned long) hmidi
;
1331 hmidi
->timer
.expires
= 1 + jiffies
;
1332 add_timer(&hmidi
->timer
);
1336 if (hmidi
->istimer
&& --hmidi
->istimer
<= 0)
1337 del_timer (&hmidi
->timer
);
1339 spin_unlock_irqrestore (&hmidi
->lock
, flags
);
1341 snd_hdsp_midi_output_write(hmidi
);
1344 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream
*substream
)
1346 struct hdsp_midi
*hmidi
;
1348 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1349 spin_lock_irq (&hmidi
->lock
);
1350 snd_hdsp_flush_midi_input (hmidi
->hdsp
, hmidi
->id
);
1351 hmidi
->input
= substream
;
1352 spin_unlock_irq (&hmidi
->lock
);
1357 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream
*substream
)
1359 struct hdsp_midi
*hmidi
;
1361 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1362 spin_lock_irq (&hmidi
->lock
);
1363 hmidi
->output
= substream
;
1364 spin_unlock_irq (&hmidi
->lock
);
1369 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream
*substream
)
1371 struct hdsp_midi
*hmidi
;
1373 snd_hdsp_midi_input_trigger (substream
, 0);
1375 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1376 spin_lock_irq (&hmidi
->lock
);
1377 hmidi
->input
= NULL
;
1378 spin_unlock_irq (&hmidi
->lock
);
1383 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream
*substream
)
1385 struct hdsp_midi
*hmidi
;
1387 snd_hdsp_midi_output_trigger (substream
, 0);
1389 hmidi
= (struct hdsp_midi
*) substream
->rmidi
->private_data
;
1390 spin_lock_irq (&hmidi
->lock
);
1391 hmidi
->output
= NULL
;
1392 spin_unlock_irq (&hmidi
->lock
);
1397 static struct snd_rawmidi_ops snd_hdsp_midi_output
=
1399 .open
= snd_hdsp_midi_output_open
,
1400 .close
= snd_hdsp_midi_output_close
,
1401 .trigger
= snd_hdsp_midi_output_trigger
,
1404 static struct snd_rawmidi_ops snd_hdsp_midi_input
=
1406 .open
= snd_hdsp_midi_input_open
,
1407 .close
= snd_hdsp_midi_input_close
,
1408 .trigger
= snd_hdsp_midi_input_trigger
,
1411 static int snd_hdsp_create_midi (struct snd_card
*card
, struct hdsp
*hdsp
, int id
)
1415 hdsp
->midi
[id
].id
= id
;
1416 hdsp
->midi
[id
].rmidi
= NULL
;
1417 hdsp
->midi
[id
].input
= NULL
;
1418 hdsp
->midi
[id
].output
= NULL
;
1419 hdsp
->midi
[id
].hdsp
= hdsp
;
1420 hdsp
->midi
[id
].istimer
= 0;
1421 hdsp
->midi
[id
].pending
= 0;
1422 spin_lock_init (&hdsp
->midi
[id
].lock
);
1424 sprintf (buf
, "%s MIDI %d", card
->shortname
, id
+1);
1425 if (snd_rawmidi_new (card
, buf
, id
, 1, 1, &hdsp
->midi
[id
].rmidi
) < 0)
1428 sprintf (hdsp
->midi
[id
].rmidi
->name
, "%s MIDI %d", card
->id
, id
+1);
1429 hdsp
->midi
[id
].rmidi
->private_data
= &hdsp
->midi
[id
];
1431 snd_rawmidi_set_ops (hdsp
->midi
[id
].rmidi
, SNDRV_RAWMIDI_STREAM_OUTPUT
, &snd_hdsp_midi_output
);
1432 snd_rawmidi_set_ops (hdsp
->midi
[id
].rmidi
, SNDRV_RAWMIDI_STREAM_INPUT
, &snd_hdsp_midi_input
);
1434 hdsp
->midi
[id
].rmidi
->info_flags
|= SNDRV_RAWMIDI_INFO_OUTPUT
|
1435 SNDRV_RAWMIDI_INFO_INPUT
|
1436 SNDRV_RAWMIDI_INFO_DUPLEX
;
1441 /*-----------------------------------------------------------------------------
1443 ----------------------------------------------------------------------------*/
1445 static u32
snd_hdsp_convert_from_aes(struct snd_aes_iec958
*aes
)
1448 val
|= (aes
->status
[0] & IEC958_AES0_PROFESSIONAL
) ? HDSP_SPDIFProfessional
: 0;
1449 val
|= (aes
->status
[0] & IEC958_AES0_NONAUDIO
) ? HDSP_SPDIFNonAudio
: 0;
1450 if (val
& HDSP_SPDIFProfessional
)
1451 val
|= (aes
->status
[0] & IEC958_AES0_PRO_EMPHASIS_5015
) ? HDSP_SPDIFEmphasis
: 0;
1453 val
|= (aes
->status
[0] & IEC958_AES0_CON_EMPHASIS_5015
) ? HDSP_SPDIFEmphasis
: 0;
1457 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958
*aes
, u32 val
)
1459 aes
->status
[0] = ((val
& HDSP_SPDIFProfessional
) ? IEC958_AES0_PROFESSIONAL
: 0) |
1460 ((val
& HDSP_SPDIFNonAudio
) ? IEC958_AES0_NONAUDIO
: 0);
1461 if (val
& HDSP_SPDIFProfessional
)
1462 aes
->status
[0] |= (val
& HDSP_SPDIFEmphasis
) ? IEC958_AES0_PRO_EMPHASIS_5015
: 0;
1464 aes
->status
[0] |= (val
& HDSP_SPDIFEmphasis
) ? IEC958_AES0_CON_EMPHASIS_5015
: 0;
1467 static int snd_hdsp_control_spdif_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1469 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1474 static int snd_hdsp_control_spdif_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1476 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1478 snd_hdsp_convert_to_aes(&ucontrol
->value
.iec958
, hdsp
->creg_spdif
);
1482 static int snd_hdsp_control_spdif_put(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1484 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1488 val
= snd_hdsp_convert_from_aes(&ucontrol
->value
.iec958
);
1489 spin_lock_irq(&hdsp
->lock
);
1490 change
= val
!= hdsp
->creg_spdif
;
1491 hdsp
->creg_spdif
= val
;
1492 spin_unlock_irq(&hdsp
->lock
);
1496 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1498 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1503 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1505 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1507 snd_hdsp_convert_to_aes(&ucontrol
->value
.iec958
, hdsp
->creg_spdif_stream
);
1511 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1513 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1517 val
= snd_hdsp_convert_from_aes(&ucontrol
->value
.iec958
);
1518 spin_lock_irq(&hdsp
->lock
);
1519 change
= val
!= hdsp
->creg_spdif_stream
;
1520 hdsp
->creg_spdif_stream
= val
;
1521 hdsp
->control_register
&= ~(HDSP_SPDIFProfessional
| HDSP_SPDIFNonAudio
| HDSP_SPDIFEmphasis
);
1522 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
|= val
);
1523 spin_unlock_irq(&hdsp
->lock
);
1527 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1529 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_IEC958
;
1534 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1536 ucontrol
->value
.iec958
.status
[0] = kcontrol
->private_value
;
1540 #define HDSP_SPDIF_IN(xname, xindex) \
1541 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1544 .info = snd_hdsp_info_spdif_in, \
1545 .get = snd_hdsp_get_spdif_in, \
1546 .put = snd_hdsp_put_spdif_in }
1548 static unsigned int hdsp_spdif_in(struct hdsp
*hdsp
)
1550 return hdsp_decode_spdif_in(hdsp
->control_register
& HDSP_SPDIFInputMask
);
1553 static int hdsp_set_spdif_input(struct hdsp
*hdsp
, int in
)
1555 hdsp
->control_register
&= ~HDSP_SPDIFInputMask
;
1556 hdsp
->control_register
|= hdsp_encode_spdif_in(in
);
1557 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1561 static int snd_hdsp_info_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1563 static char *texts
[4] = {"Optical", "Coaxial", "Internal", "AES"};
1564 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1566 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1568 uinfo
->value
.enumerated
.items
= ((hdsp
->io_type
== H9632
) ? 4 : 3);
1569 if (uinfo
->value
.enumerated
.item
> ((hdsp
->io_type
== H9632
) ? 3 : 2))
1570 uinfo
->value
.enumerated
.item
= ((hdsp
->io_type
== H9632
) ? 3 : 2);
1571 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
1575 static int snd_hdsp_get_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1577 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1579 ucontrol
->value
.enumerated
.item
[0] = hdsp_spdif_in(hdsp
);
1583 static int snd_hdsp_put_spdif_in(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1585 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1589 if (!snd_hdsp_use_is_exclusive(hdsp
))
1591 val
= ucontrol
->value
.enumerated
.item
[0] % ((hdsp
->io_type
== H9632
) ? 4 : 3);
1592 spin_lock_irq(&hdsp
->lock
);
1593 change
= val
!= hdsp_spdif_in(hdsp
);
1595 hdsp_set_spdif_input(hdsp
, val
);
1596 spin_unlock_irq(&hdsp
->lock
);
1600 #define HDSP_SPDIF_OUT(xname, xindex) \
1601 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1602 .info = snd_hdsp_info_spdif_bits, \
1603 .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1605 static int hdsp_spdif_out(struct hdsp
*hdsp
)
1607 return (hdsp
->control_register
& HDSP_SPDIFOpticalOut
) ? 1 : 0;
1610 static int hdsp_set_spdif_output(struct hdsp
*hdsp
, int out
)
1613 hdsp
->control_register
|= HDSP_SPDIFOpticalOut
;
1615 hdsp
->control_register
&= ~HDSP_SPDIFOpticalOut
;
1616 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1620 static int snd_hdsp_info_spdif_bits(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1622 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
1624 uinfo
->value
.integer
.min
= 0;
1625 uinfo
->value
.integer
.max
= 1;
1629 static int snd_hdsp_get_spdif_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1631 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1633 ucontrol
->value
.integer
.value
[0] = hdsp_spdif_out(hdsp
);
1637 static int snd_hdsp_put_spdif_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1639 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1643 if (!snd_hdsp_use_is_exclusive(hdsp
))
1645 val
= ucontrol
->value
.integer
.value
[0] & 1;
1646 spin_lock_irq(&hdsp
->lock
);
1647 change
= (int)val
!= hdsp_spdif_out(hdsp
);
1648 hdsp_set_spdif_output(hdsp
, val
);
1649 spin_unlock_irq(&hdsp
->lock
);
1653 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1654 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1655 .info = snd_hdsp_info_spdif_bits, \
1656 .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1658 static int hdsp_spdif_professional(struct hdsp
*hdsp
)
1660 return (hdsp
->control_register
& HDSP_SPDIFProfessional
) ? 1 : 0;
1663 static int hdsp_set_spdif_professional(struct hdsp
*hdsp
, int val
)
1666 hdsp
->control_register
|= HDSP_SPDIFProfessional
;
1668 hdsp
->control_register
&= ~HDSP_SPDIFProfessional
;
1669 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1673 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1675 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1677 ucontrol
->value
.integer
.value
[0] = hdsp_spdif_professional(hdsp
);
1681 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1683 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1687 if (!snd_hdsp_use_is_exclusive(hdsp
))
1689 val
= ucontrol
->value
.integer
.value
[0] & 1;
1690 spin_lock_irq(&hdsp
->lock
);
1691 change
= (int)val
!= hdsp_spdif_professional(hdsp
);
1692 hdsp_set_spdif_professional(hdsp
, val
);
1693 spin_unlock_irq(&hdsp
->lock
);
1697 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1698 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1699 .info = snd_hdsp_info_spdif_bits, \
1700 .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1702 static int hdsp_spdif_emphasis(struct hdsp
*hdsp
)
1704 return (hdsp
->control_register
& HDSP_SPDIFEmphasis
) ? 1 : 0;
1707 static int hdsp_set_spdif_emphasis(struct hdsp
*hdsp
, int val
)
1710 hdsp
->control_register
|= HDSP_SPDIFEmphasis
;
1712 hdsp
->control_register
&= ~HDSP_SPDIFEmphasis
;
1713 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1717 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1719 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1721 ucontrol
->value
.integer
.value
[0] = hdsp_spdif_emphasis(hdsp
);
1725 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1727 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1731 if (!snd_hdsp_use_is_exclusive(hdsp
))
1733 val
= ucontrol
->value
.integer
.value
[0] & 1;
1734 spin_lock_irq(&hdsp
->lock
);
1735 change
= (int)val
!= hdsp_spdif_emphasis(hdsp
);
1736 hdsp_set_spdif_emphasis(hdsp
, val
);
1737 spin_unlock_irq(&hdsp
->lock
);
1741 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1742 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1743 .info = snd_hdsp_info_spdif_bits, \
1744 .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1746 static int hdsp_spdif_nonaudio(struct hdsp
*hdsp
)
1748 return (hdsp
->control_register
& HDSP_SPDIFNonAudio
) ? 1 : 0;
1751 static int hdsp_set_spdif_nonaudio(struct hdsp
*hdsp
, int val
)
1754 hdsp
->control_register
|= HDSP_SPDIFNonAudio
;
1756 hdsp
->control_register
&= ~HDSP_SPDIFNonAudio
;
1757 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
1761 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1763 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1765 ucontrol
->value
.integer
.value
[0] = hdsp_spdif_nonaudio(hdsp
);
1769 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1771 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1775 if (!snd_hdsp_use_is_exclusive(hdsp
))
1777 val
= ucontrol
->value
.integer
.value
[0] & 1;
1778 spin_lock_irq(&hdsp
->lock
);
1779 change
= (int)val
!= hdsp_spdif_nonaudio(hdsp
);
1780 hdsp_set_spdif_nonaudio(hdsp
, val
);
1781 spin_unlock_irq(&hdsp
->lock
);
1785 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1786 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1789 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1790 .info = snd_hdsp_info_spdif_sample_rate, \
1791 .get = snd_hdsp_get_spdif_sample_rate \
1794 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1796 static char *texts
[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1797 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1799 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1801 uinfo
->value
.enumerated
.items
= (hdsp
->io_type
== H9632
) ? 10 : 7;
1802 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
1803 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
1804 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
1808 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1810 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1812 switch (hdsp_spdif_sample_rate(hdsp
)) {
1814 ucontrol
->value
.enumerated
.item
[0] = 0;
1817 ucontrol
->value
.enumerated
.item
[0] = 1;
1820 ucontrol
->value
.enumerated
.item
[0] = 2;
1823 ucontrol
->value
.enumerated
.item
[0] = 3;
1826 ucontrol
->value
.enumerated
.item
[0] = 4;
1829 ucontrol
->value
.enumerated
.item
[0] = 5;
1832 ucontrol
->value
.enumerated
.item
[0] = 7;
1835 ucontrol
->value
.enumerated
.item
[0] = 8;
1838 ucontrol
->value
.enumerated
.item
[0] = 9;
1841 ucontrol
->value
.enumerated
.item
[0] = 6;
1846 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1847 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1850 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1851 .info = snd_hdsp_info_system_sample_rate, \
1852 .get = snd_hdsp_get_system_sample_rate \
1855 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1857 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
1862 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1864 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1866 ucontrol
->value
.enumerated
.item
[0] = hdsp
->system_sample_rate
;
1870 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1871 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1874 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1875 .info = snd_hdsp_info_autosync_sample_rate, \
1876 .get = snd_hdsp_get_autosync_sample_rate \
1879 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1881 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1882 static char *texts
[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1883 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1885 uinfo
->value
.enumerated
.items
= (hdsp
->io_type
== H9632
) ? 10 : 7 ;
1886 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
1887 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
1888 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
1892 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1894 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1896 switch (hdsp_external_sample_rate(hdsp
)) {
1898 ucontrol
->value
.enumerated
.item
[0] = 0;
1901 ucontrol
->value
.enumerated
.item
[0] = 1;
1904 ucontrol
->value
.enumerated
.item
[0] = 2;
1907 ucontrol
->value
.enumerated
.item
[0] = 3;
1910 ucontrol
->value
.enumerated
.item
[0] = 4;
1913 ucontrol
->value
.enumerated
.item
[0] = 5;
1916 ucontrol
->value
.enumerated
.item
[0] = 7;
1919 ucontrol
->value
.enumerated
.item
[0] = 8;
1922 ucontrol
->value
.enumerated
.item
[0] = 9;
1925 ucontrol
->value
.enumerated
.item
[0] = 6;
1930 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1931 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1934 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1935 .info = snd_hdsp_info_system_clock_mode, \
1936 .get = snd_hdsp_get_system_clock_mode \
1939 static int hdsp_system_clock_mode(struct hdsp
*hdsp
)
1941 if (hdsp
->control_register
& HDSP_ClockModeMaster
)
1943 else if (hdsp_external_sample_rate(hdsp
) != hdsp
->system_sample_rate
)
1948 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
1950 static char *texts
[] = {"Master", "Slave" };
1952 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
1954 uinfo
->value
.enumerated
.items
= 2;
1955 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
1956 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
1957 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
1961 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
1963 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
1965 ucontrol
->value
.enumerated
.item
[0] = hdsp_system_clock_mode(hdsp
);
1969 #define HDSP_CLOCK_SOURCE(xname, xindex) \
1970 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1973 .info = snd_hdsp_info_clock_source, \
1974 .get = snd_hdsp_get_clock_source, \
1975 .put = snd_hdsp_put_clock_source \
1978 static int hdsp_clock_source(struct hdsp
*hdsp
)
1980 if (hdsp
->control_register
& HDSP_ClockModeMaster
) {
1981 switch (hdsp
->system_sample_rate
) {
2008 static int hdsp_set_clock_source(struct hdsp
*hdsp
, int mode
)
2012 case HDSP_CLOCK_SOURCE_AUTOSYNC
:
2013 if (hdsp_external_sample_rate(hdsp
) != 0) {
2014 if (!hdsp_set_rate(hdsp
, hdsp_external_sample_rate(hdsp
), 1)) {
2015 hdsp
->control_register
&= ~HDSP_ClockModeMaster
;
2016 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2021 case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ
:
2024 case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ
:
2027 case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ
:
2030 case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ
:
2033 case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ
:
2036 case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ
:
2039 case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ
:
2042 case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ
:
2045 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ
:
2051 hdsp
->control_register
|= HDSP_ClockModeMaster
;
2052 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2053 hdsp_set_rate(hdsp
, rate
, 1);
2057 static int snd_hdsp_info_clock_source(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2059 static char *texts
[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2060 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2062 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2064 if (hdsp
->io_type
== H9632
)
2065 uinfo
->value
.enumerated
.items
= 10;
2067 uinfo
->value
.enumerated
.items
= 7;
2068 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2069 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2070 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2074 static int snd_hdsp_get_clock_source(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2076 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2078 ucontrol
->value
.enumerated
.item
[0] = hdsp_clock_source(hdsp
);
2082 static int snd_hdsp_put_clock_source(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2084 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2088 if (!snd_hdsp_use_is_exclusive(hdsp
))
2090 val
= ucontrol
->value
.enumerated
.item
[0];
2091 if (val
< 0) val
= 0;
2092 if (hdsp
->io_type
== H9632
) {
2099 spin_lock_irq(&hdsp
->lock
);
2100 if (val
!= hdsp_clock_source(hdsp
))
2101 change
= (hdsp_set_clock_source(hdsp
, val
) == 0) ? 1 : 0;
2104 spin_unlock_irq(&hdsp
->lock
);
2108 static int snd_hdsp_info_clock_source_lock(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2110 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2112 uinfo
->value
.integer
.min
= 0;
2113 uinfo
->value
.integer
.max
= 1;
2117 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2119 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2121 ucontrol
->value
.integer
.value
[0] = hdsp
->clock_source_locked
;
2125 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2127 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2130 change
= (int)ucontrol
->value
.integer
.value
[0] != hdsp
->clock_source_locked
;
2132 hdsp
->clock_source_locked
= ucontrol
->value
.integer
.value
[0];
2136 #define HDSP_DA_GAIN(xname, xindex) \
2137 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2140 .info = snd_hdsp_info_da_gain, \
2141 .get = snd_hdsp_get_da_gain, \
2142 .put = snd_hdsp_put_da_gain \
2145 static int hdsp_da_gain(struct hdsp
*hdsp
)
2147 switch (hdsp
->control_register
& HDSP_DAGainMask
) {
2148 case HDSP_DAGainHighGain
:
2150 case HDSP_DAGainPlus4dBu
:
2152 case HDSP_DAGainMinus10dBV
:
2159 static int hdsp_set_da_gain(struct hdsp
*hdsp
, int mode
)
2161 hdsp
->control_register
&= ~HDSP_DAGainMask
;
2164 hdsp
->control_register
|= HDSP_DAGainHighGain
;
2167 hdsp
->control_register
|= HDSP_DAGainPlus4dBu
;
2170 hdsp
->control_register
|= HDSP_DAGainMinus10dBV
;
2176 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2180 static int snd_hdsp_info_da_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2182 static char *texts
[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2184 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2186 uinfo
->value
.enumerated
.items
= 3;
2187 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2188 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2189 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2193 static int snd_hdsp_get_da_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2195 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2197 ucontrol
->value
.enumerated
.item
[0] = hdsp_da_gain(hdsp
);
2201 static int snd_hdsp_put_da_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2203 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2207 if (!snd_hdsp_use_is_exclusive(hdsp
))
2209 val
= ucontrol
->value
.enumerated
.item
[0];
2210 if (val
< 0) val
= 0;
2211 if (val
> 2) val
= 2;
2212 spin_lock_irq(&hdsp
->lock
);
2213 if (val
!= hdsp_da_gain(hdsp
))
2214 change
= (hdsp_set_da_gain(hdsp
, val
) == 0) ? 1 : 0;
2217 spin_unlock_irq(&hdsp
->lock
);
2221 #define HDSP_AD_GAIN(xname, xindex) \
2222 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2225 .info = snd_hdsp_info_ad_gain, \
2226 .get = snd_hdsp_get_ad_gain, \
2227 .put = snd_hdsp_put_ad_gain \
2230 static int hdsp_ad_gain(struct hdsp
*hdsp
)
2232 switch (hdsp
->control_register
& HDSP_ADGainMask
) {
2233 case HDSP_ADGainMinus10dBV
:
2235 case HDSP_ADGainPlus4dBu
:
2237 case HDSP_ADGainLowGain
:
2244 static int hdsp_set_ad_gain(struct hdsp
*hdsp
, int mode
)
2246 hdsp
->control_register
&= ~HDSP_ADGainMask
;
2249 hdsp
->control_register
|= HDSP_ADGainMinus10dBV
;
2252 hdsp
->control_register
|= HDSP_ADGainPlus4dBu
;
2255 hdsp
->control_register
|= HDSP_ADGainLowGain
;
2261 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2265 static int snd_hdsp_info_ad_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2267 static char *texts
[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2269 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2271 uinfo
->value
.enumerated
.items
= 3;
2272 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2273 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2274 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2278 static int snd_hdsp_get_ad_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2280 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2282 ucontrol
->value
.enumerated
.item
[0] = hdsp_ad_gain(hdsp
);
2286 static int snd_hdsp_put_ad_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2288 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2292 if (!snd_hdsp_use_is_exclusive(hdsp
))
2294 val
= ucontrol
->value
.enumerated
.item
[0];
2295 if (val
< 0) val
= 0;
2296 if (val
> 2) val
= 2;
2297 spin_lock_irq(&hdsp
->lock
);
2298 if (val
!= hdsp_ad_gain(hdsp
))
2299 change
= (hdsp_set_ad_gain(hdsp
, val
) == 0) ? 1 : 0;
2302 spin_unlock_irq(&hdsp
->lock
);
2306 #define HDSP_PHONE_GAIN(xname, xindex) \
2307 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2310 .info = snd_hdsp_info_phone_gain, \
2311 .get = snd_hdsp_get_phone_gain, \
2312 .put = snd_hdsp_put_phone_gain \
2315 static int hdsp_phone_gain(struct hdsp
*hdsp
)
2317 switch (hdsp
->control_register
& HDSP_PhoneGainMask
) {
2318 case HDSP_PhoneGain0dB
:
2320 case HDSP_PhoneGainMinus6dB
:
2322 case HDSP_PhoneGainMinus12dB
:
2329 static int hdsp_set_phone_gain(struct hdsp
*hdsp
, int mode
)
2331 hdsp
->control_register
&= ~HDSP_PhoneGainMask
;
2334 hdsp
->control_register
|= HDSP_PhoneGain0dB
;
2337 hdsp
->control_register
|= HDSP_PhoneGainMinus6dB
;
2340 hdsp
->control_register
|= HDSP_PhoneGainMinus12dB
;
2346 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2350 static int snd_hdsp_info_phone_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2352 static char *texts
[] = {"0 dB", "-6 dB", "-12 dB"};
2354 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2356 uinfo
->value
.enumerated
.items
= 3;
2357 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2358 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2359 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2363 static int snd_hdsp_get_phone_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2365 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2367 ucontrol
->value
.enumerated
.item
[0] = hdsp_phone_gain(hdsp
);
2371 static int snd_hdsp_put_phone_gain(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2373 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2377 if (!snd_hdsp_use_is_exclusive(hdsp
))
2379 val
= ucontrol
->value
.enumerated
.item
[0];
2380 if (val
< 0) val
= 0;
2381 if (val
> 2) val
= 2;
2382 spin_lock_irq(&hdsp
->lock
);
2383 if (val
!= hdsp_phone_gain(hdsp
))
2384 change
= (hdsp_set_phone_gain(hdsp
, val
) == 0) ? 1 : 0;
2387 spin_unlock_irq(&hdsp
->lock
);
2391 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2392 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2395 .info = snd_hdsp_info_xlr_breakout_cable, \
2396 .get = snd_hdsp_get_xlr_breakout_cable, \
2397 .put = snd_hdsp_put_xlr_breakout_cable \
2400 static int hdsp_xlr_breakout_cable(struct hdsp
*hdsp
)
2402 if (hdsp
->control_register
& HDSP_XLRBreakoutCable
)
2407 static int hdsp_set_xlr_breakout_cable(struct hdsp
*hdsp
, int mode
)
2410 hdsp
->control_register
|= HDSP_XLRBreakoutCable
;
2412 hdsp
->control_register
&= ~HDSP_XLRBreakoutCable
;
2413 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2417 static int snd_hdsp_info_xlr_breakout_cable(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2419 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2421 uinfo
->value
.integer
.min
= 0;
2422 uinfo
->value
.integer
.max
= 1;
2426 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2428 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2430 ucontrol
->value
.enumerated
.item
[0] = hdsp_xlr_breakout_cable(hdsp
);
2434 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2436 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2440 if (!snd_hdsp_use_is_exclusive(hdsp
))
2442 val
= ucontrol
->value
.integer
.value
[0] & 1;
2443 spin_lock_irq(&hdsp
->lock
);
2444 change
= (int)val
!= hdsp_xlr_breakout_cable(hdsp
);
2445 hdsp_set_xlr_breakout_cable(hdsp
, val
);
2446 spin_unlock_irq(&hdsp
->lock
);
2450 /* (De)activates old RME Analog Extension Board
2451 These are connected to the internal ADAT connector
2452 Switching this on desactivates external ADAT
2454 #define HDSP_AEB(xname, xindex) \
2455 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2458 .info = snd_hdsp_info_aeb, \
2459 .get = snd_hdsp_get_aeb, \
2460 .put = snd_hdsp_put_aeb \
2463 static int hdsp_aeb(struct hdsp
*hdsp
)
2465 if (hdsp
->control_register
& HDSP_AnalogExtensionBoard
)
2470 static int hdsp_set_aeb(struct hdsp
*hdsp
, int mode
)
2473 hdsp
->control_register
|= HDSP_AnalogExtensionBoard
;
2475 hdsp
->control_register
&= ~HDSP_AnalogExtensionBoard
;
2476 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2480 static int snd_hdsp_info_aeb(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2482 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2484 uinfo
->value
.integer
.min
= 0;
2485 uinfo
->value
.integer
.max
= 1;
2489 static int snd_hdsp_get_aeb(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2491 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2493 ucontrol
->value
.enumerated
.item
[0] = hdsp_aeb(hdsp
);
2497 static int snd_hdsp_put_aeb(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2499 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2503 if (!snd_hdsp_use_is_exclusive(hdsp
))
2505 val
= ucontrol
->value
.integer
.value
[0] & 1;
2506 spin_lock_irq(&hdsp
->lock
);
2507 change
= (int)val
!= hdsp_aeb(hdsp
);
2508 hdsp_set_aeb(hdsp
, val
);
2509 spin_unlock_irq(&hdsp
->lock
);
2513 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2514 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2517 .info = snd_hdsp_info_pref_sync_ref, \
2518 .get = snd_hdsp_get_pref_sync_ref, \
2519 .put = snd_hdsp_put_pref_sync_ref \
2522 static int hdsp_pref_sync_ref(struct hdsp
*hdsp
)
2524 /* Notice that this looks at the requested sync source,
2525 not the one actually in use.
2528 switch (hdsp
->control_register
& HDSP_SyncRefMask
) {
2529 case HDSP_SyncRef_ADAT1
:
2530 return HDSP_SYNC_FROM_ADAT1
;
2531 case HDSP_SyncRef_ADAT2
:
2532 return HDSP_SYNC_FROM_ADAT2
;
2533 case HDSP_SyncRef_ADAT3
:
2534 return HDSP_SYNC_FROM_ADAT3
;
2535 case HDSP_SyncRef_SPDIF
:
2536 return HDSP_SYNC_FROM_SPDIF
;
2537 case HDSP_SyncRef_WORD
:
2538 return HDSP_SYNC_FROM_WORD
;
2539 case HDSP_SyncRef_ADAT_SYNC
:
2540 return HDSP_SYNC_FROM_ADAT_SYNC
;
2542 return HDSP_SYNC_FROM_WORD
;
2547 static int hdsp_set_pref_sync_ref(struct hdsp
*hdsp
, int pref
)
2549 hdsp
->control_register
&= ~HDSP_SyncRefMask
;
2551 case HDSP_SYNC_FROM_ADAT1
:
2552 hdsp
->control_register
&= ~HDSP_SyncRefMask
; /* clear SyncRef bits */
2554 case HDSP_SYNC_FROM_ADAT2
:
2555 hdsp
->control_register
|= HDSP_SyncRef_ADAT2
;
2557 case HDSP_SYNC_FROM_ADAT3
:
2558 hdsp
->control_register
|= HDSP_SyncRef_ADAT3
;
2560 case HDSP_SYNC_FROM_SPDIF
:
2561 hdsp
->control_register
|= HDSP_SyncRef_SPDIF
;
2563 case HDSP_SYNC_FROM_WORD
:
2564 hdsp
->control_register
|= HDSP_SyncRef_WORD
;
2566 case HDSP_SYNC_FROM_ADAT_SYNC
:
2567 hdsp
->control_register
|= HDSP_SyncRef_ADAT_SYNC
;
2572 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2576 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2578 static char *texts
[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2579 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2581 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2584 switch (hdsp
->io_type
) {
2587 uinfo
->value
.enumerated
.items
= 6;
2590 uinfo
->value
.enumerated
.items
= 4;
2593 uinfo
->value
.enumerated
.items
= 3;
2596 uinfo
->value
.enumerated
.items
= 0;
2600 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2601 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2602 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2606 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2608 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2610 ucontrol
->value
.enumerated
.item
[0] = hdsp_pref_sync_ref(hdsp
);
2614 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2616 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2620 if (!snd_hdsp_use_is_exclusive(hdsp
))
2623 switch (hdsp
->io_type
) {
2638 val
= ucontrol
->value
.enumerated
.item
[0] % max
;
2639 spin_lock_irq(&hdsp
->lock
);
2640 change
= (int)val
!= hdsp_pref_sync_ref(hdsp
);
2641 hdsp_set_pref_sync_ref(hdsp
, val
);
2642 spin_unlock_irq(&hdsp
->lock
);
2646 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2647 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2650 .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2651 .info = snd_hdsp_info_autosync_ref, \
2652 .get = snd_hdsp_get_autosync_ref, \
2655 static int hdsp_autosync_ref(struct hdsp
*hdsp
)
2657 /* This looks at the autosync selected sync reference */
2658 unsigned int status2
= hdsp_read(hdsp
, HDSP_status2Register
);
2660 switch (status2
& HDSP_SelSyncRefMask
) {
2661 case HDSP_SelSyncRef_WORD
:
2662 return HDSP_AUTOSYNC_FROM_WORD
;
2663 case HDSP_SelSyncRef_ADAT_SYNC
:
2664 return HDSP_AUTOSYNC_FROM_ADAT_SYNC
;
2665 case HDSP_SelSyncRef_SPDIF
:
2666 return HDSP_AUTOSYNC_FROM_SPDIF
;
2667 case HDSP_SelSyncRefMask
:
2668 return HDSP_AUTOSYNC_FROM_NONE
;
2669 case HDSP_SelSyncRef_ADAT1
:
2670 return HDSP_AUTOSYNC_FROM_ADAT1
;
2671 case HDSP_SelSyncRef_ADAT2
:
2672 return HDSP_AUTOSYNC_FROM_ADAT2
;
2673 case HDSP_SelSyncRef_ADAT3
:
2674 return HDSP_AUTOSYNC_FROM_ADAT3
;
2676 return HDSP_AUTOSYNC_FROM_WORD
;
2681 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2683 static char *texts
[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2685 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2687 uinfo
->value
.enumerated
.items
= 7;
2688 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2689 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2690 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2694 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2696 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2698 ucontrol
->value
.enumerated
.item
[0] = hdsp_autosync_ref(hdsp
);
2702 #define HDSP_LINE_OUT(xname, xindex) \
2703 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2706 .info = snd_hdsp_info_line_out, \
2707 .get = snd_hdsp_get_line_out, \
2708 .put = snd_hdsp_put_line_out \
2711 static int hdsp_line_out(struct hdsp
*hdsp
)
2713 return (hdsp
->control_register
& HDSP_LineOut
) ? 1 : 0;
2716 static int hdsp_set_line_output(struct hdsp
*hdsp
, int out
)
2719 hdsp
->control_register
|= HDSP_LineOut
;
2721 hdsp
->control_register
&= ~HDSP_LineOut
;
2722 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
2726 static int snd_hdsp_info_line_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2728 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2730 uinfo
->value
.integer
.min
= 0;
2731 uinfo
->value
.integer
.max
= 1;
2735 static int snd_hdsp_get_line_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2737 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2739 spin_lock_irq(&hdsp
->lock
);
2740 ucontrol
->value
.integer
.value
[0] = hdsp_line_out(hdsp
);
2741 spin_unlock_irq(&hdsp
->lock
);
2745 static int snd_hdsp_put_line_out(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2747 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2751 if (!snd_hdsp_use_is_exclusive(hdsp
))
2753 val
= ucontrol
->value
.integer
.value
[0] & 1;
2754 spin_lock_irq(&hdsp
->lock
);
2755 change
= (int)val
!= hdsp_line_out(hdsp
);
2756 hdsp_set_line_output(hdsp
, val
);
2757 spin_unlock_irq(&hdsp
->lock
);
2761 #define HDSP_PRECISE_POINTER(xname, xindex) \
2762 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2765 .info = snd_hdsp_info_precise_pointer, \
2766 .get = snd_hdsp_get_precise_pointer, \
2767 .put = snd_hdsp_put_precise_pointer \
2770 static int hdsp_set_precise_pointer(struct hdsp
*hdsp
, int precise
)
2773 hdsp
->precise_ptr
= 1;
2775 hdsp
->precise_ptr
= 0;
2779 static int snd_hdsp_info_precise_pointer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2781 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2783 uinfo
->value
.integer
.min
= 0;
2784 uinfo
->value
.integer
.max
= 1;
2788 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2790 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2792 spin_lock_irq(&hdsp
->lock
);
2793 ucontrol
->value
.integer
.value
[0] = hdsp
->precise_ptr
;
2794 spin_unlock_irq(&hdsp
->lock
);
2798 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2800 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2804 if (!snd_hdsp_use_is_exclusive(hdsp
))
2806 val
= ucontrol
->value
.integer
.value
[0] & 1;
2807 spin_lock_irq(&hdsp
->lock
);
2808 change
= (int)val
!= hdsp
->precise_ptr
;
2809 hdsp_set_precise_pointer(hdsp
, val
);
2810 spin_unlock_irq(&hdsp
->lock
);
2814 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2815 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2818 .info = snd_hdsp_info_use_midi_tasklet, \
2819 .get = snd_hdsp_get_use_midi_tasklet, \
2820 .put = snd_hdsp_put_use_midi_tasklet \
2823 static int hdsp_set_use_midi_tasklet(struct hdsp
*hdsp
, int use_tasklet
)
2826 hdsp
->use_midi_tasklet
= 1;
2828 hdsp
->use_midi_tasklet
= 0;
2832 static int snd_hdsp_info_use_midi_tasklet(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2834 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BOOLEAN
;
2836 uinfo
->value
.integer
.min
= 0;
2837 uinfo
->value
.integer
.max
= 1;
2841 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2843 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2845 spin_lock_irq(&hdsp
->lock
);
2846 ucontrol
->value
.integer
.value
[0] = hdsp
->use_midi_tasklet
;
2847 spin_unlock_irq(&hdsp
->lock
);
2851 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2853 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2857 if (!snd_hdsp_use_is_exclusive(hdsp
))
2859 val
= ucontrol
->value
.integer
.value
[0] & 1;
2860 spin_lock_irq(&hdsp
->lock
);
2861 change
= (int)val
!= hdsp
->use_midi_tasklet
;
2862 hdsp_set_use_midi_tasklet(hdsp
, val
);
2863 spin_unlock_irq(&hdsp
->lock
);
2867 #define HDSP_MIXER(xname, xindex) \
2868 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2872 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2873 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2874 .info = snd_hdsp_info_mixer, \
2875 .get = snd_hdsp_get_mixer, \
2876 .put = snd_hdsp_put_mixer \
2879 static int snd_hdsp_info_mixer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2881 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
2883 uinfo
->value
.integer
.min
= 0;
2884 uinfo
->value
.integer
.max
= 65536;
2885 uinfo
->value
.integer
.step
= 1;
2889 static int snd_hdsp_get_mixer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2891 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2896 source
= ucontrol
->value
.integer
.value
[0];
2897 destination
= ucontrol
->value
.integer
.value
[1];
2899 if (source
>= hdsp
->max_channels
)
2900 addr
= hdsp_playback_to_output_key(hdsp
,source
-hdsp
->max_channels
,destination
);
2902 addr
= hdsp_input_to_output_key(hdsp
,source
, destination
);
2904 spin_lock_irq(&hdsp
->lock
);
2905 ucontrol
->value
.integer
.value
[2] = hdsp_read_gain (hdsp
, addr
);
2906 spin_unlock_irq(&hdsp
->lock
);
2910 static int snd_hdsp_put_mixer(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2912 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2919 if (!snd_hdsp_use_is_exclusive(hdsp
))
2922 source
= ucontrol
->value
.integer
.value
[0];
2923 destination
= ucontrol
->value
.integer
.value
[1];
2925 if (source
>= hdsp
->max_channels
)
2926 addr
= hdsp_playback_to_output_key(hdsp
,source
-hdsp
->max_channels
, destination
);
2928 addr
= hdsp_input_to_output_key(hdsp
,source
, destination
);
2930 gain
= ucontrol
->value
.integer
.value
[2];
2932 spin_lock_irq(&hdsp
->lock
);
2933 change
= gain
!= hdsp_read_gain(hdsp
, addr
);
2935 hdsp_write_gain(hdsp
, addr
, gain
);
2936 spin_unlock_irq(&hdsp
->lock
);
2940 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2941 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2944 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2945 .info = snd_hdsp_info_sync_check, \
2946 .get = snd_hdsp_get_wc_sync_check \
2949 static int snd_hdsp_info_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
2951 static char *texts
[] = {"No Lock", "Lock", "Sync" };
2952 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_ENUMERATED
;
2954 uinfo
->value
.enumerated
.items
= 3;
2955 if (uinfo
->value
.enumerated
.item
>= uinfo
->value
.enumerated
.items
)
2956 uinfo
->value
.enumerated
.item
= uinfo
->value
.enumerated
.items
- 1;
2957 strcpy(uinfo
->value
.enumerated
.name
, texts
[uinfo
->value
.enumerated
.item
]);
2961 static int hdsp_wc_sync_check(struct hdsp
*hdsp
)
2963 int status2
= hdsp_read(hdsp
, HDSP_status2Register
);
2964 if (status2
& HDSP_wc_lock
) {
2965 if (status2
& HDSP_wc_sync
)
2974 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
2976 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
2978 ucontrol
->value
.enumerated
.item
[0] = hdsp_wc_sync_check(hdsp
);
2982 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2983 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2986 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2987 .info = snd_hdsp_info_sync_check, \
2988 .get = snd_hdsp_get_spdif_sync_check \
2991 static int hdsp_spdif_sync_check(struct hdsp
*hdsp
)
2993 int status
= hdsp_read(hdsp
, HDSP_statusRegister
);
2994 if (status
& HDSP_SPDIFErrorFlag
)
2997 if (status
& HDSP_SPDIFSync
)
3005 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
3007 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
3009 ucontrol
->value
.enumerated
.item
[0] = hdsp_spdif_sync_check(hdsp
);
3013 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3014 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3017 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3018 .info = snd_hdsp_info_sync_check, \
3019 .get = snd_hdsp_get_adatsync_sync_check \
3022 static int hdsp_adatsync_sync_check(struct hdsp
*hdsp
)
3024 int status
= hdsp_read(hdsp
, HDSP_statusRegister
);
3025 if (status
& HDSP_TimecodeLock
) {
3026 if (status
& HDSP_TimecodeSync
)
3034 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
3036 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
3038 ucontrol
->value
.enumerated
.item
[0] = hdsp_adatsync_sync_check(hdsp
);
3042 #define HDSP_ADAT_SYNC_CHECK \
3043 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3044 .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3045 .info = snd_hdsp_info_sync_check, \
3046 .get = snd_hdsp_get_adat_sync_check \
3049 static int hdsp_adat_sync_check(struct hdsp
*hdsp
, int idx
)
3051 int status
= hdsp_read(hdsp
, HDSP_statusRegister
);
3053 if (status
& (HDSP_Lock0
>>idx
)) {
3054 if (status
& (HDSP_Sync0
>>idx
))
3062 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
3065 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
3067 offset
= ucontrol
->id
.index
- 1;
3068 snd_assert(offset
>= 0);
3070 switch (hdsp
->io_type
) {
3085 ucontrol
->value
.enumerated
.item
[0] = hdsp_adat_sync_check(hdsp
, offset
);
3089 #define HDSP_DDS_OFFSET(xname, xindex) \
3090 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3093 .info = snd_hdsp_info_dds_offset, \
3094 .get = snd_hdsp_get_dds_offset, \
3095 .put = snd_hdsp_put_dds_offset \
3098 static int hdsp_dds_offset(struct hdsp
*hdsp
)
3102 unsigned int dds_value
= hdsp
->dds_value
;
3103 int system_sample_rate
= hdsp
->system_sample_rate
;
3107 * dds_value = n / rate
3108 * rate = n / dds_value
3110 div64_32(&n
, dds_value
, &r
);
3111 if (system_sample_rate
>= 112000)
3113 else if (system_sample_rate
>= 56000)
3115 return ((int)n
) - system_sample_rate
;
3118 static int hdsp_set_dds_offset(struct hdsp
*hdsp
, int offset_hz
)
3120 int rate
= hdsp
->system_sample_rate
+ offset_hz
;
3121 hdsp_set_dds_value(hdsp
, rate
);
3125 static int snd_hdsp_info_dds_offset(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_info
*uinfo
)
3127 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_INTEGER
;
3129 uinfo
->value
.integer
.min
= -5000;
3130 uinfo
->value
.integer
.max
= 5000;
3134 static int snd_hdsp_get_dds_offset(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
3136 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
3138 ucontrol
->value
.enumerated
.item
[0] = hdsp_dds_offset(hdsp
);
3142 static int snd_hdsp_put_dds_offset(struct snd_kcontrol
*kcontrol
, struct snd_ctl_elem_value
*ucontrol
)
3144 struct hdsp
*hdsp
= snd_kcontrol_chip(kcontrol
);
3148 if (!snd_hdsp_use_is_exclusive(hdsp
))
3150 val
= ucontrol
->value
.enumerated
.item
[0];
3151 spin_lock_irq(&hdsp
->lock
);
3152 if (val
!= hdsp_dds_offset(hdsp
))
3153 change
= (hdsp_set_dds_offset(hdsp
, val
) == 0) ? 1 : 0;
3156 spin_unlock_irq(&hdsp
->lock
);
3160 static struct snd_kcontrol_new snd_hdsp_9632_controls
[] = {
3161 HDSP_DA_GAIN("DA Gain", 0),
3162 HDSP_AD_GAIN("AD Gain", 0),
3163 HDSP_PHONE_GAIN("Phones Gain", 0),
3164 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3165 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3168 static struct snd_kcontrol_new snd_hdsp_controls
[] = {
3170 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
3171 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,DEFAULT
),
3172 .info
= snd_hdsp_control_spdif_info
,
3173 .get
= snd_hdsp_control_spdif_get
,
3174 .put
= snd_hdsp_control_spdif_put
,
3177 .access
= SNDRV_CTL_ELEM_ACCESS_READWRITE
| SNDRV_CTL_ELEM_ACCESS_INACTIVE
,
3178 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
3179 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,PCM_STREAM
),
3180 .info
= snd_hdsp_control_spdif_stream_info
,
3181 .get
= snd_hdsp_control_spdif_stream_get
,
3182 .put
= snd_hdsp_control_spdif_stream_put
,
3185 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
3186 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
3187 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,CON_MASK
),
3188 .info
= snd_hdsp_control_spdif_mask_info
,
3189 .get
= snd_hdsp_control_spdif_mask_get
,
3190 .private_value
= IEC958_AES0_NONAUDIO
|
3191 IEC958_AES0_PROFESSIONAL
|
3192 IEC958_AES0_CON_EMPHASIS
,
3195 .access
= SNDRV_CTL_ELEM_ACCESS_READ
,
3196 .iface
= SNDRV_CTL_ELEM_IFACE_PCM
,
3197 .name
= SNDRV_CTL_NAME_IEC958("",PLAYBACK
,PRO_MASK
),
3198 .info
= snd_hdsp_control_spdif_mask_info
,
3199 .get
= snd_hdsp_control_spdif_mask_get
,
3200 .private_value
= IEC958_AES0_NONAUDIO
|
3201 IEC958_AES0_PROFESSIONAL
|
3202 IEC958_AES0_PRO_EMPHASIS
,
3204 HDSP_MIXER("Mixer", 0),
3205 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3206 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3207 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3208 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3209 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3210 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3211 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3213 .iface
= SNDRV_CTL_ELEM_IFACE_MIXER
,
3214 .name
= "Sample Clock Source Locking",
3215 .info
= snd_hdsp_info_clock_source_lock
,
3216 .get
= snd_hdsp_get_clock_source_lock
,
3217 .put
= snd_hdsp_put_clock_source_lock
,
3219 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3220 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3221 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3222 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3223 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3224 /* 'External Rate' complies with the alsa control naming scheme */
3225 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3226 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3227 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3228 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3229 HDSP_LINE_OUT("Line Out", 0),
3230 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3231 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3234 static struct snd_kcontrol_new snd_hdsp_96xx_aeb
= HDSP_AEB("Analog Extension Board", 0);
3235 static struct snd_kcontrol_new snd_hdsp_adat_sync_check
= HDSP_ADAT_SYNC_CHECK
;
3237 static int snd_hdsp_create_controls(struct snd_card
*card
, struct hdsp
*hdsp
)
3241 struct snd_kcontrol
*kctl
;
3243 for (idx
= 0; idx
< ARRAY_SIZE(snd_hdsp_controls
); idx
++) {
3244 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_hdsp_controls
[idx
], hdsp
))) < 0)
3246 if (idx
== 1) /* IEC958 (S/PDIF) Stream */
3247 hdsp
->spdif_ctl
= kctl
;
3250 /* ADAT SyncCheck status */
3251 snd_hdsp_adat_sync_check
.name
= "ADAT Lock Status";
3252 snd_hdsp_adat_sync_check
.index
= 1;
3253 if ((err
= snd_ctl_add (card
, kctl
= snd_ctl_new1(&snd_hdsp_adat_sync_check
, hdsp
))))
3255 if (hdsp
->io_type
== Digiface
|| hdsp
->io_type
== H9652
) {
3256 for (idx
= 1; idx
< 3; ++idx
) {
3257 snd_hdsp_adat_sync_check
.index
= idx
+1;
3258 if ((err
= snd_ctl_add (card
, kctl
= snd_ctl_new1(&snd_hdsp_adat_sync_check
, hdsp
))))
3263 /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3264 if (hdsp
->io_type
== H9632
) {
3265 for (idx
= 0; idx
< ARRAY_SIZE(snd_hdsp_9632_controls
); idx
++) {
3266 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_hdsp_9632_controls
[idx
], hdsp
))) < 0)
3271 /* AEB control for H96xx card */
3272 if (hdsp
->io_type
== H9632
|| hdsp
->io_type
== H9652
) {
3273 if ((err
= snd_ctl_add(card
, kctl
= snd_ctl_new1(&snd_hdsp_96xx_aeb
, hdsp
))) < 0)
3280 /*------------------------------------------------------------
3282 ------------------------------------------------------------*/
3285 snd_hdsp_proc_read(struct snd_info_entry
*entry
, struct snd_info_buffer
*buffer
)
3287 struct hdsp
*hdsp
= (struct hdsp
*) entry
->private_data
;
3288 unsigned int status
;
3289 unsigned int status2
;
3290 char *pref_sync_ref
;
3292 char *system_clock_mode
;
3296 if (hdsp_check_for_iobox (hdsp
)) {
3297 snd_iprintf(buffer
, "No I/O box connected.\nPlease connect one and upload firmware.\n");
3301 if (hdsp_check_for_firmware(hdsp
, 0)) {
3302 if (hdsp
->state
& HDSP_FirmwareCached
) {
3303 if (snd_hdsp_load_firmware_from_cache(hdsp
) != 0) {
3304 snd_iprintf(buffer
, "Firmware loading from cache failed, please upload manually.\n");
3309 #ifdef HDSP_FW_LOADER
3310 err
= hdsp_request_fw_loader(hdsp
);
3314 "No firmware loaded nor cached, "
3315 "please upload firmware.\n");
3321 status
= hdsp_read(hdsp
, HDSP_statusRegister
);
3322 status2
= hdsp_read(hdsp
, HDSP_status2Register
);
3324 snd_iprintf(buffer
, "%s (Card #%d)\n", hdsp
->card_name
, hdsp
->card
->number
+ 1);
3325 snd_iprintf(buffer
, "Buffers: capture %p playback %p\n",
3326 hdsp
->capture_buffer
, hdsp
->playback_buffer
);
3327 snd_iprintf(buffer
, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3328 hdsp
->irq
, hdsp
->port
, (unsigned long)hdsp
->iobase
);
3329 snd_iprintf(buffer
, "Control register: 0x%x\n", hdsp
->control_register
);
3330 snd_iprintf(buffer
, "Control2 register: 0x%x\n", hdsp
->control2_register
);
3331 snd_iprintf(buffer
, "Status register: 0x%x\n", status
);
3332 snd_iprintf(buffer
, "Status2 register: 0x%x\n", status2
);
3333 snd_iprintf(buffer
, "FIFO status: %d\n", hdsp_read(hdsp
, HDSP_fifoStatus
) & 0xff);
3334 snd_iprintf(buffer
, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp
, HDSP_midiStatusOut0
));
3335 snd_iprintf(buffer
, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp
, HDSP_midiStatusIn0
));
3336 snd_iprintf(buffer
, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp
, HDSP_midiStatusOut1
));
3337 snd_iprintf(buffer
, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp
, HDSP_midiStatusIn1
));
3338 snd_iprintf(buffer
, "Use Midi Tasklet: %s\n", hdsp
->use_midi_tasklet
? "on" : "off");
3340 snd_iprintf(buffer
, "\n");
3342 x
= 1 << (6 + hdsp_decode_latency(hdsp
->control_register
& HDSP_LatencyMask
));
3344 snd_iprintf(buffer
, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x
, (unsigned long) hdsp
->period_bytes
);
3345 snd_iprintf(buffer
, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp
));
3346 snd_iprintf(buffer
, "Precise pointer: %s\n", hdsp
->precise_ptr
? "on" : "off");
3347 snd_iprintf(buffer
, "Line out: %s\n", (hdsp
->control_register
& HDSP_LineOut
) ? "on" : "off");
3349 snd_iprintf(buffer
, "Firmware version: %d\n", (status2
&HDSP_version0
)|(status2
&HDSP_version1
)<<1|(status2
&HDSP_version2
)<<2);
3351 snd_iprintf(buffer
, "\n");
3354 switch (hdsp_clock_source(hdsp
)) {
3355 case HDSP_CLOCK_SOURCE_AUTOSYNC
:
3356 clock_source
= "AutoSync";
3358 case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ
:
3359 clock_source
= "Internal 32 kHz";
3361 case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ
:
3362 clock_source
= "Internal 44.1 kHz";
3364 case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ
:
3365 clock_source
= "Internal 48 kHz";
3367 case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ
:
3368 clock_source
= "Internal 64 kHz";
3370 case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ
:
3371 clock_source
= "Internal 88.2 kHz";
3373 case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ
:
3374 clock_source
= "Internal 96 kHz";
3376 case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ
:
3377 clock_source
= "Internal 128 kHz";
3379 case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ
:
3380 clock_source
= "Internal 176.4 kHz";
3382 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ
:
3383 clock_source
= "Internal 192 kHz";
3386 clock_source
= "Error";
3388 snd_iprintf (buffer
, "Sample Clock Source: %s\n", clock_source
);
3390 if (hdsp_system_clock_mode(hdsp
))
3391 system_clock_mode
= "Slave";
3393 system_clock_mode
= "Master";
3395 switch (hdsp_pref_sync_ref (hdsp
)) {
3396 case HDSP_SYNC_FROM_WORD
:
3397 pref_sync_ref
= "Word Clock";
3399 case HDSP_SYNC_FROM_ADAT_SYNC
:
3400 pref_sync_ref
= "ADAT Sync";
3402 case HDSP_SYNC_FROM_SPDIF
:
3403 pref_sync_ref
= "SPDIF";
3405 case HDSP_SYNC_FROM_ADAT1
:
3406 pref_sync_ref
= "ADAT1";
3408 case HDSP_SYNC_FROM_ADAT2
:
3409 pref_sync_ref
= "ADAT2";
3411 case HDSP_SYNC_FROM_ADAT3
:
3412 pref_sync_ref
= "ADAT3";
3415 pref_sync_ref
= "Word Clock";
3418 snd_iprintf (buffer
, "Preferred Sync Reference: %s\n", pref_sync_ref
);
3420 switch (hdsp_autosync_ref (hdsp
)) {
3421 case HDSP_AUTOSYNC_FROM_WORD
:
3422 autosync_ref
= "Word Clock";
3424 case HDSP_AUTOSYNC_FROM_ADAT_SYNC
:
3425 autosync_ref
= "ADAT Sync";
3427 case HDSP_AUTOSYNC_FROM_SPDIF
:
3428 autosync_ref
= "SPDIF";
3430 case HDSP_AUTOSYNC_FROM_NONE
:
3431 autosync_ref
= "None";
3433 case HDSP_AUTOSYNC_FROM_ADAT1
:
3434 autosync_ref
= "ADAT1";
3436 case HDSP_AUTOSYNC_FROM_ADAT2
:
3437 autosync_ref
= "ADAT2";
3439 case HDSP_AUTOSYNC_FROM_ADAT3
:
3440 autosync_ref
= "ADAT3";
3443 autosync_ref
= "---";
3446 snd_iprintf (buffer
, "AutoSync Reference: %s\n", autosync_ref
);
3448 snd_iprintf (buffer
, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp
));
3450 snd_iprintf (buffer
, "System Clock Mode: %s\n", system_clock_mode
);
3452 snd_iprintf (buffer
, "System Clock Frequency: %d\n", hdsp
->system_sample_rate
);
3453 snd_iprintf (buffer
, "System Clock Locked: %s\n", hdsp
->clock_source_locked
? "Yes" : "No");
3455 snd_iprintf(buffer
, "\n");
3457 switch (hdsp_spdif_in(hdsp
)) {
3458 case HDSP_SPDIFIN_OPTICAL
:
3459 snd_iprintf(buffer
, "IEC958 input: Optical\n");
3461 case HDSP_SPDIFIN_COAXIAL
:
3462 snd_iprintf(buffer
, "IEC958 input: Coaxial\n");
3464 case HDSP_SPDIFIN_INTERNAL
:
3465 snd_iprintf(buffer
, "IEC958 input: Internal\n");
3467 case HDSP_SPDIFIN_AES
:
3468 snd_iprintf(buffer
, "IEC958 input: AES\n");
3471 snd_iprintf(buffer
, "IEC958 input: ???\n");
3475 if (hdsp
->control_register
& HDSP_SPDIFOpticalOut
)
3476 snd_iprintf(buffer
, "IEC958 output: Coaxial & ADAT1\n");
3478 snd_iprintf(buffer
, "IEC958 output: Coaxial only\n");
3480 if (hdsp
->control_register
& HDSP_SPDIFProfessional
)
3481 snd_iprintf(buffer
, "IEC958 quality: Professional\n");
3483 snd_iprintf(buffer
, "IEC958 quality: Consumer\n");
3485 if (hdsp
->control_register
& HDSP_SPDIFEmphasis
)
3486 snd_iprintf(buffer
, "IEC958 emphasis: on\n");
3488 snd_iprintf(buffer
, "IEC958 emphasis: off\n");
3490 if (hdsp
->control_register
& HDSP_SPDIFNonAudio
)
3491 snd_iprintf(buffer
, "IEC958 NonAudio: on\n");
3493 snd_iprintf(buffer
, "IEC958 NonAudio: off\n");
3494 if ((x
= hdsp_spdif_sample_rate (hdsp
)) != 0)
3495 snd_iprintf (buffer
, "IEC958 sample rate: %d\n", x
);
3497 snd_iprintf (buffer
, "IEC958 sample rate: Error flag set\n");
3499 snd_iprintf(buffer
, "\n");
3502 x
= status
& HDSP_Sync0
;
3503 if (status
& HDSP_Lock0
)
3504 snd_iprintf(buffer
, "ADAT1: %s\n", x
? "Sync" : "Lock");
3506 snd_iprintf(buffer
, "ADAT1: No Lock\n");
3508 switch (hdsp
->io_type
) {
3511 x
= status
& HDSP_Sync1
;
3512 if (status
& HDSP_Lock1
)
3513 snd_iprintf(buffer
, "ADAT2: %s\n", x
? "Sync" : "Lock");
3515 snd_iprintf(buffer
, "ADAT2: No Lock\n");
3516 x
= status
& HDSP_Sync2
;
3517 if (status
& HDSP_Lock2
)
3518 snd_iprintf(buffer
, "ADAT3: %s\n", x
? "Sync" : "Lock");
3520 snd_iprintf(buffer
, "ADAT3: No Lock\n");
3527 x
= status
& HDSP_SPDIFSync
;
3528 if (status
& HDSP_SPDIFErrorFlag
)
3529 snd_iprintf (buffer
, "SPDIF: No Lock\n");
3531 snd_iprintf (buffer
, "SPDIF: %s\n", x
? "Sync" : "Lock");
3533 x
= status2
& HDSP_wc_sync
;
3534 if (status2
& HDSP_wc_lock
)
3535 snd_iprintf (buffer
, "Word Clock: %s\n", x
? "Sync" : "Lock");
3537 snd_iprintf (buffer
, "Word Clock: No Lock\n");
3539 x
= status
& HDSP_TimecodeSync
;
3540 if (status
& HDSP_TimecodeLock
)
3541 snd_iprintf(buffer
, "ADAT Sync: %s\n", x
? "Sync" : "Lock");
3543 snd_iprintf(buffer
, "ADAT Sync: No Lock\n");
3545 snd_iprintf(buffer
, "\n");
3547 /* Informations about H9632 specific controls */
3548 if (hdsp
->io_type
== H9632
) {
3551 switch (hdsp_ad_gain(hdsp
)) {
3562 snd_iprintf(buffer
, "AD Gain : %s\n", tmp
);
3564 switch (hdsp_da_gain(hdsp
)) {
3575 snd_iprintf(buffer
, "DA Gain : %s\n", tmp
);
3577 switch (hdsp_phone_gain(hdsp
)) {
3588 snd_iprintf(buffer
, "Phones Gain : %s\n", tmp
);
3590 snd_iprintf(buffer
, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp
) ? "yes" : "no");
3592 if (hdsp
->control_register
& HDSP_AnalogExtensionBoard
)
3593 snd_iprintf(buffer
, "AEB : on (ADAT1 internal)\n");
3595 snd_iprintf(buffer
, "AEB : off (ADAT1 external)\n");
3596 snd_iprintf(buffer
, "\n");
3601 static void __devinit
snd_hdsp_proc_init(struct hdsp
*hdsp
)
3603 struct snd_info_entry
*entry
;
3605 if (! snd_card_proc_new(hdsp
->card
, "hdsp", &entry
))
3606 snd_info_set_text_ops(entry
, hdsp
, snd_hdsp_proc_read
);
3609 static void snd_hdsp_free_buffers(struct hdsp
*hdsp
)
3611 snd_hammerfall_free_buffer(&hdsp
->capture_dma_buf
, hdsp
->pci
);
3612 snd_hammerfall_free_buffer(&hdsp
->playback_dma_buf
, hdsp
->pci
);
3615 static int __devinit
snd_hdsp_initialize_memory(struct hdsp
*hdsp
)
3617 unsigned long pb_bus
, cb_bus
;
3619 if (snd_hammerfall_get_buffer(hdsp
->pci
, &hdsp
->capture_dma_buf
, HDSP_DMA_AREA_BYTES
) < 0 ||
3620 snd_hammerfall_get_buffer(hdsp
->pci
, &hdsp
->playback_dma_buf
, HDSP_DMA_AREA_BYTES
) < 0) {
3621 if (hdsp
->capture_dma_buf
.area
)
3622 snd_dma_free_pages(&hdsp
->capture_dma_buf
);
3623 printk(KERN_ERR
"%s: no buffers available\n", hdsp
->card_name
);
3627 /* Align to bus-space 64K boundary */
3629 cb_bus
= ALIGN(hdsp
->capture_dma_buf
.addr
, 0x10000ul
);
3630 pb_bus
= ALIGN(hdsp
->playback_dma_buf
.addr
, 0x10000ul
);
3632 /* Tell the card where it is */
3634 hdsp_write(hdsp
, HDSP_inputBufferAddress
, cb_bus
);
3635 hdsp_write(hdsp
, HDSP_outputBufferAddress
, pb_bus
);
3637 hdsp
->capture_buffer
= hdsp
->capture_dma_buf
.area
+ (cb_bus
- hdsp
->capture_dma_buf
.addr
);
3638 hdsp
->playback_buffer
= hdsp
->playback_dma_buf
.area
+ (pb_bus
- hdsp
->playback_dma_buf
.addr
);
3643 static int snd_hdsp_set_defaults(struct hdsp
*hdsp
)
3647 /* ASSUMPTION: hdsp->lock is either held, or
3648 there is no need to hold it (e.g. during module
3654 SPDIF Input via Coax
3656 maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3657 which implies 2 4096 sample, 32Kbyte periods).
3661 hdsp
->control_register
= HDSP_ClockModeMaster
|
3662 HDSP_SPDIFInputCoaxial
|
3663 hdsp_encode_latency(7) |
3667 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
3669 #ifdef SNDRV_BIG_ENDIAN
3670 hdsp
->control2_register
= HDSP_BIGENDIAN_MODE
;
3672 hdsp
->control2_register
= 0;
3674 if (hdsp
->io_type
== H9652
)
3675 snd_hdsp_9652_enable_mixer (hdsp
);
3677 hdsp_write (hdsp
, HDSP_control2Reg
, hdsp
->control2_register
);
3679 hdsp_reset_hw_pointer(hdsp
);
3680 hdsp_compute_period_size(hdsp
);
3682 /* silence everything */
3684 for (i
= 0; i
< HDSP_MATRIX_MIXER_SIZE
; ++i
)
3685 hdsp
->mixer_matrix
[i
] = MINUS_INFINITY_GAIN
;
3687 for (i
= 0; i
< ((hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) ? 1352 : HDSP_MATRIX_MIXER_SIZE
); ++i
) {
3688 if (hdsp_write_gain (hdsp
, i
, MINUS_INFINITY_GAIN
))
3692 /* H9632 specific defaults */
3693 if (hdsp
->io_type
== H9632
) {
3694 hdsp
->control_register
|= (HDSP_DAGainPlus4dBu
| HDSP_ADGainPlus4dBu
| HDSP_PhoneGain0dB
);
3695 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
3698 /* set a default rate so that the channel map is set up.
3701 hdsp_set_rate(hdsp
, 48000, 1);
3706 static void hdsp_midi_tasklet(unsigned long arg
)
3708 struct hdsp
*hdsp
= (struct hdsp
*)arg
;
3710 if (hdsp
->midi
[0].pending
)
3711 snd_hdsp_midi_input_read (&hdsp
->midi
[0]);
3712 if (hdsp
->midi
[1].pending
)
3713 snd_hdsp_midi_input_read (&hdsp
->midi
[1]);
3716 static irqreturn_t
snd_hdsp_interrupt(int irq
, void *dev_id
)
3718 struct hdsp
*hdsp
= (struct hdsp
*) dev_id
;
3719 unsigned int status
;
3723 unsigned int midi0status
;
3724 unsigned int midi1status
;
3727 status
= hdsp_read(hdsp
, HDSP_statusRegister
);
3729 audio
= status
& HDSP_audioIRQPending
;
3730 midi0
= status
& HDSP_midi0IRQPending
;
3731 midi1
= status
& HDSP_midi1IRQPending
;
3733 if (!audio
&& !midi0
&& !midi1
)
3736 hdsp_write(hdsp
, HDSP_interruptConfirmation
, 0);
3738 midi0status
= hdsp_read (hdsp
, HDSP_midiStatusIn0
) & 0xff;
3739 midi1status
= hdsp_read (hdsp
, HDSP_midiStatusIn1
) & 0xff;
3742 if (hdsp
->capture_substream
)
3743 snd_pcm_period_elapsed(hdsp
->pcm
->streams
[SNDRV_PCM_STREAM_CAPTURE
].substream
);
3745 if (hdsp
->playback_substream
)
3746 snd_pcm_period_elapsed(hdsp
->pcm
->streams
[SNDRV_PCM_STREAM_PLAYBACK
].substream
);
3749 if (midi0
&& midi0status
) {
3750 if (hdsp
->use_midi_tasklet
) {
3751 /* we disable interrupts for this input until processing is done */
3752 hdsp
->control_register
&= ~HDSP_Midi0InterruptEnable
;
3753 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
3754 hdsp
->midi
[0].pending
= 1;
3757 snd_hdsp_midi_input_read (&hdsp
->midi
[0]);
3760 if (hdsp
->io_type
!= Multiface
&& hdsp
->io_type
!= H9632
&& midi1
&& midi1status
) {
3761 if (hdsp
->use_midi_tasklet
) {
3762 /* we disable interrupts for this input until processing is done */
3763 hdsp
->control_register
&= ~HDSP_Midi1InterruptEnable
;
3764 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
3765 hdsp
->midi
[1].pending
= 1;
3768 snd_hdsp_midi_input_read (&hdsp
->midi
[1]);
3771 if (hdsp
->use_midi_tasklet
&& schedule
)
3772 tasklet_hi_schedule(&hdsp
->midi_tasklet
);
3776 static snd_pcm_uframes_t
snd_hdsp_hw_pointer(struct snd_pcm_substream
*substream
)
3778 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3779 return hdsp_hw_pointer(hdsp
);
3782 static char *hdsp_channel_buffer_location(struct hdsp
*hdsp
,
3789 snd_assert(channel
>= 0 && channel
< hdsp
->max_channels
, return NULL
);
3791 if ((mapped_channel
= hdsp
->channel_map
[channel
]) < 0)
3794 if (stream
== SNDRV_PCM_STREAM_CAPTURE
)
3795 return hdsp
->capture_buffer
+ (mapped_channel
* HDSP_CHANNEL_BUFFER_BYTES
);
3797 return hdsp
->playback_buffer
+ (mapped_channel
* HDSP_CHANNEL_BUFFER_BYTES
);
3800 static int snd_hdsp_playback_copy(struct snd_pcm_substream
*substream
, int channel
,
3801 snd_pcm_uframes_t pos
, void __user
*src
, snd_pcm_uframes_t count
)
3803 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3806 snd_assert(pos
+ count
<= HDSP_CHANNEL_BUFFER_BYTES
/ 4, return -EINVAL
);
3808 channel_buf
= hdsp_channel_buffer_location (hdsp
, substream
->pstr
->stream
, channel
);
3809 snd_assert(channel_buf
!= NULL
, return -EIO
);
3810 if (copy_from_user(channel_buf
+ pos
* 4, src
, count
* 4))
3815 static int snd_hdsp_capture_copy(struct snd_pcm_substream
*substream
, int channel
,
3816 snd_pcm_uframes_t pos
, void __user
*dst
, snd_pcm_uframes_t count
)
3818 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3821 snd_assert(pos
+ count
<= HDSP_CHANNEL_BUFFER_BYTES
/ 4, return -EINVAL
);
3823 channel_buf
= hdsp_channel_buffer_location (hdsp
, substream
->pstr
->stream
, channel
);
3824 snd_assert(channel_buf
!= NULL
, return -EIO
);
3825 if (copy_to_user(dst
, channel_buf
+ pos
* 4, count
* 4))
3830 static int snd_hdsp_hw_silence(struct snd_pcm_substream
*substream
, int channel
,
3831 snd_pcm_uframes_t pos
, snd_pcm_uframes_t count
)
3833 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3836 channel_buf
= hdsp_channel_buffer_location (hdsp
, substream
->pstr
->stream
, channel
);
3837 snd_assert(channel_buf
!= NULL
, return -EIO
);
3838 memset(channel_buf
+ pos
* 4, 0, count
* 4);
3842 static int snd_hdsp_reset(struct snd_pcm_substream
*substream
)
3844 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
3845 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3846 struct snd_pcm_substream
*other
;
3847 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
3848 other
= hdsp
->capture_substream
;
3850 other
= hdsp
->playback_substream
;
3852 runtime
->status
->hw_ptr
= hdsp_hw_pointer(hdsp
);
3854 runtime
->status
->hw_ptr
= 0;
3856 struct snd_pcm_substream
*s
;
3857 struct snd_pcm_runtime
*oruntime
= other
->runtime
;
3858 snd_pcm_group_for_each_entry(s
, substream
) {
3860 oruntime
->status
->hw_ptr
= runtime
->status
->hw_ptr
;
3868 static int snd_hdsp_hw_params(struct snd_pcm_substream
*substream
,
3869 struct snd_pcm_hw_params
*params
)
3871 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3876 if (hdsp_check_for_iobox (hdsp
))
3879 if (hdsp_check_for_firmware(hdsp
, 1))
3882 spin_lock_irq(&hdsp
->lock
);
3884 if (substream
->pstr
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
3885 hdsp
->control_register
&= ~(HDSP_SPDIFProfessional
| HDSP_SPDIFNonAudio
| HDSP_SPDIFEmphasis
);
3886 hdsp_write(hdsp
, HDSP_controlRegister
, hdsp
->control_register
|= hdsp
->creg_spdif_stream
);
3887 this_pid
= hdsp
->playback_pid
;
3888 other_pid
= hdsp
->capture_pid
;
3890 this_pid
= hdsp
->capture_pid
;
3891 other_pid
= hdsp
->playback_pid
;
3894 if ((other_pid
> 0) && (this_pid
!= other_pid
)) {
3896 /* The other stream is open, and not by the same
3897 task as this one. Make sure that the parameters
3898 that matter are the same.
3901 if (params_rate(params
) != hdsp
->system_sample_rate
) {
3902 spin_unlock_irq(&hdsp
->lock
);
3903 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_RATE
);
3907 if (params_period_size(params
) != hdsp
->period_bytes
/ 4) {
3908 spin_unlock_irq(&hdsp
->lock
);
3909 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
);
3915 spin_unlock_irq(&hdsp
->lock
);
3919 spin_unlock_irq(&hdsp
->lock
);
3922 /* how to make sure that the rate matches an externally-set one ?
3925 spin_lock_irq(&hdsp
->lock
);
3926 if (! hdsp
->clock_source_locked
) {
3927 if ((err
= hdsp_set_rate(hdsp
, params_rate(params
), 0)) < 0) {
3928 spin_unlock_irq(&hdsp
->lock
);
3929 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_RATE
);
3933 spin_unlock_irq(&hdsp
->lock
);
3935 if ((err
= hdsp_set_interrupt_interval(hdsp
, params_period_size(params
))) < 0) {
3936 _snd_pcm_hw_param_setempty(params
, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
);
3943 static int snd_hdsp_channel_info(struct snd_pcm_substream
*substream
,
3944 struct snd_pcm_channel_info
*info
)
3946 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3949 snd_assert(info
->channel
< hdsp
->max_channels
, return -EINVAL
);
3951 if ((mapped_channel
= hdsp
->channel_map
[info
->channel
]) < 0)
3954 info
->offset
= mapped_channel
* HDSP_CHANNEL_BUFFER_BYTES
;
3960 static int snd_hdsp_ioctl(struct snd_pcm_substream
*substream
,
3961 unsigned int cmd
, void *arg
)
3964 case SNDRV_PCM_IOCTL1_RESET
:
3965 return snd_hdsp_reset(substream
);
3966 case SNDRV_PCM_IOCTL1_CHANNEL_INFO
:
3967 return snd_hdsp_channel_info(substream
, arg
);
3972 return snd_pcm_lib_ioctl(substream
, cmd
, arg
);
3975 static int snd_hdsp_trigger(struct snd_pcm_substream
*substream
, int cmd
)
3977 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
3978 struct snd_pcm_substream
*other
;
3981 if (hdsp_check_for_iobox (hdsp
))
3984 if (hdsp_check_for_firmware(hdsp
, 0)) /* no auto-loading in trigger */
3987 spin_lock(&hdsp
->lock
);
3988 running
= hdsp
->running
;
3990 case SNDRV_PCM_TRIGGER_START
:
3991 running
|= 1 << substream
->stream
;
3993 case SNDRV_PCM_TRIGGER_STOP
:
3994 running
&= ~(1 << substream
->stream
);
3998 spin_unlock(&hdsp
->lock
);
4001 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
4002 other
= hdsp
->capture_substream
;
4004 other
= hdsp
->playback_substream
;
4007 struct snd_pcm_substream
*s
;
4008 snd_pcm_group_for_each_entry(s
, substream
) {
4010 snd_pcm_trigger_done(s
, substream
);
4011 if (cmd
== SNDRV_PCM_TRIGGER_START
)
4012 running
|= 1 << s
->stream
;
4014 running
&= ~(1 << s
->stream
);
4018 if (cmd
== SNDRV_PCM_TRIGGER_START
) {
4019 if (!(running
& (1 << SNDRV_PCM_STREAM_PLAYBACK
)) &&
4020 substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
)
4021 hdsp_silence_playback(hdsp
);
4024 substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
4025 hdsp_silence_playback(hdsp
);
4028 if (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
)
4029 hdsp_silence_playback(hdsp
);
4032 snd_pcm_trigger_done(substream
, substream
);
4033 if (!hdsp
->running
&& running
)
4034 hdsp_start_audio(hdsp
);
4035 else if (hdsp
->running
&& !running
)
4036 hdsp_stop_audio(hdsp
);
4037 hdsp
->running
= running
;
4038 spin_unlock(&hdsp
->lock
);
4043 static int snd_hdsp_prepare(struct snd_pcm_substream
*substream
)
4045 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4048 if (hdsp_check_for_iobox (hdsp
))
4051 if (hdsp_check_for_firmware(hdsp
, 1))
4054 spin_lock_irq(&hdsp
->lock
);
4056 hdsp_reset_hw_pointer(hdsp
);
4057 spin_unlock_irq(&hdsp
->lock
);
4061 static struct snd_pcm_hardware snd_hdsp_playback_subinfo
=
4063 .info
= (SNDRV_PCM_INFO_MMAP
|
4064 SNDRV_PCM_INFO_MMAP_VALID
|
4065 SNDRV_PCM_INFO_NONINTERLEAVED
|
4066 SNDRV_PCM_INFO_SYNC_START
|
4067 SNDRV_PCM_INFO_DOUBLE
),
4068 #ifdef SNDRV_BIG_ENDIAN
4069 .formats
= SNDRV_PCM_FMTBIT_S32_BE
,
4071 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
4073 .rates
= (SNDRV_PCM_RATE_32000
|
4074 SNDRV_PCM_RATE_44100
|
4075 SNDRV_PCM_RATE_48000
|
4076 SNDRV_PCM_RATE_64000
|
4077 SNDRV_PCM_RATE_88200
|
4078 SNDRV_PCM_RATE_96000
),
4082 .channels_max
= HDSP_MAX_CHANNELS
,
4083 .buffer_bytes_max
= HDSP_CHANNEL_BUFFER_BYTES
* HDSP_MAX_CHANNELS
,
4084 .period_bytes_min
= (64 * 4) * 10,
4085 .period_bytes_max
= (8192 * 4) * HDSP_MAX_CHANNELS
,
4091 static struct snd_pcm_hardware snd_hdsp_capture_subinfo
=
4093 .info
= (SNDRV_PCM_INFO_MMAP
|
4094 SNDRV_PCM_INFO_MMAP_VALID
|
4095 SNDRV_PCM_INFO_NONINTERLEAVED
|
4096 SNDRV_PCM_INFO_SYNC_START
),
4097 #ifdef SNDRV_BIG_ENDIAN
4098 .formats
= SNDRV_PCM_FMTBIT_S32_BE
,
4100 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
4102 .rates
= (SNDRV_PCM_RATE_32000
|
4103 SNDRV_PCM_RATE_44100
|
4104 SNDRV_PCM_RATE_48000
|
4105 SNDRV_PCM_RATE_64000
|
4106 SNDRV_PCM_RATE_88200
|
4107 SNDRV_PCM_RATE_96000
),
4111 .channels_max
= HDSP_MAX_CHANNELS
,
4112 .buffer_bytes_max
= HDSP_CHANNEL_BUFFER_BYTES
* HDSP_MAX_CHANNELS
,
4113 .period_bytes_min
= (64 * 4) * 10,
4114 .period_bytes_max
= (8192 * 4) * HDSP_MAX_CHANNELS
,
4120 static unsigned int hdsp_period_sizes
[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4122 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes
= {
4123 .count
= ARRAY_SIZE(hdsp_period_sizes
),
4124 .list
= hdsp_period_sizes
,
4128 static unsigned int hdsp_9632_sample_rates
[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4130 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates
= {
4131 .count
= ARRAY_SIZE(hdsp_9632_sample_rates
),
4132 .list
= hdsp_9632_sample_rates
,
4136 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params
*params
,
4137 struct snd_pcm_hw_rule
*rule
)
4139 struct hdsp
*hdsp
= rule
->private;
4140 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4141 if (hdsp
->io_type
== H9632
) {
4142 unsigned int list
[3];
4143 list
[0] = hdsp
->qs_in_channels
;
4144 list
[1] = hdsp
->ds_in_channels
;
4145 list
[2] = hdsp
->ss_in_channels
;
4146 return snd_interval_list(c
, 3, list
, 0);
4148 unsigned int list
[2];
4149 list
[0] = hdsp
->ds_in_channels
;
4150 list
[1] = hdsp
->ss_in_channels
;
4151 return snd_interval_list(c
, 2, list
, 0);
4155 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params
*params
,
4156 struct snd_pcm_hw_rule
*rule
)
4158 unsigned int list
[3];
4159 struct hdsp
*hdsp
= rule
->private;
4160 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4161 if (hdsp
->io_type
== H9632
) {
4162 list
[0] = hdsp
->qs_out_channels
;
4163 list
[1] = hdsp
->ds_out_channels
;
4164 list
[2] = hdsp
->ss_out_channels
;
4165 return snd_interval_list(c
, 3, list
, 0);
4167 list
[0] = hdsp
->ds_out_channels
;
4168 list
[1] = hdsp
->ss_out_channels
;
4170 return snd_interval_list(c
, 2, list
, 0);
4173 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params
*params
,
4174 struct snd_pcm_hw_rule
*rule
)
4176 struct hdsp
*hdsp
= rule
->private;
4177 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4178 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
4179 if (r
->min
> 96000 && hdsp
->io_type
== H9632
) {
4180 struct snd_interval t
= {
4181 .min
= hdsp
->qs_in_channels
,
4182 .max
= hdsp
->qs_in_channels
,
4185 return snd_interval_refine(c
, &t
);
4186 } else if (r
->min
> 48000 && r
->max
<= 96000) {
4187 struct snd_interval t
= {
4188 .min
= hdsp
->ds_in_channels
,
4189 .max
= hdsp
->ds_in_channels
,
4192 return snd_interval_refine(c
, &t
);
4193 } else if (r
->max
< 64000) {
4194 struct snd_interval t
= {
4195 .min
= hdsp
->ss_in_channels
,
4196 .max
= hdsp
->ss_in_channels
,
4199 return snd_interval_refine(c
, &t
);
4204 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params
*params
,
4205 struct snd_pcm_hw_rule
*rule
)
4207 struct hdsp
*hdsp
= rule
->private;
4208 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4209 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
4210 if (r
->min
> 96000 && hdsp
->io_type
== H9632
) {
4211 struct snd_interval t
= {
4212 .min
= hdsp
->qs_out_channels
,
4213 .max
= hdsp
->qs_out_channels
,
4216 return snd_interval_refine(c
, &t
);
4217 } else if (r
->min
> 48000 && r
->max
<= 96000) {
4218 struct snd_interval t
= {
4219 .min
= hdsp
->ds_out_channels
,
4220 .max
= hdsp
->ds_out_channels
,
4223 return snd_interval_refine(c
, &t
);
4224 } else if (r
->max
< 64000) {
4225 struct snd_interval t
= {
4226 .min
= hdsp
->ss_out_channels
,
4227 .max
= hdsp
->ss_out_channels
,
4230 return snd_interval_refine(c
, &t
);
4235 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params
*params
,
4236 struct snd_pcm_hw_rule
*rule
)
4238 struct hdsp
*hdsp
= rule
->private;
4239 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4240 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
4241 if (c
->min
>= hdsp
->ss_out_channels
) {
4242 struct snd_interval t
= {
4247 return snd_interval_refine(r
, &t
);
4248 } else if (c
->max
<= hdsp
->qs_out_channels
&& hdsp
->io_type
== H9632
) {
4249 struct snd_interval t
= {
4254 return snd_interval_refine(r
, &t
);
4255 } else if (c
->max
<= hdsp
->ds_out_channels
) {
4256 struct snd_interval t
= {
4261 return snd_interval_refine(r
, &t
);
4266 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params
*params
,
4267 struct snd_pcm_hw_rule
*rule
)
4269 struct hdsp
*hdsp
= rule
->private;
4270 struct snd_interval
*c
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_CHANNELS
);
4271 struct snd_interval
*r
= hw_param_interval(params
, SNDRV_PCM_HW_PARAM_RATE
);
4272 if (c
->min
>= hdsp
->ss_in_channels
) {
4273 struct snd_interval t
= {
4278 return snd_interval_refine(r
, &t
);
4279 } else if (c
->max
<= hdsp
->qs_in_channels
&& hdsp
->io_type
== H9632
) {
4280 struct snd_interval t
= {
4285 return snd_interval_refine(r
, &t
);
4286 } else if (c
->max
<= hdsp
->ds_in_channels
) {
4287 struct snd_interval t
= {
4292 return snd_interval_refine(r
, &t
);
4297 static int snd_hdsp_playback_open(struct snd_pcm_substream
*substream
)
4299 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4300 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
4302 if (hdsp_check_for_iobox (hdsp
))
4305 if (hdsp_check_for_firmware(hdsp
, 1))
4308 spin_lock_irq(&hdsp
->lock
);
4310 snd_pcm_set_sync(substream
);
4312 runtime
->hw
= snd_hdsp_playback_subinfo
;
4313 runtime
->dma_area
= hdsp
->playback_buffer
;
4314 runtime
->dma_bytes
= HDSP_DMA_AREA_BYTES
;
4316 hdsp
->playback_pid
= current
->pid
;
4317 hdsp
->playback_substream
= substream
;
4319 spin_unlock_irq(&hdsp
->lock
);
4321 snd_pcm_hw_constraint_msbits(runtime
, 0, 32, 24);
4322 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
, &hdsp_hw_constraints_period_sizes
);
4323 if (hdsp
->clock_source_locked
) {
4324 runtime
->hw
.rate_min
= runtime
->hw
.rate_max
= hdsp
->system_sample_rate
;
4325 } else if (hdsp
->io_type
== H9632
) {
4326 runtime
->hw
.rate_max
= 192000;
4327 runtime
->hw
.rates
= SNDRV_PCM_RATE_KNOT
;
4328 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
, &hdsp_hw_constraints_9632_sample_rates
);
4330 if (hdsp
->io_type
== H9632
) {
4331 runtime
->hw
.channels_min
= hdsp
->qs_out_channels
;
4332 runtime
->hw
.channels_max
= hdsp
->ss_out_channels
;
4335 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
4336 snd_hdsp_hw_rule_out_channels
, hdsp
,
4337 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
4338 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
4339 snd_hdsp_hw_rule_out_channels_rate
, hdsp
,
4340 SNDRV_PCM_HW_PARAM_RATE
, -1);
4341 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
4342 snd_hdsp_hw_rule_rate_out_channels
, hdsp
,
4343 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
4345 hdsp
->creg_spdif_stream
= hdsp
->creg_spdif
;
4346 hdsp
->spdif_ctl
->vd
[0].access
&= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
4347 snd_ctl_notify(hdsp
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
4348 SNDRV_CTL_EVENT_MASK_INFO
, &hdsp
->spdif_ctl
->id
);
4352 static int snd_hdsp_playback_release(struct snd_pcm_substream
*substream
)
4354 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4356 spin_lock_irq(&hdsp
->lock
);
4358 hdsp
->playback_pid
= -1;
4359 hdsp
->playback_substream
= NULL
;
4361 spin_unlock_irq(&hdsp
->lock
);
4363 hdsp
->spdif_ctl
->vd
[0].access
|= SNDRV_CTL_ELEM_ACCESS_INACTIVE
;
4364 snd_ctl_notify(hdsp
->card
, SNDRV_CTL_EVENT_MASK_VALUE
|
4365 SNDRV_CTL_EVENT_MASK_INFO
, &hdsp
->spdif_ctl
->id
);
4370 static int snd_hdsp_capture_open(struct snd_pcm_substream
*substream
)
4372 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4373 struct snd_pcm_runtime
*runtime
= substream
->runtime
;
4375 if (hdsp_check_for_iobox (hdsp
))
4378 if (hdsp_check_for_firmware(hdsp
, 1))
4381 spin_lock_irq(&hdsp
->lock
);
4383 snd_pcm_set_sync(substream
);
4385 runtime
->hw
= snd_hdsp_capture_subinfo
;
4386 runtime
->dma_area
= hdsp
->capture_buffer
;
4387 runtime
->dma_bytes
= HDSP_DMA_AREA_BYTES
;
4389 hdsp
->capture_pid
= current
->pid
;
4390 hdsp
->capture_substream
= substream
;
4392 spin_unlock_irq(&hdsp
->lock
);
4394 snd_pcm_hw_constraint_msbits(runtime
, 0, 32, 24);
4395 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE
, &hdsp_hw_constraints_period_sizes
);
4396 if (hdsp
->io_type
== H9632
) {
4397 runtime
->hw
.channels_min
= hdsp
->qs_in_channels
;
4398 runtime
->hw
.channels_max
= hdsp
->ss_in_channels
;
4399 runtime
->hw
.rate_max
= 192000;
4400 runtime
->hw
.rates
= SNDRV_PCM_RATE_KNOT
;
4401 snd_pcm_hw_constraint_list(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
, &hdsp_hw_constraints_9632_sample_rates
);
4403 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
4404 snd_hdsp_hw_rule_in_channels
, hdsp
,
4405 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
4406 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_CHANNELS
,
4407 snd_hdsp_hw_rule_in_channels_rate
, hdsp
,
4408 SNDRV_PCM_HW_PARAM_RATE
, -1);
4409 snd_pcm_hw_rule_add(runtime
, 0, SNDRV_PCM_HW_PARAM_RATE
,
4410 snd_hdsp_hw_rule_rate_in_channels
, hdsp
,
4411 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
4415 static int snd_hdsp_capture_release(struct snd_pcm_substream
*substream
)
4417 struct hdsp
*hdsp
= snd_pcm_substream_chip(substream
);
4419 spin_lock_irq(&hdsp
->lock
);
4421 hdsp
->capture_pid
= -1;
4422 hdsp
->capture_substream
= NULL
;
4424 spin_unlock_irq(&hdsp
->lock
);
4428 static int snd_hdsp_hwdep_dummy_op(struct snd_hwdep
*hw
, struct file
*file
)
4430 /* we have nothing to initialize but the call is required */
4435 /* helper functions for copying meter values */
4436 static inline int copy_u32_le(void __user
*dest
, void __iomem
*src
)
4438 u32 val
= readl(src
);
4439 return copy_to_user(dest
, &val
, 4);
4442 static inline int copy_u64_le(void __user
*dest
, void __iomem
*src_low
, void __iomem
*src_high
)
4444 u32 rms_low
, rms_high
;
4446 rms_low
= readl(src_low
);
4447 rms_high
= readl(src_high
);
4448 rms
= ((u64
)rms_high
<< 32) | rms_low
;
4449 return copy_to_user(dest
, &rms
, 8);
4452 static inline int copy_u48_le(void __user
*dest
, void __iomem
*src_low
, void __iomem
*src_high
)
4454 u32 rms_low
, rms_high
;
4456 rms_low
= readl(src_low
) & 0xffffff00;
4457 rms_high
= readl(src_high
) & 0xffffff00;
4458 rms
= ((u64
)rms_high
<< 32) | rms_low
;
4459 return copy_to_user(dest
, &rms
, 8);
4462 static int hdsp_9652_get_peak(struct hdsp
*hdsp
, struct hdsp_peak_rms __user
*peak_rms
)
4464 int doublespeed
= 0;
4465 int i
, j
, channels
, ofs
;
4467 if (hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DoubleSpeedStatus
)
4469 channels
= doublespeed
? 14 : 26;
4470 for (i
= 0, j
= 0; i
< 26; ++i
) {
4471 if (doublespeed
&& (i
& 4))
4473 ofs
= HDSP_9652_peakBase
- j
* 4;
4474 if (copy_u32_le(&peak_rms
->input_peaks
[i
], hdsp
->iobase
+ ofs
))
4476 ofs
-= channels
* 4;
4477 if (copy_u32_le(&peak_rms
->playback_peaks
[i
], hdsp
->iobase
+ ofs
))
4479 ofs
-= channels
* 4;
4480 if (copy_u32_le(&peak_rms
->output_peaks
[i
], hdsp
->iobase
+ ofs
))
4482 ofs
= HDSP_9652_rmsBase
+ j
* 8;
4483 if (copy_u48_le(&peak_rms
->input_rms
[i
], hdsp
->iobase
+ ofs
,
4484 hdsp
->iobase
+ ofs
+ 4))
4486 ofs
+= channels
* 8;
4487 if (copy_u48_le(&peak_rms
->playback_rms
[i
], hdsp
->iobase
+ ofs
,
4488 hdsp
->iobase
+ ofs
+ 4))
4490 ofs
+= channels
* 8;
4491 if (copy_u48_le(&peak_rms
->output_rms
[i
], hdsp
->iobase
+ ofs
,
4492 hdsp
->iobase
+ ofs
+ 4))
4499 static int hdsp_9632_get_peak(struct hdsp
*hdsp
, struct hdsp_peak_rms __user
*peak_rms
)
4502 struct hdsp_9632_meters __iomem
*m
;
4503 int doublespeed
= 0;
4505 if (hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DoubleSpeedStatus
)
4507 m
= (struct hdsp_9632_meters __iomem
*)(hdsp
->iobase
+HDSP_9632_metersBase
);
4508 for (i
= 0, j
= 0; i
< 16; ++i
, ++j
) {
4509 if (copy_u32_le(&peak_rms
->input_peaks
[i
], &m
->input_peak
[j
]))
4511 if (copy_u32_le(&peak_rms
->playback_peaks
[i
], &m
->playback_peak
[j
]))
4513 if (copy_u32_le(&peak_rms
->output_peaks
[i
], &m
->output_peak
[j
]))
4515 if (copy_u64_le(&peak_rms
->input_rms
[i
], &m
->input_rms_low
[j
],
4516 &m
->input_rms_high
[j
]))
4518 if (copy_u64_le(&peak_rms
->playback_rms
[i
], &m
->playback_rms_low
[j
],
4519 &m
->playback_rms_high
[j
]))
4521 if (copy_u64_le(&peak_rms
->output_rms
[i
], &m
->output_rms_low
[j
],
4522 &m
->output_rms_high
[j
]))
4524 if (doublespeed
&& i
== 3) i
+= 4;
4529 static int hdsp_get_peak(struct hdsp
*hdsp
, struct hdsp_peak_rms __user
*peak_rms
)
4533 for (i
= 0; i
< 26; i
++) {
4534 if (copy_u32_le(&peak_rms
->playback_peaks
[i
],
4535 hdsp
->iobase
+ HDSP_playbackPeakLevel
+ i
* 4))
4537 if (copy_u32_le(&peak_rms
->input_peaks
[i
],
4538 hdsp
->iobase
+ HDSP_inputPeakLevel
+ i
* 4))
4541 for (i
= 0; i
< 28; i
++) {
4542 if (copy_u32_le(&peak_rms
->output_peaks
[i
],
4543 hdsp
->iobase
+ HDSP_outputPeakLevel
+ i
* 4))
4546 for (i
= 0; i
< 26; ++i
) {
4547 if (copy_u64_le(&peak_rms
->playback_rms
[i
],
4548 hdsp
->iobase
+ HDSP_playbackRmsLevel
+ i
* 8 + 4,
4549 hdsp
->iobase
+ HDSP_playbackRmsLevel
+ i
* 8))
4551 if (copy_u64_le(&peak_rms
->input_rms
[i
],
4552 hdsp
->iobase
+ HDSP_inputRmsLevel
+ i
* 8 + 4,
4553 hdsp
->iobase
+ HDSP_inputRmsLevel
+ i
* 8))
4559 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep
*hw
, struct file
*file
, unsigned int cmd
, unsigned long arg
)
4561 struct hdsp
*hdsp
= (struct hdsp
*)hw
->private_data
;
4562 void __user
*argp
= (void __user
*)arg
;
4565 case SNDRV_HDSP_IOCTL_GET_PEAK_RMS
: {
4566 struct hdsp_peak_rms __user
*peak_rms
= (struct hdsp_peak_rms __user
*)arg
;
4568 if (!(hdsp
->state
& HDSP_FirmwareLoaded
)) {
4569 snd_printk(KERN_ERR
"Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4573 switch (hdsp
->io_type
) {
4575 return hdsp_9652_get_peak(hdsp
, peak_rms
);
4577 return hdsp_9632_get_peak(hdsp
, peak_rms
);
4579 return hdsp_get_peak(hdsp
, peak_rms
);
4582 case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO
: {
4583 struct hdsp_config_info info
;
4584 unsigned long flags
;
4587 if (!(hdsp
->state
& HDSP_FirmwareLoaded
)) {
4588 snd_printk(KERN_ERR
"Hammerfall-DSP: Firmware needs to be uploaded to the card.\n");
4591 spin_lock_irqsave(&hdsp
->lock
, flags
);
4592 info
.pref_sync_ref
= (unsigned char)hdsp_pref_sync_ref(hdsp
);
4593 info
.wordclock_sync_check
= (unsigned char)hdsp_wc_sync_check(hdsp
);
4594 if (hdsp
->io_type
!= H9632
)
4595 info
.adatsync_sync_check
= (unsigned char)hdsp_adatsync_sync_check(hdsp
);
4596 info
.spdif_sync_check
= (unsigned char)hdsp_spdif_sync_check(hdsp
);
4597 for (i
= 0; i
< ((hdsp
->io_type
!= Multiface
&& hdsp
->io_type
!= H9632
) ? 3 : 1); ++i
)
4598 info
.adat_sync_check
[i
] = (unsigned char)hdsp_adat_sync_check(hdsp
, i
);
4599 info
.spdif_in
= (unsigned char)hdsp_spdif_in(hdsp
);
4600 info
.spdif_out
= (unsigned char)hdsp_spdif_out(hdsp
);
4601 info
.spdif_professional
= (unsigned char)hdsp_spdif_professional(hdsp
);
4602 info
.spdif_emphasis
= (unsigned char)hdsp_spdif_emphasis(hdsp
);
4603 info
.spdif_nonaudio
= (unsigned char)hdsp_spdif_nonaudio(hdsp
);
4604 info
.spdif_sample_rate
= hdsp_spdif_sample_rate(hdsp
);
4605 info
.system_sample_rate
= hdsp
->system_sample_rate
;
4606 info
.autosync_sample_rate
= hdsp_external_sample_rate(hdsp
);
4607 info
.system_clock_mode
= (unsigned char)hdsp_system_clock_mode(hdsp
);
4608 info
.clock_source
= (unsigned char)hdsp_clock_source(hdsp
);
4609 info
.autosync_ref
= (unsigned char)hdsp_autosync_ref(hdsp
);
4610 info
.line_out
= (unsigned char)hdsp_line_out(hdsp
);
4611 if (hdsp
->io_type
== H9632
) {
4612 info
.da_gain
= (unsigned char)hdsp_da_gain(hdsp
);
4613 info
.ad_gain
= (unsigned char)hdsp_ad_gain(hdsp
);
4614 info
.phone_gain
= (unsigned char)hdsp_phone_gain(hdsp
);
4615 info
.xlr_breakout_cable
= (unsigned char)hdsp_xlr_breakout_cable(hdsp
);
4618 if (hdsp
->io_type
== H9632
|| hdsp
->io_type
== H9652
)
4619 info
.analog_extension_board
= (unsigned char)hdsp_aeb(hdsp
);
4620 spin_unlock_irqrestore(&hdsp
->lock
, flags
);
4621 if (copy_to_user(argp
, &info
, sizeof(info
)))
4625 case SNDRV_HDSP_IOCTL_GET_9632_AEB
: {
4626 struct hdsp_9632_aeb h9632_aeb
;
4628 if (hdsp
->io_type
!= H9632
) return -EINVAL
;
4629 h9632_aeb
.aebi
= hdsp
->ss_in_channels
- H9632_SS_CHANNELS
;
4630 h9632_aeb
.aebo
= hdsp
->ss_out_channels
- H9632_SS_CHANNELS
;
4631 if (copy_to_user(argp
, &h9632_aeb
, sizeof(h9632_aeb
)))
4635 case SNDRV_HDSP_IOCTL_GET_VERSION
: {
4636 struct hdsp_version hdsp_version
;
4639 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) return -EINVAL
;
4640 if (hdsp
->io_type
== Undefined
) {
4641 if ((err
= hdsp_get_iobox_version(hdsp
)) < 0)
4644 hdsp_version
.io_type
= hdsp
->io_type
;
4645 hdsp_version
.firmware_rev
= hdsp
->firmware_rev
;
4646 if ((err
= copy_to_user(argp
, &hdsp_version
, sizeof(hdsp_version
))))
4650 case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE
: {
4651 struct hdsp_firmware __user
*firmware
;
4652 u32 __user
*firmware_data
;
4655 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
) return -EINVAL
;
4656 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4657 if (hdsp
->io_type
== Undefined
) return -EINVAL
;
4659 if (hdsp
->state
& (HDSP_FirmwareCached
| HDSP_FirmwareLoaded
))
4662 snd_printk(KERN_INFO
"Hammerfall-DSP: initializing firmware upload\n");
4663 firmware
= (struct hdsp_firmware __user
*)argp
;
4665 if (get_user(firmware_data
, &firmware
->firmware_data
))
4668 if (hdsp_check_for_iobox (hdsp
))
4671 if (copy_from_user(hdsp
->firmware_cache
, firmware_data
, sizeof(hdsp
->firmware_cache
)) != 0)
4674 hdsp
->state
|= HDSP_FirmwareCached
;
4676 if ((err
= snd_hdsp_load_firmware_from_cache(hdsp
)) < 0)
4679 if (!(hdsp
->state
& HDSP_InitializationComplete
)) {
4680 if ((err
= snd_hdsp_enable_io(hdsp
)) < 0)
4683 snd_hdsp_initialize_channels(hdsp
);
4684 snd_hdsp_initialize_midi_flush(hdsp
);
4686 if ((err
= snd_hdsp_create_alsa_devices(hdsp
->card
, hdsp
)) < 0) {
4687 snd_printk(KERN_ERR
"Hammerfall-DSP: error creating alsa devices\n");
4693 case SNDRV_HDSP_IOCTL_GET_MIXER
: {
4694 struct hdsp_mixer __user
*mixer
= (struct hdsp_mixer __user
*)argp
;
4695 if (copy_to_user(mixer
->matrix
, hdsp
->mixer_matrix
, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE
))
4705 static struct snd_pcm_ops snd_hdsp_playback_ops
= {
4706 .open
= snd_hdsp_playback_open
,
4707 .close
= snd_hdsp_playback_release
,
4708 .ioctl
= snd_hdsp_ioctl
,
4709 .hw_params
= snd_hdsp_hw_params
,
4710 .prepare
= snd_hdsp_prepare
,
4711 .trigger
= snd_hdsp_trigger
,
4712 .pointer
= snd_hdsp_hw_pointer
,
4713 .copy
= snd_hdsp_playback_copy
,
4714 .silence
= snd_hdsp_hw_silence
,
4717 static struct snd_pcm_ops snd_hdsp_capture_ops
= {
4718 .open
= snd_hdsp_capture_open
,
4719 .close
= snd_hdsp_capture_release
,
4720 .ioctl
= snd_hdsp_ioctl
,
4721 .hw_params
= snd_hdsp_hw_params
,
4722 .prepare
= snd_hdsp_prepare
,
4723 .trigger
= snd_hdsp_trigger
,
4724 .pointer
= snd_hdsp_hw_pointer
,
4725 .copy
= snd_hdsp_capture_copy
,
4728 static int __devinit
snd_hdsp_create_hwdep(struct snd_card
*card
,
4731 struct snd_hwdep
*hw
;
4734 if ((err
= snd_hwdep_new(card
, "HDSP hwdep", 0, &hw
)) < 0)
4738 hw
->private_data
= hdsp
;
4739 strcpy(hw
->name
, "HDSP hwdep interface");
4741 hw
->ops
.open
= snd_hdsp_hwdep_dummy_op
;
4742 hw
->ops
.ioctl
= snd_hdsp_hwdep_ioctl
;
4743 hw
->ops
.release
= snd_hdsp_hwdep_dummy_op
;
4748 static int snd_hdsp_create_pcm(struct snd_card
*card
, struct hdsp
*hdsp
)
4750 struct snd_pcm
*pcm
;
4753 if ((err
= snd_pcm_new(card
, hdsp
->card_name
, 0, 1, 1, &pcm
)) < 0)
4757 pcm
->private_data
= hdsp
;
4758 strcpy(pcm
->name
, hdsp
->card_name
);
4760 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_PLAYBACK
, &snd_hdsp_playback_ops
);
4761 snd_pcm_set_ops(pcm
, SNDRV_PCM_STREAM_CAPTURE
, &snd_hdsp_capture_ops
);
4763 pcm
->info_flags
= SNDRV_PCM_INFO_JOINT_DUPLEX
;
4768 static void snd_hdsp_9652_enable_mixer (struct hdsp
*hdsp
)
4770 hdsp
->control2_register
|= HDSP_9652_ENABLE_MIXER
;
4771 hdsp_write (hdsp
, HDSP_control2Reg
, hdsp
->control2_register
);
4774 static int snd_hdsp_enable_io (struct hdsp
*hdsp
)
4778 if (hdsp_fifo_wait (hdsp
, 0, 100)) {
4779 snd_printk(KERN_ERR
"Hammerfall-DSP: enable_io fifo_wait failed\n");
4783 for (i
= 0; i
< hdsp
->max_channels
; ++i
) {
4784 hdsp_write (hdsp
, HDSP_inputEnable
+ (4 * i
), 1);
4785 hdsp_write (hdsp
, HDSP_outputEnable
+ (4 * i
), 1);
4791 static void snd_hdsp_initialize_channels(struct hdsp
*hdsp
)
4793 int status
, aebi_channels
, aebo_channels
;
4795 switch (hdsp
->io_type
) {
4797 hdsp
->card_name
= "RME Hammerfall DSP + Digiface";
4798 hdsp
->ss_in_channels
= hdsp
->ss_out_channels
= DIGIFACE_SS_CHANNELS
;
4799 hdsp
->ds_in_channels
= hdsp
->ds_out_channels
= DIGIFACE_DS_CHANNELS
;
4803 hdsp
->card_name
= "RME Hammerfall HDSP 9652";
4804 hdsp
->ss_in_channels
= hdsp
->ss_out_channels
= H9652_SS_CHANNELS
;
4805 hdsp
->ds_in_channels
= hdsp
->ds_out_channels
= H9652_DS_CHANNELS
;
4809 status
= hdsp_read(hdsp
, HDSP_statusRegister
);
4810 /* HDSP_AEBx bits are low when AEB are connected */
4811 aebi_channels
= (status
& HDSP_AEBI
) ? 0 : 4;
4812 aebo_channels
= (status
& HDSP_AEBO
) ? 0 : 4;
4813 hdsp
->card_name
= "RME Hammerfall HDSP 9632";
4814 hdsp
->ss_in_channels
= H9632_SS_CHANNELS
+aebi_channels
;
4815 hdsp
->ds_in_channels
= H9632_DS_CHANNELS
+aebi_channels
;
4816 hdsp
->qs_in_channels
= H9632_QS_CHANNELS
+aebi_channels
;
4817 hdsp
->ss_out_channels
= H9632_SS_CHANNELS
+aebo_channels
;
4818 hdsp
->ds_out_channels
= H9632_DS_CHANNELS
+aebo_channels
;
4819 hdsp
->qs_out_channels
= H9632_QS_CHANNELS
+aebo_channels
;
4823 hdsp
->card_name
= "RME Hammerfall DSP + Multiface";
4824 hdsp
->ss_in_channels
= hdsp
->ss_out_channels
= MULTIFACE_SS_CHANNELS
;
4825 hdsp
->ds_in_channels
= hdsp
->ds_out_channels
= MULTIFACE_DS_CHANNELS
;
4829 /* should never get here */
4834 static void snd_hdsp_initialize_midi_flush (struct hdsp
*hdsp
)
4836 snd_hdsp_flush_midi_input (hdsp
, 0);
4837 snd_hdsp_flush_midi_input (hdsp
, 1);
4840 static int snd_hdsp_create_alsa_devices(struct snd_card
*card
, struct hdsp
*hdsp
)
4844 if ((err
= snd_hdsp_create_pcm(card
, hdsp
)) < 0) {
4845 snd_printk(KERN_ERR
"Hammerfall-DSP: Error creating pcm interface\n");
4850 if ((err
= snd_hdsp_create_midi(card
, hdsp
, 0)) < 0) {
4851 snd_printk(KERN_ERR
"Hammerfall-DSP: Error creating first midi interface\n");
4855 if (hdsp
->io_type
== Digiface
|| hdsp
->io_type
== H9652
) {
4856 if ((err
= snd_hdsp_create_midi(card
, hdsp
, 1)) < 0) {
4857 snd_printk(KERN_ERR
"Hammerfall-DSP: Error creating second midi interface\n");
4862 if ((err
= snd_hdsp_create_controls(card
, hdsp
)) < 0) {
4863 snd_printk(KERN_ERR
"Hammerfall-DSP: Error creating ctl interface\n");
4867 snd_hdsp_proc_init(hdsp
);
4869 hdsp
->system_sample_rate
= -1;
4870 hdsp
->playback_pid
= -1;
4871 hdsp
->capture_pid
= -1;
4872 hdsp
->capture_substream
= NULL
;
4873 hdsp
->playback_substream
= NULL
;
4875 if ((err
= snd_hdsp_set_defaults(hdsp
)) < 0) {
4876 snd_printk(KERN_ERR
"Hammerfall-DSP: Error setting default values\n");
4880 if (!(hdsp
->state
& HDSP_InitializationComplete
)) {
4881 strcpy(card
->shortname
, "Hammerfall DSP");
4882 sprintf(card
->longname
, "%s at 0x%lx, irq %d", hdsp
->card_name
,
4883 hdsp
->port
, hdsp
->irq
);
4885 if ((err
= snd_card_register(card
)) < 0) {
4886 snd_printk(KERN_ERR
"Hammerfall-DSP: error registering card\n");
4889 hdsp
->state
|= HDSP_InitializationComplete
;
4895 #ifdef HDSP_FW_LOADER
4896 /* load firmware via hotplug fw loader */
4897 static int __devinit
hdsp_request_fw_loader(struct hdsp
*hdsp
)
4900 const struct firmware
*fw
;
4903 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
)
4905 if (hdsp
->io_type
== Undefined
) {
4906 if ((err
= hdsp_get_iobox_version(hdsp
)) < 0)
4908 if (hdsp
->io_type
== H9652
|| hdsp
->io_type
== H9632
)
4912 /* caution: max length of firmware filename is 30! */
4913 switch (hdsp
->io_type
) {
4915 if (hdsp
->firmware_rev
== 0xa)
4916 fwfile
= "multiface_firmware.bin";
4918 fwfile
= "multiface_firmware_rev11.bin";
4921 if (hdsp
->firmware_rev
== 0xa)
4922 fwfile
= "digiface_firmware.bin";
4924 fwfile
= "digiface_firmware_rev11.bin";
4927 snd_printk(KERN_ERR
"Hammerfall-DSP: invalid io_type %d\n", hdsp
->io_type
);
4931 if (request_firmware(&fw
, fwfile
, &hdsp
->pci
->dev
)) {
4932 snd_printk(KERN_ERR
"Hammerfall-DSP: cannot load firmware %s\n", fwfile
);
4935 if (fw
->size
< sizeof(hdsp
->firmware_cache
)) {
4936 snd_printk(KERN_ERR
"Hammerfall-DSP: too short firmware size %d (expected %d)\n",
4937 (int)fw
->size
, (int)sizeof(hdsp
->firmware_cache
));
4938 release_firmware(fw
);
4942 memcpy(hdsp
->firmware_cache
, fw
->data
, sizeof(hdsp
->firmware_cache
));
4944 release_firmware(fw
);
4946 hdsp
->state
|= HDSP_FirmwareCached
;
4948 if ((err
= snd_hdsp_load_firmware_from_cache(hdsp
)) < 0)
4951 if (!(hdsp
->state
& HDSP_InitializationComplete
)) {
4952 if ((err
= snd_hdsp_enable_io(hdsp
)) < 0)
4955 if ((err
= snd_hdsp_create_hwdep(hdsp
->card
, hdsp
)) < 0) {
4956 snd_printk(KERN_ERR
"Hammerfall-DSP: error creating hwdep device\n");
4959 snd_hdsp_initialize_channels(hdsp
);
4960 snd_hdsp_initialize_midi_flush(hdsp
);
4961 if ((err
= snd_hdsp_create_alsa_devices(hdsp
->card
, hdsp
)) < 0) {
4962 snd_printk(KERN_ERR
"Hammerfall-DSP: error creating alsa devices\n");
4970 static int __devinit
snd_hdsp_create(struct snd_card
*card
,
4973 struct pci_dev
*pci
= hdsp
->pci
;
4980 hdsp
->midi
[0].rmidi
= NULL
;
4981 hdsp
->midi
[1].rmidi
= NULL
;
4982 hdsp
->midi
[0].input
= NULL
;
4983 hdsp
->midi
[1].input
= NULL
;
4984 hdsp
->midi
[0].output
= NULL
;
4985 hdsp
->midi
[1].output
= NULL
;
4986 hdsp
->midi
[0].pending
= 0;
4987 hdsp
->midi
[1].pending
= 0;
4988 spin_lock_init(&hdsp
->midi
[0].lock
);
4989 spin_lock_init(&hdsp
->midi
[1].lock
);
4990 hdsp
->iobase
= NULL
;
4991 hdsp
->control_register
= 0;
4992 hdsp
->control2_register
= 0;
4993 hdsp
->io_type
= Undefined
;
4994 hdsp
->max_channels
= 26;
4998 spin_lock_init(&hdsp
->lock
);
5000 tasklet_init(&hdsp
->midi_tasklet
, hdsp_midi_tasklet
, (unsigned long)hdsp
);
5002 pci_read_config_word(hdsp
->pci
, PCI_CLASS_REVISION
, &hdsp
->firmware_rev
);
5003 hdsp
->firmware_rev
&= 0xff;
5005 /* From Martin Bjoernsen :
5006 "It is important that the card's latency timer register in
5007 the PCI configuration space is set to a value much larger
5008 than 0 by the computer's BIOS or the driver.
5009 The windows driver always sets this 8 bit register [...]
5010 to its maximum 255 to avoid problems with some computers."
5012 pci_write_config_byte(hdsp
->pci
, PCI_LATENCY_TIMER
, 0xFF);
5014 strcpy(card
->driver
, "H-DSP");
5015 strcpy(card
->mixername
, "Xilinx FPGA");
5017 if (hdsp
->firmware_rev
< 0xa)
5019 else if (hdsp
->firmware_rev
< 0x64)
5020 hdsp
->card_name
= "RME Hammerfall DSP";
5021 else if (hdsp
->firmware_rev
< 0x96) {
5022 hdsp
->card_name
= "RME HDSP 9652";
5025 hdsp
->card_name
= "RME HDSP 9632";
5026 hdsp
->max_channels
= 16;
5030 if ((err
= pci_enable_device(pci
)) < 0)
5033 pci_set_master(hdsp
->pci
);
5035 if ((err
= pci_request_regions(pci
, "hdsp")) < 0)
5037 hdsp
->port
= pci_resource_start(pci
, 0);
5038 if ((hdsp
->iobase
= ioremap_nocache(hdsp
->port
, HDSP_IO_EXTENT
)) == NULL
) {
5039 snd_printk(KERN_ERR
"Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp
->port
, hdsp
->port
+ HDSP_IO_EXTENT
- 1);
5043 if (request_irq(pci
->irq
, snd_hdsp_interrupt
, IRQF_SHARED
,
5045 snd_printk(KERN_ERR
"Hammerfall-DSP: unable to use IRQ %d\n", pci
->irq
);
5049 hdsp
->irq
= pci
->irq
;
5050 hdsp
->precise_ptr
= 0;
5051 hdsp
->use_midi_tasklet
= 1;
5052 hdsp
->dds_value
= 0;
5054 if ((err
= snd_hdsp_initialize_memory(hdsp
)) < 0)
5057 if (!is_9652
&& !is_9632
) {
5058 /* we wait 2 seconds to let freshly inserted cardbus cards do their hardware init */
5061 if ((hdsp_read (hdsp
, HDSP_statusRegister
) & HDSP_DllError
) != 0) {
5062 #ifdef HDSP_FW_LOADER
5063 if ((err
= hdsp_request_fw_loader(hdsp
)) < 0)
5064 /* we don't fail as this can happen
5065 if userspace is not ready for
5068 snd_printk(KERN_ERR
"Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5070 /* init is complete, we return */
5073 /* no iobox connected, we defer initialization */
5074 snd_printk(KERN_INFO
"Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5075 if ((err
= snd_hdsp_create_hwdep(card
, hdsp
)) < 0)
5079 snd_printk(KERN_INFO
"Hammerfall-DSP: Firmware already present, initializing card.\n");
5080 if (hdsp_read(hdsp
, HDSP_status2Register
) & HDSP_version1
)
5081 hdsp
->io_type
= Multiface
;
5083 hdsp
->io_type
= Digiface
;
5087 if ((err
= snd_hdsp_enable_io(hdsp
)) != 0)
5091 hdsp
->io_type
= H9652
;
5094 hdsp
->io_type
= H9632
;
5096 if ((err
= snd_hdsp_create_hwdep(card
, hdsp
)) < 0)
5099 snd_hdsp_initialize_channels(hdsp
);
5100 snd_hdsp_initialize_midi_flush(hdsp
);
5102 hdsp
->state
|= HDSP_FirmwareLoaded
;
5104 if ((err
= snd_hdsp_create_alsa_devices(card
, hdsp
)) < 0)
5110 static int snd_hdsp_free(struct hdsp
*hdsp
)
5113 /* stop the audio, and cancel all interrupts */
5114 tasklet_kill(&hdsp
->midi_tasklet
);
5115 hdsp
->control_register
&= ~(HDSP_Start
|HDSP_AudioInterruptEnable
|HDSP_Midi0InterruptEnable
|HDSP_Midi1InterruptEnable
);
5116 hdsp_write (hdsp
, HDSP_controlRegister
, hdsp
->control_register
);
5120 free_irq(hdsp
->irq
, (void *)hdsp
);
5122 snd_hdsp_free_buffers(hdsp
);
5125 iounmap(hdsp
->iobase
);
5128 pci_release_regions(hdsp
->pci
);
5130 pci_disable_device(hdsp
->pci
);
5134 static void snd_hdsp_card_free(struct snd_card
*card
)
5136 struct hdsp
*hdsp
= (struct hdsp
*) card
->private_data
;
5139 snd_hdsp_free(hdsp
);
5142 static int __devinit
snd_hdsp_probe(struct pci_dev
*pci
,
5143 const struct pci_device_id
*pci_id
)
5147 struct snd_card
*card
;
5150 if (dev
>= SNDRV_CARDS
)
5157 if (!(card
= snd_card_new(index
[dev
], id
[dev
], THIS_MODULE
, sizeof(struct hdsp
))))
5160 hdsp
= (struct hdsp
*) card
->private_data
;
5161 card
->private_free
= snd_hdsp_card_free
;
5164 snd_card_set_dev(card
, &pci
->dev
);
5166 if ((err
= snd_hdsp_create(card
, hdsp
)) < 0) {
5167 snd_card_free(card
);
5171 strcpy(card
->shortname
, "Hammerfall DSP");
5172 sprintf(card
->longname
, "%s at 0x%lx, irq %d", hdsp
->card_name
,
5173 hdsp
->port
, hdsp
->irq
);
5175 if ((err
= snd_card_register(card
)) < 0) {
5176 snd_card_free(card
);
5179 pci_set_drvdata(pci
, card
);
5184 static void __devexit
snd_hdsp_remove(struct pci_dev
*pci
)
5186 snd_card_free(pci_get_drvdata(pci
));
5187 pci_set_drvdata(pci
, NULL
);
5190 static struct pci_driver driver
= {
5191 .name
= "RME Hammerfall DSP",
5192 .id_table
= snd_hdsp_ids
,
5193 .probe
= snd_hdsp_probe
,
5194 .remove
= __devexit_p(snd_hdsp_remove
),
5197 static int __init
alsa_card_hdsp_init(void)
5199 return pci_register_driver(&driver
);
5202 static void __exit
alsa_card_hdsp_exit(void)
5204 pci_unregister_driver(&driver
);
5207 module_init(alsa_card_hdsp_init
)
5208 module_exit(alsa_card_hdsp_exit
)