sound/soc/au1x/psc-ac97.c

   1 /*
   2  * Au12x0/Au1550 PSC ALSA ASoC audio support.
   3  *
   4  * (c) 2007-2009 MSC Vertriebsges.m.b.H.,
   5  *      Manuel Lauss <manuel.lauss@gmail.com>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  *
  11  * Au1xxx-PSC AC97 glue.
  12  *
  13  * NOTE: all of these drivers can only work with a SINGLE instance
  14  *       of a PSC. Multiple independent audio devices are impossible
  15  *       with ASoC v1.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/module.h>
  20 #include <linux/slab.h>
  21 #include <linux/device.h>
  22 #include <linux/delay.h>
  23 #include <linux/mutex.h>
  24 #include <linux/suspend.h>
  25 #include <sound/core.h>
  26 #include <sound/pcm.h>
  27 #include <sound/initval.h>
  28 #include <sound/soc.h>
  29 #include <asm/mach-au1x00/au1000.h>
  30 #include <asm/mach-au1x00/au1xxx_psc.h>
  31
  32 #include "psc.h"
  33
  34 /* how often to retry failed codec register reads/writes */
  35 #define AC97_RW_RETRIES 5
  36
  37 #define AC97_DIR        \
  38         (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
  39
  40 #define AC97_RATES      \
  41         SNDRV_PCM_RATE_8000_48000
  42
  43 #define AC97_FMTS       \
  44         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
  45
  46 #define AC97PCR_START(stype)    \
  47         ((stype) == PCM_TX ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
  48 #define AC97PCR_STOP(stype)     \
  49         ((stype) == PCM_TX ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
  50 #define AC97PCR_CLRFIFO(stype)  \
  51         ((stype) == PCM_TX ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
  52
  53 #define AC97STAT_BUSY(stype)    \
  54         ((stype) == PCM_TX ? PSC_AC97STAT_TB : PSC_AC97STAT_RB)
  55
  56 /* instance data. There can be only one, MacLeod!!!! */
  57 static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
  58
  59 /* AC97 controller reads codec register */
  60 static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
  61                                         unsigned short reg)
  62 {
  63         /* FIXME */
  64         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
  65         unsigned short retry, tmo;
  66         unsigned long data;
  67
  68         au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
  69         au_sync();
  70
  71         retry = AC97_RW_RETRIES;
  72         do {
  73                 mutex_lock(&pscdata->lock);
  74
  75                 au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg),
  76                           AC97_CDC(pscdata));
  77                 au_sync();
  78
  79                 tmo = 20;
  80                 do {
  81                         udelay(21);
  82                         if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
  83                                 break;
  84                 } while (--tmo);
  85
  86                 data = au_readl(AC97_CDC(pscdata));
  87
  88                 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
  89                 au_sync();
  90
  91                 mutex_unlock(&pscdata->lock);
  92
  93                 if (reg != ((data >> 16) & 0x7f))
  94                         tmo = 1;        /* wrong register, try again */
  95
  96         } while (--retry && !tmo);
  97
  98         return retry ? data & 0xffff : 0xffff;
  99 }
 100
 101 /* AC97 controller writes to codec register */
 102 static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
 103                                 unsigned short val)
 104 {
 105         /* FIXME */
 106         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 107         unsigned int tmo, retry;
 108
 109         au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
 110         au_sync();
 111
 112         retry = AC97_RW_RETRIES;
 113         do {
 114                 mutex_lock(&pscdata->lock);
 115
 116                 au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff),
 117                           AC97_CDC(pscdata));
 118                 au_sync();
 119
 120                 tmo = 20;
 121                 do {
 122                         udelay(21);
 123                         if (au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)
 124                                 break;
 125                 } while (--tmo);
 126
 127                 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
 128                 au_sync();
 129
 130                 mutex_unlock(&pscdata->lock);
 131         } while (--retry && !tmo);
 132 }
 133
 134 /* AC97 controller asserts a warm reset */
 135 static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97)
 136 {
 137         /* FIXME */
 138         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 139
 140         au_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
 141         au_sync();
 142         msleep(10);
 143         au_writel(0, AC97_RST(pscdata));
 144         au_sync();
 145 }
 146
 147 static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
 148 {
 149         /* FIXME */
 150         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 151         int i;
 152
 153         /* disable PSC during cold reset */
 154         au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
 155         au_sync();
 156         au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata));
 157         au_sync();
 158
 159         /* issue cold reset */
 160         au_writel(PSC_AC97RST_RST, AC97_RST(pscdata));
 161         au_sync();
 162         msleep(500);
 163         au_writel(0, AC97_RST(pscdata));
 164         au_sync();
 165
 166         /* enable PSC */
 167         au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
 168         au_sync();
 169
 170         /* wait for PSC to indicate it's ready */
 171         i = 1000;
 172         while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
 173                 msleep(1);
 174
 175         if (i == 0) {
 176                 printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
 177                 return;
 178         }
 179
 180         /* enable the ac97 function */
 181         au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
 182         au_sync();
 183
 184         /* wait for AC97 core to become ready */
 185         i = 1000;
 186         while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
 187                 msleep(1);
 188         if (i == 0)
 189                 printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
 190 }
 191
 192 /* AC97 controller operations */
 193 struct snd_ac97_bus_ops soc_ac97_ops = {
 194         .read           = au1xpsc_ac97_read,
 195         .write          = au1xpsc_ac97_write,
 196         .reset          = au1xpsc_ac97_cold_reset,
 197         .warm_reset     = au1xpsc_ac97_warm_reset,
 198 };
 199 EXPORT_SYMBOL_GPL(soc_ac97_ops);
 200
 201 static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
 202                                   struct snd_pcm_hw_params *params,
 203                                   struct snd_soc_dai *dai)
 204 {
 205         /* FIXME */
 206         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 207         unsigned long r, ro, stat;
 208         int chans, t, stype = SUBSTREAM_TYPE(substream);
 209
 210         chans = params_channels(params);
 211
 212         r = ro = au_readl(AC97_CFG(pscdata));
 213         stat = au_readl(AC97_STAT(pscdata));
 214
 215         /* already active? */
 216         if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) {
 217                 /* reject parameters not currently set up */
 218                 if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) ||
 219                     (pscdata->rate != params_rate(params)))
 220                         return -EINVAL;
 221         } else {
 222
 223                 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
 224                 r &= ~PSC_AC97CFG_LEN_MASK;
 225                 r |= PSC_AC97CFG_SET_LEN(params->msbits);
 226
 227                 /* channels: enable slots for front L/R channel */
 228                 if (stype == PCM_TX) {
 229                         r &= ~PSC_AC97CFG_TXSLOT_MASK;
 230                         r |= PSC_AC97CFG_TXSLOT_ENA(3);
 231                         r |= PSC_AC97CFG_TXSLOT_ENA(4);
 232                 } else {
 233                         r &= ~PSC_AC97CFG_RXSLOT_MASK;
 234                         r |= PSC_AC97CFG_RXSLOT_ENA(3);
 235                         r |= PSC_AC97CFG_RXSLOT_ENA(4);
 236                 }
 237
 238                 /* do we need to poke the hardware? */
 239                 if (!(r ^ ro))
 240                         goto out;
 241
 242                 /* ac97 engine is about to be disabled */
 243                 mutex_lock(&pscdata->lock);
 244
 245                 /* disable AC97 device controller first... */
 246                 au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
 247                 au_sync();
 248
 249                 /* ...wait for it... */
 250                 t = 100;
 251                 while ((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR) && --t)
 252                         msleep(1);
 253
 254                 if (!t)
 255                         printk(KERN_ERR "PSC-AC97: can't disable!\n");
 256
 257                 /* ...write config... */
 258                 au_writel(r, AC97_CFG(pscdata));
 259                 au_sync();
 260
 261                 /* ...enable the AC97 controller again... */
 262                 au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
 263                 au_sync();
 264
 265                 /* ...and wait for ready bit */
 266                 t = 100;
 267                 while ((!(au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && --t)
 268                         msleep(1);
 269
 270                 if (!t)
 271                         printk(KERN_ERR "PSC-AC97: can't enable!\n");
 272
 273                 mutex_unlock(&pscdata->lock);
 274
 275                 pscdata->cfg = r;
 276                 pscdata->rate = params_rate(params);
 277         }
 278
 279 out:
 280         return 0;
 281 }
 282
 283 static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
 284                                 int cmd, struct snd_soc_dai *dai)
 285 {
 286         /* FIXME */
 287         struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
 288         int ret, stype = SUBSTREAM_TYPE(substream);
 289
 290         ret = 0;
 291
 292         switch (cmd) {
 293         case SNDRV_PCM_TRIGGER_START:
 294         case SNDRV_PCM_TRIGGER_RESUME:
 295                 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
 296                 au_sync();
 297                 au_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
 298                 au_sync();
 299                 break;
 300         case SNDRV_PCM_TRIGGER_STOP:
 301         case SNDRV_PCM_TRIGGER_SUSPEND:
 302                 au_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
 303                 au_sync();
 304
 305                 while (au_readl(AC97_STAT(pscdata)) & AC97STAT_BUSY(stype))
 306                         asm volatile ("nop");
 307
 308                 au_writel(AC97PCR_CLRFIFO(stype), AC97_PCR(pscdata));
 309                 au_sync();
 310
 311                 break;
 312         default:
 313                 ret = -EINVAL;
 314         }
 315         return ret;
 316 }
 317
 318 static int au1xpsc_ac97_probe(struct snd_soc_dai *dai)
 319 {
 320         return au1xpsc_ac97_workdata ? 0 : -ENODEV;
 321 }
 322
 323 static struct snd_soc_dai_ops au1xpsc_ac97_dai_ops = {
 324         .trigger        = au1xpsc_ac97_trigger,
 325         .hw_params      = au1xpsc_ac97_hw_params,
 326 };
 327
 328 struct snd_soc_dai_driver au1xpsc_ac97_dai = {
 329         .ac97_control           = 1,
 330         .probe                  = au1xpsc_ac97_probe,
 331         .playback = {
 332                 .rates          = AC97_RATES,
 333                 .formats        = AC97_FMTS,
 334                 .channels_min   = 2,
 335                 .channels_max   = 2,
 336         },
 337         .capture = {
 338                 .rates          = AC97_RATES,
 339                 .formats        = AC97_FMTS,
 340                 .channels_min   = 2,
 341                 .channels_max   = 2,
 342         },
 343         .ops = &au1xpsc_ac97_dai_ops,
 344 };
 345 EXPORT_SYMBOL_GPL(au1xpsc_ac97_dai);
 346
 347 static int __devinit au1xpsc_ac97_drvprobe(struct platform_device *pdev)
 348 {
 349         int ret;
 350         struct resource *r;
 351         unsigned long sel;
 352         struct au1xpsc_audio_data *wd;
 353
 354         if (au1xpsc_ac97_workdata)
 355                 return -EBUSY;
 356
 357         wd = kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
 358         if (!wd)
 359                 return -ENOMEM;
 360
 361         mutex_init(&wd->lock);
 362
 363         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 364         if (!r) {
 365                 ret = -ENODEV;
 366                 goto out0;
 367         }
 368
 369         ret = -EBUSY;
 370         if (!request_mem_region(r->start, resource_size(r), pdev->name))
 371                 goto out0;
 372
 373         wd->mmio = ioremap(r->start, resource_size(r));
 374         if (!wd->mmio)
 375                 goto out1;
 376
 377         /* configuration: max dma trigger threshold, enable ac97 */
 378         wd->cfg = PSC_AC97CFG_RT_FIFO8 | PSC_AC97CFG_TT_FIFO8 |
 379                   PSC_AC97CFG_DE_ENABLE;
 380
 381         /* preserve PSC clock source set up by platform  */
 382         sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
 383         au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
 384         au_sync();
 385         au_writel(0, PSC_SEL(wd));
 386         au_sync();
 387         au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(wd));
 388         au_sync();
 389
 390         ret = snd_soc_register_dai(&pdev->dev, &au1xpsc_ac97_dai);
 391         if (ret)
 392                 goto out1;
 393
 394         wd->dmapd = au1xpsc_pcm_add(pdev);
 395         if (wd->dmapd) {
 396                 platform_set_drvdata(pdev, wd);
 397                 au1xpsc_ac97_workdata = wd;     /* MDEV */
 398                 return 0;
 399         }
 400
 401         snd_soc_unregister_dai(&pdev->dev);
 402 out1:
 403         release_mem_region(r->start, resource_size(r));
 404 out0:
 405         kfree(wd);
 406         return ret;
 407 }
 408
 409 static int __devexit au1xpsc_ac97_drvremove(struct platform_device *pdev)
 410 {
 411         struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
 412         struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 413
 414         if (wd->dmapd)
 415                 au1xpsc_pcm_destroy(wd->dmapd);
 416
 417         snd_soc_unregister_dai(&pdev->dev);
 418
 419         /* disable PSC completely */
 420         au_writel(0, AC97_CFG(wd));
 421         au_sync();
 422         au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
 423         au_sync();
 424
 425         iounmap(wd->mmio);
 426         release_mem_region(r->start, resource_size(r));
 427         kfree(wd);
 428
 429         au1xpsc_ac97_workdata = NULL;   /* MDEV */
 430
 431         return 0;
 432 }
 433
 434 #ifdef CONFIG_PM
 435 static int au1xpsc_ac97_drvsuspend(struct device *dev)
 436 {
 437         struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
 438
 439         /* save interesting registers and disable PSC */
 440         wd->pm[0] = au_readl(PSC_SEL(wd));
 441
 442         au_writel(0, AC97_CFG(wd));
 443         au_sync();
 444         au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
 445         au_sync();
 446
 447         return 0;
 448 }
 449
 450 static int au1xpsc_ac97_drvresume(struct device *dev)
 451 {
 452         struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
 453
 454         /* restore PSC clock config */
 455         au_writel(wd->pm[0] | PSC_SEL_PS_AC97MODE, PSC_SEL(wd));
 456         au_sync();
 457
 458         /* after this point the ac97 core will cold-reset the codec.
 459          * During cold-reset the PSC is reinitialized and the last
 460          * configuration set up in hw_params() is restored.
 461          */
 462         return 0;
 463 }
 464
 465 static struct dev_pm_ops au1xpscac97_pmops = {
 466         .suspend        = au1xpsc_ac97_drvsuspend,
 467         .resume         = au1xpsc_ac97_drvresume,
 468 };
 469
 470 #define AU1XPSCAC97_PMOPS &au1xpscac97_pmops
 471
 472 #else
 473
 474 #define AU1XPSCAC97_PMOPS NULL
 475
 476 #endif
 477
 478 static struct platform_driver au1xpsc_ac97_driver = {
 479         .driver = {
 480                 .name   = "au1xpsc-ac97",
 481                 .owner  = THIS_MODULE,
 482                 .pm     = AU1XPSCAC97_PMOPS,
 483         },
 484         .probe          = au1xpsc_ac97_drvprobe,
 485         .remove         = __devexit_p(au1xpsc_ac97_drvremove),
 486 };
 487
 488 static int __init au1xpsc_ac97_load(void)
 489 {
 490         au1xpsc_ac97_workdata = NULL;
 491         return platform_driver_register(&au1xpsc_ac97_driver);
 492 }
 493
 494 static void __exit au1xpsc_ac97_unload(void)
 495 {
 496         platform_driver_unregister(&au1xpsc_ac97_driver);
 497 }
 498
 499 module_init(au1xpsc_ac97_load);
 500 module_exit(au1xpsc_ac97_unload);
 501
 502 MODULE_LICENSE("GPL");
 503 MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
 504 MODULE_AUTHOR("Manuel Lauss");
 505