ASoC: samsung: fix module_device_table
[deliverable/linux.git] / sound / soc / au1x / psc-i2s.c
1 /*
2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
3 *
4 * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <manuel.lauss@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Au1xxx-PSC I2S glue.
12 *
13 * NOTE: so far only PSC slave mode (bit- and frameclock) is supported.
14 */
15
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <linux/slab.h>
19 #include <linux/suspend.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/initval.h>
23 #include <sound/soc.h>
24 #include <asm/mach-au1x00/au1000.h>
25 #include <asm/mach-au1x00/au1xxx_psc.h>
26
27 #include "psc.h"
28
29 /* supported I2S DAI hardware formats */
30 #define AU1XPSC_I2S_DAIFMT \
31 (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
32 SND_SOC_DAIFMT_NB_NF)
33
34 /* supported I2S direction */
35 #define AU1XPSC_I2S_DIR \
36 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
37
38 #define AU1XPSC_I2S_RATES \
39 SNDRV_PCM_RATE_8000_192000
40
41 #define AU1XPSC_I2S_FMTS \
42 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
43
44 #define I2SSTAT_BUSY(stype) \
45 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
46 #define I2SPCR_START(stype) \
47 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
48 #define I2SPCR_STOP(stype) \
49 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
50 #define I2SPCR_CLRFIFO(stype) \
51 ((stype) == SNDRV_PCM_STREAM_PLAYBACK ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
52
53
54 static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
55 unsigned int fmt)
56 {
57 struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(cpu_dai);
58 unsigned long ct;
59 int ret;
60
61 ret = -EINVAL;
62
63 ct = pscdata->cfg;
64
65 ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */
66 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
67 case SND_SOC_DAIFMT_I2S:
68 ct |= PSC_I2SCFG_XM; /* enable I2S mode */
69 break;
70 case SND_SOC_DAIFMT_MSB:
71 break;
72 case SND_SOC_DAIFMT_LSB:
73 ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */
74 break;
75 default:
76 goto out;
77 }
78
79 ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */
80 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
81 case SND_SOC_DAIFMT_NB_NF:
82 ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI;
83 break;
84 case SND_SOC_DAIFMT_NB_IF:
85 ct |= PSC_I2SCFG_BI;
86 break;
87 case SND_SOC_DAIFMT_IB_NF:
88 ct |= PSC_I2SCFG_WI;
89 break;
90 case SND_SOC_DAIFMT_IB_IF:
91 break;
92 default:
93 goto out;
94 }
95
96 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
97 case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */
98 ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */
99 break;
100 case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */
101 ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */
102 break;
103 default:
104 goto out;
105 }
106
107 pscdata->cfg = ct;
108 ret = 0;
109 out:
110 return ret;
111 }
112
113 static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream,
114 struct snd_pcm_hw_params *params,
115 struct snd_soc_dai *dai)
116 {
117 struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
118
119 int cfgbits;
120 unsigned long stat;
121
122 /* check if the PSC is already streaming data */
123 stat = au_readl(I2S_STAT(pscdata));
124 if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) {
125 /* reject parameters not currently set up in hardware */
126 cfgbits = au_readl(I2S_CFG(pscdata));
127 if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) ||
128 (params_rate(params) != pscdata->rate))
129 return -EINVAL;
130 } else {
131 /* set sample bitdepth */
132 pscdata->cfg &= ~(0x1f << 4);
133 pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits);
134 /* remember current rate for other stream */
135 pscdata->rate = params_rate(params);
136 }
137 return 0;
138 }
139
140 /* Configure PSC late: on my devel systems the codec is I2S master and
141 * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC
142 * uses aggressive PM and switches the codec off when it is not in use
143 * which also means the PSC unit doesn't get any clocks and is therefore
144 * dead. That's why this chunk here gets called from the trigger callback
145 * because I can be reasonably certain the codec is driving the clocks.
146 */
147 static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata)
148 {
149 unsigned long tmo;
150
151 /* bring PSC out of sleep, and configure I2S unit */
152 au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
153 au_sync();
154
155 tmo = 1000000;
156 while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo)
157 tmo--;
158
159 if (!tmo)
160 goto psc_err;
161
162 au_writel(0, I2S_CFG(pscdata));
163 au_sync();
164 au_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata));
165 au_sync();
166
167 /* wait for I2S controller to become ready */
168 tmo = 1000000;
169 while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo)
170 tmo--;
171
172 if (tmo)
173 return 0;
174
175 psc_err:
176 au_writel(0, I2S_CFG(pscdata));
177 au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
178 au_sync();
179 return -ETIMEDOUT;
180 }
181
182 static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype)
183 {
184 unsigned long tmo, stat;
185 int ret;
186
187 ret = 0;
188
189 /* if both TX and RX are idle, configure the PSC */
190 stat = au_readl(I2S_STAT(pscdata));
191 if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
192 ret = au1xpsc_i2s_configure(pscdata);
193 if (ret)
194 goto out;
195 }
196
197 au_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata));
198 au_sync();
199 au_writel(I2SPCR_START(stype), I2S_PCR(pscdata));
200 au_sync();
201
202 /* wait for start confirmation */
203 tmo = 1000000;
204 while (!(au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
205 tmo--;
206
207 if (!tmo) {
208 au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
209 au_sync();
210 ret = -ETIMEDOUT;
211 }
212 out:
213 return ret;
214 }
215
216 static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype)
217 {
218 unsigned long tmo, stat;
219
220 au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
221 au_sync();
222
223 /* wait for stop confirmation */
224 tmo = 1000000;
225 while ((au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
226 tmo--;
227
228 /* if both TX and RX are idle, disable PSC */
229 stat = au_readl(I2S_STAT(pscdata));
230 if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
231 au_writel(0, I2S_CFG(pscdata));
232 au_sync();
233 au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
234 au_sync();
235 }
236 return 0;
237 }
238
239 static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd,
240 struct snd_soc_dai *dai)
241 {
242 struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
243 int ret, stype = substream->stream;
244
245 switch (cmd) {
246 case SNDRV_PCM_TRIGGER_START:
247 case SNDRV_PCM_TRIGGER_RESUME:
248 ret = au1xpsc_i2s_start(pscdata, stype);
249 break;
250 case SNDRV_PCM_TRIGGER_STOP:
251 case SNDRV_PCM_TRIGGER_SUSPEND:
252 ret = au1xpsc_i2s_stop(pscdata, stype);
253 break;
254 default:
255 ret = -EINVAL;
256 }
257 return ret;
258 }
259
260 static int au1xpsc_i2s_startup(struct snd_pcm_substream *substream,
261 struct snd_soc_dai *dai)
262 {
263 struct au1xpsc_audio_data *pscdata = snd_soc_dai_get_drvdata(dai);
264 snd_soc_dai_set_dma_data(dai, substream, &pscdata->dmaids[0]);
265 return 0;
266 }
267
268 static const struct snd_soc_dai_ops au1xpsc_i2s_dai_ops = {
269 .startup = au1xpsc_i2s_startup,
270 .trigger = au1xpsc_i2s_trigger,
271 .hw_params = au1xpsc_i2s_hw_params,
272 .set_fmt = au1xpsc_i2s_set_fmt,
273 };
274
275 static const struct snd_soc_dai_driver au1xpsc_i2s_dai_template = {
276 .playback = {
277 .rates = AU1XPSC_I2S_RATES,
278 .formats = AU1XPSC_I2S_FMTS,
279 .channels_min = 2,
280 .channels_max = 8, /* 2 without external help */
281 },
282 .capture = {
283 .rates = AU1XPSC_I2S_RATES,
284 .formats = AU1XPSC_I2S_FMTS,
285 .channels_min = 2,
286 .channels_max = 8, /* 2 without external help */
287 },
288 .ops = &au1xpsc_i2s_dai_ops,
289 };
290
291 static int au1xpsc_i2s_drvprobe(struct platform_device *pdev)
292 {
293 struct resource *iores, *dmares;
294 unsigned long sel;
295 int ret;
296 struct au1xpsc_audio_data *wd;
297
298 wd = devm_kzalloc(&pdev->dev, sizeof(struct au1xpsc_audio_data),
299 GFP_KERNEL);
300 if (!wd)
301 return -ENOMEM;
302
303 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
304 if (!iores)
305 return -ENODEV;
306
307 ret = -EBUSY;
308 if (!devm_request_mem_region(&pdev->dev, iores->start,
309 resource_size(iores),
310 pdev->name))
311 return -EBUSY;
312
313 wd->mmio = devm_ioremap(&pdev->dev, iores->start,
314 resource_size(iores));
315 if (!wd->mmio)
316 return -EBUSY;
317
318 dmares = platform_get_resource(pdev, IORESOURCE_DMA, 0);
319 if (!dmares)
320 return -EBUSY;
321 wd->dmaids[SNDRV_PCM_STREAM_PLAYBACK] = dmares->start;
322
323 dmares = platform_get_resource(pdev, IORESOURCE_DMA, 1);
324 if (!dmares)
325 return -EBUSY;
326 wd->dmaids[SNDRV_PCM_STREAM_CAPTURE] = dmares->start;
327
328 /* preserve PSC clock source set up by platform (dev.platform_data
329 * is already occupied by soc layer)
330 */
331 sel = au_readl(PSC_SEL(wd)) & PSC_SEL_CLK_MASK;
332 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
333 au_sync();
334 au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(wd));
335 au_writel(0, I2S_CFG(wd));
336 au_sync();
337
338 /* preconfigure: set max rx/tx fifo depths */
339 wd->cfg |= PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8;
340
341 /* don't wait for I2S core to become ready now; clocks may not
342 * be running yet; depending on clock input for PSC a wait might
343 * time out.
344 */
345
346 /* name the DAI like this device instance ("au1xpsc-i2s.PSCINDEX") */
347 memcpy(&wd->dai_drv, &au1xpsc_i2s_dai_template,
348 sizeof(struct snd_soc_dai_driver));
349 wd->dai_drv.name = dev_name(&pdev->dev);
350
351 platform_set_drvdata(pdev, wd);
352
353 return snd_soc_register_dai(&pdev->dev, &wd->dai_drv);
354 }
355
356 static int au1xpsc_i2s_drvremove(struct platform_device *pdev)
357 {
358 struct au1xpsc_audio_data *wd = platform_get_drvdata(pdev);
359
360 snd_soc_unregister_dai(&pdev->dev);
361
362 au_writel(0, I2S_CFG(wd));
363 au_sync();
364 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
365 au_sync();
366
367 return 0;
368 }
369
370 #ifdef CONFIG_PM
371 static int au1xpsc_i2s_drvsuspend(struct device *dev)
372 {
373 struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
374
375 /* save interesting register and disable PSC */
376 wd->pm[0] = au_readl(PSC_SEL(wd));
377
378 au_writel(0, I2S_CFG(wd));
379 au_sync();
380 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
381 au_sync();
382
383 return 0;
384 }
385
386 static int au1xpsc_i2s_drvresume(struct device *dev)
387 {
388 struct au1xpsc_audio_data *wd = dev_get_drvdata(dev);
389
390 /* select I2S mode and PSC clock */
391 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(wd));
392 au_sync();
393 au_writel(0, PSC_SEL(wd));
394 au_sync();
395 au_writel(wd->pm[0], PSC_SEL(wd));
396 au_sync();
397
398 return 0;
399 }
400
401 static struct dev_pm_ops au1xpsci2s_pmops = {
402 .suspend = au1xpsc_i2s_drvsuspend,
403 .resume = au1xpsc_i2s_drvresume,
404 };
405
406 #define AU1XPSCI2S_PMOPS &au1xpsci2s_pmops
407
408 #else
409
410 #define AU1XPSCI2S_PMOPS NULL
411
412 #endif
413
414 static struct platform_driver au1xpsc_i2s_driver = {
415 .driver = {
416 .name = "au1xpsc_i2s",
417 .owner = THIS_MODULE,
418 .pm = AU1XPSCI2S_PMOPS,
419 },
420 .probe = au1xpsc_i2s_drvprobe,
421 .remove = au1xpsc_i2s_drvremove,
422 };
423
424 module_platform_driver(au1xpsc_i2s_driver);
425
426 MODULE_LICENSE("GPL");
427 MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver");
428 MODULE_AUTHOR("Manuel Lauss");
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