sound/soc/codecs/adau1701.c

   1 /*
   2  * Driver for ADAU1701 SigmaDSP processor
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  * Author: Lars-Peter Clausen <lars@metafoo.de>
   6  *      based on an inital version by Cliff Cai <cliff.cai@analog.com>
   7  *
   8  * Licensed under the GPL-2 or later.
   9  */
  10
  11 #include <linux/module.h>
  12 #include <linux/init.h>
  13 #include <linux/i2c.h>
  14 #include <linux/delay.h>
  15 #include <linux/slab.h>
  16 #include <linux/of.h>
  17 #include <linux/of_gpio.h>
  18 #include <linux/of_device.h>
  19 #include <linux/regmap.h>
  20 #include <sound/core.h>
  21 #include <sound/pcm.h>
  22 #include <sound/pcm_params.h>
  23 #include <sound/soc.h>
  24
  25 #include <asm/unaligned.h>
  26
  27 #include "sigmadsp.h"
  28 #include "adau1701.h"
  29
  30 #define ADAU1701_SAFELOAD_DATA(i) (0x0810 + (i))
  31 #define ADAU1701_SAFELOAD_ADDR(i) (0x0815 + (i))
  32
  33 #define ADAU1701_DSPCTRL        0x081c
  34 #define ADAU1701_SEROCTL        0x081e
  35 #define ADAU1701_SERICTL        0x081f
  36
  37 #define ADAU1701_AUXNPOW        0x0822
  38 #define ADAU1701_PINCONF_0      0x0820
  39 #define ADAU1701_PINCONF_1      0x0821
  40 #define ADAU1701_AUXNPOW        0x0822
  41
  42 #define ADAU1701_OSCIPOW        0x0826
  43 #define ADAU1701_DACSET         0x0827
  44
  45 #define ADAU1701_MAX_REGISTER   0x0828
  46
  47 #define ADAU1701_DSPCTRL_CR             (1 << 2)
  48 #define ADAU1701_DSPCTRL_DAM            (1 << 3)
  49 #define ADAU1701_DSPCTRL_ADM            (1 << 4)
  50 #define ADAU1701_DSPCTRL_IST            (1 << 5)
  51 #define ADAU1701_DSPCTRL_SR_48          0x00
  52 #define ADAU1701_DSPCTRL_SR_96          0x01
  53 #define ADAU1701_DSPCTRL_SR_192         0x02
  54 #define ADAU1701_DSPCTRL_SR_MASK        0x03
  55
  56 #define ADAU1701_SEROCTL_INV_LRCLK      0x2000
  57 #define ADAU1701_SEROCTL_INV_BCLK       0x1000
  58 #define ADAU1701_SEROCTL_MASTER         0x0800
  59
  60 #define ADAU1701_SEROCTL_OBF16          0x0000
  61 #define ADAU1701_SEROCTL_OBF8           0x0200
  62 #define ADAU1701_SEROCTL_OBF4           0x0400
  63 #define ADAU1701_SEROCTL_OBF2           0x0600
  64 #define ADAU1701_SEROCTL_OBF_MASK       0x0600
  65
  66 #define ADAU1701_SEROCTL_OLF1024        0x0000
  67 #define ADAU1701_SEROCTL_OLF512         0x0080
  68 #define ADAU1701_SEROCTL_OLF256         0x0100
  69 #define ADAU1701_SEROCTL_OLF_MASK       0x0180
  70
  71 #define ADAU1701_SEROCTL_MSB_DEALY1     0x0000
  72 #define ADAU1701_SEROCTL_MSB_DEALY0     0x0004
  73 #define ADAU1701_SEROCTL_MSB_DEALY8     0x0008
  74 #define ADAU1701_SEROCTL_MSB_DEALY12    0x000c
  75 #define ADAU1701_SEROCTL_MSB_DEALY16    0x0010
  76 #define ADAU1701_SEROCTL_MSB_DEALY_MASK 0x001c
  77
  78 #define ADAU1701_SEROCTL_WORD_LEN_24    0x0000
  79 #define ADAU1701_SEROCTL_WORD_LEN_20    0x0001
  80 #define ADAU1701_SEROCTL_WORD_LEN_16    0x0002
  81 #define ADAU1701_SEROCTL_WORD_LEN_MASK  0x0003
  82
  83 #define ADAU1701_AUXNPOW_VBPD           0x40
  84 #define ADAU1701_AUXNPOW_VRPD           0x20
  85
  86 #define ADAU1701_SERICTL_I2S            0
  87 #define ADAU1701_SERICTL_LEFTJ          1
  88 #define ADAU1701_SERICTL_TDM            2
  89 #define ADAU1701_SERICTL_RIGHTJ_24      3
  90 #define ADAU1701_SERICTL_RIGHTJ_20      4
  91 #define ADAU1701_SERICTL_RIGHTJ_18      5
  92 #define ADAU1701_SERICTL_RIGHTJ_16      6
  93 #define ADAU1701_SERICTL_MODE_MASK      7
  94 #define ADAU1701_SERICTL_INV_BCLK       BIT(3)
  95 #define ADAU1701_SERICTL_INV_LRCLK      BIT(4)
  96
  97 #define ADAU1701_OSCIPOW_OPD            0x04
  98 #define ADAU1701_DACSET_DACINIT         1
  99
 100 #define ADAU1707_CLKDIV_UNSET           (-1U)
 101
 102 #define ADAU1701_FIRMWARE "adau1701.bin"
 103
 104 struct adau1701 {
 105         int gpio_nreset;
 106         int gpio_pll_mode[2];
 107         unsigned int dai_fmt;
 108         unsigned int pll_clkdiv;
 109         unsigned int sysclk;
 110         struct regmap *regmap;
 111         struct i2c_client *client;
 112         u8 pin_config[12];
 113
 114         struct sigmadsp *sigmadsp;
 115 };
 116
 117 static const struct snd_kcontrol_new adau1701_controls[] = {
 118         SOC_SINGLE("Master Capture Switch", ADAU1701_DSPCTRL, 4, 1, 0),
 119 };
 120
 121 static const struct snd_soc_dapm_widget adau1701_dapm_widgets[] = {
 122         SND_SOC_DAPM_DAC("DAC0", "Playback", ADAU1701_AUXNPOW, 3, 1),
 123         SND_SOC_DAPM_DAC("DAC1", "Playback", ADAU1701_AUXNPOW, 2, 1),
 124         SND_SOC_DAPM_DAC("DAC2", "Playback", ADAU1701_AUXNPOW, 1, 1),
 125         SND_SOC_DAPM_DAC("DAC3", "Playback", ADAU1701_AUXNPOW, 0, 1),
 126         SND_SOC_DAPM_ADC("ADC", "Capture", ADAU1701_AUXNPOW, 7, 1),
 127
 128         SND_SOC_DAPM_OUTPUT("OUT0"),
 129         SND_SOC_DAPM_OUTPUT("OUT1"),
 130         SND_SOC_DAPM_OUTPUT("OUT2"),
 131         SND_SOC_DAPM_OUTPUT("OUT3"),
 132         SND_SOC_DAPM_INPUT("IN0"),
 133         SND_SOC_DAPM_INPUT("IN1"),
 134 };
 135
 136 static const struct snd_soc_dapm_route adau1701_dapm_routes[] = {
 137         { "OUT0", NULL, "DAC0" },
 138         { "OUT1", NULL, "DAC1" },
 139         { "OUT2", NULL, "DAC2" },
 140         { "OUT3", NULL, "DAC3" },
 141
 142         { "ADC", NULL, "IN0" },
 143         { "ADC", NULL, "IN1" },
 144 };
 145
 146 static unsigned int adau1701_register_size(struct device *dev,
 147                 unsigned int reg)
 148 {
 149         switch (reg) {
 150         case ADAU1701_PINCONF_0:
 151         case ADAU1701_PINCONF_1:
 152                 return 3;
 153         case ADAU1701_DSPCTRL:
 154         case ADAU1701_SEROCTL:
 155         case ADAU1701_AUXNPOW:
 156         case ADAU1701_OSCIPOW:
 157         case ADAU1701_DACSET:
 158                 return 2;
 159         case ADAU1701_SERICTL:
 160                 return 1;
 161         }
 162
 163         dev_err(dev, "Unsupported register address: %d\n", reg);
 164         return 0;
 165 }
 166
 167 static bool adau1701_volatile_reg(struct device *dev, unsigned int reg)
 168 {
 169         switch (reg) {
 170         case ADAU1701_DACSET:
 171         case ADAU1701_DSPCTRL:
 172                 return true;
 173         default:
 174                 return false;
 175         }
 176 }
 177
 178 static int adau1701_reg_write(void *context, unsigned int reg,
 179                               unsigned int value)
 180 {
 181         struct i2c_client *client = context;
 182         unsigned int i;
 183         unsigned int size;
 184         uint8_t buf[5];
 185         int ret;
 186
 187         size = adau1701_register_size(&client->dev, reg);
 188         if (size == 0)
 189                 return -EINVAL;
 190
 191         buf[0] = reg >> 8;
 192         buf[1] = reg & 0xff;
 193
 194         for (i = size + 1; i >= 2; --i) {
 195                 buf[i] = value;
 196                 value >>= 8;
 197         }
 198
 199         ret = i2c_master_send(client, buf, size + 2);
 200         if (ret == size + 2)
 201                 return 0;
 202         else if (ret < 0)
 203                 return ret;
 204         else
 205                 return -EIO;
 206 }
 207
 208 static int adau1701_reg_read(void *context, unsigned int reg,
 209                              unsigned int *value)
 210 {
 211         int ret;
 212         unsigned int i;
 213         unsigned int size;
 214         uint8_t send_buf[2], recv_buf[3];
 215         struct i2c_client *client = context;
 216         struct i2c_msg msgs[2];
 217
 218         size = adau1701_register_size(&client->dev, reg);
 219         if (size == 0)
 220                 return -EINVAL;
 221
 222         send_buf[0] = reg >> 8;
 223         send_buf[1] = reg & 0xff;
 224
 225         msgs[0].addr = client->addr;
 226         msgs[0].len = sizeof(send_buf);
 227         msgs[0].buf = send_buf;
 228         msgs[0].flags = 0;
 229
 230         msgs[1].addr = client->addr;
 231         msgs[1].len = size;
 232         msgs[1].buf = recv_buf;
 233         msgs[1].flags = I2C_M_RD;
 234
 235         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
 236         if (ret < 0)
 237                 return ret;
 238         else if (ret != ARRAY_SIZE(msgs))
 239                 return -EIO;
 240
 241         *value = 0;
 242
 243         for (i = 0; i < size; i++) {
 244                 *value <<= 8;
 245                 *value |= recv_buf[i];
 246         }
 247
 248         return 0;
 249 }
 250
 251 static int adau1701_safeload(struct sigmadsp *sigmadsp, unsigned int addr,
 252         const uint8_t bytes[], size_t len)
 253 {
 254         struct i2c_client *client = to_i2c_client(sigmadsp->dev);
 255         struct adau1701 *adau1701 = i2c_get_clientdata(client);
 256         unsigned int val;
 257         unsigned int i;
 258         uint8_t buf[10];
 259         int ret;
 260
 261         ret = regmap_read(adau1701->regmap, ADAU1701_DSPCTRL, &val);
 262         if (ret)
 263                 return ret;
 264
 265         if (val & ADAU1701_DSPCTRL_IST)
 266                 msleep(50);
 267
 268         for (i = 0; i < len / 4; i++) {
 269                 put_unaligned_le16(ADAU1701_SAFELOAD_DATA(i), buf);
 270                 buf[2] = 0x00;
 271                 memcpy(buf + 3, bytes + i * 4, 4);
 272                 ret = i2c_master_send(client, buf, 7);
 273                 if (ret < 0)
 274                         return ret;
 275                 else if (ret != 7)
 276                         return -EIO;
 277
 278                 put_unaligned_le16(ADAU1701_SAFELOAD_ADDR(i), buf);
 279                 put_unaligned_le16(addr + i, buf + 2);
 280                 ret = i2c_master_send(client, buf, 4);
 281                 if (ret < 0)
 282                         return ret;
 283                 else if (ret != 4)
 284                         return -EIO;
 285         }
 286
 287         return regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
 288                 ADAU1701_DSPCTRL_IST, ADAU1701_DSPCTRL_IST);
 289 }
 290
 291 static const struct sigmadsp_ops adau1701_sigmadsp_ops = {
 292         .safeload = adau1701_safeload,
 293 };
 294
 295 static int adau1701_reset(struct snd_soc_codec *codec, unsigned int clkdiv,
 296         unsigned int rate)
 297 {
 298         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 299         int ret;
 300
 301         sigmadsp_reset(adau1701->sigmadsp);
 302
 303         if (clkdiv != ADAU1707_CLKDIV_UNSET &&
 304             gpio_is_valid(adau1701->gpio_pll_mode[0]) &&
 305             gpio_is_valid(adau1701->gpio_pll_mode[1])) {
 306                 switch (clkdiv) {
 307                 case 64:
 308                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
 309                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
 310                         break;
 311                 case 256:
 312                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 0);
 313                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
 314                         break;
 315                 case 384:
 316                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
 317                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 0);
 318                         break;
 319                 case 0: /* fallback */
 320                 case 512:
 321                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[0], 1);
 322                         gpio_set_value_cansleep(adau1701->gpio_pll_mode[1], 1);
 323                         break;
 324                 }
 325         }
 326
 327         adau1701->pll_clkdiv = clkdiv;
 328
 329         if (gpio_is_valid(adau1701->gpio_nreset)) {
 330                 gpio_set_value_cansleep(adau1701->gpio_nreset, 0);
 331                 /* minimum reset time is 20ns */
 332                 udelay(1);
 333                 gpio_set_value_cansleep(adau1701->gpio_nreset, 1);
 334                 /* power-up time may be as long as 85ms */
 335                 mdelay(85);
 336         }
 337
 338         /*
 339          * Postpone the firmware download to a point in time when we
 340          * know the correct PLL setup
 341          */
 342         if (clkdiv != ADAU1707_CLKDIV_UNSET) {
 343                 ret = sigmadsp_setup(adau1701->sigmadsp, rate);
 344                 if (ret) {
 345                         dev_warn(codec->dev, "Failed to load firmware\n");
 346                         return ret;
 347                 }
 348         }
 349
 350         regmap_write(adau1701->regmap, ADAU1701_DACSET, ADAU1701_DACSET_DACINIT);
 351         regmap_write(adau1701->regmap, ADAU1701_DSPCTRL, ADAU1701_DSPCTRL_CR);
 352
 353         regcache_mark_dirty(adau1701->regmap);
 354         regcache_sync(adau1701->regmap);
 355
 356         return 0;
 357 }
 358
 359 static int adau1701_set_capture_pcm_format(struct snd_soc_codec *codec,
 360                                            struct snd_pcm_hw_params *params)
 361 {
 362         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 363         unsigned int mask = ADAU1701_SEROCTL_WORD_LEN_MASK;
 364         unsigned int val;
 365
 366         switch (params_width(params)) {
 367         case 16:
 368                 val = ADAU1701_SEROCTL_WORD_LEN_16;
 369                 break;
 370         case 20:
 371                 val = ADAU1701_SEROCTL_WORD_LEN_20;
 372                 break;
 373         case 24:
 374                 val = ADAU1701_SEROCTL_WORD_LEN_24;
 375                 break;
 376         default:
 377                 return -EINVAL;
 378         }
 379
 380         if (adau1701->dai_fmt == SND_SOC_DAIFMT_RIGHT_J) {
 381                 switch (params_width(params)) {
 382                 case 16:
 383                         val |= ADAU1701_SEROCTL_MSB_DEALY16;
 384                         break;
 385                 case 20:
 386                         val |= ADAU1701_SEROCTL_MSB_DEALY12;
 387                         break;
 388                 case 24:
 389                         val |= ADAU1701_SEROCTL_MSB_DEALY8;
 390                         break;
 391                 }
 392                 mask |= ADAU1701_SEROCTL_MSB_DEALY_MASK;
 393         }
 394
 395         regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL, mask, val);
 396
 397         return 0;
 398 }
 399
 400 static int adau1701_set_playback_pcm_format(struct snd_soc_codec *codec,
 401                                             struct snd_pcm_hw_params *params)
 402 {
 403         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 404         unsigned int val;
 405
 406         if (adau1701->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
 407                 return 0;
 408
 409         switch (params_width(params)) {
 410         case 16:
 411                 val = ADAU1701_SERICTL_RIGHTJ_16;
 412                 break;
 413         case 20:
 414                 val = ADAU1701_SERICTL_RIGHTJ_20;
 415                 break;
 416         case 24:
 417                 val = ADAU1701_SERICTL_RIGHTJ_24;
 418                 break;
 419         default:
 420                 return -EINVAL;
 421         }
 422
 423         regmap_update_bits(adau1701->regmap, ADAU1701_SERICTL,
 424                 ADAU1701_SERICTL_MODE_MASK, val);
 425
 426         return 0;
 427 }
 428
 429 static int adau1701_hw_params(struct snd_pcm_substream *substream,
 430                 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
 431 {
 432         struct snd_soc_codec *codec = dai->codec;
 433         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 434         unsigned int clkdiv = adau1701->sysclk / params_rate(params);
 435         unsigned int val;
 436         int ret;
 437
 438         /*
 439          * If the mclk/lrclk ratio changes, the chip needs updated PLL
 440          * mode GPIO settings, and a full reset cycle, including a new
 441          * firmware upload.
 442          */
 443         if (clkdiv != adau1701->pll_clkdiv) {
 444                 ret = adau1701_reset(codec, clkdiv, params_rate(params));
 445                 if (ret < 0)
 446                         return ret;
 447         }
 448
 449         switch (params_rate(params)) {
 450         case 192000:
 451                 val = ADAU1701_DSPCTRL_SR_192;
 452                 break;
 453         case 96000:
 454                 val = ADAU1701_DSPCTRL_SR_96;
 455                 break;
 456         case 48000:
 457                 val = ADAU1701_DSPCTRL_SR_48;
 458                 break;
 459         default:
 460                 return -EINVAL;
 461         }
 462
 463         regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL,
 464                 ADAU1701_DSPCTRL_SR_MASK, val);
 465
 466         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 467                 return adau1701_set_playback_pcm_format(codec, params);
 468         else
 469                 return adau1701_set_capture_pcm_format(codec, params);
 470 }
 471
 472 static int adau1701_set_dai_fmt(struct snd_soc_dai *codec_dai,
 473                 unsigned int fmt)
 474 {
 475         struct snd_soc_codec *codec = codec_dai->codec;
 476         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 477         unsigned int serictl = 0x00, seroctl = 0x00;
 478         bool invert_lrclk;
 479
 480         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 481         case SND_SOC_DAIFMT_CBM_CFM:
 482                 /* master, 64-bits per sample, 1 frame per sample */
 483                 seroctl |= ADAU1701_SEROCTL_MASTER | ADAU1701_SEROCTL_OBF16
 484                                 | ADAU1701_SEROCTL_OLF1024;
 485                 break;
 486         case SND_SOC_DAIFMT_CBS_CFS:
 487                 break;
 488         default:
 489                 return -EINVAL;
 490         }
 491
 492         /* clock inversion */
 493         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
 494         case SND_SOC_DAIFMT_NB_NF:
 495                 invert_lrclk = false;
 496                 break;
 497         case SND_SOC_DAIFMT_NB_IF:
 498                 invert_lrclk = true;
 499                 break;
 500         case SND_SOC_DAIFMT_IB_NF:
 501                 invert_lrclk = false;
 502                 serictl |= ADAU1701_SERICTL_INV_BCLK;
 503                 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
 504                 break;
 505         case SND_SOC_DAIFMT_IB_IF:
 506                 invert_lrclk = true;
 507                 serictl |= ADAU1701_SERICTL_INV_BCLK;
 508                 seroctl |= ADAU1701_SEROCTL_INV_BCLK;
 509                 break;
 510         default:
 511                 return -EINVAL;
 512         }
 513
 514         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 515         case SND_SOC_DAIFMT_I2S:
 516                 break;
 517         case SND_SOC_DAIFMT_LEFT_J:
 518                 serictl |= ADAU1701_SERICTL_LEFTJ;
 519                 seroctl |= ADAU1701_SEROCTL_MSB_DEALY0;
 520                 invert_lrclk = !invert_lrclk;
 521                 break;
 522         case SND_SOC_DAIFMT_RIGHT_J:
 523                 serictl |= ADAU1701_SERICTL_RIGHTJ_24;
 524                 seroctl |= ADAU1701_SEROCTL_MSB_DEALY8;
 525                 invert_lrclk = !invert_lrclk;
 526                 break;
 527         default:
 528                 return -EINVAL;
 529         }
 530
 531         if (invert_lrclk) {
 532                 seroctl |= ADAU1701_SEROCTL_INV_LRCLK;
 533                 serictl |= ADAU1701_SERICTL_INV_LRCLK;
 534         }
 535
 536         adau1701->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
 537
 538         regmap_write(adau1701->regmap, ADAU1701_SERICTL, serictl);
 539         regmap_update_bits(adau1701->regmap, ADAU1701_SEROCTL,
 540                 ~ADAU1701_SEROCTL_WORD_LEN_MASK, seroctl);
 541
 542         return 0;
 543 }
 544
 545 static int adau1701_set_bias_level(struct snd_soc_codec *codec,
 546                 enum snd_soc_bias_level level)
 547 {
 548         unsigned int mask = ADAU1701_AUXNPOW_VBPD | ADAU1701_AUXNPOW_VRPD;
 549         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 550
 551         switch (level) {
 552         case SND_SOC_BIAS_ON:
 553                 break;
 554         case SND_SOC_BIAS_PREPARE:
 555                 break;
 556         case SND_SOC_BIAS_STANDBY:
 557                 /* Enable VREF and VREF buffer */
 558                 regmap_update_bits(adau1701->regmap,
 559                                    ADAU1701_AUXNPOW, mask, 0x00);
 560                 break;
 561         case SND_SOC_BIAS_OFF:
 562                 /* Disable VREF and VREF buffer */
 563                 regmap_update_bits(adau1701->regmap,
 564                                    ADAU1701_AUXNPOW, mask, mask);
 565                 break;
 566         }
 567
 568         codec->dapm.bias_level = level;
 569         return 0;
 570 }
 571
 572 static int adau1701_digital_mute(struct snd_soc_dai *dai, int mute)
 573 {
 574         struct snd_soc_codec *codec = dai->codec;
 575         unsigned int mask = ADAU1701_DSPCTRL_DAM;
 576         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 577         unsigned int val;
 578
 579         if (mute)
 580                 val = 0;
 581         else
 582                 val = mask;
 583
 584         regmap_update_bits(adau1701->regmap, ADAU1701_DSPCTRL, mask, val);
 585
 586         return 0;
 587 }
 588
 589 static int adau1701_set_sysclk(struct snd_soc_codec *codec, int clk_id,
 590         int source, unsigned int freq, int dir)
 591 {
 592         unsigned int val;
 593         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 594
 595         switch (clk_id) {
 596         case ADAU1701_CLK_SRC_OSC:
 597                 val = 0x0;
 598                 break;
 599         case ADAU1701_CLK_SRC_MCLK:
 600                 val = ADAU1701_OSCIPOW_OPD;
 601                 break;
 602         default:
 603                 return -EINVAL;
 604         }
 605
 606         regmap_update_bits(adau1701->regmap, ADAU1701_OSCIPOW,
 607                            ADAU1701_OSCIPOW_OPD, val);
 608         adau1701->sysclk = freq;
 609
 610         return 0;
 611 }
 612
 613 static int adau1701_startup(struct snd_pcm_substream *substream,
 614         struct snd_soc_dai *dai)
 615 {
 616         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(dai->codec);
 617
 618         return sigmadsp_restrict_params(adau1701->sigmadsp, substream);
 619 }
 620
 621 #define ADAU1701_RATES (SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_96000 | \
 622         SNDRV_PCM_RATE_192000)
 623
 624 #define ADAU1701_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
 625         SNDRV_PCM_FMTBIT_S24_LE)
 626
 627 static const struct snd_soc_dai_ops adau1701_dai_ops = {
 628         .set_fmt        = adau1701_set_dai_fmt,
 629         .hw_params      = adau1701_hw_params,
 630         .digital_mute   = adau1701_digital_mute,
 631         .startup        = adau1701_startup,
 632 };
 633
 634 static struct snd_soc_dai_driver adau1701_dai = {
 635         .name = "adau1701",
 636         .playback = {
 637                 .stream_name = "Playback",
 638                 .channels_min = 2,
 639                 .channels_max = 8,
 640                 .rates = ADAU1701_RATES,
 641                 .formats = ADAU1701_FORMATS,
 642         },
 643         .capture = {
 644                 .stream_name = "Capture",
 645                 .channels_min = 2,
 646                 .channels_max = 8,
 647                 .rates = ADAU1701_RATES,
 648                 .formats = ADAU1701_FORMATS,
 649         },
 650         .ops = &adau1701_dai_ops,
 651         .symmetric_rates = 1,
 652 };
 653
 654 #ifdef CONFIG_OF
 655 static const struct of_device_id adau1701_dt_ids[] = {
 656         { .compatible = "adi,adau1701", },
 657         { }
 658 };
 659 MODULE_DEVICE_TABLE(of, adau1701_dt_ids);
 660 #endif
 661
 662 static int adau1701_probe(struct snd_soc_codec *codec)
 663 {
 664         int i, ret;
 665         unsigned int val;
 666         struct adau1701 *adau1701 = snd_soc_codec_get_drvdata(codec);
 667
 668         ret = sigmadsp_attach(adau1701->sigmadsp, &codec->component);
 669         if (ret)
 670                 return ret;
 671
 672         /*
 673          * Let the pll_clkdiv variable default to something that won't happen
 674          * at runtime. That way, we can postpone the firmware download from
 675          * adau1701_reset() to a point in time when we know the correct PLL
 676          * mode parameters.
 677          */
 678         adau1701->pll_clkdiv = ADAU1707_CLKDIV_UNSET;
 679
 680         /* initalize with pre-configured pll mode settings */
 681         ret = adau1701_reset(codec, adau1701->pll_clkdiv, 0);
 682         if (ret < 0)
 683                 return ret;
 684
 685         /* set up pin config */
 686         val = 0;
 687         for (i = 0; i < 6; i++)
 688                 val |= adau1701->pin_config[i] << (i * 4);
 689
 690         regmap_write(adau1701->regmap, ADAU1701_PINCONF_0, val);
 691
 692         val = 0;
 693         for (i = 0; i < 6; i++)
 694                 val |= adau1701->pin_config[i + 6] << (i * 4);
 695
 696         regmap_write(adau1701->regmap, ADAU1701_PINCONF_1, val);
 697
 698         return 0;
 699 }
 700
 701 static struct snd_soc_codec_driver adau1701_codec_drv = {
 702         .probe                  = adau1701_probe,
 703         .set_bias_level         = adau1701_set_bias_level,
 704         .idle_bias_off          = true,
 705
 706         .controls               = adau1701_controls,
 707         .num_controls           = ARRAY_SIZE(adau1701_controls),
 708         .dapm_widgets           = adau1701_dapm_widgets,
 709         .num_dapm_widgets       = ARRAY_SIZE(adau1701_dapm_widgets),
 710         .dapm_routes            = adau1701_dapm_routes,
 711         .num_dapm_routes        = ARRAY_SIZE(adau1701_dapm_routes),
 712
 713         .set_sysclk             = adau1701_set_sysclk,
 714 };
 715
 716 static const struct regmap_config adau1701_regmap = {
 717         .reg_bits               = 16,
 718         .val_bits               = 32,
 719         .max_register           = ADAU1701_MAX_REGISTER,
 720         .cache_type             = REGCACHE_RBTREE,
 721         .volatile_reg           = adau1701_volatile_reg,
 722         .reg_write              = adau1701_reg_write,
 723         .reg_read               = adau1701_reg_read,
 724 };
 725
 726 static int adau1701_i2c_probe(struct i2c_client *client,
 727                               const struct i2c_device_id *id)
 728 {
 729         struct adau1701 *adau1701;
 730         struct device *dev = &client->dev;
 731         int gpio_nreset = -EINVAL;
 732         int gpio_pll_mode[2] = { -EINVAL, -EINVAL };
 733         int ret;
 734
 735         adau1701 = devm_kzalloc(dev, sizeof(*adau1701), GFP_KERNEL);
 736         if (!adau1701)
 737                 return -ENOMEM;
 738
 739         adau1701->client = client;
 740         adau1701->regmap = devm_regmap_init(dev, NULL, client,
 741                                             &adau1701_regmap);
 742         if (IS_ERR(adau1701->regmap))
 743                 return PTR_ERR(adau1701->regmap);
 744
 745         if (dev->of_node) {
 746                 gpio_nreset = of_get_named_gpio(dev->of_node, "reset-gpio", 0);
 747                 if (gpio_nreset < 0 && gpio_nreset != -ENOENT)
 748                         return gpio_nreset;
 749
 750                 gpio_pll_mode[0] = of_get_named_gpio(dev->of_node,
 751                                                    "adi,pll-mode-gpios", 0);
 752                 if (gpio_pll_mode[0] < 0 && gpio_pll_mode[0] != -ENOENT)
 753                         return gpio_pll_mode[0];
 754
 755                 gpio_pll_mode[1] = of_get_named_gpio(dev->of_node,
 756                                                    "adi,pll-mode-gpios", 1);
 757                 if (gpio_pll_mode[1] < 0 && gpio_pll_mode[1] != -ENOENT)
 758                         return gpio_pll_mode[1];
 759
 760                 of_property_read_u32(dev->of_node, "adi,pll-clkdiv",
 761                                      &adau1701->pll_clkdiv);
 762
 763                 of_property_read_u8_array(dev->of_node, "adi,pin-config",
 764                                           adau1701->pin_config,
 765                                           ARRAY_SIZE(adau1701->pin_config));
 766         }
 767
 768         if (gpio_is_valid(gpio_nreset)) {
 769                 ret = devm_gpio_request_one(dev, gpio_nreset, GPIOF_OUT_INIT_LOW,
 770                                             "ADAU1701 Reset");
 771                 if (ret < 0)
 772                         return ret;
 773         }
 774
 775         if (gpio_is_valid(gpio_pll_mode[0]) &&
 776             gpio_is_valid(gpio_pll_mode[1])) {
 777                 ret = devm_gpio_request_one(dev, gpio_pll_mode[0],
 778                                             GPIOF_OUT_INIT_LOW,
 779                                             "ADAU1701 PLL mode 0");
 780                 if (ret < 0)
 781                         return ret;
 782
 783                 ret = devm_gpio_request_one(dev, gpio_pll_mode[1],
 784                                             GPIOF_OUT_INIT_LOW,
 785                                             "ADAU1701 PLL mode 1");
 786                 if (ret < 0)
 787                         return ret;
 788         }
 789
 790         adau1701->gpio_nreset = gpio_nreset;
 791         adau1701->gpio_pll_mode[0] = gpio_pll_mode[0];
 792         adau1701->gpio_pll_mode[1] = gpio_pll_mode[1];
 793
 794         i2c_set_clientdata(client, adau1701);
 795
 796         adau1701->sigmadsp = devm_sigmadsp_init_i2c(client,
 797                 &adau1701_sigmadsp_ops, ADAU1701_FIRMWARE);
 798         if (IS_ERR(adau1701->sigmadsp))
 799                 return PTR_ERR(adau1701->sigmadsp);
 800
 801         ret = snd_soc_register_codec(&client->dev, &adau1701_codec_drv,
 802                         &adau1701_dai, 1);
 803         return ret;
 804 }
 805
 806 static int adau1701_i2c_remove(struct i2c_client *client)
 807 {
 808         snd_soc_unregister_codec(&client->dev);
 809         return 0;
 810 }
 811
 812 static const struct i2c_device_id adau1701_i2c_id[] = {
 813         { "adau1401", 0 },
 814         { "adau1401a", 0 },
 815         { "adau1701", 0 },
 816         { "adau1702", 0 },
 817         { }
 818 };
 819 MODULE_DEVICE_TABLE(i2c, adau1701_i2c_id);
 820
 821 static struct i2c_driver adau1701_i2c_driver = {
 822         .driver = {
 823                 .name   = "adau1701",
 824                 .owner  = THIS_MODULE,
 825                 .of_match_table = of_match_ptr(adau1701_dt_ids),
 826         },
 827         .probe          = adau1701_i2c_probe,
 828         .remove         = adau1701_i2c_remove,
 829         .id_table       = adau1701_i2c_id,
 830 };
 831
 832 module_i2c_driver(adau1701_i2c_driver);
 833
 834 MODULE_DESCRIPTION("ASoC ADAU1701 SigmaDSP driver");
 835 MODULE_AUTHOR("Cliff Cai <cliff.cai@analog.com>");
 836 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 837 MODULE_LICENSE("GPL");