2 * Common code for ADAU1X61 and ADAU1X81 codecs
4 * Copyright 2011-2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
7 * Licensed under the GPL-2 or later.
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/slab.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <sound/pcm_params.h>
17 #include <sound/soc.h>
18 #include <sound/tlv.h>
19 #include <linux/gcd.h>
20 #include <linux/i2c.h>
21 #include <linux/spi/spi.h>
22 #include <linux/regmap.h>
26 #include "adau-utils.h"
28 static const char * const adau17x1_capture_mixer_boost_text
[] = {
29 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3",
32 static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum
,
33 ADAU17X1_REC_POWER_MGMT
, 5, adau17x1_capture_mixer_boost_text
);
35 static const char * const adau17x1_mic_bias_mode_text
[] = {
36 "Normal operation", "High performance",
39 static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum
,
40 ADAU17X1_MICBIAS
, 3, adau17x1_mic_bias_mode_text
);
42 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv
, -9563, 0);
44 static const struct snd_kcontrol_new adau17x1_controls
[] = {
45 SOC_DOUBLE_R_TLV("Digital Capture Volume",
46 ADAU17X1_LEFT_INPUT_DIGITAL_VOL
,
47 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL
,
48 0, 0xff, 1, adau17x1_digital_tlv
),
49 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1
,
50 ADAU17X1_DAC_CONTROL2
, 0, 0xff, 1, adau17x1_digital_tlv
),
52 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL
,
54 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0
,
57 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum
),
59 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum
),
62 static int adau17x1_pll_event(struct snd_soc_dapm_widget
*w
,
63 struct snd_kcontrol
*kcontrol
, int event
)
65 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
66 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
69 if (SND_SOC_DAPM_EVENT_ON(event
)) {
70 adau
->pll_regs
[5] = 1;
72 adau
->pll_regs
[5] = 0;
73 /* Bypass the PLL when disabled, otherwise registers will become
75 regmap_update_bits(adau
->regmap
, ADAU17X1_CLOCK_CONTROL
,
76 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL
, 0);
79 /* The PLL register is 6 bytes long and can only be written at once. */
80 ret
= regmap_raw_write(adau
->regmap
, ADAU17X1_PLL_CONTROL
,
81 adau
->pll_regs
, ARRAY_SIZE(adau
->pll_regs
));
83 if (SND_SOC_DAPM_EVENT_ON(event
)) {
85 regmap_update_bits(adau
->regmap
, ADAU17X1_CLOCK_CONTROL
,
86 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL
,
87 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL
);
93 static const char * const adau17x1_mono_stereo_text
[] = {
95 "Mono Left Channel (L+R)",
96 "Mono Right Channel (L+R)",
100 static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum
,
101 ADAU17X1_DAC_CONTROL0
, 6, adau17x1_mono_stereo_text
);
103 static const struct snd_kcontrol_new adau17x1_dac_mode_mux
=
104 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum
);
106 static const struct snd_soc_dapm_widget adau17x1_dapm_widgets
[] = {
107 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM
, 0, 0, adau17x1_pll_event
,
108 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMD
),
110 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM
, 0, 0, NULL
, 0),
112 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS
, 0, 0, NULL
, 0),
114 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT
,
116 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT
,
119 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM
, 0, 0,
120 &adau17x1_dac_mode_mux
),
121 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM
, 0, 0,
122 &adau17x1_dac_mode_mux
),
124 SND_SOC_DAPM_ADC("Left Decimator", NULL
, ADAU17X1_ADC_CONTROL
, 0, 0),
125 SND_SOC_DAPM_ADC("Right Decimator", NULL
, ADAU17X1_ADC_CONTROL
, 1, 0),
126 SND_SOC_DAPM_DAC("Left DAC", NULL
, ADAU17X1_DAC_CONTROL0
, 0, 0),
127 SND_SOC_DAPM_DAC("Right DAC", NULL
, ADAU17X1_DAC_CONTROL0
, 1, 0),
130 static const struct snd_soc_dapm_route adau17x1_dapm_routes
[] = {
131 { "Left Decimator", NULL
, "SYSCLK" },
132 { "Right Decimator", NULL
, "SYSCLK" },
133 { "Left DAC", NULL
, "SYSCLK" },
134 { "Right DAC", NULL
, "SYSCLK" },
135 { "Capture", NULL
, "SYSCLK" },
136 { "Playback", NULL
, "SYSCLK" },
138 { "Left DAC", NULL
, "Left DAC Mode Mux" },
139 { "Right DAC", NULL
, "Right DAC Mode Mux" },
141 { "Capture", NULL
, "AIFCLK" },
142 { "Playback", NULL
, "AIFCLK" },
145 static const struct snd_soc_dapm_route adau17x1_dapm_pll_route
= {
146 "SYSCLK", NULL
, "PLL",
150 * The MUX register for the Capture and Playback MUXs selects either DSP as
151 * source/destination or one of the TDM slots. The TDM slot is selected via
152 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or
153 * directly to the DAI interface with this control.
155 static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol
*kcontrol
,
156 struct snd_ctl_elem_value
*ucontrol
)
158 struct snd_soc_codec
*codec
= snd_soc_dapm_kcontrol_codec(kcontrol
);
159 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
160 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
161 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
162 struct snd_soc_dapm_update update
;
163 unsigned int stream
= e
->shift_l
;
164 unsigned int val
, change
;
167 if (ucontrol
->value
.enumerated
.item
[0] >= e
->items
)
170 switch (ucontrol
->value
.enumerated
.item
[0]) {
173 adau
->dsp_bypass
[stream
] = false;
176 val
= (adau
->tdm_slot
[stream
] * 2) + 1;
177 adau
->dsp_bypass
[stream
] = true;
181 if (stream
== SNDRV_PCM_STREAM_PLAYBACK
)
182 reg
= ADAU17X1_SERIAL_INPUT_ROUTE
;
184 reg
= ADAU17X1_SERIAL_OUTPUT_ROUTE
;
186 change
= snd_soc_test_bits(codec
, reg
, 0xff, val
);
188 update
.kcontrol
= kcontrol
;
193 snd_soc_dapm_mux_update_power(dapm
, kcontrol
,
194 ucontrol
->value
.enumerated
.item
[0], e
, &update
);
200 static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol
*kcontrol
,
201 struct snd_ctl_elem_value
*ucontrol
)
203 struct snd_soc_codec
*codec
= snd_soc_dapm_kcontrol_codec(kcontrol
);
204 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
205 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
206 unsigned int stream
= e
->shift_l
;
207 unsigned int reg
, val
;
210 if (stream
== SNDRV_PCM_STREAM_PLAYBACK
)
211 reg
= ADAU17X1_SERIAL_INPUT_ROUTE
;
213 reg
= ADAU17X1_SERIAL_OUTPUT_ROUTE
;
215 ret
= regmap_read(adau
->regmap
, reg
, &val
);
221 ucontrol
->value
.enumerated
.item
[0] = val
;
226 #define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \
227 const struct snd_kcontrol_new _name = \
228 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\
229 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \
230 ARRAY_SIZE(_text), _text), \
231 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put)
233 static const char * const adau17x1_dac_mux_text
[] = {
238 static const char * const adau17x1_capture_mux_text
[] = {
243 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux
, "DAC Playback Mux",
244 SNDRV_PCM_STREAM_PLAYBACK
, adau17x1_dac_mux_text
);
246 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux
, "Capture Mux",
247 SNDRV_PCM_STREAM_CAPTURE
, adau17x1_capture_mux_text
);
249 static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets
[] = {
250 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN
, 0, 0, NULL
, 0),
251 SND_SOC_DAPM_SIGGEN("DSP Siggen"),
253 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM
, 0, 0,
255 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM
, 0, 0,
256 &adau17x1_capture_mux
),
259 static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes
[] = {
260 { "DAC Playback Mux", "DSP", "DSP" },
261 { "DAC Playback Mux", "AIFIN", "Playback" },
263 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" },
264 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
265 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" },
266 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" },
267 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
268 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" },
270 { "Capture Mux", "DSP", "DSP" },
271 { "Capture Mux", "Decimator", "Left Decimator" },
272 { "Capture Mux", "Decimator", "Right Decimator" },
274 { "Capture", NULL
, "Capture Mux" },
276 { "DSP", NULL
, "DSP Siggen" },
278 { "DSP", NULL
, "Left Decimator" },
279 { "DSP", NULL
, "Right Decimator" },
282 static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes
[] = {
283 { "Left DAC Mode Mux", "Stereo", "Playback" },
284 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" },
285 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" },
286 { "Right DAC Mode Mux", "Stereo", "Playback" },
287 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" },
288 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" },
289 { "Capture", NULL
, "Left Decimator" },
290 { "Capture", NULL
, "Right Decimator" },
293 bool adau17x1_has_dsp(struct adau
*adau
)
295 switch (adau
->type
) {
304 EXPORT_SYMBOL_GPL(adau17x1_has_dsp
);
306 static int adau17x1_hw_params(struct snd_pcm_substream
*substream
,
307 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
309 struct snd_soc_codec
*codec
= dai
->codec
;
310 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
311 unsigned int val
, div
, dsp_div
;
315 if (adau
->clk_src
== ADAU17X1_CLK_SRC_PLL
)
316 freq
= adau
->pll_freq
;
320 if (freq
% params_rate(params
) != 0)
323 switch (freq
/ params_rate(params
)) {
328 case 6144: /* fs / 6 */
332 case 4096: /* fs / 4 */
336 case 3072: /* fs / 3 */
340 case 2048: /* fs / 2 */
344 case 1536: /* fs / 1.5 */
348 case 512: /* fs / 0.5 */
356 regmap_update_bits(adau
->regmap
, ADAU17X1_CONVERTER0
,
357 ADAU17X1_CONVERTER0_CONVSR_MASK
, div
);
358 if (adau17x1_has_dsp(adau
)) {
359 regmap_write(adau
->regmap
, ADAU17X1_SERIAL_SAMPLING_RATE
, div
);
360 regmap_write(adau
->regmap
, ADAU17X1_DSP_SAMPLING_RATE
, dsp_div
);
363 if (adau
->sigmadsp
) {
364 ret
= adau17x1_setup_firmware(adau
, params_rate(params
));
369 if (adau
->dai_fmt
!= SND_SOC_DAIFMT_RIGHT_J
)
372 switch (params_width(params
)) {
374 val
= ADAU17X1_SERIAL_PORT1_DELAY16
;
377 val
= ADAU17X1_SERIAL_PORT1_DELAY8
;
380 val
= ADAU17X1_SERIAL_PORT1_DELAY0
;
386 return regmap_update_bits(adau
->regmap
, ADAU17X1_SERIAL_PORT1
,
387 ADAU17X1_SERIAL_PORT1_DELAY_MASK
, val
);
390 static int adau17x1_set_dai_pll(struct snd_soc_dai
*dai
, int pll_id
,
391 int source
, unsigned int freq_in
, unsigned int freq_out
)
393 struct snd_soc_codec
*codec
= dai
->codec
;
394 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
397 if (freq_in
< 8000000 || freq_in
> 27000000)
400 ret
= adau_calc_pll_cfg(freq_in
, freq_out
, adau
->pll_regs
);
404 /* The PLL register is 6 bytes long and can only be written at once. */
405 ret
= regmap_raw_write(adau
->regmap
, ADAU17X1_PLL_CONTROL
,
406 adau
->pll_regs
, ARRAY_SIZE(adau
->pll_regs
));
410 adau
->pll_freq
= freq_out
;
415 static int adau17x1_set_dai_sysclk(struct snd_soc_dai
*dai
,
416 int clk_id
, unsigned int freq
, int dir
)
418 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(dai
->codec
);
419 struct adau
*adau
= snd_soc_codec_get_drvdata(dai
->codec
);
422 case ADAU17X1_CLK_SRC_MCLK
:
423 case ADAU17X1_CLK_SRC_PLL
:
431 if (adau
->clk_src
!= clk_id
) {
432 if (clk_id
== ADAU17X1_CLK_SRC_PLL
) {
433 snd_soc_dapm_add_routes(dapm
,
434 &adau17x1_dapm_pll_route
, 1);
436 snd_soc_dapm_del_routes(dapm
,
437 &adau17x1_dapm_pll_route
, 1);
441 adau
->clk_src
= clk_id
;
446 static int adau17x1_set_dai_fmt(struct snd_soc_dai
*dai
,
449 struct adau
*adau
= snd_soc_codec_get_drvdata(dai
->codec
);
450 unsigned int ctrl0
, ctrl1
;
453 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
454 case SND_SOC_DAIFMT_CBM_CFM
:
455 ctrl0
= ADAU17X1_SERIAL_PORT0_MASTER
;
458 case SND_SOC_DAIFMT_CBS_CFS
:
460 adau
->master
= false;
466 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
467 case SND_SOC_DAIFMT_I2S
:
469 ctrl1
= ADAU17X1_SERIAL_PORT1_DELAY1
;
471 case SND_SOC_DAIFMT_LEFT_J
:
472 case SND_SOC_DAIFMT_RIGHT_J
:
474 ctrl1
= ADAU17X1_SERIAL_PORT1_DELAY0
;
476 case SND_SOC_DAIFMT_DSP_A
:
478 ctrl0
|= ADAU17X1_SERIAL_PORT0_PULSE_MODE
;
479 ctrl1
= ADAU17X1_SERIAL_PORT1_DELAY1
;
481 case SND_SOC_DAIFMT_DSP_B
:
483 ctrl0
|= ADAU17X1_SERIAL_PORT0_PULSE_MODE
;
484 ctrl1
= ADAU17X1_SERIAL_PORT1_DELAY0
;
490 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
491 case SND_SOC_DAIFMT_NB_NF
:
493 case SND_SOC_DAIFMT_IB_NF
:
494 ctrl0
|= ADAU17X1_SERIAL_PORT0_BCLK_POL
;
496 case SND_SOC_DAIFMT_NB_IF
:
497 lrclk_pol
= !lrclk_pol
;
499 case SND_SOC_DAIFMT_IB_IF
:
500 ctrl0
|= ADAU17X1_SERIAL_PORT0_BCLK_POL
;
501 lrclk_pol
= !lrclk_pol
;
508 ctrl0
|= ADAU17X1_SERIAL_PORT0_LRCLK_POL
;
510 regmap_write(adau
->regmap
, ADAU17X1_SERIAL_PORT0
, ctrl0
);
511 regmap_write(adau
->regmap
, ADAU17X1_SERIAL_PORT1
, ctrl1
);
513 adau
->dai_fmt
= fmt
& SND_SOC_DAIFMT_FORMAT_MASK
;
518 static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai
*dai
,
519 unsigned int tx_mask
, unsigned int rx_mask
, int slots
, int slot_width
)
521 struct adau
*adau
= snd_soc_codec_get_drvdata(dai
->codec
);
522 unsigned int ser_ctrl0
, ser_ctrl1
;
523 unsigned int conv_ctrl0
, conv_ctrl1
;
535 ser_ctrl0
= ADAU17X1_SERIAL_PORT0_STEREO
;
538 ser_ctrl0
= ADAU17X1_SERIAL_PORT0_TDM4
;
541 if (adau
->type
== ADAU1361
)
544 ser_ctrl0
= ADAU17X1_SERIAL_PORT0_TDM8
;
550 switch (slot_width
* slots
) {
552 if (adau
->type
== ADAU1761
)
555 ser_ctrl1
= ADAU17X1_SERIAL_PORT1_BCLK32
;
558 ser_ctrl1
= ADAU17X1_SERIAL_PORT1_BCLK64
;
561 ser_ctrl1
= ADAU17X1_SERIAL_PORT1_BCLK48
;
564 ser_ctrl1
= ADAU17X1_SERIAL_PORT1_BCLK128
;
567 if (adau
->type
== ADAU1361
)
570 ser_ctrl1
= ADAU17X1_SERIAL_PORT1_BCLK256
;
578 conv_ctrl1
= ADAU17X1_CONVERTER1_ADC_PAIR(1);
579 adau
->tdm_slot
[SNDRV_PCM_STREAM_CAPTURE
] = 0;
582 conv_ctrl1
= ADAU17X1_CONVERTER1_ADC_PAIR(2);
583 adau
->tdm_slot
[SNDRV_PCM_STREAM_CAPTURE
] = 1;
586 conv_ctrl1
= ADAU17X1_CONVERTER1_ADC_PAIR(3);
587 adau
->tdm_slot
[SNDRV_PCM_STREAM_CAPTURE
] = 2;
590 conv_ctrl1
= ADAU17X1_CONVERTER1_ADC_PAIR(4);
591 adau
->tdm_slot
[SNDRV_PCM_STREAM_CAPTURE
] = 3;
599 conv_ctrl0
= ADAU17X1_CONVERTER0_DAC_PAIR(1);
600 adau
->tdm_slot
[SNDRV_PCM_STREAM_PLAYBACK
] = 0;
603 conv_ctrl0
= ADAU17X1_CONVERTER0_DAC_PAIR(2);
604 adau
->tdm_slot
[SNDRV_PCM_STREAM_PLAYBACK
] = 1;
607 conv_ctrl0
= ADAU17X1_CONVERTER0_DAC_PAIR(3);
608 adau
->tdm_slot
[SNDRV_PCM_STREAM_PLAYBACK
] = 2;
611 conv_ctrl0
= ADAU17X1_CONVERTER0_DAC_PAIR(4);
612 adau
->tdm_slot
[SNDRV_PCM_STREAM_PLAYBACK
] = 3;
618 regmap_update_bits(adau
->regmap
, ADAU17X1_CONVERTER0
,
619 ADAU17X1_CONVERTER0_DAC_PAIR_MASK
, conv_ctrl0
);
620 regmap_update_bits(adau
->regmap
, ADAU17X1_CONVERTER1
,
621 ADAU17X1_CONVERTER1_ADC_PAIR_MASK
, conv_ctrl1
);
622 regmap_update_bits(adau
->regmap
, ADAU17X1_SERIAL_PORT0
,
623 ADAU17X1_SERIAL_PORT0_TDM_MASK
, ser_ctrl0
);
624 regmap_update_bits(adau
->regmap
, ADAU17X1_SERIAL_PORT1
,
625 ADAU17X1_SERIAL_PORT1_BCLK_MASK
, ser_ctrl1
);
627 if (!adau17x1_has_dsp(adau
))
630 if (adau
->dsp_bypass
[SNDRV_PCM_STREAM_PLAYBACK
]) {
631 regmap_write(adau
->regmap
, ADAU17X1_SERIAL_INPUT_ROUTE
,
632 (adau
->tdm_slot
[SNDRV_PCM_STREAM_PLAYBACK
] * 2) + 1);
635 if (adau
->dsp_bypass
[SNDRV_PCM_STREAM_CAPTURE
]) {
636 regmap_write(adau
->regmap
, ADAU17X1_SERIAL_OUTPUT_ROUTE
,
637 (adau
->tdm_slot
[SNDRV_PCM_STREAM_CAPTURE
] * 2) + 1);
643 static int adau17x1_startup(struct snd_pcm_substream
*substream
,
644 struct snd_soc_dai
*dai
)
646 struct adau
*adau
= snd_soc_codec_get_drvdata(dai
->codec
);
649 return sigmadsp_restrict_params(adau
->sigmadsp
, substream
);
654 const struct snd_soc_dai_ops adau17x1_dai_ops
= {
655 .hw_params
= adau17x1_hw_params
,
656 .set_sysclk
= adau17x1_set_dai_sysclk
,
657 .set_fmt
= adau17x1_set_dai_fmt
,
658 .set_pll
= adau17x1_set_dai_pll
,
659 .set_tdm_slot
= adau17x1_set_dai_tdm_slot
,
660 .startup
= adau17x1_startup
,
662 EXPORT_SYMBOL_GPL(adau17x1_dai_ops
);
664 int adau17x1_set_micbias_voltage(struct snd_soc_codec
*codec
,
665 enum adau17x1_micbias_voltage micbias
)
667 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
670 case ADAU17X1_MICBIAS_0_90_AVDD
:
671 case ADAU17X1_MICBIAS_0_65_AVDD
:
677 return regmap_write(adau
->regmap
, ADAU17X1_MICBIAS
, micbias
<< 2);
679 EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage
);
681 bool adau17x1_precious_register(struct device
*dev
, unsigned int reg
)
683 /* SigmaDSP parameter memory */
689 EXPORT_SYMBOL_GPL(adau17x1_precious_register
);
691 bool adau17x1_readable_register(struct device
*dev
, unsigned int reg
)
693 /* SigmaDSP parameter memory */
698 case ADAU17X1_CLOCK_CONTROL
:
699 case ADAU17X1_PLL_CONTROL
:
700 case ADAU17X1_REC_POWER_MGMT
:
701 case ADAU17X1_MICBIAS
:
702 case ADAU17X1_SERIAL_PORT0
:
703 case ADAU17X1_SERIAL_PORT1
:
704 case ADAU17X1_CONVERTER0
:
705 case ADAU17X1_CONVERTER1
:
706 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL
:
707 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL
:
708 case ADAU17X1_ADC_CONTROL
:
709 case ADAU17X1_PLAY_POWER_MGMT
:
710 case ADAU17X1_DAC_CONTROL0
:
711 case ADAU17X1_DAC_CONTROL1
:
712 case ADAU17X1_DAC_CONTROL2
:
713 case ADAU17X1_SERIAL_PORT_PAD
:
714 case ADAU17X1_CONTROL_PORT_PAD0
:
715 case ADAU17X1_CONTROL_PORT_PAD1
:
716 case ADAU17X1_DSP_SAMPLING_RATE
:
717 case ADAU17X1_SERIAL_INPUT_ROUTE
:
718 case ADAU17X1_SERIAL_OUTPUT_ROUTE
:
719 case ADAU17X1_DSP_ENABLE
:
720 case ADAU17X1_DSP_RUN
:
721 case ADAU17X1_SERIAL_SAMPLING_RATE
:
728 EXPORT_SYMBOL_GPL(adau17x1_readable_register
);
730 bool adau17x1_volatile_register(struct device
*dev
, unsigned int reg
)
732 /* SigmaDSP parameter and program memory */
737 /* The PLL register is 6 bytes long */
738 case ADAU17X1_PLL_CONTROL
:
739 case ADAU17X1_PLL_CONTROL
+ 1:
740 case ADAU17X1_PLL_CONTROL
+ 2:
741 case ADAU17X1_PLL_CONTROL
+ 3:
742 case ADAU17X1_PLL_CONTROL
+ 4:
743 case ADAU17X1_PLL_CONTROL
+ 5:
751 EXPORT_SYMBOL_GPL(adau17x1_volatile_register
);
753 int adau17x1_setup_firmware(struct adau
*adau
, unsigned int rate
)
758 ret
= regmap_read(adau
->regmap
, ADAU17X1_DSP_SAMPLING_RATE
, &dspsr
);
762 regmap_write(adau
->regmap
, ADAU17X1_DSP_ENABLE
, 1);
763 regmap_write(adau
->regmap
, ADAU17X1_DSP_SAMPLING_RATE
, 0xf);
765 ret
= sigmadsp_setup(adau
->sigmadsp
, rate
);
767 regmap_write(adau
->regmap
, ADAU17X1_DSP_ENABLE
, 0);
770 regmap_write(adau
->regmap
, ADAU17X1_DSP_SAMPLING_RATE
, dspsr
);
774 EXPORT_SYMBOL_GPL(adau17x1_setup_firmware
);
776 int adau17x1_add_widgets(struct snd_soc_codec
*codec
)
778 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
779 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
782 ret
= snd_soc_add_codec_controls(codec
, adau17x1_controls
,
783 ARRAY_SIZE(adau17x1_controls
));
786 ret
= snd_soc_dapm_new_controls(dapm
, adau17x1_dapm_widgets
,
787 ARRAY_SIZE(adau17x1_dapm_widgets
));
791 if (adau17x1_has_dsp(adau
)) {
792 ret
= snd_soc_dapm_new_controls(dapm
, adau17x1_dsp_dapm_widgets
,
793 ARRAY_SIZE(adau17x1_dsp_dapm_widgets
));
800 ret
= sigmadsp_attach(adau
->sigmadsp
, &codec
->component
);
802 dev_err(codec
->dev
, "Failed to attach firmware: %d\n",
810 EXPORT_SYMBOL_GPL(adau17x1_add_widgets
);
812 int adau17x1_add_routes(struct snd_soc_codec
*codec
)
814 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
815 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
818 ret
= snd_soc_dapm_add_routes(dapm
, adau17x1_dapm_routes
,
819 ARRAY_SIZE(adau17x1_dapm_routes
));
823 if (adau17x1_has_dsp(adau
)) {
824 ret
= snd_soc_dapm_add_routes(dapm
, adau17x1_dsp_dapm_routes
,
825 ARRAY_SIZE(adau17x1_dsp_dapm_routes
));
827 ret
= snd_soc_dapm_add_routes(dapm
, adau17x1_no_dsp_dapm_routes
,
828 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes
));
832 EXPORT_SYMBOL_GPL(adau17x1_add_routes
);
834 int adau17x1_resume(struct snd_soc_codec
*codec
)
836 struct adau
*adau
= snd_soc_codec_get_drvdata(codec
);
838 if (adau
->switch_mode
)
839 adau
->switch_mode(codec
->dev
);
841 regcache_sync(adau
->regmap
);
845 EXPORT_SYMBOL_GPL(adau17x1_resume
);
847 int adau17x1_probe(struct device
*dev
, struct regmap
*regmap
,
848 enum adau17x1_type type
, void (*switch_mode
)(struct device
*dev
),
849 const char *firmware_name
)
854 return PTR_ERR(regmap
);
856 adau
= devm_kzalloc(dev
, sizeof(*adau
), GFP_KERNEL
);
860 adau
->regmap
= regmap
;
861 adau
->switch_mode
= switch_mode
;
864 dev_set_drvdata(dev
, adau
);
867 adau
->sigmadsp
= devm_sigmadsp_init_regmap(dev
, regmap
, NULL
,
869 if (IS_ERR(adau
->sigmadsp
)) {
870 dev_warn(dev
, "Could not find firmware file: %ld\n",
871 PTR_ERR(adau
->sigmadsp
));
872 adau
->sigmadsp
= NULL
;
881 EXPORT_SYMBOL_GPL(adau17x1_probe
);
883 MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code");
884 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
885 MODULE_LICENSE("GPL");