ASoC: adau: Factor out shared PLL configuration code
[deliverable/linux.git] / sound / soc / codecs / adau17x1.c
1 /*
2 * Common code for ADAU1X61 and ADAU1X81 codecs
3 *
4 * Copyright 2011-2014 Analog Devices Inc.
5 * Author: Lars-Peter Clausen <lars@metafoo.de>
6 *
7 * Licensed under the GPL-2 or later.
8 */
9
10 #include <linux/module.h>
11 #include <linux/init.h>
12 #include <linux/delay.h>
13 #include <linux/slab.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <sound/pcm_params.h>
17 #include <sound/soc.h>
18 #include <sound/tlv.h>
19 #include <linux/gcd.h>
20 #include <linux/i2c.h>
21 #include <linux/spi/spi.h>
22 #include <linux/regmap.h>
23
24 #include "sigmadsp.h"
25 #include "adau17x1.h"
26 #include "adau-utils.h"
27
28 static const char * const adau17x1_capture_mixer_boost_text[] = {
29 "Normal operation", "Boost Level 1", "Boost Level 2", "Boost Level 3",
30 };
31
32 static SOC_ENUM_SINGLE_DECL(adau17x1_capture_boost_enum,
33 ADAU17X1_REC_POWER_MGMT, 5, adau17x1_capture_mixer_boost_text);
34
35 static const char * const adau17x1_mic_bias_mode_text[] = {
36 "Normal operation", "High performance",
37 };
38
39 static SOC_ENUM_SINGLE_DECL(adau17x1_mic_bias_mode_enum,
40 ADAU17X1_MICBIAS, 3, adau17x1_mic_bias_mode_text);
41
42 static const DECLARE_TLV_DB_MINMAX(adau17x1_digital_tlv, -9563, 0);
43
44 static const struct snd_kcontrol_new adau17x1_controls[] = {
45 SOC_DOUBLE_R_TLV("Digital Capture Volume",
46 ADAU17X1_LEFT_INPUT_DIGITAL_VOL,
47 ADAU17X1_RIGHT_INPUT_DIGITAL_VOL,
48 0, 0xff, 1, adau17x1_digital_tlv),
49 SOC_DOUBLE_R_TLV("Digital Playback Volume", ADAU17X1_DAC_CONTROL1,
50 ADAU17X1_DAC_CONTROL2, 0, 0xff, 1, adau17x1_digital_tlv),
51
52 SOC_SINGLE("ADC High Pass Filter Switch", ADAU17X1_ADC_CONTROL,
53 5, 1, 0),
54 SOC_SINGLE("Playback De-emphasis Switch", ADAU17X1_DAC_CONTROL0,
55 2, 1, 0),
56
57 SOC_ENUM("Capture Boost", adau17x1_capture_boost_enum),
58
59 SOC_ENUM("Mic Bias Mode", adau17x1_mic_bias_mode_enum),
60 };
61
62 static int adau17x1_pll_event(struct snd_soc_dapm_widget *w,
63 struct snd_kcontrol *kcontrol, int event)
64 {
65 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
66 struct adau *adau = snd_soc_codec_get_drvdata(codec);
67 int ret;
68
69 if (SND_SOC_DAPM_EVENT_ON(event)) {
70 adau->pll_regs[5] = 1;
71 } else {
72 adau->pll_regs[5] = 0;
73 /* Bypass the PLL when disabled, otherwise registers will become
74 * inaccessible. */
75 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
76 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL, 0);
77 }
78
79 /* The PLL register is 6 bytes long and can only be written at once. */
80 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
81 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
82
83 if (SND_SOC_DAPM_EVENT_ON(event)) {
84 mdelay(5);
85 regmap_update_bits(adau->regmap, ADAU17X1_CLOCK_CONTROL,
86 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL,
87 ADAU17X1_CLOCK_CONTROL_CORECLK_SRC_PLL);
88 }
89
90 return 0;
91 }
92
93 static const char * const adau17x1_mono_stereo_text[] = {
94 "Stereo",
95 "Mono Left Channel (L+R)",
96 "Mono Right Channel (L+R)",
97 "Mono (L+R)",
98 };
99
100 static SOC_ENUM_SINGLE_DECL(adau17x1_dac_mode_enum,
101 ADAU17X1_DAC_CONTROL0, 6, adau17x1_mono_stereo_text);
102
103 static const struct snd_kcontrol_new adau17x1_dac_mode_mux =
104 SOC_DAPM_ENUM("DAC Mono-Stereo-Mode", adau17x1_dac_mode_enum);
105
106 static const struct snd_soc_dapm_widget adau17x1_dapm_widgets[] = {
107 SND_SOC_DAPM_SUPPLY_S("PLL", 3, SND_SOC_NOPM, 0, 0, adau17x1_pll_event,
108 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
109
110 SND_SOC_DAPM_SUPPLY("AIFCLK", SND_SOC_NOPM, 0, 0, NULL, 0),
111
112 SND_SOC_DAPM_SUPPLY("MICBIAS", ADAU17X1_MICBIAS, 0, 0, NULL, 0),
113
114 SND_SOC_DAPM_SUPPLY("Left Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
115 0, 0, NULL, 0),
116 SND_SOC_DAPM_SUPPLY("Right Playback Enable", ADAU17X1_PLAY_POWER_MGMT,
117 1, 0, NULL, 0),
118
119 SND_SOC_DAPM_MUX("Left DAC Mode Mux", SND_SOC_NOPM, 0, 0,
120 &adau17x1_dac_mode_mux),
121 SND_SOC_DAPM_MUX("Right DAC Mode Mux", SND_SOC_NOPM, 0, 0,
122 &adau17x1_dac_mode_mux),
123
124 SND_SOC_DAPM_ADC("Left Decimator", NULL, ADAU17X1_ADC_CONTROL, 0, 0),
125 SND_SOC_DAPM_ADC("Right Decimator", NULL, ADAU17X1_ADC_CONTROL, 1, 0),
126 SND_SOC_DAPM_DAC("Left DAC", NULL, ADAU17X1_DAC_CONTROL0, 0, 0),
127 SND_SOC_DAPM_DAC("Right DAC", NULL, ADAU17X1_DAC_CONTROL0, 1, 0),
128 };
129
130 static const struct snd_soc_dapm_route adau17x1_dapm_routes[] = {
131 { "Left Decimator", NULL, "SYSCLK" },
132 { "Right Decimator", NULL, "SYSCLK" },
133 { "Left DAC", NULL, "SYSCLK" },
134 { "Right DAC", NULL, "SYSCLK" },
135 { "Capture", NULL, "SYSCLK" },
136 { "Playback", NULL, "SYSCLK" },
137
138 { "Left DAC", NULL, "Left DAC Mode Mux" },
139 { "Right DAC", NULL, "Right DAC Mode Mux" },
140
141 { "Capture", NULL, "AIFCLK" },
142 { "Playback", NULL, "AIFCLK" },
143 };
144
145 static const struct snd_soc_dapm_route adau17x1_dapm_pll_route = {
146 "SYSCLK", NULL, "PLL",
147 };
148
149 /*
150 * The MUX register for the Capture and Playback MUXs selects either DSP as
151 * source/destination or one of the TDM slots. The TDM slot is selected via
152 * snd_soc_dai_set_tdm_slot(), so we only expose whether to go to the DSP or
153 * directly to the DAI interface with this control.
154 */
155 static int adau17x1_dsp_mux_enum_put(struct snd_kcontrol *kcontrol,
156 struct snd_ctl_elem_value *ucontrol)
157 {
158 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
159 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
160 struct adau *adau = snd_soc_codec_get_drvdata(codec);
161 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
162 struct snd_soc_dapm_update update;
163 unsigned int stream = e->shift_l;
164 unsigned int val, change;
165 int reg;
166
167 if (ucontrol->value.enumerated.item[0] >= e->items)
168 return -EINVAL;
169
170 switch (ucontrol->value.enumerated.item[0]) {
171 case 0:
172 val = 0;
173 adau->dsp_bypass[stream] = false;
174 break;
175 default:
176 val = (adau->tdm_slot[stream] * 2) + 1;
177 adau->dsp_bypass[stream] = true;
178 break;
179 }
180
181 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
182 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
183 else
184 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
185
186 change = snd_soc_test_bits(codec, reg, 0xff, val);
187 if (change) {
188 update.kcontrol = kcontrol;
189 update.mask = 0xff;
190 update.reg = reg;
191 update.val = val;
192
193 snd_soc_dapm_mux_update_power(dapm, kcontrol,
194 ucontrol->value.enumerated.item[0], e, &update);
195 }
196
197 return change;
198 }
199
200 static int adau17x1_dsp_mux_enum_get(struct snd_kcontrol *kcontrol,
201 struct snd_ctl_elem_value *ucontrol)
202 {
203 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol);
204 struct adau *adau = snd_soc_codec_get_drvdata(codec);
205 struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
206 unsigned int stream = e->shift_l;
207 unsigned int reg, val;
208 int ret;
209
210 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
211 reg = ADAU17X1_SERIAL_INPUT_ROUTE;
212 else
213 reg = ADAU17X1_SERIAL_OUTPUT_ROUTE;
214
215 ret = regmap_read(adau->regmap, reg, &val);
216 if (ret)
217 return ret;
218
219 if (val != 0)
220 val = 1;
221 ucontrol->value.enumerated.item[0] = val;
222
223 return 0;
224 }
225
226 #define DECLARE_ADAU17X1_DSP_MUX_CTRL(_name, _label, _stream, _text) \
227 const struct snd_kcontrol_new _name = \
228 SOC_DAPM_ENUM_EXT(_label, (const struct soc_enum)\
229 SOC_ENUM_SINGLE(SND_SOC_NOPM, _stream, \
230 ARRAY_SIZE(_text), _text), \
231 adau17x1_dsp_mux_enum_get, adau17x1_dsp_mux_enum_put)
232
233 static const char * const adau17x1_dac_mux_text[] = {
234 "DSP",
235 "AIFIN",
236 };
237
238 static const char * const adau17x1_capture_mux_text[] = {
239 "DSP",
240 "Decimator",
241 };
242
243 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_dac_mux, "DAC Playback Mux",
244 SNDRV_PCM_STREAM_PLAYBACK, adau17x1_dac_mux_text);
245
246 static DECLARE_ADAU17X1_DSP_MUX_CTRL(adau17x1_capture_mux, "Capture Mux",
247 SNDRV_PCM_STREAM_CAPTURE, adau17x1_capture_mux_text);
248
249 static const struct snd_soc_dapm_widget adau17x1_dsp_dapm_widgets[] = {
250 SND_SOC_DAPM_PGA("DSP", ADAU17X1_DSP_RUN, 0, 0, NULL, 0),
251 SND_SOC_DAPM_SIGGEN("DSP Siggen"),
252
253 SND_SOC_DAPM_MUX("DAC Playback Mux", SND_SOC_NOPM, 0, 0,
254 &adau17x1_dac_mux),
255 SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
256 &adau17x1_capture_mux),
257 };
258
259 static const struct snd_soc_dapm_route adau17x1_dsp_dapm_routes[] = {
260 { "DAC Playback Mux", "DSP", "DSP" },
261 { "DAC Playback Mux", "AIFIN", "Playback" },
262
263 { "Left DAC Mode Mux", "Stereo", "DAC Playback Mux" },
264 { "Left DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
265 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "DAC Playback Mux" },
266 { "Right DAC Mode Mux", "Stereo", "DAC Playback Mux" },
267 { "Right DAC Mode Mux", "Mono (L+R)", "DAC Playback Mux" },
268 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "DAC Playback Mux" },
269
270 { "Capture Mux", "DSP", "DSP" },
271 { "Capture Mux", "Decimator", "Left Decimator" },
272 { "Capture Mux", "Decimator", "Right Decimator" },
273
274 { "Capture", NULL, "Capture Mux" },
275
276 { "DSP", NULL, "DSP Siggen" },
277
278 { "DSP", NULL, "Left Decimator" },
279 { "DSP", NULL, "Right Decimator" },
280 };
281
282 static const struct snd_soc_dapm_route adau17x1_no_dsp_dapm_routes[] = {
283 { "Left DAC Mode Mux", "Stereo", "Playback" },
284 { "Left DAC Mode Mux", "Mono (L+R)", "Playback" },
285 { "Left DAC Mode Mux", "Mono Left Channel (L+R)", "Playback" },
286 { "Right DAC Mode Mux", "Stereo", "Playback" },
287 { "Right DAC Mode Mux", "Mono (L+R)", "Playback" },
288 { "Right DAC Mode Mux", "Mono Right Channel (L+R)", "Playback" },
289 { "Capture", NULL, "Left Decimator" },
290 { "Capture", NULL, "Right Decimator" },
291 };
292
293 bool adau17x1_has_dsp(struct adau *adau)
294 {
295 switch (adau->type) {
296 case ADAU1761:
297 case ADAU1381:
298 case ADAU1781:
299 return true;
300 default:
301 return false;
302 }
303 }
304 EXPORT_SYMBOL_GPL(adau17x1_has_dsp);
305
306 static int adau17x1_hw_params(struct snd_pcm_substream *substream,
307 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
308 {
309 struct snd_soc_codec *codec = dai->codec;
310 struct adau *adau = snd_soc_codec_get_drvdata(codec);
311 unsigned int val, div, dsp_div;
312 unsigned int freq;
313 int ret;
314
315 if (adau->clk_src == ADAU17X1_CLK_SRC_PLL)
316 freq = adau->pll_freq;
317 else
318 freq = adau->sysclk;
319
320 if (freq % params_rate(params) != 0)
321 return -EINVAL;
322
323 switch (freq / params_rate(params)) {
324 case 1024: /* fs */
325 div = 0;
326 dsp_div = 1;
327 break;
328 case 6144: /* fs / 6 */
329 div = 1;
330 dsp_div = 6;
331 break;
332 case 4096: /* fs / 4 */
333 div = 2;
334 dsp_div = 5;
335 break;
336 case 3072: /* fs / 3 */
337 div = 3;
338 dsp_div = 4;
339 break;
340 case 2048: /* fs / 2 */
341 div = 4;
342 dsp_div = 3;
343 break;
344 case 1536: /* fs / 1.5 */
345 div = 5;
346 dsp_div = 2;
347 break;
348 case 512: /* fs / 0.5 */
349 div = 6;
350 dsp_div = 0;
351 break;
352 default:
353 return -EINVAL;
354 }
355
356 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
357 ADAU17X1_CONVERTER0_CONVSR_MASK, div);
358 if (adau17x1_has_dsp(adau)) {
359 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div);
360 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dsp_div);
361 }
362
363 if (adau->sigmadsp) {
364 ret = adau17x1_setup_firmware(adau, params_rate(params));
365 if (ret < 0)
366 return ret;
367 }
368
369 if (adau->dai_fmt != SND_SOC_DAIFMT_RIGHT_J)
370 return 0;
371
372 switch (params_width(params)) {
373 case 16:
374 val = ADAU17X1_SERIAL_PORT1_DELAY16;
375 break;
376 case 24:
377 val = ADAU17X1_SERIAL_PORT1_DELAY8;
378 break;
379 case 32:
380 val = ADAU17X1_SERIAL_PORT1_DELAY0;
381 break;
382 default:
383 return -EINVAL;
384 }
385
386 return regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
387 ADAU17X1_SERIAL_PORT1_DELAY_MASK, val);
388 }
389
390 static int adau17x1_set_dai_pll(struct snd_soc_dai *dai, int pll_id,
391 int source, unsigned int freq_in, unsigned int freq_out)
392 {
393 struct snd_soc_codec *codec = dai->codec;
394 struct adau *adau = snd_soc_codec_get_drvdata(codec);
395 int ret;
396
397 if (freq_in < 8000000 || freq_in > 27000000)
398 return -EINVAL;
399
400 ret = adau_calc_pll_cfg(freq_in, freq_out, adau->pll_regs);
401 if (ret < 0)
402 return ret;
403
404 /* The PLL register is 6 bytes long and can only be written at once. */
405 ret = regmap_raw_write(adau->regmap, ADAU17X1_PLL_CONTROL,
406 adau->pll_regs, ARRAY_SIZE(adau->pll_regs));
407 if (ret)
408 return ret;
409
410 adau->pll_freq = freq_out;
411
412 return 0;
413 }
414
415 static int adau17x1_set_dai_sysclk(struct snd_soc_dai *dai,
416 int clk_id, unsigned int freq, int dir)
417 {
418 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(dai->codec);
419 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec);
420
421 switch (clk_id) {
422 case ADAU17X1_CLK_SRC_MCLK:
423 case ADAU17X1_CLK_SRC_PLL:
424 break;
425 default:
426 return -EINVAL;
427 }
428
429 adau->sysclk = freq;
430
431 if (adau->clk_src != clk_id) {
432 if (clk_id == ADAU17X1_CLK_SRC_PLL) {
433 snd_soc_dapm_add_routes(dapm,
434 &adau17x1_dapm_pll_route, 1);
435 } else {
436 snd_soc_dapm_del_routes(dapm,
437 &adau17x1_dapm_pll_route, 1);
438 }
439 }
440
441 adau->clk_src = clk_id;
442
443 return 0;
444 }
445
446 static int adau17x1_set_dai_fmt(struct snd_soc_dai *dai,
447 unsigned int fmt)
448 {
449 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec);
450 unsigned int ctrl0, ctrl1;
451 int lrclk_pol;
452
453 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
454 case SND_SOC_DAIFMT_CBM_CFM:
455 ctrl0 = ADAU17X1_SERIAL_PORT0_MASTER;
456 adau->master = true;
457 break;
458 case SND_SOC_DAIFMT_CBS_CFS:
459 ctrl0 = 0;
460 adau->master = false;
461 break;
462 default:
463 return -EINVAL;
464 }
465
466 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
467 case SND_SOC_DAIFMT_I2S:
468 lrclk_pol = 0;
469 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
470 break;
471 case SND_SOC_DAIFMT_LEFT_J:
472 case SND_SOC_DAIFMT_RIGHT_J:
473 lrclk_pol = 1;
474 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
475 break;
476 case SND_SOC_DAIFMT_DSP_A:
477 lrclk_pol = 1;
478 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
479 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY1;
480 break;
481 case SND_SOC_DAIFMT_DSP_B:
482 lrclk_pol = 1;
483 ctrl0 |= ADAU17X1_SERIAL_PORT0_PULSE_MODE;
484 ctrl1 = ADAU17X1_SERIAL_PORT1_DELAY0;
485 break;
486 default:
487 return -EINVAL;
488 }
489
490 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
491 case SND_SOC_DAIFMT_NB_NF:
492 break;
493 case SND_SOC_DAIFMT_IB_NF:
494 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
495 break;
496 case SND_SOC_DAIFMT_NB_IF:
497 lrclk_pol = !lrclk_pol;
498 break;
499 case SND_SOC_DAIFMT_IB_IF:
500 ctrl0 |= ADAU17X1_SERIAL_PORT0_BCLK_POL;
501 lrclk_pol = !lrclk_pol;
502 break;
503 default:
504 return -EINVAL;
505 }
506
507 if (lrclk_pol)
508 ctrl0 |= ADAU17X1_SERIAL_PORT0_LRCLK_POL;
509
510 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT0, ctrl0);
511 regmap_write(adau->regmap, ADAU17X1_SERIAL_PORT1, ctrl1);
512
513 adau->dai_fmt = fmt & SND_SOC_DAIFMT_FORMAT_MASK;
514
515 return 0;
516 }
517
518 static int adau17x1_set_dai_tdm_slot(struct snd_soc_dai *dai,
519 unsigned int tx_mask, unsigned int rx_mask, int slots, int slot_width)
520 {
521 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec);
522 unsigned int ser_ctrl0, ser_ctrl1;
523 unsigned int conv_ctrl0, conv_ctrl1;
524
525 /* I2S mode */
526 if (slots == 0) {
527 slots = 2;
528 rx_mask = 3;
529 tx_mask = 3;
530 slot_width = 32;
531 }
532
533 switch (slots) {
534 case 2:
535 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_STEREO;
536 break;
537 case 4:
538 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM4;
539 break;
540 case 8:
541 if (adau->type == ADAU1361)
542 return -EINVAL;
543
544 ser_ctrl0 = ADAU17X1_SERIAL_PORT0_TDM8;
545 break;
546 default:
547 return -EINVAL;
548 }
549
550 switch (slot_width * slots) {
551 case 32:
552 if (adau->type == ADAU1761)
553 return -EINVAL;
554
555 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK32;
556 break;
557 case 64:
558 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK64;
559 break;
560 case 48:
561 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK48;
562 break;
563 case 128:
564 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK128;
565 break;
566 case 256:
567 if (adau->type == ADAU1361)
568 return -EINVAL;
569
570 ser_ctrl1 = ADAU17X1_SERIAL_PORT1_BCLK256;
571 break;
572 default:
573 return -EINVAL;
574 }
575
576 switch (rx_mask) {
577 case 0x03:
578 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(1);
579 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 0;
580 break;
581 case 0x0c:
582 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(2);
583 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 1;
584 break;
585 case 0x30:
586 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(3);
587 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 2;
588 break;
589 case 0xc0:
590 conv_ctrl1 = ADAU17X1_CONVERTER1_ADC_PAIR(4);
591 adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] = 3;
592 break;
593 default:
594 return -EINVAL;
595 }
596
597 switch (tx_mask) {
598 case 0x03:
599 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(1);
600 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 0;
601 break;
602 case 0x0c:
603 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(2);
604 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 1;
605 break;
606 case 0x30:
607 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(3);
608 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 2;
609 break;
610 case 0xc0:
611 conv_ctrl0 = ADAU17X1_CONVERTER0_DAC_PAIR(4);
612 adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] = 3;
613 break;
614 default:
615 return -EINVAL;
616 }
617
618 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER0,
619 ADAU17X1_CONVERTER0_DAC_PAIR_MASK, conv_ctrl0);
620 regmap_update_bits(adau->regmap, ADAU17X1_CONVERTER1,
621 ADAU17X1_CONVERTER1_ADC_PAIR_MASK, conv_ctrl1);
622 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT0,
623 ADAU17X1_SERIAL_PORT0_TDM_MASK, ser_ctrl0);
624 regmap_update_bits(adau->regmap, ADAU17X1_SERIAL_PORT1,
625 ADAU17X1_SERIAL_PORT1_BCLK_MASK, ser_ctrl1);
626
627 if (!adau17x1_has_dsp(adau))
628 return 0;
629
630 if (adau->dsp_bypass[SNDRV_PCM_STREAM_PLAYBACK]) {
631 regmap_write(adau->regmap, ADAU17X1_SERIAL_INPUT_ROUTE,
632 (adau->tdm_slot[SNDRV_PCM_STREAM_PLAYBACK] * 2) + 1);
633 }
634
635 if (adau->dsp_bypass[SNDRV_PCM_STREAM_CAPTURE]) {
636 regmap_write(adau->regmap, ADAU17X1_SERIAL_OUTPUT_ROUTE,
637 (adau->tdm_slot[SNDRV_PCM_STREAM_CAPTURE] * 2) + 1);
638 }
639
640 return 0;
641 }
642
643 static int adau17x1_startup(struct snd_pcm_substream *substream,
644 struct snd_soc_dai *dai)
645 {
646 struct adau *adau = snd_soc_codec_get_drvdata(dai->codec);
647
648 if (adau->sigmadsp)
649 return sigmadsp_restrict_params(adau->sigmadsp, substream);
650
651 return 0;
652 }
653
654 const struct snd_soc_dai_ops adau17x1_dai_ops = {
655 .hw_params = adau17x1_hw_params,
656 .set_sysclk = adau17x1_set_dai_sysclk,
657 .set_fmt = adau17x1_set_dai_fmt,
658 .set_pll = adau17x1_set_dai_pll,
659 .set_tdm_slot = adau17x1_set_dai_tdm_slot,
660 .startup = adau17x1_startup,
661 };
662 EXPORT_SYMBOL_GPL(adau17x1_dai_ops);
663
664 int adau17x1_set_micbias_voltage(struct snd_soc_codec *codec,
665 enum adau17x1_micbias_voltage micbias)
666 {
667 struct adau *adau = snd_soc_codec_get_drvdata(codec);
668
669 switch (micbias) {
670 case ADAU17X1_MICBIAS_0_90_AVDD:
671 case ADAU17X1_MICBIAS_0_65_AVDD:
672 break;
673 default:
674 return -EINVAL;
675 }
676
677 return regmap_write(adau->regmap, ADAU17X1_MICBIAS, micbias << 2);
678 }
679 EXPORT_SYMBOL_GPL(adau17x1_set_micbias_voltage);
680
681 bool adau17x1_precious_register(struct device *dev, unsigned int reg)
682 {
683 /* SigmaDSP parameter memory */
684 if (reg < 0x400)
685 return true;
686
687 return false;
688 }
689 EXPORT_SYMBOL_GPL(adau17x1_precious_register);
690
691 bool adau17x1_readable_register(struct device *dev, unsigned int reg)
692 {
693 /* SigmaDSP parameter memory */
694 if (reg < 0x400)
695 return true;
696
697 switch (reg) {
698 case ADAU17X1_CLOCK_CONTROL:
699 case ADAU17X1_PLL_CONTROL:
700 case ADAU17X1_REC_POWER_MGMT:
701 case ADAU17X1_MICBIAS:
702 case ADAU17X1_SERIAL_PORT0:
703 case ADAU17X1_SERIAL_PORT1:
704 case ADAU17X1_CONVERTER0:
705 case ADAU17X1_CONVERTER1:
706 case ADAU17X1_LEFT_INPUT_DIGITAL_VOL:
707 case ADAU17X1_RIGHT_INPUT_DIGITAL_VOL:
708 case ADAU17X1_ADC_CONTROL:
709 case ADAU17X1_PLAY_POWER_MGMT:
710 case ADAU17X1_DAC_CONTROL0:
711 case ADAU17X1_DAC_CONTROL1:
712 case ADAU17X1_DAC_CONTROL2:
713 case ADAU17X1_SERIAL_PORT_PAD:
714 case ADAU17X1_CONTROL_PORT_PAD0:
715 case ADAU17X1_CONTROL_PORT_PAD1:
716 case ADAU17X1_DSP_SAMPLING_RATE:
717 case ADAU17X1_SERIAL_INPUT_ROUTE:
718 case ADAU17X1_SERIAL_OUTPUT_ROUTE:
719 case ADAU17X1_DSP_ENABLE:
720 case ADAU17X1_DSP_RUN:
721 case ADAU17X1_SERIAL_SAMPLING_RATE:
722 return true;
723 default:
724 break;
725 }
726 return false;
727 }
728 EXPORT_SYMBOL_GPL(adau17x1_readable_register);
729
730 bool adau17x1_volatile_register(struct device *dev, unsigned int reg)
731 {
732 /* SigmaDSP parameter and program memory */
733 if (reg < 0x4000)
734 return true;
735
736 switch (reg) {
737 /* The PLL register is 6 bytes long */
738 case ADAU17X1_PLL_CONTROL:
739 case ADAU17X1_PLL_CONTROL + 1:
740 case ADAU17X1_PLL_CONTROL + 2:
741 case ADAU17X1_PLL_CONTROL + 3:
742 case ADAU17X1_PLL_CONTROL + 4:
743 case ADAU17X1_PLL_CONTROL + 5:
744 return true;
745 default:
746 break;
747 }
748
749 return false;
750 }
751 EXPORT_SYMBOL_GPL(adau17x1_volatile_register);
752
753 int adau17x1_setup_firmware(struct adau *adau, unsigned int rate)
754 {
755 int ret;
756 int dspsr;
757
758 ret = regmap_read(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, &dspsr);
759 if (ret)
760 return ret;
761
762 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 1);
763 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, 0xf);
764
765 ret = sigmadsp_setup(adau->sigmadsp, rate);
766 if (ret) {
767 regmap_write(adau->regmap, ADAU17X1_DSP_ENABLE, 0);
768 return ret;
769 }
770 regmap_write(adau->regmap, ADAU17X1_DSP_SAMPLING_RATE, dspsr);
771
772 return 0;
773 }
774 EXPORT_SYMBOL_GPL(adau17x1_setup_firmware);
775
776 int adau17x1_add_widgets(struct snd_soc_codec *codec)
777 {
778 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
779 struct adau *adau = snd_soc_codec_get_drvdata(codec);
780 int ret;
781
782 ret = snd_soc_add_codec_controls(codec, adau17x1_controls,
783 ARRAY_SIZE(adau17x1_controls));
784 if (ret)
785 return ret;
786 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dapm_widgets,
787 ARRAY_SIZE(adau17x1_dapm_widgets));
788 if (ret)
789 return ret;
790
791 if (adau17x1_has_dsp(adau)) {
792 ret = snd_soc_dapm_new_controls(dapm, adau17x1_dsp_dapm_widgets,
793 ARRAY_SIZE(adau17x1_dsp_dapm_widgets));
794 if (ret)
795 return ret;
796
797 if (!adau->sigmadsp)
798 return 0;
799
800 ret = sigmadsp_attach(adau->sigmadsp, &codec->component);
801 if (ret) {
802 dev_err(codec->dev, "Failed to attach firmware: %d\n",
803 ret);
804 return ret;
805 }
806 }
807
808 return 0;
809 }
810 EXPORT_SYMBOL_GPL(adau17x1_add_widgets);
811
812 int adau17x1_add_routes(struct snd_soc_codec *codec)
813 {
814 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
815 struct adau *adau = snd_soc_codec_get_drvdata(codec);
816 int ret;
817
818 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dapm_routes,
819 ARRAY_SIZE(adau17x1_dapm_routes));
820 if (ret)
821 return ret;
822
823 if (adau17x1_has_dsp(adau)) {
824 ret = snd_soc_dapm_add_routes(dapm, adau17x1_dsp_dapm_routes,
825 ARRAY_SIZE(adau17x1_dsp_dapm_routes));
826 } else {
827 ret = snd_soc_dapm_add_routes(dapm, adau17x1_no_dsp_dapm_routes,
828 ARRAY_SIZE(adau17x1_no_dsp_dapm_routes));
829 }
830 return ret;
831 }
832 EXPORT_SYMBOL_GPL(adau17x1_add_routes);
833
834 int adau17x1_resume(struct snd_soc_codec *codec)
835 {
836 struct adau *adau = snd_soc_codec_get_drvdata(codec);
837
838 if (adau->switch_mode)
839 adau->switch_mode(codec->dev);
840
841 regcache_sync(adau->regmap);
842
843 return 0;
844 }
845 EXPORT_SYMBOL_GPL(adau17x1_resume);
846
847 int adau17x1_probe(struct device *dev, struct regmap *regmap,
848 enum adau17x1_type type, void (*switch_mode)(struct device *dev),
849 const char *firmware_name)
850 {
851 struct adau *adau;
852
853 if (IS_ERR(regmap))
854 return PTR_ERR(regmap);
855
856 adau = devm_kzalloc(dev, sizeof(*adau), GFP_KERNEL);
857 if (!adau)
858 return -ENOMEM;
859
860 adau->regmap = regmap;
861 adau->switch_mode = switch_mode;
862 adau->type = type;
863
864 dev_set_drvdata(dev, adau);
865
866 if (firmware_name) {
867 adau->sigmadsp = devm_sigmadsp_init_regmap(dev, regmap, NULL,
868 firmware_name);
869 if (IS_ERR(adau->sigmadsp)) {
870 dev_warn(dev, "Could not find firmware file: %ld\n",
871 PTR_ERR(adau->sigmadsp));
872 adau->sigmadsp = NULL;
873 }
874 }
875
876 if (switch_mode)
877 switch_mode(dev);
878
879 return 0;
880 }
881 EXPORT_SYMBOL_GPL(adau17x1_probe);
882
883 MODULE_DESCRIPTION("ASoC ADAU1X61/ADAU1X81 common code");
884 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
885 MODULE_LICENSE("GPL");
This page took 0.071559 seconds and 5 git commands to generate.