sound/soc/codecs/ak4642.c

   1 /*
   2  * ak4642.c  --  AK4642/AK4643 ALSA Soc Audio driver
   3  *
   4  * Copyright (C) 2009 Renesas Solutions Corp.
   5  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
   6  *
   7  * Based on wm8731.c by Richard Purdie
   8  * Based on ak4535.c by Richard Purdie
   9  * Based on wm8753.c by Liam Girdwood
  10  *
  11  * This program is free software; you can redistribute it and/or modify
  12  * it under the terms of the GNU General Public License version 2 as
  13  * published by the Free Software Foundation.
  14  */
  15
  16 /* ** CAUTION **
  17  *
  18  * This is very simple driver.
  19  * It can use headphone output / stereo input only
  20  *
  21  * AK4642 is tested.
  22  * AK4643 is tested.
  23  * AK4648 is tested.
  24  */
  25
  26 #include <linux/delay.h>
  27 #include <linux/i2c.h>
  28 #include <linux/slab.h>
  29 #include <linux/of_device.h>
  30 #include <linux/module.h>
  31 #include <linux/regmap.h>
  32 #include <sound/soc.h>
  33 #include <sound/initval.h>
  34 #include <sound/tlv.h>
  35
  36 #define PW_MGMT1        0x00
  37 #define PW_MGMT2        0x01
  38 #define SG_SL1          0x02
  39 #define SG_SL2          0x03
  40 #define MD_CTL1         0x04
  41 #define MD_CTL2         0x05
  42 #define TIMER           0x06
  43 #define ALC_CTL1        0x07
  44 #define ALC_CTL2        0x08
  45 #define L_IVC           0x09
  46 #define L_DVC           0x0a
  47 #define ALC_CTL3        0x0b
  48 #define R_IVC           0x0c
  49 #define R_DVC           0x0d
  50 #define MD_CTL3         0x0e
  51 #define MD_CTL4         0x0f
  52 #define PW_MGMT3        0x10
  53 #define DF_S            0x11
  54 #define FIL3_0          0x12
  55 #define FIL3_1          0x13
  56 #define FIL3_2          0x14
  57 #define FIL3_3          0x15
  58 #define EQ_0            0x16
  59 #define EQ_1            0x17
  60 #define EQ_2            0x18
  61 #define EQ_3            0x19
  62 #define EQ_4            0x1a
  63 #define EQ_5            0x1b
  64 #define FIL1_0          0x1c
  65 #define FIL1_1          0x1d
  66 #define FIL1_2          0x1e
  67 #define FIL1_3          0x1f
  68 #define PW_MGMT4        0x20
  69 #define MD_CTL5         0x21
  70 #define LO_MS           0x22
  71 #define HP_MS           0x23
  72 #define SPK_MS          0x24
  73
  74 /* PW_MGMT1*/
  75 #define PMVCM           (1 << 6) /* VCOM Power Management */
  76 #define PMMIN           (1 << 5) /* MIN Input Power Management */
  77 #define PMDAC           (1 << 2) /* DAC Power Management */
  78 #define PMADL           (1 << 0) /* MIC Amp Lch and ADC Lch Power Management */
  79
  80 /* PW_MGMT2 */
  81 #define HPMTN           (1 << 6)
  82 #define PMHPL           (1 << 5)
  83 #define PMHPR           (1 << 4)
  84 #define MS              (1 << 3) /* master/slave select */
  85 #define MCKO            (1 << 1)
  86 #define PMPLL           (1 << 0)
  87
  88 #define PMHP_MASK       (PMHPL | PMHPR)
  89 #define PMHP            PMHP_MASK
  90
  91 /* PW_MGMT3 */
  92 #define PMADR           (1 << 0) /* MIC L / ADC R Power Management */
  93
  94 /* SG_SL1 */
  95 #define MINS            (1 << 6) /* Switch from MIN to Speaker */
  96 #define DACL            (1 << 4) /* Switch from DAC to Stereo or Receiver */
  97 #define PMMP            (1 << 2) /* MPWR pin Power Management */
  98 #define MGAIN0          (1 << 0) /* MIC amp gain*/
  99
 100 /* TIMER */
 101 #define ZTM(param)      ((param & 0x3) << 4) /* ALC Zoro Crossing TimeOut */
 102 #define WTM(param)      (((param & 0x4) << 4) | ((param & 0x3) << 2))
 103
 104 /* ALC_CTL1 */
 105 #define ALC             (1 << 5) /* ALC Enable */
 106 #define LMTH0           (1 << 0) /* ALC Limiter / Recovery Level */
 107
 108 /* MD_CTL1 */
 109 #define PLL3            (1 << 7)
 110 #define PLL2            (1 << 6)
 111 #define PLL1            (1 << 5)
 112 #define PLL0            (1 << 4)
 113 #define PLL_MASK        (PLL3 | PLL2 | PLL1 | PLL0)
 114
 115 #define BCKO_MASK       (1 << 3)
 116 #define BCKO_64         BCKO_MASK
 117
 118 #define DIF_MASK        (3 << 0)
 119 #define DSP             (0 << 0)
 120 #define RIGHT_J         (1 << 0)
 121 #define LEFT_J          (2 << 0)
 122 #define I2S             (3 << 0)
 123
 124 /* MD_CTL2 */
 125 #define FS0             (1 << 0)
 126 #define FS1             (1 << 1)
 127 #define FS2             (1 << 2)
 128 #define FS3             (1 << 5)
 129 #define FS_MASK         (FS0 | FS1 | FS2 | FS3)
 130
 131 /* MD_CTL3 */
 132 #define BST1            (1 << 3)
 133
 134 /* MD_CTL4 */
 135 #define DACH            (1 << 0)
 136
 137 /*
 138  * Playback Volume (table 39)
 139  *
 140  * max : 0x00 : +12.0 dB
 141  *       ( 0.5 dB step )
 142  * min : 0xFE : -115.0 dB
 143  * mute: 0xFF
 144  */
 145 static const DECLARE_TLV_DB_SCALE(out_tlv, -11550, 50, 1);
 146
 147 static const struct snd_kcontrol_new ak4642_snd_controls[] = {
 148
 149         SOC_DOUBLE_R_TLV("Digital Playback Volume", L_DVC, R_DVC,
 150                          0, 0xFF, 1, out_tlv),
 151 };
 152
 153 static const struct snd_kcontrol_new ak4642_headphone_control =
 154         SOC_DAPM_SINGLE("Switch", PW_MGMT2, 6, 1, 0);
 155
 156 static const struct snd_kcontrol_new ak4642_lout_mixer_controls[] = {
 157         SOC_DAPM_SINGLE("DACL", SG_SL1, 4, 1, 0),
 158 };
 159
 160 static const struct snd_soc_dapm_widget ak4642_dapm_widgets[] = {
 161
 162         /* Outputs */
 163         SND_SOC_DAPM_OUTPUT("HPOUTL"),
 164         SND_SOC_DAPM_OUTPUT("HPOUTR"),
 165         SND_SOC_DAPM_OUTPUT("LINEOUT"),
 166
 167         SND_SOC_DAPM_PGA("HPL Out", PW_MGMT2, 5, 0, NULL, 0),
 168         SND_SOC_DAPM_PGA("HPR Out", PW_MGMT2, 4, 0, NULL, 0),
 169         SND_SOC_DAPM_SWITCH("Headphone Enable", SND_SOC_NOPM, 0, 0,
 170                             &ak4642_headphone_control),
 171
 172         SND_SOC_DAPM_PGA("DACH", MD_CTL4, 0, 0, NULL, 0),
 173
 174         SND_SOC_DAPM_MIXER("LINEOUT Mixer", PW_MGMT1, 3, 0,
 175                            &ak4642_lout_mixer_controls[0],
 176                            ARRAY_SIZE(ak4642_lout_mixer_controls)),
 177
 178         /* DAC */
 179         SND_SOC_DAPM_DAC("DAC", "HiFi Playback", PW_MGMT1, 2, 0),
 180 };
 181
 182 static const struct snd_soc_dapm_route ak4642_intercon[] = {
 183
 184         /* Outputs */
 185         {"HPOUTL", NULL, "HPL Out"},
 186         {"HPOUTR", NULL, "HPR Out"},
 187         {"LINEOUT", NULL, "LINEOUT Mixer"},
 188
 189         {"HPL Out", NULL, "Headphone Enable"},
 190         {"HPR Out", NULL, "Headphone Enable"},
 191
 192         {"Headphone Enable", "Switch", "DACH"},
 193
 194         {"DACH", NULL, "DAC"},
 195
 196         {"LINEOUT Mixer", "DACL", "DAC"},
 197 };
 198
 199 /*
 200  * ak4642 register cache
 201  */
 202 static const struct reg_default ak4642_reg[] = {
 203         {  0, 0x00 }, {  1, 0x00 }, {  2, 0x01 }, {  3, 0x00 },
 204         {  4, 0x02 }, {  5, 0x00 }, {  6, 0x00 }, {  7, 0x00 },
 205         {  8, 0xe1 }, {  9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 },
 206         { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0x08 },
 207         { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 },
 208         { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 },
 209         { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 },
 210         { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 },
 211         { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 },
 212         { 36, 0x00 },
 213 };
 214
 215 static const struct reg_default ak4648_reg[] = {
 216         {  0, 0x00 }, {  1, 0x00 }, {  2, 0x01 }, {  3, 0x00 },
 217         {  4, 0x02 }, {  5, 0x00 }, {  6, 0x00 }, {  7, 0x00 },
 218         {  8, 0xe1 }, {  9, 0xe1 }, { 10, 0x18 }, { 11, 0x00 },
 219         { 12, 0xe1 }, { 13, 0x18 }, { 14, 0x11 }, { 15, 0xb8 },
 220         { 16, 0x00 }, { 17, 0x00 }, { 18, 0x00 }, { 19, 0x00 },
 221         { 20, 0x00 }, { 21, 0x00 }, { 22, 0x00 }, { 23, 0x00 },
 222         { 24, 0x00 }, { 25, 0x00 }, { 26, 0x00 }, { 27, 0x00 },
 223         { 28, 0x00 }, { 29, 0x00 }, { 30, 0x00 }, { 31, 0x00 },
 224         { 32, 0x00 }, { 33, 0x00 }, { 34, 0x00 }, { 35, 0x00 },
 225         { 36, 0x00 }, { 37, 0x88 }, { 38, 0x88 }, { 39, 0x08 },
 226 };
 227
 228 static int ak4642_dai_startup(struct snd_pcm_substream *substream,
 229                               struct snd_soc_dai *dai)
 230 {
 231         int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 232         struct snd_soc_codec *codec = dai->codec;
 233
 234         if (is_play) {
 235                 /*
 236                  * start headphone output
 237                  *
 238                  * PLL, Master Mode
 239                  * Audio I/F Format :MSB justified (ADC & DAC)
 240                  * Bass Boost Level : Middle
 241                  *
 242                  * This operation came from example code of
 243                  * "ASAHI KASEI AK4642" (japanese) manual p97.
 244                  */
 245                 snd_soc_write(codec, L_IVC, 0x91); /* volume */
 246                 snd_soc_write(codec, R_IVC, 0x91); /* volume */
 247         } else {
 248                 /*
 249                  * start stereo input
 250                  *
 251                  * PLL Master Mode
 252                  * Audio I/F Format:MSB justified (ADC & DAC)
 253                  * Pre MIC AMP:+20dB
 254                  * MIC Power On
 255                  * ALC setting:Refer to Table 35
 256                  * ALC bit=“1”
 257                  *
 258                  * This operation came from example code of
 259                  * "ASAHI KASEI AK4642" (japanese) manual p94.
 260                  */
 261                 snd_soc_update_bits(codec, SG_SL1, PMMP | MGAIN0, PMMP | MGAIN0);
 262                 snd_soc_write(codec, TIMER, ZTM(0x3) | WTM(0x3));
 263                 snd_soc_write(codec, ALC_CTL1, ALC | LMTH0);
 264                 snd_soc_update_bits(codec, PW_MGMT1, PMADL, PMADL);
 265                 snd_soc_update_bits(codec, PW_MGMT3, PMADR, PMADR);
 266         }
 267
 268         return 0;
 269 }
 270
 271 static void ak4642_dai_shutdown(struct snd_pcm_substream *substream,
 272                                struct snd_soc_dai *dai)
 273 {
 274         int is_play = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
 275         struct snd_soc_codec *codec = dai->codec;
 276
 277         if (is_play) {
 278         } else {
 279                 /* stop stereo input */
 280                 snd_soc_update_bits(codec, PW_MGMT1, PMADL, 0);
 281                 snd_soc_update_bits(codec, PW_MGMT3, PMADR, 0);
 282                 snd_soc_update_bits(codec, ALC_CTL1, ALC, 0);
 283         }
 284 }
 285
 286 static int ak4642_dai_set_sysclk(struct snd_soc_dai *codec_dai,
 287         int clk_id, unsigned int freq, int dir)
 288 {
 289         struct snd_soc_codec *codec = codec_dai->codec;
 290         u8 pll;
 291
 292         switch (freq) {
 293         case 11289600:
 294                 pll = PLL2;
 295                 break;
 296         case 12288000:
 297                 pll = PLL2 | PLL0;
 298                 break;
 299         case 12000000:
 300                 pll = PLL2 | PLL1;
 301                 break;
 302         case 24000000:
 303                 pll = PLL2 | PLL1 | PLL0;
 304                 break;
 305         case 13500000:
 306                 pll = PLL3 | PLL2;
 307                 break;
 308         case 27000000:
 309                 pll = PLL3 | PLL2 | PLL0;
 310                 break;
 311         default:
 312                 return -EINVAL;
 313         }
 314         snd_soc_update_bits(codec, MD_CTL1, PLL_MASK, pll);
 315
 316         return 0;
 317 }
 318
 319 static int ak4642_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
 320 {
 321         struct snd_soc_codec *codec = dai->codec;
 322         u8 data;
 323         u8 bcko;
 324
 325         data = MCKO | PMPLL; /* use MCKO */
 326         bcko = 0;
 327
 328         /* set master/slave audio interface */
 329         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 330         case SND_SOC_DAIFMT_CBM_CFM:
 331                 data |= MS;
 332                 bcko = BCKO_64;
 333                 break;
 334         case SND_SOC_DAIFMT_CBS_CFS:
 335                 break;
 336         default:
 337                 return -EINVAL;
 338         }
 339         snd_soc_update_bits(codec, PW_MGMT2, MS | MCKO | PMPLL, data);
 340         snd_soc_update_bits(codec, MD_CTL1, BCKO_MASK, bcko);
 341
 342         /* format type */
 343         data = 0;
 344         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 345         case SND_SOC_DAIFMT_LEFT_J:
 346                 data = LEFT_J;
 347                 break;
 348         case SND_SOC_DAIFMT_I2S:
 349                 data = I2S;
 350                 break;
 351         /* FIXME
 352          * Please add RIGHT_J / DSP support here
 353          */
 354         default:
 355                 return -EINVAL;
 356         }
 357         snd_soc_update_bits(codec, MD_CTL1, DIF_MASK, data);
 358
 359         return 0;
 360 }
 361
 362 static int ak4642_dai_hw_params(struct snd_pcm_substream *substream,
 363                                 struct snd_pcm_hw_params *params,
 364                                 struct snd_soc_dai *dai)
 365 {
 366         struct snd_soc_codec *codec = dai->codec;
 367         u8 rate;
 368
 369         switch (params_rate(params)) {
 370         case 7350:
 371                 rate = FS2;
 372                 break;
 373         case 8000:
 374                 rate = 0;
 375                 break;
 376         case 11025:
 377                 rate = FS2 | FS0;
 378                 break;
 379         case 12000:
 380                 rate = FS0;
 381                 break;
 382         case 14700:
 383                 rate = FS2 | FS1;
 384                 break;
 385         case 16000:
 386                 rate = FS1;
 387                 break;
 388         case 22050:
 389                 rate = FS2 | FS1 | FS0;
 390                 break;
 391         case 24000:
 392                 rate = FS1 | FS0;
 393                 break;
 394         case 29400:
 395                 rate = FS3 | FS2 | FS1;
 396                 break;
 397         case 32000:
 398                 rate = FS3 | FS1;
 399                 break;
 400         case 44100:
 401                 rate = FS3 | FS2 | FS1 | FS0;
 402                 break;
 403         case 48000:
 404                 rate = FS3 | FS1 | FS0;
 405                 break;
 406         default:
 407                 return -EINVAL;
 408         }
 409         snd_soc_update_bits(codec, MD_CTL2, FS_MASK, rate);
 410
 411         return 0;
 412 }
 413
 414 static int ak4642_set_bias_level(struct snd_soc_codec *codec,
 415                                  enum snd_soc_bias_level level)
 416 {
 417         switch (level) {
 418         case SND_SOC_BIAS_OFF:
 419                 snd_soc_write(codec, PW_MGMT1, 0x00);
 420                 break;
 421         default:
 422                 snd_soc_update_bits(codec, PW_MGMT1, PMVCM, PMVCM);
 423                 break;
 424         }
 425         codec->dapm.bias_level = level;
 426
 427         return 0;
 428 }
 429
 430 static const struct snd_soc_dai_ops ak4642_dai_ops = {
 431         .startup        = ak4642_dai_startup,
 432         .shutdown       = ak4642_dai_shutdown,
 433         .set_sysclk     = ak4642_dai_set_sysclk,
 434         .set_fmt        = ak4642_dai_set_fmt,
 435         .hw_params      = ak4642_dai_hw_params,
 436 };
 437
 438 static struct snd_soc_dai_driver ak4642_dai = {
 439         .name = "ak4642-hifi",
 440         .playback = {
 441                 .stream_name = "Playback",
 442                 .channels_min = 1,
 443                 .channels_max = 2,
 444                 .rates = SNDRV_PCM_RATE_8000_48000,
 445                 .formats = SNDRV_PCM_FMTBIT_S16_LE },
 446         .capture = {
 447                 .stream_name = "Capture",
 448                 .channels_min = 1,
 449                 .channels_max = 2,
 450                 .rates = SNDRV_PCM_RATE_8000_48000,
 451                 .formats = SNDRV_PCM_FMTBIT_S16_LE },
 452         .ops = &ak4642_dai_ops,
 453         .symmetric_rates = 1,
 454 };
 455
 456 static int ak4642_resume(struct snd_soc_codec *codec)
 457 {
 458         struct regmap *regmap = dev_get_regmap(codec->dev, NULL);
 459
 460         regcache_mark_dirty(regmap);
 461         regcache_sync(regmap);
 462         return 0;
 463 }
 464
 465
 466 static int ak4642_probe(struct snd_soc_codec *codec)
 467 {
 468         ak4642_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 469
 470         return 0;
 471 }
 472
 473 static int ak4642_remove(struct snd_soc_codec *codec)
 474 {
 475         ak4642_set_bias_level(codec, SND_SOC_BIAS_OFF);
 476         return 0;
 477 }
 478
 479 static struct snd_soc_codec_driver soc_codec_dev_ak4642 = {
 480         .probe                  = ak4642_probe,
 481         .remove                 = ak4642_remove,
 482         .resume                 = ak4642_resume,
 483         .set_bias_level         = ak4642_set_bias_level,
 484         .controls               = ak4642_snd_controls,
 485         .num_controls           = ARRAY_SIZE(ak4642_snd_controls),
 486         .dapm_widgets           = ak4642_dapm_widgets,
 487         .num_dapm_widgets       = ARRAY_SIZE(ak4642_dapm_widgets),
 488         .dapm_routes            = ak4642_intercon,
 489         .num_dapm_routes        = ARRAY_SIZE(ak4642_intercon),
 490 };
 491
 492 static const struct regmap_config ak4642_regmap = {
 493         .reg_bits               = 8,
 494         .val_bits               = 8,
 495         .max_register           = ARRAY_SIZE(ak4642_reg) + 1,
 496         .reg_defaults           = ak4642_reg,
 497         .num_reg_defaults       = ARRAY_SIZE(ak4642_reg),
 498 };
 499
 500 static const struct regmap_config ak4648_regmap = {
 501         .reg_bits               = 8,
 502         .val_bits               = 8,
 503         .max_register           = ARRAY_SIZE(ak4648_reg) + 1,
 504         .reg_defaults           = ak4648_reg,
 505         .num_reg_defaults       = ARRAY_SIZE(ak4648_reg),
 506 };
 507
 508 static struct of_device_id ak4642_of_match[];
 509 static int ak4642_i2c_probe(struct i2c_client *i2c,
 510                             const struct i2c_device_id *id)
 511 {
 512         struct device_node *np = i2c->dev.of_node;
 513         const struct regmap_config *regmap_config = NULL;
 514         struct regmap *regmap;
 515
 516         if (np) {
 517                 const struct of_device_id *of_id;
 518
 519                 of_id = of_match_device(ak4642_of_match, &i2c->dev);
 520                 if (of_id)
 521                         regmap_config = of_id->data;
 522         } else {
 523                 regmap_config = (const struct regmap_config *)id->driver_data;
 524         }
 525
 526         if (!regmap_config) {
 527                 dev_err(&i2c->dev, "Unknown device type\n");
 528                 return -EINVAL;
 529         }
 530
 531         regmap = devm_regmap_init_i2c(i2c, regmap_config);
 532         if (IS_ERR(regmap))
 533                 return PTR_ERR(regmap);
 534
 535         return snd_soc_register_codec(&i2c->dev,
 536                                       &soc_codec_dev_ak4642, &ak4642_dai, 1);
 537 }
 538
 539 static int ak4642_i2c_remove(struct i2c_client *client)
 540 {
 541         snd_soc_unregister_codec(&client->dev);
 542         return 0;
 543 }
 544
 545 static struct of_device_id ak4642_of_match[] = {
 546         { .compatible = "asahi-kasei,ak4642",   .data = &ak4642_regmap},
 547         { .compatible = "asahi-kasei,ak4643",   .data = &ak4642_regmap},
 548         { .compatible = "asahi-kasei,ak4648",   .data = &ak4648_regmap},
 549         {},
 550 };
 551 MODULE_DEVICE_TABLE(of, ak4642_of_match);
 552
 553 static const struct i2c_device_id ak4642_i2c_id[] = {
 554         { "ak4642", (kernel_ulong_t)&ak4642_regmap },
 555         { "ak4643", (kernel_ulong_t)&ak4642_regmap },
 556         { "ak4648", (kernel_ulong_t)&ak4648_regmap },
 557         { }
 558 };
 559 MODULE_DEVICE_TABLE(i2c, ak4642_i2c_id);
 560
 561 static struct i2c_driver ak4642_i2c_driver = {
 562         .driver = {
 563                 .name = "ak4642-codec",
 564                 .owner = THIS_MODULE,
 565                 .of_match_table = ak4642_of_match,
 566         },
 567         .probe          = ak4642_i2c_probe,
 568         .remove         = ak4642_i2c_remove,
 569         .id_table       = ak4642_i2c_id,
 570 };
 571
 572 module_i2c_driver(ak4642_i2c_driver);
 573
 574 MODULE_DESCRIPTION("Soc AK4642 driver");
 575 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
 576 MODULE_LICENSE("GPL");