2 * cs42l73.c -- CS42L73 ALSA Soc Audio driver
4 * Copyright 2011 Cirrus Logic, Inc.
6 * Authors: Georgi Vlaev, Nucleus Systems Ltd, <joe@nucleusys.com>
7 * Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/kernel.h>
18 #include <linux/init.h>
19 #include <linux/delay.h>
21 #include <linux/i2c.h>
22 #include <linux/regmap.h>
23 #include <linux/slab.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30 #include <sound/tlv.h>
37 struct cs42l73_private
{
38 struct sp_config config
[3];
39 struct regmap
*regmap
;
45 static const struct reg_default cs42l73_reg_defaults
[] = {
46 { 6, 0xF1 }, /* r06 - Power Ctl 1 */
47 { 7, 0xDF }, /* r07 - Power Ctl 2 */
48 { 8, 0x3F }, /* r08 - Power Ctl 3 */
49 { 9, 0x50 }, /* r09 - Charge Pump Freq */
50 { 10, 0x53 }, /* r0A - Output Load MicBias Short Detect */
51 { 11, 0x00 }, /* r0B - DMIC Master Clock Ctl */
52 { 12, 0x00 }, /* r0C - Aux PCM Ctl */
53 { 13, 0x15 }, /* r0D - Aux PCM Master Clock Ctl */
54 { 14, 0x00 }, /* r0E - Audio PCM Ctl */
55 { 15, 0x15 }, /* r0F - Audio PCM Master Clock Ctl */
56 { 16, 0x00 }, /* r10 - Voice PCM Ctl */
57 { 17, 0x15 }, /* r11 - Voice PCM Master Clock Ctl */
58 { 18, 0x00 }, /* r12 - Voice/Aux Sample Rate */
59 { 19, 0x06 }, /* r13 - Misc I/O Path Ctl */
60 { 20, 0x00 }, /* r14 - ADC Input Path Ctl */
61 { 21, 0x00 }, /* r15 - MICA Preamp, PGA Volume */
62 { 22, 0x00 }, /* r16 - MICB Preamp, PGA Volume */
63 { 23, 0x00 }, /* r17 - Input Path A Digital Volume */
64 { 24, 0x00 }, /* r18 - Input Path B Digital Volume */
65 { 25, 0x00 }, /* r19 - Playback Digital Ctl */
66 { 26, 0x00 }, /* r1A - HP/LO Left Digital Volume */
67 { 27, 0x00 }, /* r1B - HP/LO Right Digital Volume */
68 { 28, 0x00 }, /* r1C - Speakerphone Digital Volume */
69 { 29, 0x00 }, /* r1D - Ear/SPKLO Digital Volume */
70 { 30, 0x00 }, /* r1E - HP Left Analog Volume */
71 { 31, 0x00 }, /* r1F - HP Right Analog Volume */
72 { 32, 0x00 }, /* r20 - LO Left Analog Volume */
73 { 33, 0x00 }, /* r21 - LO Right Analog Volume */
74 { 34, 0x00 }, /* r22 - Stereo Input Path Advisory Volume */
75 { 35, 0x00 }, /* r23 - Aux PCM Input Advisory Volume */
76 { 36, 0x00 }, /* r24 - Audio PCM Input Advisory Volume */
77 { 37, 0x00 }, /* r25 - Voice PCM Input Advisory Volume */
78 { 38, 0x00 }, /* r26 - Limiter Attack Rate HP/LO */
79 { 39, 0x7F }, /* r27 - Limter Ctl, Release Rate HP/LO */
80 { 40, 0x00 }, /* r28 - Limter Threshold HP/LO */
81 { 41, 0x00 }, /* r29 - Limiter Attack Rate Speakerphone */
82 { 42, 0x3F }, /* r2A - Limter Ctl, Release Rate Speakerphone */
83 { 43, 0x00 }, /* r2B - Limter Threshold Speakerphone */
84 { 44, 0x00 }, /* r2C - Limiter Attack Rate Ear/SPKLO */
85 { 45, 0x3F }, /* r2D - Limter Ctl, Release Rate Ear/SPKLO */
86 { 46, 0x00 }, /* r2E - Limter Threshold Ear/SPKLO */
87 { 47, 0x00 }, /* r2F - ALC Enable, Attack Rate Left/Right */
88 { 48, 0x3F }, /* r30 - ALC Release Rate Left/Right */
89 { 49, 0x00 }, /* r31 - ALC Threshold Left/Right */
90 { 50, 0x00 }, /* r32 - Noise Gate Ctl Left/Right */
91 { 51, 0x00 }, /* r33 - ALC/NG Misc Ctl */
92 { 52, 0x18 }, /* r34 - Mixer Ctl */
93 { 53, 0x3F }, /* r35 - HP/LO Left Mixer Input Path Volume */
94 { 54, 0x3F }, /* r36 - HP/LO Right Mixer Input Path Volume */
95 { 55, 0x3F }, /* r37 - HP/LO Left Mixer Aux PCM Volume */
96 { 56, 0x3F }, /* r38 - HP/LO Right Mixer Aux PCM Volume */
97 { 57, 0x3F }, /* r39 - HP/LO Left Mixer Audio PCM Volume */
98 { 58, 0x3F }, /* r3A - HP/LO Right Mixer Audio PCM Volume */
99 { 59, 0x3F }, /* r3B - HP/LO Left Mixer Voice PCM Mono Volume */
100 { 60, 0x3F }, /* r3C - HP/LO Right Mixer Voice PCM Mono Volume */
101 { 61, 0x3F }, /* r3D - Aux PCM Left Mixer Input Path Volume */
102 { 62, 0x3F }, /* r3E - Aux PCM Right Mixer Input Path Volume */
103 { 63, 0x3F }, /* r3F - Aux PCM Left Mixer Volume */
104 { 64, 0x3F }, /* r40 - Aux PCM Left Mixer Volume */
105 { 65, 0x3F }, /* r41 - Aux PCM Left Mixer Audio PCM L Volume */
106 { 66, 0x3F }, /* r42 - Aux PCM Right Mixer Audio PCM R Volume */
107 { 67, 0x3F }, /* r43 - Aux PCM Left Mixer Voice PCM Volume */
108 { 68, 0x3F }, /* r44 - Aux PCM Right Mixer Voice PCM Volume */
109 { 69, 0x3F }, /* r45 - Audio PCM Left Input Path Volume */
110 { 70, 0x3F }, /* r46 - Audio PCM Right Input Path Volume */
111 { 71, 0x3F }, /* r47 - Audio PCM Left Mixer Aux PCM L Volume */
112 { 72, 0x3F }, /* r48 - Audio PCM Right Mixer Aux PCM R Volume */
113 { 73, 0x3F }, /* r49 - Audio PCM Left Mixer Volume */
114 { 74, 0x3F }, /* r4A - Audio PCM Right Mixer Volume */
115 { 75, 0x3F }, /* r4B - Audio PCM Left Mixer Voice PCM Volume */
116 { 76, 0x3F }, /* r4C - Audio PCM Right Mixer Voice PCM Volume */
117 { 77, 0x3F }, /* r4D - Voice PCM Left Input Path Volume */
118 { 78, 0x3F }, /* r4E - Voice PCM Right Input Path Volume */
119 { 79, 0x3F }, /* r4F - Voice PCM Left Mixer Aux PCM L Volume */
120 { 80, 0x3F }, /* r50 - Voice PCM Right Mixer Aux PCM R Volume */
121 { 81, 0x3F }, /* r51 - Voice PCM Left Mixer Audio PCM L Volume */
122 { 82, 0x3F }, /* r52 - Voice PCM Right Mixer Audio PCM R Volume */
123 { 83, 0x3F }, /* r53 - Voice PCM Left Mixer Voice PCM Volume */
124 { 84, 0x3F }, /* r54 - Voice PCM Right Mixer Voice PCM Volume */
125 { 85, 0xAA }, /* r55 - Mono Mixer Ctl */
126 { 86, 0x3F }, /* r56 - SPK Mono Mixer Input Path Volume */
127 { 87, 0x3F }, /* r57 - SPK Mono Mixer Aux PCM Mono/L/R Volume */
128 { 88, 0x3F }, /* r58 - SPK Mono Mixer Audio PCM Mono/L/R Volume */
129 { 89, 0x3F }, /* r59 - SPK Mono Mixer Voice PCM Mono Volume */
130 { 90, 0x3F }, /* r5A - SPKLO Mono Mixer Input Path Mono Volume */
131 { 91, 0x3F }, /* r5B - SPKLO Mono Mixer Aux Mono/L/R Volume */
132 { 92, 0x3F }, /* r5C - SPKLO Mono Mixer Audio Mono/L/R Volume */
133 { 93, 0x3F }, /* r5D - SPKLO Mono Mixer Voice Mono Volume */
134 { 94, 0x00 }, /* r5E - Interrupt Mask 1 */
135 { 95, 0x00 }, /* r5F - Interrupt Mask 2 */
138 static bool cs42l73_volatile_register(struct device
*dev
, unsigned int reg
)
149 static bool cs42l73_readable_register(struct device
*dev
, unsigned int reg
)
152 case CS42L73_DEVID_AB
:
153 case CS42L73_DEVID_CD
:
154 case CS42L73_DEVID_E
:
156 case CS42L73_PWRCTL1
:
157 case CS42L73_PWRCTL2
:
158 case CS42L73_PWRCTL3
:
160 case CS42L73_OLMBMSDC
:
163 case CS42L73_XSPMMCC
:
165 case CS42L73_ASPMMCC
:
167 case CS42L73_VSPMMCC
:
171 case CS42L73_MICAPREPGAAVOL
:
172 case CS42L73_MICBPREPGABVOL
:
173 case CS42L73_IPADVOL
:
174 case CS42L73_IPBDVOL
:
176 case CS42L73_HLADVOL
:
177 case CS42L73_HLBDVOL
:
178 case CS42L73_SPKDVOL
:
179 case CS42L73_ESLDVOL
:
180 case CS42L73_HPAAVOL
:
181 case CS42L73_HPBAVOL
:
182 case CS42L73_LOAAVOL
:
183 case CS42L73_LOBAVOL
:
188 case CS42L73_LIMARATEHL
:
189 case CS42L73_LIMRRATEHL
:
191 case CS42L73_LIMARATESPK
:
192 case CS42L73_LIMRRATESPK
:
193 case CS42L73_LMAXSPK
:
194 case CS42L73_LIMARATEESL
:
195 case CS42L73_LIMRRATEESL
:
196 case CS42L73_LMAXESL
:
197 case CS42L73_ALCARATE
:
198 case CS42L73_ALCRRATE
:
199 case CS42L73_ALCMINMAX
:
201 case CS42L73_ALCNGMC
:
202 case CS42L73_MIXERCTL
:
203 case CS42L73_HLAIPAA
:
204 case CS42L73_HLBIPBA
:
205 case CS42L73_HLAXSPAA
:
206 case CS42L73_HLBXSPBA
:
207 case CS42L73_HLAASPAA
:
208 case CS42L73_HLBASPBA
:
209 case CS42L73_HLAVSPMA
:
210 case CS42L73_HLBVSPMA
:
211 case CS42L73_XSPAIPAA
:
212 case CS42L73_XSPBIPBA
:
213 case CS42L73_XSPAXSPAA
:
214 case CS42L73_XSPBXSPBA
:
215 case CS42L73_XSPAASPAA
:
216 case CS42L73_XSPAASPBA
:
217 case CS42L73_XSPAVSPMA
:
218 case CS42L73_XSPBVSPMA
:
219 case CS42L73_ASPAIPAA
:
220 case CS42L73_ASPBIPBA
:
221 case CS42L73_ASPAXSPAA
:
222 case CS42L73_ASPBXSPBA
:
223 case CS42L73_ASPAASPAA
:
224 case CS42L73_ASPBASPBA
:
225 case CS42L73_ASPAVSPMA
:
226 case CS42L73_ASPBVSPMA
:
227 case CS42L73_VSPAIPAA
:
228 case CS42L73_VSPBIPBA
:
229 case CS42L73_VSPAXSPAA
:
230 case CS42L73_VSPBXSPBA
:
231 case CS42L73_VSPAASPAA
:
232 case CS42L73_VSPBASPBA
:
233 case CS42L73_VSPAVSPMA
:
234 case CS42L73_VSPBVSPMA
:
235 case CS42L73_MMIXCTL
:
236 case CS42L73_SPKMIPMA
:
237 case CS42L73_SPKMXSPA
:
238 case CS42L73_SPKMASPA
:
239 case CS42L73_SPKMVSPMA
:
240 case CS42L73_ESLMIPMA
:
241 case CS42L73_ESLMXSPA
:
242 case CS42L73_ESLMASPA
:
243 case CS42L73_ESLMVSPMA
:
252 static const unsigned int hpaloa_tlv
[] = {
253 TLV_DB_RANGE_HEAD(2),
254 0, 13, TLV_DB_SCALE_ITEM(-7600, 200, 0),
255 14, 75, TLV_DB_SCALE_ITEM(-4900, 100, 0),
258 static DECLARE_TLV_DB_SCALE(adc_boost_tlv
, 0, 2500, 0);
260 static DECLARE_TLV_DB_SCALE(hl_tlv
, -10200, 50, 0);
262 static DECLARE_TLV_DB_SCALE(ipd_tlv
, -9600, 100, 0);
264 static DECLARE_TLV_DB_SCALE(micpga_tlv
, -600, 50, 0);
266 static const unsigned int limiter_tlv
[] = {
267 TLV_DB_RANGE_HEAD(2),
268 0, 2, TLV_DB_SCALE_ITEM(-3000, 600, 0),
269 3, 7, TLV_DB_SCALE_ITEM(-1200, 300, 0),
272 static const DECLARE_TLV_DB_SCALE(attn_tlv
, -6300, 100, 1);
274 static const char * const cs42l73_pgaa_text
[] = { "Line A", "Mic 1" };
275 static const char * const cs42l73_pgab_text
[] = { "Line B", "Mic 2" };
277 static const struct soc_enum pgaa_enum
=
278 SOC_ENUM_SINGLE(CS42L73_ADCIPC
, 3,
279 ARRAY_SIZE(cs42l73_pgaa_text
), cs42l73_pgaa_text
);
281 static const struct soc_enum pgab_enum
=
282 SOC_ENUM_SINGLE(CS42L73_ADCIPC
, 7,
283 ARRAY_SIZE(cs42l73_pgab_text
), cs42l73_pgab_text
);
285 static const struct snd_kcontrol_new pgaa_mux
=
286 SOC_DAPM_ENUM("Left Analog Input Capture Mux", pgaa_enum
);
288 static const struct snd_kcontrol_new pgab_mux
=
289 SOC_DAPM_ENUM("Right Analog Input Capture Mux", pgab_enum
);
291 static const struct snd_kcontrol_new input_left_mixer
[] = {
292 SOC_DAPM_SINGLE("ADC Left Input", CS42L73_PWRCTL1
,
294 SOC_DAPM_SINGLE("DMIC Left Input", CS42L73_PWRCTL1
,
298 static const struct snd_kcontrol_new input_right_mixer
[] = {
299 SOC_DAPM_SINGLE("ADC Right Input", CS42L73_PWRCTL1
,
301 SOC_DAPM_SINGLE("DMIC Right Input", CS42L73_PWRCTL1
,
305 static const char * const cs42l73_ng_delay_text
[] = {
306 "50ms", "100ms", "150ms", "200ms" };
308 static const struct soc_enum ng_delay_enum
=
309 SOC_ENUM_SINGLE(CS42L73_NGCAB
, 0,
310 ARRAY_SIZE(cs42l73_ng_delay_text
), cs42l73_ng_delay_text
);
312 static const char * const charge_pump_freq_text
[] = {
313 "0", "1", "2", "3", "4",
314 "5", "6", "7", "8", "9",
315 "10", "11", "12", "13", "14", "15" };
317 static const struct soc_enum charge_pump_enum
=
318 SOC_ENUM_SINGLE(CS42L73_CPFCHC
, 4,
319 ARRAY_SIZE(charge_pump_freq_text
), charge_pump_freq_text
);
321 static const char * const cs42l73_mono_mix_texts
[] = {
322 "Left", "Right", "Mono Mix"};
324 static const unsigned int cs42l73_mono_mix_values
[] = { 0, 1, 2 };
326 static const struct soc_enum spk_asp_enum
=
327 SOC_VALUE_ENUM_SINGLE(CS42L73_MMIXCTL
, 6, 1,
328 ARRAY_SIZE(cs42l73_mono_mix_texts
),
329 cs42l73_mono_mix_texts
,
330 cs42l73_mono_mix_values
);
332 static const struct snd_kcontrol_new spk_asp_mixer
=
333 SOC_DAPM_ENUM("Route", spk_asp_enum
);
335 static const struct soc_enum spk_xsp_enum
=
336 SOC_VALUE_ENUM_SINGLE(CS42L73_MMIXCTL
, 4, 3,
337 ARRAY_SIZE(cs42l73_mono_mix_texts
),
338 cs42l73_mono_mix_texts
,
339 cs42l73_mono_mix_values
);
341 static const struct snd_kcontrol_new spk_xsp_mixer
=
342 SOC_DAPM_ENUM("Route", spk_xsp_enum
);
344 static const struct soc_enum esl_asp_enum
=
345 SOC_VALUE_ENUM_SINGLE(CS42L73_MMIXCTL
, 2, 5,
346 ARRAY_SIZE(cs42l73_mono_mix_texts
),
347 cs42l73_mono_mix_texts
,
348 cs42l73_mono_mix_values
);
350 static const struct snd_kcontrol_new esl_asp_mixer
=
351 SOC_DAPM_ENUM("Route", esl_asp_enum
);
353 static const struct soc_enum esl_xsp_enum
=
354 SOC_VALUE_ENUM_SINGLE(CS42L73_MMIXCTL
, 0, 7,
355 ARRAY_SIZE(cs42l73_mono_mix_texts
),
356 cs42l73_mono_mix_texts
,
357 cs42l73_mono_mix_values
);
359 static const struct snd_kcontrol_new esl_xsp_mixer
=
360 SOC_DAPM_ENUM("Route", esl_xsp_enum
);
362 static const char * const cs42l73_ip_swap_text
[] = {
363 "Stereo", "Mono A", "Mono B", "Swap A-B"};
365 static const struct soc_enum ip_swap_enum
=
366 SOC_ENUM_SINGLE(CS42L73_MIOPC
, 6,
367 ARRAY_SIZE(cs42l73_ip_swap_text
), cs42l73_ip_swap_text
);
369 static const char * const cs42l73_spo_mixer_text
[] = {"Mono", "Stereo"};
371 static const struct soc_enum vsp_output_mux_enum
=
372 SOC_ENUM_SINGLE(CS42L73_MIXERCTL
, 5,
373 ARRAY_SIZE(cs42l73_spo_mixer_text
), cs42l73_spo_mixer_text
);
375 static const struct soc_enum xsp_output_mux_enum
=
376 SOC_ENUM_SINGLE(CS42L73_MIXERCTL
, 4,
377 ARRAY_SIZE(cs42l73_spo_mixer_text
), cs42l73_spo_mixer_text
);
379 static const struct snd_kcontrol_new vsp_output_mux
=
380 SOC_DAPM_ENUM("Route", vsp_output_mux_enum
);
382 static const struct snd_kcontrol_new xsp_output_mux
=
383 SOC_DAPM_ENUM("Route", xsp_output_mux_enum
);
385 static const struct snd_kcontrol_new hp_amp_ctl
=
386 SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3
, 0, 1, 1);
388 static const struct snd_kcontrol_new lo_amp_ctl
=
389 SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3
, 1, 1, 1);
391 static const struct snd_kcontrol_new spk_amp_ctl
=
392 SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3
, 2, 1, 1);
394 static const struct snd_kcontrol_new spklo_amp_ctl
=
395 SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3
, 4, 1, 1);
397 static const struct snd_kcontrol_new ear_amp_ctl
=
398 SOC_DAPM_SINGLE("Switch", CS42L73_PWRCTL3
, 3, 1, 1);
400 static const struct snd_kcontrol_new cs42l73_snd_controls
[] = {
401 SOC_DOUBLE_R_SX_TLV("Headphone Analog Playback Volume",
402 CS42L73_HPAAVOL
, CS42L73_HPBAVOL
, 0,
403 0x41, 0x4B, hpaloa_tlv
),
405 SOC_DOUBLE_R_SX_TLV("LineOut Analog Playback Volume", CS42L73_LOAAVOL
,
406 CS42L73_LOBAVOL
, 0, 0x41, 0x4B, hpaloa_tlv
),
408 SOC_DOUBLE_R_SX_TLV("Input PGA Analog Volume", CS42L73_MICAPREPGAAVOL
,
409 CS42L73_MICBPREPGABVOL
, 5, 0x34,
412 SOC_DOUBLE_R("MIC Preamp Switch", CS42L73_MICAPREPGAAVOL
,
413 CS42L73_MICBPREPGABVOL
, 6, 1, 1),
415 SOC_DOUBLE_R_SX_TLV("Input Path Digital Volume", CS42L73_IPADVOL
,
416 CS42L73_IPBDVOL
, 0, 0xA0, 0x6C, ipd_tlv
),
418 SOC_DOUBLE_R_SX_TLV("HL Digital Playback Volume",
419 CS42L73_HLADVOL
, CS42L73_HLBDVOL
,
420 0, 0x34, 0xE4, hl_tlv
),
422 SOC_SINGLE_TLV("ADC A Boost Volume",
423 CS42L73_ADCIPC
, 2, 0x01, 1, adc_boost_tlv
),
425 SOC_SINGLE_TLV("ADC B Boost Volume",
426 CS42L73_ADCIPC
, 6, 0x01, 1, adc_boost_tlv
),
428 SOC_SINGLE_SX_TLV("Speakerphone Digital Volume",
429 CS42L73_SPKDVOL
, 0, 0x34, 0xE4, hl_tlv
),
431 SOC_SINGLE_SX_TLV("Ear Speaker Digital Volume",
432 CS42L73_ESLDVOL
, 0, 0x34, 0xE4, hl_tlv
),
434 SOC_DOUBLE_R("Headphone Analog Playback Switch", CS42L73_HPAAVOL
,
435 CS42L73_HPBAVOL
, 7, 1, 1),
437 SOC_DOUBLE_R("LineOut Analog Playback Switch", CS42L73_LOAAVOL
,
438 CS42L73_LOBAVOL
, 7, 1, 1),
439 SOC_DOUBLE("Input Path Digital Switch", CS42L73_ADCIPC
, 0, 4, 1, 1),
440 SOC_DOUBLE("HL Digital Playback Switch", CS42L73_PBDC
, 0,
442 SOC_SINGLE("Speakerphone Digital Playback Switch", CS42L73_PBDC
, 2, 1,
444 SOC_SINGLE("Ear Speaker Digital Playback Switch", CS42L73_PBDC
, 3, 1,
447 SOC_SINGLE("PGA Soft-Ramp Switch", CS42L73_MIOPC
, 3, 1, 0),
448 SOC_SINGLE("Analog Zero Cross Switch", CS42L73_MIOPC
, 2, 1, 0),
449 SOC_SINGLE("Digital Soft-Ramp Switch", CS42L73_MIOPC
, 1, 1, 0),
450 SOC_SINGLE("Analog Output Soft-Ramp Switch", CS42L73_MIOPC
, 0, 1, 0),
452 SOC_DOUBLE("ADC Signal Polarity Switch", CS42L73_ADCIPC
, 1, 5, 1,
455 SOC_SINGLE("HL Limiter Attack Rate", CS42L73_LIMARATEHL
, 0, 0x3F,
457 SOC_SINGLE("HL Limiter Release Rate", CS42L73_LIMRRATEHL
, 0,
461 SOC_SINGLE("HL Limiter Switch", CS42L73_LIMRRATEHL
, 7, 1, 0),
462 SOC_SINGLE("HL Limiter All Channels Switch", CS42L73_LIMRRATEHL
, 6, 1,
465 SOC_SINGLE_TLV("HL Limiter Max Threshold Volume", CS42L73_LMAXHL
, 5, 7,
468 SOC_SINGLE_TLV("HL Limiter Cushion Volume", CS42L73_LMAXHL
, 2, 7, 1,
471 SOC_SINGLE("SPK Limiter Attack Rate Volume", CS42L73_LIMARATESPK
, 0,
473 SOC_SINGLE("SPK Limiter Release Rate Volume", CS42L73_LIMRRATESPK
, 0,
475 SOC_SINGLE("SPK Limiter Switch", CS42L73_LIMRRATESPK
, 7, 1, 0),
476 SOC_SINGLE("SPK Limiter All Channels Switch", CS42L73_LIMRRATESPK
,
478 SOC_SINGLE_TLV("SPK Limiter Max Threshold Volume", CS42L73_LMAXSPK
, 5,
481 SOC_SINGLE_TLV("SPK Limiter Cushion Volume", CS42L73_LMAXSPK
, 2, 7, 1,
484 SOC_SINGLE("ESL Limiter Attack Rate Volume", CS42L73_LIMARATEESL
, 0,
486 SOC_SINGLE("ESL Limiter Release Rate Volume", CS42L73_LIMRRATEESL
, 0,
488 SOC_SINGLE("ESL Limiter Switch", CS42L73_LIMRRATEESL
, 7, 1, 0),
489 SOC_SINGLE_TLV("ESL Limiter Max Threshold Volume", CS42L73_LMAXESL
, 5,
492 SOC_SINGLE_TLV("ESL Limiter Cushion Volume", CS42L73_LMAXESL
, 2, 7, 1,
495 SOC_SINGLE("ALC Attack Rate Volume", CS42L73_ALCARATE
, 0, 0x3F, 0),
496 SOC_SINGLE("ALC Release Rate Volume", CS42L73_ALCRRATE
, 0, 0x3F, 0),
497 SOC_DOUBLE("ALC Switch", CS42L73_ALCARATE
, 6, 7, 1, 0),
498 SOC_SINGLE_TLV("ALC Max Threshold Volume", CS42L73_ALCMINMAX
, 5, 7, 0,
500 SOC_SINGLE_TLV("ALC Min Threshold Volume", CS42L73_ALCMINMAX
, 2, 7, 0,
503 SOC_DOUBLE("NG Enable Switch", CS42L73_NGCAB
, 6, 7, 1, 0),
504 SOC_SINGLE("NG Boost Switch", CS42L73_NGCAB
, 5, 1, 0),
506 NG Threshold depends on NG_BOOTSAB, which selects
507 between two threshold scales in decibels.
508 Set linear values for now ..
510 SOC_SINGLE("NG Threshold", CS42L73_NGCAB
, 2, 7, 0),
511 SOC_ENUM("NG Delay", ng_delay_enum
),
513 SOC_ENUM("Charge Pump Frequency", charge_pump_enum
),
515 SOC_DOUBLE_R_TLV("XSP-IP Volume",
516 CS42L73_XSPAIPAA
, CS42L73_XSPBIPBA
, 0, 0x3F, 1,
518 SOC_DOUBLE_R_TLV("XSP-XSP Volume",
519 CS42L73_XSPAXSPAA
, CS42L73_XSPBXSPBA
, 0, 0x3F, 1,
521 SOC_DOUBLE_R_TLV("XSP-ASP Volume",
522 CS42L73_XSPAASPAA
, CS42L73_XSPAASPBA
, 0, 0x3F, 1,
524 SOC_DOUBLE_R_TLV("XSP-VSP Volume",
525 CS42L73_XSPAVSPMA
, CS42L73_XSPBVSPMA
, 0, 0x3F, 1,
528 SOC_DOUBLE_R_TLV("ASP-IP Volume",
529 CS42L73_ASPAIPAA
, CS42L73_ASPBIPBA
, 0, 0x3F, 1,
531 SOC_DOUBLE_R_TLV("ASP-XSP Volume",
532 CS42L73_ASPAXSPAA
, CS42L73_ASPBXSPBA
, 0, 0x3F, 1,
534 SOC_DOUBLE_R_TLV("ASP-ASP Volume",
535 CS42L73_ASPAASPAA
, CS42L73_ASPBASPBA
, 0, 0x3F, 1,
537 SOC_DOUBLE_R_TLV("ASP-VSP Volume",
538 CS42L73_ASPAVSPMA
, CS42L73_ASPBVSPMA
, 0, 0x3F, 1,
541 SOC_DOUBLE_R_TLV("VSP-IP Volume",
542 CS42L73_VSPAIPAA
, CS42L73_VSPBIPBA
, 0, 0x3F, 1,
544 SOC_DOUBLE_R_TLV("VSP-XSP Volume",
545 CS42L73_VSPAXSPAA
, CS42L73_VSPBXSPBA
, 0, 0x3F, 1,
547 SOC_DOUBLE_R_TLV("VSP-ASP Volume",
548 CS42L73_VSPAASPAA
, CS42L73_VSPBASPBA
, 0, 0x3F, 1,
550 SOC_DOUBLE_R_TLV("VSP-VSP Volume",
551 CS42L73_VSPAVSPMA
, CS42L73_VSPBVSPMA
, 0, 0x3F, 1,
554 SOC_DOUBLE_R_TLV("HL-IP Volume",
555 CS42L73_HLAIPAA
, CS42L73_HLBIPBA
, 0, 0x3F, 1,
557 SOC_DOUBLE_R_TLV("HL-XSP Volume",
558 CS42L73_HLAXSPAA
, CS42L73_HLBXSPBA
, 0, 0x3F, 1,
560 SOC_DOUBLE_R_TLV("HL-ASP Volume",
561 CS42L73_HLAASPAA
, CS42L73_HLBASPBA
, 0, 0x3F, 1,
563 SOC_DOUBLE_R_TLV("HL-VSP Volume",
564 CS42L73_HLAVSPMA
, CS42L73_HLBVSPMA
, 0, 0x3F, 1,
567 SOC_SINGLE_TLV("SPK-IP Mono Volume",
568 CS42L73_SPKMIPMA
, 0, 0x3F, 1, attn_tlv
),
569 SOC_SINGLE_TLV("SPK-XSP Mono Volume",
570 CS42L73_SPKMXSPA
, 0, 0x3F, 1, attn_tlv
),
571 SOC_SINGLE_TLV("SPK-ASP Mono Volume",
572 CS42L73_SPKMASPA
, 0, 0x3F, 1, attn_tlv
),
573 SOC_SINGLE_TLV("SPK-VSP Mono Volume",
574 CS42L73_SPKMVSPMA
, 0, 0x3F, 1, attn_tlv
),
576 SOC_SINGLE_TLV("ESL-IP Mono Volume",
577 CS42L73_ESLMIPMA
, 0, 0x3F, 1, attn_tlv
),
578 SOC_SINGLE_TLV("ESL-XSP Mono Volume",
579 CS42L73_ESLMXSPA
, 0, 0x3F, 1, attn_tlv
),
580 SOC_SINGLE_TLV("ESL-ASP Mono Volume",
581 CS42L73_ESLMASPA
, 0, 0x3F, 1, attn_tlv
),
582 SOC_SINGLE_TLV("ESL-VSP Mono Volume",
583 CS42L73_ESLMVSPMA
, 0, 0x3F, 1, attn_tlv
),
585 SOC_ENUM("IP Digital Swap/Mono Select", ip_swap_enum
),
587 SOC_ENUM("VSPOUT Mono/Stereo Select", vsp_output_mux_enum
),
588 SOC_ENUM("XSPOUT Mono/Stereo Select", xsp_output_mux_enum
),
591 static const struct snd_soc_dapm_widget cs42l73_dapm_widgets
[] = {
592 SND_SOC_DAPM_INPUT("LINEINA"),
593 SND_SOC_DAPM_INPUT("LINEINB"),
594 SND_SOC_DAPM_INPUT("MIC1"),
595 SND_SOC_DAPM_SUPPLY("MIC1 Bias", CS42L73_PWRCTL2
, 6, 1, NULL
, 0),
596 SND_SOC_DAPM_INPUT("MIC2"),
597 SND_SOC_DAPM_SUPPLY("MIC2 Bias", CS42L73_PWRCTL2
, 7, 1, NULL
, 0),
599 SND_SOC_DAPM_AIF_OUT("XSPOUTL", NULL
, 0,
600 CS42L73_PWRCTL2
, 1, 1),
601 SND_SOC_DAPM_AIF_OUT("XSPOUTR", NULL
, 0,
602 CS42L73_PWRCTL2
, 1, 1),
603 SND_SOC_DAPM_AIF_OUT("ASPOUTL", NULL
, 0,
604 CS42L73_PWRCTL2
, 3, 1),
605 SND_SOC_DAPM_AIF_OUT("ASPOUTR", NULL
, 0,
606 CS42L73_PWRCTL2
, 3, 1),
607 SND_SOC_DAPM_AIF_OUT("VSPOUTL", NULL
, 0,
608 CS42L73_PWRCTL2
, 4, 1),
609 SND_SOC_DAPM_AIF_OUT("VSPOUTR", NULL
, 0,
610 CS42L73_PWRCTL2
, 4, 1),
612 SND_SOC_DAPM_PGA("PGA Left", SND_SOC_NOPM
, 0, 0, NULL
, 0),
613 SND_SOC_DAPM_PGA("PGA Right", SND_SOC_NOPM
, 0, 0, NULL
, 0),
615 SND_SOC_DAPM_MUX("PGA Left Mux", SND_SOC_NOPM
, 0, 0, &pgaa_mux
),
616 SND_SOC_DAPM_MUX("PGA Right Mux", SND_SOC_NOPM
, 0, 0, &pgab_mux
),
618 SND_SOC_DAPM_ADC("ADC Left", NULL
, CS42L73_PWRCTL1
, 7, 1),
619 SND_SOC_DAPM_ADC("ADC Right", NULL
, CS42L73_PWRCTL1
, 5, 1),
620 SND_SOC_DAPM_ADC("DMIC Left", NULL
, CS42L73_PWRCTL1
, 6, 1),
621 SND_SOC_DAPM_ADC("DMIC Right", NULL
, CS42L73_PWRCTL1
, 4, 1),
623 SND_SOC_DAPM_MIXER_NAMED_CTL("Input Left Capture", SND_SOC_NOPM
,
624 0, 0, input_left_mixer
,
625 ARRAY_SIZE(input_left_mixer
)),
627 SND_SOC_DAPM_MIXER_NAMED_CTL("Input Right Capture", SND_SOC_NOPM
,
628 0, 0, input_right_mixer
,
629 ARRAY_SIZE(input_right_mixer
)),
631 SND_SOC_DAPM_MIXER("ASPL Output Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
632 SND_SOC_DAPM_MIXER("ASPR Output Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
633 SND_SOC_DAPM_MIXER("XSPL Output Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
634 SND_SOC_DAPM_MIXER("XSPR Output Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
635 SND_SOC_DAPM_MIXER("VSPL Output Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
636 SND_SOC_DAPM_MIXER("VSPR Output Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
638 SND_SOC_DAPM_AIF_IN("XSPINL", NULL
, 0,
639 CS42L73_PWRCTL2
, 0, 1),
640 SND_SOC_DAPM_AIF_IN("XSPINR", NULL
, 0,
641 CS42L73_PWRCTL2
, 0, 1),
642 SND_SOC_DAPM_AIF_IN("XSPINM", NULL
, 0,
643 CS42L73_PWRCTL2
, 0, 1),
645 SND_SOC_DAPM_AIF_IN("ASPINL", NULL
, 0,
646 CS42L73_PWRCTL2
, 2, 1),
647 SND_SOC_DAPM_AIF_IN("ASPINR", NULL
, 0,
648 CS42L73_PWRCTL2
, 2, 1),
649 SND_SOC_DAPM_AIF_IN("ASPINM", NULL
, 0,
650 CS42L73_PWRCTL2
, 2, 1),
652 SND_SOC_DAPM_AIF_IN("VSPIN", NULL
, 0,
653 CS42L73_PWRCTL2
, 4, 1),
655 SND_SOC_DAPM_MIXER("HL Left Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
656 SND_SOC_DAPM_MIXER("HL Right Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
657 SND_SOC_DAPM_MIXER("SPK Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
658 SND_SOC_DAPM_MIXER("ESL Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
660 SND_SOC_DAPM_MUX("ESL-XSP Mux", SND_SOC_NOPM
,
661 0, 0, &esl_xsp_mixer
),
663 SND_SOC_DAPM_MUX("ESL-ASP Mux", SND_SOC_NOPM
,
664 0, 0, &esl_asp_mixer
),
666 SND_SOC_DAPM_MUX("SPK-ASP Mux", SND_SOC_NOPM
,
667 0, 0, &spk_asp_mixer
),
669 SND_SOC_DAPM_MUX("SPK-XSP Mux", SND_SOC_NOPM
,
670 0, 0, &spk_xsp_mixer
),
672 SND_SOC_DAPM_PGA("HL Left DAC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
673 SND_SOC_DAPM_PGA("HL Right DAC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
674 SND_SOC_DAPM_PGA("SPK DAC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
675 SND_SOC_DAPM_PGA("ESL DAC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
677 SND_SOC_DAPM_SWITCH("HP Amp", CS42L73_PWRCTL3
, 0, 1,
679 SND_SOC_DAPM_SWITCH("LO Amp", CS42L73_PWRCTL3
, 1, 1,
681 SND_SOC_DAPM_SWITCH("SPK Amp", CS42L73_PWRCTL3
, 2, 1,
683 SND_SOC_DAPM_SWITCH("EAR Amp", CS42L73_PWRCTL3
, 3, 1,
685 SND_SOC_DAPM_SWITCH("SPKLO Amp", CS42L73_PWRCTL3
, 4, 1,
688 SND_SOC_DAPM_OUTPUT("HPOUTA"),
689 SND_SOC_DAPM_OUTPUT("HPOUTB"),
690 SND_SOC_DAPM_OUTPUT("LINEOUTA"),
691 SND_SOC_DAPM_OUTPUT("LINEOUTB"),
692 SND_SOC_DAPM_OUTPUT("EAROUT"),
693 SND_SOC_DAPM_OUTPUT("SPKOUT"),
694 SND_SOC_DAPM_OUTPUT("SPKLINEOUT"),
697 static const struct snd_soc_dapm_route cs42l73_audio_map
[] = {
699 /* SPKLO EARSPK Paths */
700 {"EAROUT", NULL
, "EAR Amp"},
701 {"SPKLINEOUT", NULL
, "SPKLO Amp"},
703 {"EAR Amp", "Switch", "ESL DAC"},
704 {"SPKLO Amp", "Switch", "ESL DAC"},
706 {"ESL DAC", "ESL-ASP Mono Volume", "ESL Mixer"},
707 {"ESL DAC", "ESL-XSP Mono Volume", "ESL Mixer"},
708 {"ESL DAC", "ESL-VSP Mono Volume", "VSPIN"},
710 {"ESL DAC", "ESL-IP Mono Volume", "Input Left Capture"},
711 {"ESL DAC", "ESL-IP Mono Volume", "Input Right Capture"},
713 {"ESL Mixer", NULL
, "ESL-ASP Mux"},
714 {"ESL Mixer", NULL
, "ESL-XSP Mux"},
716 {"ESL-ASP Mux", "Left", "ASPINL"},
717 {"ESL-ASP Mux", "Right", "ASPINR"},
718 {"ESL-ASP Mux", "Mono Mix", "ASPINM"},
720 {"ESL-XSP Mux", "Left", "XSPINL"},
721 {"ESL-XSP Mux", "Right", "XSPINR"},
722 {"ESL-XSP Mux", "Mono Mix", "XSPINM"},
724 /* Speakerphone Paths */
725 {"SPKOUT", NULL
, "SPK Amp"},
726 {"SPK Amp", "Switch", "SPK DAC"},
728 {"SPK DAC", "SPK-ASP Mono Volume", "SPK Mixer"},
729 {"SPK DAC", "SPK-XSP Mono Volume", "SPK Mixer"},
730 {"SPK DAC", "SPK-VSP Mono Volume", "VSPIN"},
732 {"SPK DAC", "SPK-IP Mono Volume", "Input Left Capture"},
733 {"SPK DAC", "SPK-IP Mono Volume", "Input Right Capture"},
735 {"SPK Mixer", NULL
, "SPK-ASP Mux"},
736 {"SPK Mixer", NULL
, "SPK-XSP Mux"},
738 {"SPK-ASP Mux", "Left", "ASPINL"},
739 {"SPK-ASP Mux", "Mono Mix", "ASPINM"},
740 {"SPK-ASP Mux", "Right", "ASPINR"},
742 {"SPK-XSP Mux", "Left", "XSPINL"},
743 {"SPK-XSP Mux", "Mono Mix", "XSPINM"},
744 {"SPK-XSP Mux", "Right", "XSPINR"},
746 /* HP LineOUT Paths */
747 {"HPOUTA", NULL
, "HP Amp"},
748 {"HPOUTB", NULL
, "HP Amp"},
749 {"LINEOUTA", NULL
, "LO Amp"},
750 {"LINEOUTB", NULL
, "LO Amp"},
752 {"HP Amp", "Switch", "HL Left DAC"},
753 {"HP Amp", "Switch", "HL Right DAC"},
754 {"LO Amp", "Switch", "HL Left DAC"},
755 {"LO Amp", "Switch", "HL Right DAC"},
757 {"HL Left DAC", "HL-XSP Volume", "HL Left Mixer"},
758 {"HL Right DAC", "HL-XSP Volume", "HL Right Mixer"},
759 {"HL Left DAC", "HL-ASP Volume", "HL Left Mixer"},
760 {"HL Right DAC", "HL-ASP Volume", "HL Right Mixer"},
761 {"HL Left DAC", "HL-VSP Volume", "HL Left Mixer"},
762 {"HL Right DAC", "HL-VSP Volume", "HL Right Mixer"},
764 {"HL Left DAC", "HL-IP Volume", "HL Left Mixer"},
765 {"HL Right DAC", "HL-IP Volume", "HL Right Mixer"},
766 {"HL Left Mixer", NULL
, "Input Left Capture"},
767 {"HL Right Mixer", NULL
, "Input Right Capture"},
769 {"HL Left Mixer", NULL
, "ASPINL"},
770 {"HL Right Mixer", NULL
, "ASPINR"},
771 {"HL Left Mixer", NULL
, "XSPINL"},
772 {"HL Right Mixer", NULL
, "XSPINR"},
773 {"HL Left Mixer", NULL
, "VSPIN"},
774 {"HL Right Mixer", NULL
, "VSPIN"},
776 {"ASPINL", NULL
, "ASP Playback"},
777 {"ASPINM", NULL
, "ASP Playback"},
778 {"ASPINR", NULL
, "ASP Playback"},
779 {"XSPINL", NULL
, "XSP Playback"},
780 {"XSPINM", NULL
, "XSP Playback"},
781 {"XSPINR", NULL
, "XSP Playback"},
782 {"VSPIN", NULL
, "VSP Playback"},
785 {"MIC1", NULL
, "MIC1 Bias"},
786 {"PGA Left Mux", "Mic 1", "MIC1"},
787 {"MIC2", NULL
, "MIC2 Bias"},
788 {"PGA Right Mux", "Mic 2", "MIC2"},
790 {"PGA Left Mux", "Line A", "LINEINA"},
791 {"PGA Right Mux", "Line B", "LINEINB"},
793 {"PGA Left", NULL
, "PGA Left Mux"},
794 {"PGA Right", NULL
, "PGA Right Mux"},
796 {"ADC Left", NULL
, "PGA Left"},
797 {"ADC Right", NULL
, "PGA Right"},
799 {"Input Left Capture", "ADC Left Input", "ADC Left"},
800 {"Input Right Capture", "ADC Right Input", "ADC Right"},
801 {"Input Left Capture", "DMIC Left Input", "DMIC Left"},
802 {"Input Right Capture", "DMIC Right Input", "DMIC Right"},
805 {"ASPL Output Mixer", NULL
, "Input Left Capture"},
806 {"ASPR Output Mixer", NULL
, "Input Right Capture"},
808 {"ASPOUTL", "ASP-IP Volume", "ASPL Output Mixer"},
809 {"ASPOUTR", "ASP-IP Volume", "ASPR Output Mixer"},
811 /* Auxillary Capture */
812 {"XSPL Output Mixer", NULL
, "Input Left Capture"},
813 {"XSPR Output Mixer", NULL
, "Input Right Capture"},
815 {"XSPOUTL", "XSP-IP Volume", "XSPL Output Mixer"},
816 {"XSPOUTR", "XSP-IP Volume", "XSPR Output Mixer"},
818 {"XSPOUTL", NULL
, "XSPL Output Mixer"},
819 {"XSPOUTR", NULL
, "XSPR Output Mixer"},
822 {"VSPL Output Mixer", NULL
, "Input Left Capture"},
823 {"VSPR Output Mixer", NULL
, "Input Left Capture"},
825 {"VSPOUTL", "VSP-IP Volume", "VSPL Output Mixer"},
826 {"VSPOUTR", "VSP-IP Volume", "VSPR Output Mixer"},
828 {"VSPOUTL", NULL
, "VSPL Output Mixer"},
829 {"VSPOUTR", NULL
, "VSPR Output Mixer"},
831 {"ASP Capture", NULL
, "ASPOUTL"},
832 {"ASP Capture", NULL
, "ASPOUTR"},
833 {"XSP Capture", NULL
, "XSPOUTL"},
834 {"XSP Capture", NULL
, "XSPOUTR"},
835 {"VSP Capture", NULL
, "VSPOUTL"},
836 {"VSP Capture", NULL
, "VSPOUTR"},
839 struct cs42l73_mclk_div
{
845 static struct cs42l73_mclk_div cs42l73_mclk_coeffs
[] = {
846 /* MCLK, Sample Rate, xMMCC[5:0] */
847 {5644800, 11025, 0x30},
848 {5644800, 22050, 0x20},
849 {5644800, 44100, 0x10},
851 {6000000, 8000, 0x39},
852 {6000000, 11025, 0x33},
853 {6000000, 12000, 0x31},
854 {6000000, 16000, 0x29},
855 {6000000, 22050, 0x23},
856 {6000000, 24000, 0x21},
857 {6000000, 32000, 0x19},
858 {6000000, 44100, 0x13},
859 {6000000, 48000, 0x11},
861 {6144000, 8000, 0x38},
862 {6144000, 12000, 0x30},
863 {6144000, 16000, 0x28},
864 {6144000, 24000, 0x20},
865 {6144000, 32000, 0x18},
866 {6144000, 48000, 0x10},
868 {6500000, 8000, 0x3C},
869 {6500000, 11025, 0x35},
870 {6500000, 12000, 0x34},
871 {6500000, 16000, 0x2C},
872 {6500000, 22050, 0x25},
873 {6500000, 24000, 0x24},
874 {6500000, 32000, 0x1C},
875 {6500000, 44100, 0x15},
876 {6500000, 48000, 0x14},
878 {6400000, 8000, 0x3E},
879 {6400000, 11025, 0x37},
880 {6400000, 12000, 0x36},
881 {6400000, 16000, 0x2E},
882 {6400000, 22050, 0x27},
883 {6400000, 24000, 0x26},
884 {6400000, 32000, 0x1E},
885 {6400000, 44100, 0x17},
886 {6400000, 48000, 0x16},
889 struct cs42l73_mclkx_div
{
895 static struct cs42l73_mclkx_div cs42l73_mclkx_coeffs
[] = {
896 {5644800, 1, 0}, /* 5644800 */
897 {6000000, 1, 0}, /* 6000000 */
898 {6144000, 1, 0}, /* 6144000 */
899 {11289600, 2, 2}, /* 5644800 */
900 {12288000, 2, 2}, /* 6144000 */
901 {12000000, 2, 2}, /* 6000000 */
902 {13000000, 2, 2}, /* 6500000 */
903 {19200000, 3, 3}, /* 6400000 */
904 {24000000, 4, 4}, /* 6000000 */
905 {26000000, 4, 4}, /* 6500000 */
906 {38400000, 6, 5} /* 6400000 */
909 static int cs42l73_get_mclkx_coeff(int mclkx
)
913 for (i
= 0; i
< ARRAY_SIZE(cs42l73_mclkx_coeffs
); i
++) {
914 if (cs42l73_mclkx_coeffs
[i
].mclkx
== mclkx
)
920 static int cs42l73_get_mclk_coeff(int mclk
, int srate
)
924 for (i
= 0; i
< ARRAY_SIZE(cs42l73_mclk_coeffs
); i
++) {
925 if (cs42l73_mclk_coeffs
[i
].mclk
== mclk
&&
926 cs42l73_mclk_coeffs
[i
].srate
== srate
)
933 static int cs42l73_set_mclk(struct snd_soc_dai
*dai
, unsigned int freq
)
935 struct snd_soc_codec
*codec
= dai
->codec
;
936 struct cs42l73_private
*priv
= snd_soc_codec_get_drvdata(codec
);
943 mclkx_coeff
= cs42l73_get_mclkx_coeff(freq
);
947 mclk
= cs42l73_mclkx_coeffs
[mclkx_coeff
].mclkx
/
948 cs42l73_mclkx_coeffs
[mclkx_coeff
].ratio
;
950 dev_dbg(codec
->dev
, "MCLK%u %u <-> internal MCLK %u\n",
951 priv
->mclksel
+ 1, cs42l73_mclkx_coeffs
[mclkx_coeff
].mclkx
,
954 dmmcc
= (priv
->mclksel
<< 4) |
955 (cs42l73_mclkx_coeffs
[mclkx_coeff
].mclkdiv
<< 1);
957 snd_soc_write(codec
, CS42L73_DMMCC
, dmmcc
);
959 priv
->sysclk
= mclkx_coeff
;
965 static int cs42l73_set_sysclk(struct snd_soc_dai
*dai
,
966 int clk_id
, unsigned int freq
, int dir
)
968 struct snd_soc_codec
*codec
= dai
->codec
;
969 struct cs42l73_private
*priv
= snd_soc_codec_get_drvdata(codec
);
972 case CS42L73_CLKID_MCLK1
:
974 case CS42L73_CLKID_MCLK2
:
980 if ((cs42l73_set_mclk(dai
, freq
)) < 0) {
981 dev_err(codec
->dev
, "Unable to set MCLK for dai %s\n",
986 priv
->mclksel
= clk_id
;
991 static int cs42l73_set_dai_fmt(struct snd_soc_dai
*codec_dai
, unsigned int fmt
)
993 struct snd_soc_codec
*codec
= codec_dai
->codec
;
994 struct cs42l73_private
*priv
= snd_soc_codec_get_drvdata(codec
);
995 u8 id
= codec_dai
->id
;
996 unsigned int inv
, format
;
999 spc
= snd_soc_read(codec
, CS42L73_SPC(id
));
1000 mmcc
= snd_soc_read(codec
, CS42L73_MMCC(id
));
1002 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1003 case SND_SOC_DAIFMT_CBM_CFM
:
1007 case SND_SOC_DAIFMT_CBS_CFS
:
1015 format
= (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
);
1016 inv
= (fmt
& SND_SOC_DAIFMT_INV_MASK
);
1019 case SND_SOC_DAIFMT_I2S
:
1022 case SND_SOC_DAIFMT_DSP_A
:
1023 case SND_SOC_DAIFMT_DSP_B
:
1024 if (mmcc
& MS_MASTER
) {
1026 "PCM format in slave mode only\n");
1029 if (id
== CS42L73_ASP
) {
1031 "PCM format is not supported on ASP port\n");
1040 if (spc
& SPDIF_PCM
) {
1041 /* Clear PCM mode, clear PCM_BIT_ORDER bit for MSB->LSB */
1042 spc
&= ~(PCM_MODE_MASK
| PCM_BIT_ORDER
);
1044 case SND_SOC_DAIFMT_DSP_B
:
1045 if (inv
== SND_SOC_DAIFMT_IB_IF
)
1047 if (inv
== SND_SOC_DAIFMT_IB_NF
)
1050 case SND_SOC_DAIFMT_DSP_A
:
1051 if (inv
== SND_SOC_DAIFMT_IB_IF
)
1059 priv
->config
[id
].spc
= spc
;
1060 priv
->config
[id
].mmcc
= mmcc
;
1065 static u32 cs42l73_asrc_rates
[] = {
1066 8000, 11025, 12000, 16000, 22050,
1067 24000, 32000, 44100, 48000
1070 static unsigned int cs42l73_get_xspfs_coeff(u32 rate
)
1073 for (i
= 0; i
< ARRAY_SIZE(cs42l73_asrc_rates
); i
++) {
1074 if (cs42l73_asrc_rates
[i
] == rate
)
1077 return 0; /* 0 = Don't know */
1080 static void cs42l73_update_asrc(struct snd_soc_codec
*codec
, int id
, int srate
)
1085 spfs
= cs42l73_get_xspfs_coeff(srate
);
1089 snd_soc_update_bits(codec
, CS42L73_VXSPFS
, 0x0f, spfs
);
1092 snd_soc_update_bits(codec
, CS42L73_ASPC
, 0x3c, spfs
<< 2);
1095 snd_soc_update_bits(codec
, CS42L73_VXSPFS
, 0xf0, spfs
<< 4);
1102 static int cs42l73_pcm_hw_params(struct snd_pcm_substream
*substream
,
1103 struct snd_pcm_hw_params
*params
,
1104 struct snd_soc_dai
*dai
)
1106 struct snd_soc_codec
*codec
= dai
->codec
;
1107 struct cs42l73_private
*priv
= snd_soc_codec_get_drvdata(codec
);
1110 int srate
= params_rate(params
);
1112 if (priv
->config
[id
].mmcc
& MS_MASTER
) {
1113 /* CS42L73 Master */
1116 cs42l73_get_mclk_coeff(priv
->mclk
, srate
);
1122 "DAI[%d]: MCLK %u, srate %u, MMCC[5:0] = %x\n",
1123 id
, priv
->mclk
, srate
,
1124 cs42l73_mclk_coeffs
[mclk_coeff
].mmcc
);
1126 priv
->config
[id
].mmcc
&= 0xC0;
1127 priv
->config
[id
].mmcc
|= cs42l73_mclk_coeffs
[mclk_coeff
].mmcc
;
1128 priv
->config
[id
].spc
&= 0xFC;
1129 priv
->config
[id
].spc
|= MCK_SCLK_MCLK
;
1132 priv
->config
[id
].spc
&= 0xFC;
1133 priv
->config
[id
].spc
|= MCK_SCLK_64FS
;
1136 priv
->config
[id
].srate
= srate
;
1138 snd_soc_write(codec
, CS42L73_SPC(id
), priv
->config
[id
].spc
);
1139 snd_soc_write(codec
, CS42L73_MMCC(id
), priv
->config
[id
].mmcc
);
1141 cs42l73_update_asrc(codec
, id
, srate
);
1146 static int cs42l73_set_bias_level(struct snd_soc_codec
*codec
,
1147 enum snd_soc_bias_level level
)
1149 struct cs42l73_private
*cs42l73
= snd_soc_codec_get_drvdata(codec
);
1152 case SND_SOC_BIAS_ON
:
1153 snd_soc_update_bits(codec
, CS42L73_DMMCC
, MCLKDIS
, 0);
1154 snd_soc_update_bits(codec
, CS42L73_PWRCTL1
, PDN
, 0);
1157 case SND_SOC_BIAS_PREPARE
:
1160 case SND_SOC_BIAS_STANDBY
:
1161 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_OFF
) {
1162 regcache_cache_only(cs42l73
->regmap
, false);
1163 regcache_sync(cs42l73
->regmap
);
1165 snd_soc_update_bits(codec
, CS42L73_PWRCTL1
, PDN
, 1);
1168 case SND_SOC_BIAS_OFF
:
1169 snd_soc_update_bits(codec
, CS42L73_PWRCTL1
, PDN
, 1);
1170 snd_soc_update_bits(codec
, CS42L73_DMMCC
, MCLKDIS
, 1);
1173 codec
->dapm
.bias_level
= level
;
1177 static int cs42l73_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
1179 struct snd_soc_codec
*codec
= dai
->codec
;
1182 return snd_soc_update_bits(codec
, CS42L73_SPC(id
),
1183 0x7F, tristate
<< 7);
1186 static struct snd_pcm_hw_constraint_list constraints_12_24
= {
1187 .count
= ARRAY_SIZE(cs42l73_asrc_rates
),
1188 .list
= cs42l73_asrc_rates
,
1191 static int cs42l73_pcm_startup(struct snd_pcm_substream
*substream
,
1192 struct snd_soc_dai
*dai
)
1194 snd_pcm_hw_constraint_list(substream
->runtime
, 0,
1195 SNDRV_PCM_HW_PARAM_RATE
,
1196 &constraints_12_24
);
1200 /* SNDRV_PCM_RATE_KNOT -> 12000, 24000 Hz, limit with constraint list */
1201 #define CS42L73_RATES (SNDRV_PCM_RATE_8000_48000 | SNDRV_PCM_RATE_KNOT)
1204 #define CS42L73_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1205 SNDRV_PCM_FMTBIT_S24_LE)
1207 static const struct snd_soc_dai_ops cs42l73_ops
= {
1208 .startup
= cs42l73_pcm_startup
,
1209 .hw_params
= cs42l73_pcm_hw_params
,
1210 .set_fmt
= cs42l73_set_dai_fmt
,
1211 .set_sysclk
= cs42l73_set_sysclk
,
1212 .set_tristate
= cs42l73_set_tristate
,
1215 static struct snd_soc_dai_driver cs42l73_dai
[] = {
1217 .name
= "cs42l73-xsp",
1220 .stream_name
= "XSP Playback",
1223 .rates
= CS42L73_RATES
,
1224 .formats
= CS42L73_FORMATS
,
1227 .stream_name
= "XSP Capture",
1230 .rates
= CS42L73_RATES
,
1231 .formats
= CS42L73_FORMATS
,
1233 .ops
= &cs42l73_ops
,
1234 .symmetric_rates
= 1,
1237 .name
= "cs42l73-asp",
1240 .stream_name
= "ASP Playback",
1243 .rates
= CS42L73_RATES
,
1244 .formats
= CS42L73_FORMATS
,
1247 .stream_name
= "ASP Capture",
1250 .rates
= CS42L73_RATES
,
1251 .formats
= CS42L73_FORMATS
,
1253 .ops
= &cs42l73_ops
,
1254 .symmetric_rates
= 1,
1257 .name
= "cs42l73-vsp",
1260 .stream_name
= "VSP Playback",
1263 .rates
= CS42L73_RATES
,
1264 .formats
= CS42L73_FORMATS
,
1267 .stream_name
= "VSP Capture",
1270 .rates
= CS42L73_RATES
,
1271 .formats
= CS42L73_FORMATS
,
1273 .ops
= &cs42l73_ops
,
1274 .symmetric_rates
= 1,
1278 static int cs42l73_suspend(struct snd_soc_codec
*codec
)
1280 cs42l73_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1285 static int cs42l73_resume(struct snd_soc_codec
*codec
)
1287 cs42l73_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1291 static int cs42l73_probe(struct snd_soc_codec
*codec
)
1294 struct cs42l73_private
*cs42l73
= snd_soc_codec_get_drvdata(codec
);
1296 codec
->control_data
= cs42l73
->regmap
;
1298 ret
= snd_soc_codec_set_cache_io(codec
, 8, 8, SND_SOC_REGMAP
);
1300 dev_err(codec
->dev
, "Failed to set cache I/O: %d\n", ret
);
1304 regcache_cache_only(cs42l73
->regmap
, true);
1306 cs42l73_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1308 cs42l73
->mclksel
= CS42L73_CLKID_MCLK1
; /* MCLK1 as master clk */
1314 static int cs42l73_remove(struct snd_soc_codec
*codec
)
1316 cs42l73_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1320 static struct snd_soc_codec_driver soc_codec_dev_cs42l73
= {
1321 .probe
= cs42l73_probe
,
1322 .remove
= cs42l73_remove
,
1323 .suspend
= cs42l73_suspend
,
1324 .resume
= cs42l73_resume
,
1325 .set_bias_level
= cs42l73_set_bias_level
,
1327 .dapm_widgets
= cs42l73_dapm_widgets
,
1328 .num_dapm_widgets
= ARRAY_SIZE(cs42l73_dapm_widgets
),
1329 .dapm_routes
= cs42l73_audio_map
,
1330 .num_dapm_routes
= ARRAY_SIZE(cs42l73_audio_map
),
1332 .controls
= cs42l73_snd_controls
,
1333 .num_controls
= ARRAY_SIZE(cs42l73_snd_controls
),
1336 static struct regmap_config cs42l73_regmap
= {
1340 .max_register
= CS42L73_MAX_REGISTER
,
1341 .reg_defaults
= cs42l73_reg_defaults
,
1342 .num_reg_defaults
= ARRAY_SIZE(cs42l73_reg_defaults
),
1343 .volatile_reg
= cs42l73_volatile_register
,
1344 .readable_reg
= cs42l73_readable_register
,
1345 .cache_type
= REGCACHE_RBTREE
,
1348 static __devinit
int cs42l73_i2c_probe(struct i2c_client
*i2c_client
,
1349 const struct i2c_device_id
*id
)
1351 struct cs42l73_private
*cs42l73
;
1353 unsigned int devid
= 0;
1356 cs42l73
= devm_kzalloc(&i2c_client
->dev
, sizeof(struct cs42l73_private
),
1359 dev_err(&i2c_client
->dev
, "could not allocate codec\n");
1363 i2c_set_clientdata(i2c_client
, cs42l73
);
1365 cs42l73
->regmap
= devm_regmap_init_i2c(i2c_client
, &cs42l73_regmap
);
1366 if (IS_ERR(cs42l73
->regmap
)) {
1367 ret
= PTR_ERR(cs42l73
->regmap
);
1368 dev_err(&i2c_client
->dev
, "regmap_init() failed: %d\n", ret
);
1371 /* initialize codec */
1372 ret
= regmap_read(cs42l73
->regmap
, CS42L73_DEVID_AB
, ®
);
1373 devid
= (reg
& 0xFF) << 12;
1375 ret
= regmap_read(cs42l73
->regmap
, CS42L73_DEVID_CD
, ®
);
1376 devid
|= (reg
& 0xFF) << 4;
1378 ret
= regmap_read(cs42l73
->regmap
, CS42L73_DEVID_E
, ®
);
1379 devid
|= (reg
& 0xF0) >> 4;
1382 if (devid
!= CS42L73_DEVID
) {
1384 dev_err(&i2c_client
->dev
,
1385 "CS42L73 Device ID (%X). Expected %X\n",
1386 devid
, CS42L73_DEVID
);
1390 ret
= regmap_read(cs42l73
->regmap
, CS42L73_REVID
, ®
);
1392 dev_err(&i2c_client
->dev
, "Get Revision ID failed\n");
1396 dev_info(&i2c_client
->dev
,
1397 "Cirrus Logic CS42L73, Revision: %02X\n", reg
& 0xFF);
1399 regcache_cache_only(cs42l73
->regmap
, true);
1401 ret
= snd_soc_register_codec(&i2c_client
->dev
,
1402 &soc_codec_dev_cs42l73
, cs42l73_dai
,
1403 ARRAY_SIZE(cs42l73_dai
));
1409 static __devexit
int cs42l73_i2c_remove(struct i2c_client
*client
)
1411 snd_soc_unregister_codec(&client
->dev
);
1415 static const struct i2c_device_id cs42l73_id
[] = {
1420 MODULE_DEVICE_TABLE(i2c
, cs42l73_id
);
1422 static struct i2c_driver cs42l73_i2c_driver
= {
1425 .owner
= THIS_MODULE
,
1427 .id_table
= cs42l73_id
,
1428 .probe
= cs42l73_i2c_probe
,
1429 .remove
= __devexit_p(cs42l73_i2c_remove
),
1433 module_i2c_driver(cs42l73_i2c_driver
);
1435 MODULE_DESCRIPTION("ASoC CS42L73 driver");
1436 MODULE_AUTHOR("Georgi Vlaev, Nucleus Systems Ltd, <joe@nucleusys.com>");
1437 MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>");
1438 MODULE_LICENSE("GPL");