ASoC: cs4349: Fix max_register setting for cs4349_regmap
[deliverable/linux.git] / sound / soc / codecs / cs4349.h
1 /*
2 * ALSA SoC CS4349 codec driver
3 *
4 * Copyright 2015 Cirrus Logic, Inc.
5 *
6 * Author: Tim Howe <Tim.Howe@cirrus.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 */
18
19 #ifndef __CS4349_H__
20 #define __CS4349_H__
21
22 struct cs4349_platform_data {
23
24 /* GPIO for Reset */
25 unsigned int gpio_nreset;
26
27 };
28
29 /* CS4349 registers addresses */
30 #define CS4349_CHIPID 0x01 /* Device and Rev ID, Read Only */
31 #define CS4349_MODE 0x02 /* Mode Control */
32 #define CS4349_VMI 0x03 /* Volume, Mixing, Inversion Control */
33 #define CS4349_MUTE 0x04 /* Mute Control */
34 #define CS4349_VOLA 0x05 /* DAC Channel A Volume Control */
35 #define CS4349_VOLB 0x06 /* DAC Channel B Volume Control */
36 #define CS4349_RMPFLT 0x07 /* Ramp and Filter Control */
37 #define CS4349_MISC 0x08 /* Power Down,Freeze Control,Pop Stop*/
38
39 #define CS4349_I2C_INCR 0x80
40
41
42 /* Device and Revision ID */
43 #define CS4349_REVA 0xF0 /* Rev A */
44 #define CS4349_REVB 0xF1 /* Rev B */
45 #define CS4349_REVC2 0xFF /* Rev C2 */
46
47
48 /* PDN_DONE Poll Maximum
49 * If soft ramp is set it will take much longer to power down
50 * the system.
51 */
52 #define PDN_POLL_MAX 900
53
54
55 /* Bitfield Definitions */
56
57 /* CS4349_MODE */
58 /* (Digital Interface Format, De-Emphasis Control, Functional Mode */
59 #define DIF2 (1 << 6)
60 #define DIF1 (1 << 5)
61 #define DIF0 (1 << 4)
62 #define DEM1 (1 << 3)
63 #define DEM0 (1 << 2)
64 #define FM1 (1 << 1)
65 #define DIF_LEFT_JST 0x00
66 #define DIF_I2S 0x01
67 #define DIF_RGHT_JST16 0x02
68 #define DIF_RGHT_JST24 0x03
69 #define DIF_TDM0 0x04
70 #define DIF_TDM1 0x05
71 #define DIF_TDM2 0x06
72 #define DIF_TDM3 0x07
73 #define DIF_MASK 0x70
74 #define MODE_FORMAT(x) (((x)&7)<<4)
75 #define DEM_MASK 0x0C
76 #define NO_DEM 0x00
77 #define DEM_441 0x04
78 #define DEM_48K 0x08
79 #define DEM_32K 0x0C
80 #define FM_AUTO 0x00
81 #define FM_SNGL 0x01
82 #define FM_DBL 0x02
83 #define FM_QUAD 0x03
84 #define FM_SNGL_MIN 30000
85 #define FM_SNGL_MAX 54000
86 #define FM_DBL_MAX 108000
87 #define FM_QUAD_MAX 216000
88 #define FM_MASK 0x03
89
90 /* CS4349_VMI (VMI = Volume, Mixing and Inversion Controls) */
91 #define VOLBISA (1 << 7)
92 #define VOLAISB (1 << 7)
93 /* INVERT_A only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
94 #define INVERT_A (1 << 6)
95 /* INVERT_B only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
96 #define INVERT_B (1 << 5)
97 #define ATAPI3 (1 << 3)
98 #define ATAPI2 (1 << 2)
99 #define ATAPI1 (1 << 1)
100 #define ATAPI0 (1 << 0)
101 #define MUTEAB 0x00
102 #define MUTEA_RIGHTB 0x01
103 #define MUTEA_LEFTB 0x02
104 #define MUTEA_SUMLRDIV2B 0x03
105 #define RIGHTA_MUTEB 0x04
106 #define RIGHTA_RIGHTB 0x05
107 #define RIGHTA_LEFTB 0x06
108 #define RIGHTA_SUMLRDIV2B 0x07
109 #define LEFTA_MUTEB 0x08
110 #define LEFTA_RIGHTB 0x09 /* Default */
111 #define LEFTA_LEFTB 0x0A
112 #define LEFTA_SUMLRDIV2B 0x0B
113 #define SUMLRDIV2A_MUTEB 0x0C
114 #define SUMLRDIV2A_RIGHTB 0x0D
115 #define SUMLRDIV2A_LEFTB 0x0E
116 #define SUMLRDIV2_AB 0x0F
117 #define CHMIX_MASK 0x0F
118
119 /* CS4349_MUTE */
120 #define AUTOMUTE (1 << 7)
121 #define MUTEC_AB (1 << 5)
122 #define MUTE_A (1 << 4)
123 #define MUTE_B (1 << 3)
124 #define MUTE_AB_MASK 0x18
125
126 /* CS4349_RMPFLT (Ramp and Filter Control) */
127 #define SCZ1 (1 << 7)
128 #define SCZ0 (1 << 6)
129 #define RMP_UP (1 << 5)
130 #define RMP_DN (1 << 4)
131 #define FILT_SEL (1 << 2)
132 #define IMMDT_CHNG 0x31
133 #define ZEROCRSS 0x71
134 #define SOFT_RMP 0xB1
135 #define SFTRMP_ZEROCRSS 0xF1
136 #define SR_ZC_MASK 0xC0
137
138 /* CS4349_MISC */
139 #define PWR_DWN (1 << 7)
140 #define FREEZE (1 << 5)
141 #define POPG_EN (1 << 4)
142
143 #endif /* __CS4349_H__ */
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