2 * Driver for the PCM512x CODECs
4 * Author: Mark Brown <broonie@linaro.org>
5 * Copyright 2014 Linaro Ltd
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/clk.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/regmap.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/gcd.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/tlv.h>
32 #define DIV_ROUND_DOWN_ULL(ll, d) \
33 ({ unsigned long long _tmp = (ll); do_div(_tmp, d); _tmp; })
34 #define DIV_ROUND_CLOSEST_ULL(ll, d) \
35 ({ unsigned long long _tmp = (ll)+(d)/2; do_div(_tmp, d); _tmp; })
37 #define PCM512x_NUM_SUPPLIES 3
38 static const char * const pcm512x_supply_names
[PCM512x_NUM_SUPPLIES
] = {
45 struct regmap
*regmap
;
47 struct regulator_bulk_data supplies
[PCM512x_NUM_SUPPLIES
];
48 struct notifier_block supply_nb
[PCM512x_NUM_SUPPLIES
];
56 unsigned long real_pll
;
60 * We can't use the same notifier block for more than one supply and
61 * there's no way I can see to get from a callback to the caller
62 * except container_of().
64 #define PCM512x_REGULATOR_EVENT(n) \
65 static int pcm512x_regulator_event_##n(struct notifier_block *nb, \
66 unsigned long event, void *data) \
68 struct pcm512x_priv *pcm512x = container_of(nb, struct pcm512x_priv, \
70 if (event & REGULATOR_EVENT_DISABLE) { \
71 regcache_mark_dirty(pcm512x->regmap); \
72 regcache_cache_only(pcm512x->regmap, true); \
77 PCM512x_REGULATOR_EVENT(0)
78 PCM512x_REGULATOR_EVENT(1)
79 PCM512x_REGULATOR_EVENT(2)
81 static const struct reg_default pcm512x_reg_defaults
[] = {
82 { PCM512x_RESET
, 0x00 },
83 { PCM512x_POWER
, 0x00 },
84 { PCM512x_MUTE
, 0x00 },
85 { PCM512x_DSP
, 0x00 },
86 { PCM512x_PLL_REF
, 0x00 },
87 { PCM512x_DAC_REF
, 0x00 },
88 { PCM512x_DAC_ROUTING
, 0x11 },
89 { PCM512x_DSP_PROGRAM
, 0x01 },
90 { PCM512x_CLKDET
, 0x00 },
91 { PCM512x_AUTO_MUTE
, 0x00 },
92 { PCM512x_ERROR_DETECT
, 0x00 },
93 { PCM512x_DIGITAL_VOLUME_1
, 0x00 },
94 { PCM512x_DIGITAL_VOLUME_2
, 0x30 },
95 { PCM512x_DIGITAL_VOLUME_3
, 0x30 },
96 { PCM512x_DIGITAL_MUTE_1
, 0x22 },
97 { PCM512x_DIGITAL_MUTE_2
, 0x00 },
98 { PCM512x_DIGITAL_MUTE_3
, 0x07 },
99 { PCM512x_OUTPUT_AMPLITUDE
, 0x00 },
100 { PCM512x_ANALOG_GAIN_CTRL
, 0x00 },
101 { PCM512x_UNDERVOLTAGE_PROT
, 0x00 },
102 { PCM512x_ANALOG_MUTE_CTRL
, 0x00 },
103 { PCM512x_ANALOG_GAIN_BOOST
, 0x00 },
104 { PCM512x_VCOM_CTRL_1
, 0x00 },
105 { PCM512x_VCOM_CTRL_2
, 0x01 },
106 { PCM512x_BCLK_LRCLK_CFG
, 0x00 },
107 { PCM512x_MASTER_MODE
, 0x7c },
108 { PCM512x_GPIO_DACIN
, 0x00 },
109 { PCM512x_GPIO_PLLIN
, 0x00 },
110 { PCM512x_SYNCHRONIZE
, 0x10 },
111 { PCM512x_PLL_COEFF_0
, 0x00 },
112 { PCM512x_PLL_COEFF_1
, 0x00 },
113 { PCM512x_PLL_COEFF_2
, 0x00 },
114 { PCM512x_PLL_COEFF_3
, 0x00 },
115 { PCM512x_PLL_COEFF_4
, 0x00 },
116 { PCM512x_DSP_CLKDIV
, 0x00 },
117 { PCM512x_DAC_CLKDIV
, 0x00 },
118 { PCM512x_NCP_CLKDIV
, 0x00 },
119 { PCM512x_OSR_CLKDIV
, 0x00 },
120 { PCM512x_MASTER_CLKDIV_1
, 0x00 },
121 { PCM512x_MASTER_CLKDIV_2
, 0x00 },
122 { PCM512x_FS_SPEED_MODE
, 0x00 },
123 { PCM512x_IDAC_1
, 0x01 },
124 { PCM512x_IDAC_2
, 0x00 },
127 static bool pcm512x_readable(struct device
*dev
, unsigned int reg
)
134 case PCM512x_SPI_MISO_FUNCTION
:
136 case PCM512x_GPIO_EN
:
137 case PCM512x_BCLK_LRCLK_CFG
:
138 case PCM512x_DSP_GPIO_INPUT
:
139 case PCM512x_MASTER_MODE
:
140 case PCM512x_PLL_REF
:
141 case PCM512x_DAC_REF
:
142 case PCM512x_GPIO_DACIN
:
143 case PCM512x_GPIO_PLLIN
:
144 case PCM512x_SYNCHRONIZE
:
145 case PCM512x_PLL_COEFF_0
:
146 case PCM512x_PLL_COEFF_1
:
147 case PCM512x_PLL_COEFF_2
:
148 case PCM512x_PLL_COEFF_3
:
149 case PCM512x_PLL_COEFF_4
:
150 case PCM512x_DSP_CLKDIV
:
151 case PCM512x_DAC_CLKDIV
:
152 case PCM512x_NCP_CLKDIV
:
153 case PCM512x_OSR_CLKDIV
:
154 case PCM512x_MASTER_CLKDIV_1
:
155 case PCM512x_MASTER_CLKDIV_2
:
156 case PCM512x_FS_SPEED_MODE
:
159 case PCM512x_ERROR_DETECT
:
162 case PCM512x_DAC_ROUTING
:
163 case PCM512x_DSP_PROGRAM
:
165 case PCM512x_AUTO_MUTE
:
166 case PCM512x_DIGITAL_VOLUME_1
:
167 case PCM512x_DIGITAL_VOLUME_2
:
168 case PCM512x_DIGITAL_VOLUME_3
:
169 case PCM512x_DIGITAL_MUTE_1
:
170 case PCM512x_DIGITAL_MUTE_2
:
171 case PCM512x_DIGITAL_MUTE_3
:
172 case PCM512x_GPIO_OUTPUT_1
:
173 case PCM512x_GPIO_OUTPUT_2
:
174 case PCM512x_GPIO_OUTPUT_3
:
175 case PCM512x_GPIO_OUTPUT_4
:
176 case PCM512x_GPIO_OUTPUT_5
:
177 case PCM512x_GPIO_OUTPUT_6
:
178 case PCM512x_GPIO_CONTROL_1
:
179 case PCM512x_GPIO_CONTROL_2
:
180 case PCM512x_OVERFLOW
:
181 case PCM512x_RATE_DET_1
:
182 case PCM512x_RATE_DET_2
:
183 case PCM512x_RATE_DET_3
:
184 case PCM512x_RATE_DET_4
:
185 case PCM512x_CLOCK_STATUS
:
186 case PCM512x_ANALOG_MUTE_DET
:
188 case PCM512x_DIGITAL_MUTE_DET
:
189 case PCM512x_OUTPUT_AMPLITUDE
:
190 case PCM512x_ANALOG_GAIN_CTRL
:
191 case PCM512x_UNDERVOLTAGE_PROT
:
192 case PCM512x_ANALOG_MUTE_CTRL
:
193 case PCM512x_ANALOG_GAIN_BOOST
:
194 case PCM512x_VCOM_CTRL_1
:
195 case PCM512x_VCOM_CTRL_2
:
196 case PCM512x_CRAM_CTRL
:
201 /* There are 256 raw register addresses */
206 static bool pcm512x_volatile(struct device
*dev
, unsigned int reg
)
210 case PCM512x_OVERFLOW
:
211 case PCM512x_RATE_DET_1
:
212 case PCM512x_RATE_DET_2
:
213 case PCM512x_RATE_DET_3
:
214 case PCM512x_RATE_DET_4
:
215 case PCM512x_CLOCK_STATUS
:
216 case PCM512x_ANALOG_MUTE_DET
:
218 case PCM512x_DIGITAL_MUTE_DET
:
219 case PCM512x_CRAM_CTRL
:
222 /* There are 256 raw register addresses */
227 static const DECLARE_TLV_DB_SCALE(digital_tlv
, -10350, 50, 1);
228 static const DECLARE_TLV_DB_SCALE(analog_tlv
, -600, 600, 0);
229 static const DECLARE_TLV_DB_SCALE(boost_tlv
, 0, 80, 0);
231 static const char * const pcm512x_dsp_program_texts
[] = {
232 "FIR interpolation with de-emphasis",
233 "Low latency IIR with de-emphasis",
234 "High attenuation with de-emphasis",
235 "Fixed process flow",
236 "Ringing-less low latency FIR",
239 static const unsigned int pcm512x_dsp_program_values
[] = {
247 static SOC_VALUE_ENUM_SINGLE_DECL(pcm512x_dsp_program
,
248 PCM512x_DSP_PROGRAM
, 0, 0x1f,
249 pcm512x_dsp_program_texts
,
250 pcm512x_dsp_program_values
);
252 static const char * const pcm512x_clk_missing_text
[] = {
253 "1s", "2s", "3s", "4s", "5s", "6s", "7s", "8s"
256 static const struct soc_enum pcm512x_clk_missing
=
257 SOC_ENUM_SINGLE(PCM512x_CLKDET
, 0, 8, pcm512x_clk_missing_text
);
259 static const char * const pcm512x_autom_text
[] = {
260 "21ms", "106ms", "213ms", "533ms", "1.07s", "2.13s", "5.33s", "10.66s"
263 static const struct soc_enum pcm512x_autom_l
=
264 SOC_ENUM_SINGLE(PCM512x_AUTO_MUTE
, PCM512x_ATML_SHIFT
, 8,
267 static const struct soc_enum pcm512x_autom_r
=
268 SOC_ENUM_SINGLE(PCM512x_AUTO_MUTE
, PCM512x_ATMR_SHIFT
, 8,
271 static const char * const pcm512x_ramp_rate_text
[] = {
272 "1 sample/update", "2 samples/update", "4 samples/update",
276 static const struct soc_enum pcm512x_vndf
=
277 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1
, PCM512x_VNDF_SHIFT
, 4,
278 pcm512x_ramp_rate_text
);
280 static const struct soc_enum pcm512x_vnuf
=
281 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1
, PCM512x_VNUF_SHIFT
, 4,
282 pcm512x_ramp_rate_text
);
284 static const struct soc_enum pcm512x_vedf
=
285 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_2
, PCM512x_VEDF_SHIFT
, 4,
286 pcm512x_ramp_rate_text
);
288 static const char * const pcm512x_ramp_step_text
[] = {
289 "4dB/step", "2dB/step", "1dB/step", "0.5dB/step"
292 static const struct soc_enum pcm512x_vnds
=
293 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1
, PCM512x_VNDS_SHIFT
, 4,
294 pcm512x_ramp_step_text
);
296 static const struct soc_enum pcm512x_vnus
=
297 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_1
, PCM512x_VNUS_SHIFT
, 4,
298 pcm512x_ramp_step_text
);
300 static const struct soc_enum pcm512x_veds
=
301 SOC_ENUM_SINGLE(PCM512x_DIGITAL_MUTE_2
, PCM512x_VEDS_SHIFT
, 4,
302 pcm512x_ramp_step_text
);
304 static const struct snd_kcontrol_new pcm512x_controls
[] = {
305 SOC_DOUBLE_R_TLV("Digital Playback Volume", PCM512x_DIGITAL_VOLUME_2
,
306 PCM512x_DIGITAL_VOLUME_3
, 0, 255, 1, digital_tlv
),
307 SOC_DOUBLE_TLV("Analogue Playback Volume", PCM512x_ANALOG_GAIN_CTRL
,
308 PCM512x_LAGN_SHIFT
, PCM512x_RAGN_SHIFT
, 1, 1, analog_tlv
),
309 SOC_DOUBLE_TLV("Analogue Playback Boost Volume", PCM512x_ANALOG_GAIN_BOOST
,
310 PCM512x_AGBL_SHIFT
, PCM512x_AGBR_SHIFT
, 1, 0, boost_tlv
),
311 SOC_DOUBLE("Digital Playback Switch", PCM512x_MUTE
, PCM512x_RQML_SHIFT
,
312 PCM512x_RQMR_SHIFT
, 1, 1),
314 SOC_SINGLE("Deemphasis Switch", PCM512x_DSP
, PCM512x_DEMP_SHIFT
, 1, 1),
315 SOC_ENUM("DSP Program", pcm512x_dsp_program
),
317 SOC_ENUM("Clock Missing Period", pcm512x_clk_missing
),
318 SOC_ENUM("Auto Mute Time Left", pcm512x_autom_l
),
319 SOC_ENUM("Auto Mute Time Right", pcm512x_autom_r
),
320 SOC_SINGLE("Auto Mute Mono Switch", PCM512x_DIGITAL_MUTE_3
,
321 PCM512x_ACTL_SHIFT
, 1, 0),
322 SOC_DOUBLE("Auto Mute Switch", PCM512x_DIGITAL_MUTE_3
, PCM512x_AMLE_SHIFT
,
323 PCM512x_AMRE_SHIFT
, 1, 0),
325 SOC_ENUM("Volume Ramp Down Rate", pcm512x_vndf
),
326 SOC_ENUM("Volume Ramp Down Step", pcm512x_vnds
),
327 SOC_ENUM("Volume Ramp Up Rate", pcm512x_vnuf
),
328 SOC_ENUM("Volume Ramp Up Step", pcm512x_vnus
),
329 SOC_ENUM("Volume Ramp Down Emergency Rate", pcm512x_vedf
),
330 SOC_ENUM("Volume Ramp Down Emergency Step", pcm512x_veds
),
333 static const struct snd_soc_dapm_widget pcm512x_dapm_widgets
[] = {
334 SND_SOC_DAPM_DAC("DACL", NULL
, SND_SOC_NOPM
, 0, 0),
335 SND_SOC_DAPM_DAC("DACR", NULL
, SND_SOC_NOPM
, 0, 0),
337 SND_SOC_DAPM_OUTPUT("OUTL"),
338 SND_SOC_DAPM_OUTPUT("OUTR"),
341 static const struct snd_soc_dapm_route pcm512x_dapm_routes
[] = {
342 { "DACL", NULL
, "Playback" },
343 { "DACR", NULL
, "Playback" },
345 { "OUTL", NULL
, "DACL" },
346 { "OUTR", NULL
, "DACR" },
349 static const u32 pcm512x_dai_rates
[] = {
350 8000, 11025, 16000, 22050, 32000, 44100, 48000, 64000,
351 88200, 96000, 176400, 192000, 384000,
354 static const struct snd_pcm_hw_constraint_list constraints_slave
= {
355 .count
= ARRAY_SIZE(pcm512x_dai_rates
),
356 .list
= pcm512x_dai_rates
,
359 static int pcm512x_hw_rule_rate(struct snd_pcm_hw_params
*params
,
360 struct snd_pcm_hw_rule
*rule
)
362 struct snd_interval ranges
[2];
365 frame_size
= snd_soc_params_to_frame_size(params
);
369 switch (frame_size
) {
371 /* No hole when the frame size is 32. */
375 /* There is only one hole in the range of supported
376 * rates, but it moves with the frame size.
378 memset(ranges
, 0, sizeof(ranges
));
379 ranges
[0].min
= 8000;
380 ranges
[0].max
= 25000000 / frame_size
/ 2;
381 ranges
[1].min
= DIV_ROUND_UP(16000000, frame_size
);
382 ranges
[1].max
= 384000;
388 return snd_interval_ranges(hw_param_interval(params
, rule
->var
),
389 ARRAY_SIZE(ranges
), ranges
, 0);
392 static int pcm512x_dai_startup_master(struct snd_pcm_substream
*substream
,
393 struct snd_soc_dai
*dai
)
395 struct snd_soc_codec
*codec
= dai
->codec
;
396 struct pcm512x_priv
*pcm512x
= snd_soc_codec_get_drvdata(codec
);
397 struct device
*dev
= dai
->dev
;
398 struct snd_pcm_hw_constraint_ratnums
*constraints_no_pll
;
399 struct snd_ratnum
*rats_no_pll
;
401 if (IS_ERR(pcm512x
->sclk
)) {
402 dev_err(dev
, "Need SCLK for master mode: %ld\n",
403 PTR_ERR(pcm512x
->sclk
));
404 return PTR_ERR(pcm512x
->sclk
);
407 if (pcm512x
->pll_out
)
408 return snd_pcm_hw_rule_add(substream
->runtime
, 0,
409 SNDRV_PCM_HW_PARAM_RATE
,
410 pcm512x_hw_rule_rate
,
412 SNDRV_PCM_HW_PARAM_FRAME_BITS
,
413 SNDRV_PCM_HW_PARAM_CHANNELS
, -1);
415 constraints_no_pll
= devm_kzalloc(dev
, sizeof(*constraints_no_pll
),
417 if (!constraints_no_pll
)
419 constraints_no_pll
->nrats
= 1;
420 rats_no_pll
= devm_kzalloc(dev
, sizeof(*rats_no_pll
), GFP_KERNEL
);
423 constraints_no_pll
->rats
= rats_no_pll
;
424 rats_no_pll
->num
= clk_get_rate(pcm512x
->sclk
) / 64;
425 rats_no_pll
->den_min
= 1;
426 rats_no_pll
->den_max
= 128;
427 rats_no_pll
->den_step
= 1;
429 return snd_pcm_hw_constraint_ratnums(substream
->runtime
, 0,
430 SNDRV_PCM_HW_PARAM_RATE
,
434 static int pcm512x_dai_startup_slave(struct snd_pcm_substream
*substream
,
435 struct snd_soc_dai
*dai
)
437 struct snd_soc_codec
*codec
= dai
->codec
;
438 struct pcm512x_priv
*pcm512x
= snd_soc_codec_get_drvdata(codec
);
439 struct device
*dev
= dai
->dev
;
440 struct regmap
*regmap
= pcm512x
->regmap
;
442 if (IS_ERR(pcm512x
->sclk
)) {
443 dev_info(dev
, "No SCLK, using BCLK: %ld\n",
444 PTR_ERR(pcm512x
->sclk
));
446 /* Disable reporting of missing SCLK as an error */
447 regmap_update_bits(regmap
, PCM512x_ERROR_DETECT
,
448 PCM512x_IDCH
, PCM512x_IDCH
);
450 /* Switch PLL input to BCLK */
451 regmap_update_bits(regmap
, PCM512x_PLL_REF
,
452 PCM512x_SREF
, PCM512x_SREF_BCK
);
455 return snd_pcm_hw_constraint_list(substream
->runtime
, 0,
456 SNDRV_PCM_HW_PARAM_RATE
,
460 static int pcm512x_dai_startup(struct snd_pcm_substream
*substream
,
461 struct snd_soc_dai
*dai
)
463 struct snd_soc_codec
*codec
= dai
->codec
;
464 struct pcm512x_priv
*pcm512x
= snd_soc_codec_get_drvdata(codec
);
466 switch (pcm512x
->fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
467 case SND_SOC_DAIFMT_CBM_CFM
:
468 case SND_SOC_DAIFMT_CBM_CFS
:
469 return pcm512x_dai_startup_master(substream
, dai
);
471 case SND_SOC_DAIFMT_CBS_CFS
:
472 return pcm512x_dai_startup_slave(substream
, dai
);
479 static int pcm512x_set_bias_level(struct snd_soc_codec
*codec
,
480 enum snd_soc_bias_level level
)
482 struct pcm512x_priv
*pcm512x
= dev_get_drvdata(codec
->dev
);
486 case SND_SOC_BIAS_ON
:
487 case SND_SOC_BIAS_PREPARE
:
490 case SND_SOC_BIAS_STANDBY
:
491 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_POWER
,
494 dev_err(codec
->dev
, "Failed to remove standby: %d\n",
500 case SND_SOC_BIAS_OFF
:
501 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_POWER
,
502 PCM512x_RQST
, PCM512x_RQST
);
504 dev_err(codec
->dev
, "Failed to request standby: %d\n",
511 codec
->dapm
.bias_level
= level
;
516 static unsigned long pcm512x_find_sck(struct snd_soc_dai
*dai
,
517 unsigned long bclk_rate
)
519 struct device
*dev
= dai
->dev
;
520 unsigned long sck_rate
;
523 /* 64 MHz <= pll_rate <= 100 MHz, VREF mode */
524 /* 16 MHz <= sck_rate <= 25 MHz, VREF mode */
526 /* select sck_rate as a multiple of bclk_rate but still with
527 * as many factors of 2 as possible, as that makes it easier
528 * to find a fast DAC rate
530 pow2
= 1 << fls((25000000 - 16000000) / bclk_rate
);
531 for (; pow2
; pow2
>>= 1) {
532 sck_rate
= rounddown(25000000, bclk_rate
* pow2
);
533 if (sck_rate
>= 16000000)
537 dev_err(dev
, "Impossible to generate a suitable SCK\n");
541 dev_dbg(dev
, "sck_rate %lu\n", sck_rate
);
545 /* pll_rate = pllin_rate * R * J.D / P
550 * 64 MHz <= pll_rate <= 100 MHz
552 * 1 MHz <= pllin_rate / P <= 20 MHz
554 * 6.667 MHz <= pllin_rate / P <= 20 MHz
558 static int pcm512x_find_pll_coeff(struct snd_soc_dai
*dai
,
559 unsigned long pllin_rate
,
560 unsigned long pll_rate
)
562 struct device
*dev
= dai
->dev
;
563 struct snd_soc_codec
*codec
= dai
->codec
;
564 struct pcm512x_priv
*pcm512x
= snd_soc_codec_get_drvdata(codec
);
565 unsigned long common
;
567 unsigned long K
; /* 10000 * J.D */
571 common
= gcd(pll_rate
, pllin_rate
);
572 dev_dbg(dev
, "pll %lu pllin %lu common %lu\n",
573 pll_rate
, pllin_rate
, common
);
574 num
= pll_rate
/ common
;
575 den
= pllin_rate
/ common
;
577 /* pllin_rate / P (or here, den) cannot be greater than 20 MHz */
578 if (pllin_rate
/ den
> 20000000 && num
< 8) {
579 num
*= 20000000 / (pllin_rate
/ den
);
580 den
*= 20000000 / (pllin_rate
/ den
);
582 dev_dbg(dev
, "num / den = %lu / %lu\n", num
, den
);
585 if (den
<= 15 && num
<= 16 * 63
586 && 1000000 <= pllin_rate
/ P
&& pllin_rate
/ P
<= 20000000) {
587 /* Try the case with D = 0 */
589 /* factor 'num' into J and R, such that R <= 16 and J <= 63 */
590 for (R
= 16; R
; R
--) {
594 if (J
== 0 || J
> 63)
597 dev_dbg(dev
, "R * J / P = %d * %d / %d\n", R
, J
, P
);
598 pcm512x
->real_pll
= pll_rate
;
606 if (num
> 0xffffffffUL
/ 10000)
609 /* Try to find an exact pll_rate using the D > 0 case */
610 common
= gcd(10000 * num
, den
);
611 num
= 10000 * num
/ common
;
613 dev_dbg(dev
, "num %lu den %lu common %lu\n", num
, den
, common
);
615 for (P
= den
; P
<= 15; P
++) {
616 if (pllin_rate
/ P
< 6667000 || 200000000 < pllin_rate
/ P
)
621 /* J == 12 is ok if D == 0 */
622 if (K
< 40000 || K
> 120000)
627 dev_dbg(dev
, "J.D / P = %d.%04d / %d\n", J
, D
, P
);
628 pcm512x
->real_pll
= pll_rate
;
632 /* Fall back to an approximate pll_rate */
635 /* find smallest possible P */
636 P
= DIV_ROUND_UP(pllin_rate
, 20000000);
640 dev_err(dev
, "Need a slower clock as pll-input\n");
643 if (pllin_rate
/ P
< 6667000) {
644 dev_err(dev
, "Need a faster clock as pll-input\n");
647 K
= DIV_ROUND_CLOSEST_ULL(10000ULL * pll_rate
* P
, pllin_rate
);
650 /* J == 12 is ok if D == 0 */
655 dev_dbg(dev
, "J.D / P ~ %d.%04d / %d\n", J
, D
, P
);
656 pcm512x
->real_pll
= DIV_ROUND_DOWN_ULL((u64
)K
* pllin_rate
, 10000 * P
);
666 static unsigned long pcm512x_pllin_dac_rate(struct snd_soc_dai
*dai
,
667 unsigned long osr_rate
,
668 unsigned long pllin_rate
)
670 struct snd_soc_codec
*codec
= dai
->codec
;
671 struct pcm512x_priv
*pcm512x
= snd_soc_codec_get_drvdata(codec
);
672 unsigned long dac_rate
;
674 if (!pcm512x
->pll_out
)
675 return 0; /* no PLL to bypass, force SCK as DAC input */
677 if (pllin_rate
% osr_rate
)
678 return 0; /* futile, quit early */
680 /* run DAC no faster than 6144000 Hz */
681 for (dac_rate
= rounddown(6144000, osr_rate
);
683 dac_rate
-= osr_rate
) {
685 if (pllin_rate
/ dac_rate
> 128)
686 return 0; /* DAC divider would be too big */
688 if (!(pllin_rate
% dac_rate
))
691 dac_rate
-= osr_rate
;
697 static int pcm512x_set_dividers(struct snd_soc_dai
*dai
,
698 struct snd_pcm_hw_params
*params
)
700 struct device
*dev
= dai
->dev
;
701 struct snd_soc_codec
*codec
= dai
->codec
;
702 struct pcm512x_priv
*pcm512x
= snd_soc_codec_get_drvdata(codec
);
703 unsigned long pllin_rate
= 0;
704 unsigned long pll_rate
;
705 unsigned long sck_rate
;
706 unsigned long mck_rate
;
707 unsigned long bclk_rate
;
708 unsigned long sample_rate
;
709 unsigned long osr_rate
;
710 unsigned long dacsrc_rate
;
715 unsigned long dac_rate
;
723 lrclk_div
= snd_soc_params_to_frame_size(params
);
724 if (lrclk_div
== 0) {
725 dev_err(dev
, "No LRCLK?\n");
729 if (!pcm512x
->pll_out
) {
730 sck_rate
= clk_get_rate(pcm512x
->sclk
);
731 bclk_div
= params
->rate_den
* 64 / lrclk_div
;
732 bclk_rate
= DIV_ROUND_CLOSEST(sck_rate
, bclk_div
);
736 ret
= snd_soc_params_to_bclk(params
);
738 dev_err(dev
, "Failed to find suitable BCLK: %d\n", ret
);
742 dev_err(dev
, "No BCLK?\n");
747 pllin_rate
= clk_get_rate(pcm512x
->sclk
);
749 sck_rate
= pcm512x_find_sck(dai
, bclk_rate
);
752 pll_rate
= 4 * sck_rate
;
754 ret
= pcm512x_find_pll_coeff(dai
, pllin_rate
, pll_rate
);
758 ret
= regmap_write(pcm512x
->regmap
,
759 PCM512x_PLL_COEFF_0
, pcm512x
->pll_p
- 1);
761 dev_err(dev
, "Failed to write PLL P: %d\n", ret
);
765 ret
= regmap_write(pcm512x
->regmap
,
766 PCM512x_PLL_COEFF_1
, pcm512x
->pll_j
);
768 dev_err(dev
, "Failed to write PLL J: %d\n", ret
);
772 ret
= regmap_write(pcm512x
->regmap
,
773 PCM512x_PLL_COEFF_2
, pcm512x
->pll_d
>> 8);
775 dev_err(dev
, "Failed to write PLL D msb: %d\n", ret
);
779 ret
= regmap_write(pcm512x
->regmap
,
780 PCM512x_PLL_COEFF_3
, pcm512x
->pll_d
& 0xff);
782 dev_err(dev
, "Failed to write PLL D lsb: %d\n", ret
);
786 ret
= regmap_write(pcm512x
->regmap
,
787 PCM512x_PLL_COEFF_4
, pcm512x
->pll_r
- 1);
789 dev_err(dev
, "Failed to write PLL R: %d\n", ret
);
793 mck_rate
= pcm512x
->real_pll
;
795 bclk_div
= DIV_ROUND_CLOSEST(sck_rate
, bclk_rate
);
798 if (bclk_div
> 128) {
799 dev_err(dev
, "Failed to find BCLK divider\n");
803 /* the actual rate */
804 sample_rate
= sck_rate
/ bclk_div
/ lrclk_div
;
805 osr_rate
= 16 * sample_rate
;
807 /* run DSP no faster than 50 MHz */
808 dsp_div
= mck_rate
> 50000000 ? 2 : 1;
810 dac_rate
= pcm512x_pllin_dac_rate(dai
, osr_rate
, pllin_rate
);
812 /* the desired clock rate is "compatible" with the pll input
813 * clock, so use that clock as dac input instead of the pll
814 * output clock since the pll will introduce jitter and thus
817 dev_dbg(dev
, "using pll input as dac input\n");
818 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_DAC_REF
,
819 PCM512x_SDAC
, PCM512x_SDAC_GPIO
);
822 "Failed to set gpio as dacref: %d\n", ret
);
826 gpio
= PCM512x_GREF_GPIO1
+ pcm512x
->pll_in
- 1;
827 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_GPIO_DACIN
,
831 "Failed to set gpio %d as dacin: %d\n",
832 pcm512x
->pll_in
, ret
);
836 dacsrc_rate
= pllin_rate
;
838 /* run DAC no faster than 6144000 Hz */
839 unsigned long dac_mul
= 6144000 / osr_rate
;
840 unsigned long sck_mul
= sck_rate
/ osr_rate
;
842 for (; dac_mul
; dac_mul
--) {
843 if (!(sck_mul
% dac_mul
))
847 dev_err(dev
, "Failed to find DAC rate\n");
851 dac_rate
= dac_mul
* osr_rate
;
852 dev_dbg(dev
, "dac_rate %lu sample_rate %lu\n",
853 dac_rate
, sample_rate
);
855 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_DAC_REF
,
856 PCM512x_SDAC
, PCM512x_SDAC_SCK
);
859 "Failed to set sck as dacref: %d\n", ret
);
863 dacsrc_rate
= sck_rate
;
866 dac_div
= DIV_ROUND_CLOSEST(dacsrc_rate
, dac_rate
);
868 dev_err(dev
, "Failed to find DAC divider\n");
872 ncp_div
= DIV_ROUND_CLOSEST(dacsrc_rate
/ dac_div
, 1536000);
873 if (ncp_div
> 128 || dacsrc_rate
/ dac_div
/ ncp_div
> 2048000) {
874 /* run NCP no faster than 2048000 Hz, but why? */
875 ncp_div
= DIV_ROUND_UP(dacsrc_rate
/ dac_div
, 2048000);
877 dev_err(dev
, "Failed to find NCP divider\n");
882 osr_div
= DIV_ROUND_CLOSEST(dac_rate
, osr_rate
);
884 dev_err(dev
, "Failed to find OSR divider\n");
888 idac
= mck_rate
/ (dsp_div
* sample_rate
);
890 ret
= regmap_write(pcm512x
->regmap
, PCM512x_DSP_CLKDIV
, dsp_div
- 1);
892 dev_err(dev
, "Failed to write DSP divider: %d\n", ret
);
896 ret
= regmap_write(pcm512x
->regmap
, PCM512x_DAC_CLKDIV
, dac_div
- 1);
898 dev_err(dev
, "Failed to write DAC divider: %d\n", ret
);
902 ret
= regmap_write(pcm512x
->regmap
, PCM512x_NCP_CLKDIV
, ncp_div
- 1);
904 dev_err(dev
, "Failed to write NCP divider: %d\n", ret
);
908 ret
= regmap_write(pcm512x
->regmap
, PCM512x_OSR_CLKDIV
, osr_div
- 1);
910 dev_err(dev
, "Failed to write OSR divider: %d\n", ret
);
914 ret
= regmap_write(pcm512x
->regmap
,
915 PCM512x_MASTER_CLKDIV_1
, bclk_div
- 1);
917 dev_err(dev
, "Failed to write BCLK divider: %d\n", ret
);
921 ret
= regmap_write(pcm512x
->regmap
,
922 PCM512x_MASTER_CLKDIV_2
, lrclk_div
- 1);
924 dev_err(dev
, "Failed to write LRCLK divider: %d\n", ret
);
928 ret
= regmap_write(pcm512x
->regmap
, PCM512x_IDAC_1
, idac
>> 8);
930 dev_err(dev
, "Failed to write IDAC msb divider: %d\n", ret
);
934 ret
= regmap_write(pcm512x
->regmap
, PCM512x_IDAC_2
, idac
& 0xff);
936 dev_err(dev
, "Failed to write IDAC lsb divider: %d\n", ret
);
940 if (sample_rate
<= 48000)
941 fssp
= PCM512x_FSSP_48KHZ
;
942 else if (sample_rate
<= 96000)
943 fssp
= PCM512x_FSSP_96KHZ
;
944 else if (sample_rate
<= 192000)
945 fssp
= PCM512x_FSSP_192KHZ
;
947 fssp
= PCM512x_FSSP_384KHZ
;
948 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_FS_SPEED_MODE
,
951 dev_err(codec
->dev
, "Failed to set fs speed: %d\n", ret
);
955 dev_dbg(codec
->dev
, "DSP divider %d\n", dsp_div
);
956 dev_dbg(codec
->dev
, "DAC divider %d\n", dac_div
);
957 dev_dbg(codec
->dev
, "NCP divider %d\n", ncp_div
);
958 dev_dbg(codec
->dev
, "OSR divider %d\n", osr_div
);
959 dev_dbg(codec
->dev
, "BCK divider %d\n", bclk_div
);
960 dev_dbg(codec
->dev
, "LRCK divider %d\n", lrclk_div
);
961 dev_dbg(codec
->dev
, "IDAC %d\n", idac
);
962 dev_dbg(codec
->dev
, "1<<FSSP %d\n", 1 << fssp
);
967 static int pcm512x_hw_params(struct snd_pcm_substream
*substream
,
968 struct snd_pcm_hw_params
*params
,
969 struct snd_soc_dai
*dai
)
971 struct snd_soc_codec
*codec
= dai
->codec
;
972 struct pcm512x_priv
*pcm512x
= snd_soc_codec_get_drvdata(codec
);
979 dev_dbg(codec
->dev
, "hw_params %u Hz, %u channels\n",
981 params_channels(params
));
983 switch (snd_pcm_format_width(params_format(params
))) {
985 alen
= PCM512x_ALEN_16
;
988 alen
= PCM512x_ALEN_20
;
991 alen
= PCM512x_ALEN_24
;
994 alen
= PCM512x_ALEN_32
;
997 dev_err(codec
->dev
, "Bad frame size: %d\n",
998 snd_pcm_format_width(params_format(params
)));
1002 switch (pcm512x
->fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1003 case SND_SOC_DAIFMT_CBS_CFS
:
1004 ret
= regmap_update_bits(pcm512x
->regmap
,
1005 PCM512x_BCLK_LRCLK_CFG
,
1007 | PCM512x_BCKO
| PCM512x_LRKO
,
1011 "Failed to enable slave mode: %d\n", ret
);
1015 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_ERROR_DETECT
,
1019 "Failed to enable clock divider autoset: %d\n",
1024 case SND_SOC_DAIFMT_CBM_CFM
:
1025 clock_output
= PCM512x_BCKO
| PCM512x_LRKO
;
1026 master_mode
= PCM512x_RLRK
| PCM512x_RBCK
;
1028 case SND_SOC_DAIFMT_CBM_CFS
:
1029 clock_output
= PCM512x_BCKO
;
1030 master_mode
= PCM512x_RBCK
;
1036 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_I2S_1
,
1037 PCM512x_ALEN
, alen
);
1039 dev_err(codec
->dev
, "Failed to set frame size: %d\n", ret
);
1043 if (pcm512x
->pll_out
) {
1044 ret
= regmap_write(pcm512x
->regmap
, PCM512x_FLEX_A
, 0x11);
1046 dev_err(codec
->dev
, "Failed to set FLEX_A: %d\n", ret
);
1050 ret
= regmap_write(pcm512x
->regmap
, PCM512x_FLEX_B
, 0xff);
1052 dev_err(codec
->dev
, "Failed to set FLEX_B: %d\n", ret
);
1056 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_ERROR_DETECT
,
1057 PCM512x_IDFS
| PCM512x_IDBK
1058 | PCM512x_IDSK
| PCM512x_IDCH
1059 | PCM512x_IDCM
| PCM512x_DCAS
1061 PCM512x_IDFS
| PCM512x_IDBK
1062 | PCM512x_IDSK
| PCM512x_IDCH
1066 "Failed to ignore auto-clock failures: %d\n",
1071 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_ERROR_DETECT
,
1072 PCM512x_IDFS
| PCM512x_IDBK
1073 | PCM512x_IDSK
| PCM512x_IDCH
1074 | PCM512x_IDCM
| PCM512x_DCAS
1076 PCM512x_IDFS
| PCM512x_IDBK
1077 | PCM512x_IDSK
| PCM512x_IDCH
1078 | PCM512x_DCAS
| PCM512x_IPLK
);
1081 "Failed to ignore auto-clock failures: %d\n",
1086 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_PLL_EN
,
1089 dev_err(codec
->dev
, "Failed to disable pll: %d\n", ret
);
1094 ret
= pcm512x_set_dividers(dai
, params
);
1098 if (pcm512x
->pll_out
) {
1099 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_PLL_REF
,
1100 PCM512x_SREF
, PCM512x_SREF_GPIO
);
1103 "Failed to set gpio as pllref: %d\n", ret
);
1107 gpio
= PCM512x_GREF_GPIO1
+ pcm512x
->pll_in
- 1;
1108 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_GPIO_PLLIN
,
1109 PCM512x_GREF
, gpio
);
1112 "Failed to set gpio %d as pllin: %d\n",
1113 pcm512x
->pll_in
, ret
);
1117 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_PLL_EN
,
1118 PCM512x_PLLE
, PCM512x_PLLE
);
1120 dev_err(codec
->dev
, "Failed to enable pll: %d\n", ret
);
1125 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_BCLK_LRCLK_CFG
,
1126 PCM512x_BCKP
| PCM512x_BCKO
| PCM512x_LRKO
,
1129 dev_err(codec
->dev
, "Failed to enable clock output: %d\n", ret
);
1133 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_MASTER_MODE
,
1134 PCM512x_RLRK
| PCM512x_RBCK
,
1137 dev_err(codec
->dev
, "Failed to enable master mode: %d\n", ret
);
1141 if (pcm512x
->pll_out
) {
1142 gpio
= PCM512x_G1OE
<< (pcm512x
->pll_out
- 1);
1143 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_GPIO_EN
,
1146 dev_err(codec
->dev
, "Failed to enable gpio %d: %d\n",
1147 pcm512x
->pll_out
, ret
);
1151 gpio
= PCM512x_GPIO_OUTPUT_1
+ pcm512x
->pll_out
- 1;
1152 ret
= regmap_update_bits(pcm512x
->regmap
, gpio
,
1153 PCM512x_GxSL
, PCM512x_GxSL_PLLCK
);
1155 dev_err(codec
->dev
, "Failed to output pll on %d: %d\n",
1156 ret
, pcm512x
->pll_out
);
1160 gpio
= PCM512x_G1OE
<< (4 - 1);
1161 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_GPIO_EN
,
1164 dev_err(codec
->dev
, "Failed to enable gpio %d: %d\n",
1169 gpio
= PCM512x_GPIO_OUTPUT_1
+ 4 - 1;
1170 ret
= regmap_update_bits(pcm512x
->regmap
, gpio
,
1171 PCM512x_GxSL
, PCM512x_GxSL_PLLLK
);
1174 "Failed to output pll lock on %d: %d\n",
1180 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_SYNCHRONIZE
,
1181 PCM512x_RQSY
, PCM512x_RQSY_HALT
);
1183 dev_err(codec
->dev
, "Failed to halt clocks: %d\n", ret
);
1187 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_SYNCHRONIZE
,
1188 PCM512x_RQSY
, PCM512x_RQSY_RESUME
);
1190 dev_err(codec
->dev
, "Failed to resume clocks: %d\n", ret
);
1197 static int pcm512x_set_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
1199 struct snd_soc_codec
*codec
= dai
->codec
;
1200 struct pcm512x_priv
*pcm512x
= snd_soc_codec_get_drvdata(codec
);
1207 static const struct snd_soc_dai_ops pcm512x_dai_ops
= {
1208 .startup
= pcm512x_dai_startup
,
1209 .hw_params
= pcm512x_hw_params
,
1210 .set_fmt
= pcm512x_set_fmt
,
1213 static struct snd_soc_dai_driver pcm512x_dai
= {
1214 .name
= "pcm512x-hifi",
1216 .stream_name
= "Playback",
1219 .rates
= SNDRV_PCM_RATE_CONTINUOUS
,
1222 .formats
= SNDRV_PCM_FMTBIT_S16_LE
|
1223 SNDRV_PCM_FMTBIT_S24_LE
|
1224 SNDRV_PCM_FMTBIT_S32_LE
1226 .ops
= &pcm512x_dai_ops
,
1229 static struct snd_soc_codec_driver pcm512x_codec_driver
= {
1230 .set_bias_level
= pcm512x_set_bias_level
,
1231 .idle_bias_off
= true,
1233 .controls
= pcm512x_controls
,
1234 .num_controls
= ARRAY_SIZE(pcm512x_controls
),
1235 .dapm_widgets
= pcm512x_dapm_widgets
,
1236 .num_dapm_widgets
= ARRAY_SIZE(pcm512x_dapm_widgets
),
1237 .dapm_routes
= pcm512x_dapm_routes
,
1238 .num_dapm_routes
= ARRAY_SIZE(pcm512x_dapm_routes
),
1241 static const struct regmap_range_cfg pcm512x_range
= {
1242 .name
= "Pages", .range_min
= PCM512x_VIRT_BASE
,
1243 .range_max
= PCM512x_MAX_REGISTER
,
1244 .selector_reg
= PCM512x_PAGE
,
1245 .selector_mask
= 0xff,
1246 .window_start
= 0, .window_len
= 0x100,
1249 const struct regmap_config pcm512x_regmap
= {
1253 .readable_reg
= pcm512x_readable
,
1254 .volatile_reg
= pcm512x_volatile
,
1256 .ranges
= &pcm512x_range
,
1259 .max_register
= PCM512x_MAX_REGISTER
,
1260 .reg_defaults
= pcm512x_reg_defaults
,
1261 .num_reg_defaults
= ARRAY_SIZE(pcm512x_reg_defaults
),
1262 .cache_type
= REGCACHE_RBTREE
,
1264 EXPORT_SYMBOL_GPL(pcm512x_regmap
);
1266 int pcm512x_probe(struct device
*dev
, struct regmap
*regmap
)
1268 struct pcm512x_priv
*pcm512x
;
1271 pcm512x
= devm_kzalloc(dev
, sizeof(struct pcm512x_priv
), GFP_KERNEL
);
1275 dev_set_drvdata(dev
, pcm512x
);
1276 pcm512x
->regmap
= regmap
;
1278 for (i
= 0; i
< ARRAY_SIZE(pcm512x
->supplies
); i
++)
1279 pcm512x
->supplies
[i
].supply
= pcm512x_supply_names
[i
];
1281 ret
= devm_regulator_bulk_get(dev
, ARRAY_SIZE(pcm512x
->supplies
),
1284 dev_err(dev
, "Failed to get supplies: %d\n", ret
);
1288 pcm512x
->supply_nb
[0].notifier_call
= pcm512x_regulator_event_0
;
1289 pcm512x
->supply_nb
[1].notifier_call
= pcm512x_regulator_event_1
;
1290 pcm512x
->supply_nb
[2].notifier_call
= pcm512x_regulator_event_2
;
1292 for (i
= 0; i
< ARRAY_SIZE(pcm512x
->supplies
); i
++) {
1293 ret
= regulator_register_notifier(pcm512x
->supplies
[i
].consumer
,
1294 &pcm512x
->supply_nb
[i
]);
1297 "Failed to register regulator notifier: %d\n",
1302 ret
= regulator_bulk_enable(ARRAY_SIZE(pcm512x
->supplies
),
1305 dev_err(dev
, "Failed to enable supplies: %d\n", ret
);
1309 /* Reset the device, verifying I/O in the process for I2C */
1310 ret
= regmap_write(regmap
, PCM512x_RESET
,
1311 PCM512x_RSTM
| PCM512x_RSTR
);
1313 dev_err(dev
, "Failed to reset device: %d\n", ret
);
1317 ret
= regmap_write(regmap
, PCM512x_RESET
, 0);
1319 dev_err(dev
, "Failed to reset device: %d\n", ret
);
1323 pcm512x
->sclk
= devm_clk_get(dev
, NULL
);
1324 if (PTR_ERR(pcm512x
->sclk
) == -EPROBE_DEFER
)
1325 return -EPROBE_DEFER
;
1326 if (!IS_ERR(pcm512x
->sclk
)) {
1327 ret
= clk_prepare_enable(pcm512x
->sclk
);
1329 dev_err(dev
, "Failed to enable SCLK: %d\n", ret
);
1334 /* Default to standby mode */
1335 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_POWER
,
1336 PCM512x_RQST
, PCM512x_RQST
);
1338 dev_err(dev
, "Failed to request standby: %d\n",
1343 pm_runtime_set_active(dev
);
1344 pm_runtime_enable(dev
);
1345 pm_runtime_idle(dev
);
1349 const struct device_node
*np
= dev
->of_node
;
1352 if (of_property_read_u32(np
, "pll-in", &val
) >= 0) {
1354 dev_err(dev
, "Invalid pll-in\n");
1358 pcm512x
->pll_in
= val
;
1361 if (of_property_read_u32(np
, "pll-out", &val
) >= 0) {
1363 dev_err(dev
, "Invalid pll-out\n");
1367 pcm512x
->pll_out
= val
;
1370 if (!pcm512x
->pll_in
!= !pcm512x
->pll_out
) {
1372 "Error: both pll-in and pll-out, or none\n");
1376 if (pcm512x
->pll_in
&& pcm512x
->pll_in
== pcm512x
->pll_out
) {
1377 dev_err(dev
, "Error: pll-in == pll-out\n");
1384 ret
= snd_soc_register_codec(dev
, &pcm512x_codec_driver
,
1387 dev_err(dev
, "Failed to register CODEC: %d\n", ret
);
1394 pm_runtime_disable(dev
);
1396 if (!IS_ERR(pcm512x
->sclk
))
1397 clk_disable_unprepare(pcm512x
->sclk
);
1399 regulator_bulk_disable(ARRAY_SIZE(pcm512x
->supplies
),
1403 EXPORT_SYMBOL_GPL(pcm512x_probe
);
1405 void pcm512x_remove(struct device
*dev
)
1407 struct pcm512x_priv
*pcm512x
= dev_get_drvdata(dev
);
1409 snd_soc_unregister_codec(dev
);
1410 pm_runtime_disable(dev
);
1411 if (!IS_ERR(pcm512x
->sclk
))
1412 clk_disable_unprepare(pcm512x
->sclk
);
1413 regulator_bulk_disable(ARRAY_SIZE(pcm512x
->supplies
),
1416 EXPORT_SYMBOL_GPL(pcm512x_remove
);
1419 static int pcm512x_suspend(struct device
*dev
)
1421 struct pcm512x_priv
*pcm512x
= dev_get_drvdata(dev
);
1424 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_POWER
,
1425 PCM512x_RQPD
, PCM512x_RQPD
);
1427 dev_err(dev
, "Failed to request power down: %d\n", ret
);
1431 ret
= regulator_bulk_disable(ARRAY_SIZE(pcm512x
->supplies
),
1434 dev_err(dev
, "Failed to disable supplies: %d\n", ret
);
1438 if (!IS_ERR(pcm512x
->sclk
))
1439 clk_disable_unprepare(pcm512x
->sclk
);
1444 static int pcm512x_resume(struct device
*dev
)
1446 struct pcm512x_priv
*pcm512x
= dev_get_drvdata(dev
);
1449 if (!IS_ERR(pcm512x
->sclk
)) {
1450 ret
= clk_prepare_enable(pcm512x
->sclk
);
1452 dev_err(dev
, "Failed to enable SCLK: %d\n", ret
);
1457 ret
= regulator_bulk_enable(ARRAY_SIZE(pcm512x
->supplies
),
1460 dev_err(dev
, "Failed to enable supplies: %d\n", ret
);
1464 regcache_cache_only(pcm512x
->regmap
, false);
1465 ret
= regcache_sync(pcm512x
->regmap
);
1467 dev_err(dev
, "Failed to sync cache: %d\n", ret
);
1471 ret
= regmap_update_bits(pcm512x
->regmap
, PCM512x_POWER
,
1474 dev_err(dev
, "Failed to remove power down: %d\n", ret
);
1482 const struct dev_pm_ops pcm512x_pm_ops
= {
1483 SET_RUNTIME_PM_OPS(pcm512x_suspend
, pcm512x_resume
, NULL
)
1485 EXPORT_SYMBOL_GPL(pcm512x_pm_ops
);
1487 MODULE_DESCRIPTION("ASoC PCM512x codec driver");
1488 MODULE_AUTHOR("Mark Brown <broonie@linaro.org>");
1489 MODULE_LICENSE("GPL v2");