2 * rt286.c -- RT286 ALSA SoC audio codec driver
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/dmi.h>
21 #include <linux/acpi.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <sound/jack.h>
30 #include <linux/workqueue.h>
31 #include <sound/rt286.h>
32 #include <sound/hda_verbs.h>
36 #define RT286_VENDOR_ID 0x10ec0286
39 struct regmap
*regmap
;
40 struct snd_soc_codec
*codec
;
41 struct rt286_platform_data pdata
;
42 struct i2c_client
*i2c
;
43 struct snd_soc_jack
*jack
;
44 struct delayed_work jack_detect_work
;
47 struct reg_default
*index_cache
;
50 static struct reg_default rt286_index_def
[] = {
72 #define INDEX_CACHE_SIZE ARRAY_SIZE(rt286_index_def)
74 static const struct reg_default rt286_reg
[] = {
75 { 0x00170500, 0x00000400 },
76 { 0x00220000, 0x00000031 },
77 { 0x00239000, 0x0000007f },
78 { 0x0023a000, 0x0000007f },
79 { 0x00270500, 0x00000400 },
80 { 0x00370500, 0x00000400 },
81 { 0x00870500, 0x00000400 },
82 { 0x00920000, 0x00000031 },
83 { 0x00935000, 0x000000c3 },
84 { 0x00936000, 0x000000c3 },
85 { 0x00970500, 0x00000400 },
86 { 0x00b37000, 0x00000097 },
87 { 0x00b37200, 0x00000097 },
88 { 0x00b37300, 0x00000097 },
89 { 0x00c37000, 0x00000000 },
90 { 0x00c37100, 0x00000080 },
91 { 0x01270500, 0x00000400 },
92 { 0x01370500, 0x00000400 },
93 { 0x01371f00, 0x411111f0 },
94 { 0x01439000, 0x00000080 },
95 { 0x0143a000, 0x00000080 },
96 { 0x01470700, 0x00000000 },
97 { 0x01470500, 0x00000400 },
98 { 0x01470c00, 0x00000000 },
99 { 0x01470100, 0x00000000 },
100 { 0x01837000, 0x00000000 },
101 { 0x01870500, 0x00000400 },
102 { 0x02050000, 0x00000000 },
103 { 0x02139000, 0x00000080 },
104 { 0x0213a000, 0x00000080 },
105 { 0x02170100, 0x00000000 },
106 { 0x02170500, 0x00000400 },
107 { 0x02170700, 0x00000000 },
108 { 0x02270100, 0x00000000 },
109 { 0x02370100, 0x00000000 },
110 { 0x01870700, 0x00000020 },
111 { 0x00830000, 0x000000c3 },
112 { 0x00930000, 0x000000c3 },
113 { 0x01270700, 0x00000000 },
116 static bool rt286_volatile_register(struct device
*dev
, unsigned int reg
)
120 case RT286_GET_PARAM(AC_NODE_ROOT
, AC_PAR_VENDOR_ID
):
121 case RT286_GET_HP_SENSE
:
122 case RT286_GET_MIC1_SENSE
:
123 case RT286_PROC_COEF
:
132 static bool rt286_readable_register(struct device
*dev
, unsigned int reg
)
136 case RT286_GET_PARAM(AC_NODE_ROOT
, AC_PAR_VENDOR_ID
):
137 case RT286_GET_HP_SENSE
:
138 case RT286_GET_MIC1_SENSE
:
139 case RT286_SET_AUDIO_POWER
:
140 case RT286_SET_HPO_POWER
:
141 case RT286_SET_SPK_POWER
:
142 case RT286_SET_DMIC1_POWER
:
148 case RT286_SET_PIN_HPO
:
149 case RT286_SET_PIN_SPK
:
150 case RT286_SET_PIN_DMIC1
:
152 case RT286_SET_AMP_GAIN_HPO
:
153 case RT286_SET_DMIC2_DEFAULT
:
154 case RT286_DACL_GAIN
:
155 case RT286_DACR_GAIN
:
156 case RT286_ADCL_GAIN
:
157 case RT286_ADCR_GAIN
:
159 case RT286_SPOL_GAIN
:
160 case RT286_SPOR_GAIN
:
161 case RT286_HPOL_GAIN
:
162 case RT286_HPOR_GAIN
:
163 case RT286_F_DAC_SWITCH
:
164 case RT286_F_RECMIX_SWITCH
:
165 case RT286_REC_MIC_SWITCH
:
166 case RT286_REC_I2S_SWITCH
:
167 case RT286_REC_LINE_SWITCH
:
168 case RT286_REC_BEEP_SWITCH
:
169 case RT286_DAC_FORMAT
:
170 case RT286_ADC_FORMAT
:
171 case RT286_COEF_INDEX
:
172 case RT286_PROC_COEF
:
173 case RT286_SET_AMP_GAIN_ADC_IN1
:
174 case RT286_SET_AMP_GAIN_ADC_IN2
:
175 case RT286_SET_POWER(RT286_DAC_OUT1
):
176 case RT286_SET_POWER(RT286_DAC_OUT2
):
177 case RT286_SET_POWER(RT286_ADC_IN1
):
178 case RT286_SET_POWER(RT286_ADC_IN2
):
179 case RT286_SET_POWER(RT286_DMIC2
):
180 case RT286_SET_POWER(RT286_MIC1
):
187 static int rt286_hw_write(void *context
, unsigned int reg
, unsigned int value
)
189 struct i2c_client
*client
= context
;
190 struct rt286_priv
*rt286
= i2c_get_clientdata(client
);
194 /* handle index registers */
196 rt286_hw_write(client
, RT286_COEF_INDEX
, reg
);
197 for (i
= 0; i
< INDEX_CACHE_SIZE
; i
++) {
198 if (reg
== rt286
->index_cache
[i
].reg
) {
199 rt286
->index_cache
[i
].def
= value
;
204 reg
= RT286_PROC_COEF
;
207 data
[0] = (reg
>> 24) & 0xff;
208 data
[1] = (reg
>> 16) & 0xff;
210 * 4 bit VID: reg should be 0
211 * 12 bit VID: value should be 0
212 * So we use an OR operator to handle it rather than use if condition.
214 data
[2] = ((reg
>> 8) & 0xff) | ((value
>> 8) & 0xff);
215 data
[3] = value
& 0xff;
217 ret
= i2c_master_send(client
, data
, 4);
222 pr_err("ret=%d\n", ret
);
229 static int rt286_hw_read(void *context
, unsigned int reg
, unsigned int *value
)
231 struct i2c_client
*client
= context
;
232 struct i2c_msg xfer
[2];
235 unsigned int index
, vid
, buf
= 0x0;
237 /* handle index registers */
239 rt286_hw_write(client
, RT286_COEF_INDEX
, reg
);
240 reg
= RT286_PROC_COEF
;
244 vid
= (reg
>> 8) & 0xfff;
246 if (AC_VERB_GET_AMP_GAIN_MUTE
== (vid
& 0xf00)) {
247 index
= (reg
>> 8) & 0xf;
248 reg
= (reg
& ~0xf0f) | index
;
250 be_reg
= cpu_to_be32(reg
);
253 xfer
[0].addr
= client
->addr
;
256 xfer
[0].buf
= (u8
*)&be_reg
;
259 xfer
[1].addr
= client
->addr
;
260 xfer
[1].flags
= I2C_M_RD
;
262 xfer
[1].buf
= (u8
*)&buf
;
264 ret
= i2c_transfer(client
->adapter
, xfer
, 2);
270 *value
= be32_to_cpu(buf
);
276 static void rt286_index_sync(struct snd_soc_codec
*codec
)
278 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(codec
);
281 for (i
= 0; i
< INDEX_CACHE_SIZE
; i
++) {
282 snd_soc_write(codec
, rt286
->index_cache
[i
].reg
,
283 rt286
->index_cache
[i
].def
);
288 static int rt286_support_power_controls
[] = {
299 #define RT286_POWER_REG_LEN ARRAY_SIZE(rt286_support_power_controls)
301 static int rt286_jack_detect(struct rt286_priv
*rt286
, bool *hp
, bool *mic
)
303 unsigned int val
, buf
;
308 if (rt286
->pdata
.cbj_en
) {
309 regmap_read(rt286
->regmap
, RT286_GET_HP_SENSE
, &buf
);
310 *hp
= buf
& 0x80000000;
312 /* power on HV,VERF */
313 regmap_update_bits(rt286
->regmap
,
314 RT286_DC_GAIN
, 0x200, 0x200);
316 snd_soc_dapm_force_enable_pin(&rt286
->codec
->dapm
,
318 snd_soc_dapm_force_enable_pin(&rt286
->codec
->dapm
,
321 snd_soc_dapm_force_enable_pin(&rt286
->codec
->dapm
,
323 snd_soc_dapm_sync(&rt286
->codec
->dapm
);
325 regmap_write(rt286
->regmap
, RT286_SET_MIC1
, 0x24);
328 regmap_update_bits(rt286
->regmap
,
329 RT286_CBJ_CTRL1
, 0xfcc0, 0xd400);
331 regmap_read(rt286
->regmap
, RT286_CBJ_CTRL2
, &val
);
333 if (0x0070 == (val
& 0x0070)) {
336 regmap_update_bits(rt286
->regmap
,
337 RT286_CBJ_CTRL1
, 0xfcc0, 0xe400);
339 regmap_read(rt286
->regmap
,
340 RT286_CBJ_CTRL2
, &val
);
341 if (0x0070 == (val
& 0x0070))
346 regmap_update_bits(rt286
->regmap
,
347 RT286_DC_GAIN
, 0x200, 0x0);
351 regmap_write(rt286
->regmap
, RT286_SET_MIC1
, 0x20);
354 regmap_read(rt286
->regmap
, RT286_GET_HP_SENSE
, &buf
);
355 *hp
= buf
& 0x80000000;
356 regmap_read(rt286
->regmap
, RT286_GET_MIC1_SENSE
, &buf
);
357 *mic
= buf
& 0x80000000;
360 snd_soc_dapm_disable_pin(&rt286
->codec
->dapm
, "HV");
361 snd_soc_dapm_disable_pin(&rt286
->codec
->dapm
, "VREF");
363 snd_soc_dapm_disable_pin(&rt286
->codec
->dapm
, "LDO1");
364 snd_soc_dapm_sync(&rt286
->codec
->dapm
);
369 static void rt286_jack_detect_work(struct work_struct
*work
)
371 struct rt286_priv
*rt286
=
372 container_of(work
, struct rt286_priv
, jack_detect_work
.work
);
377 rt286_jack_detect(rt286
, &hp
, &mic
);
380 status
|= SND_JACK_HEADPHONE
;
383 status
|= SND_JACK_MICROPHONE
;
385 snd_soc_jack_report(rt286
->jack
, status
,
386 SND_JACK_MICROPHONE
| SND_JACK_HEADPHONE
);
389 int rt286_mic_detect(struct snd_soc_codec
*codec
, struct snd_soc_jack
*jack
)
391 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(codec
);
395 /* Send an initial empty report */
396 snd_soc_jack_report(rt286
->jack
, 0,
397 SND_JACK_MICROPHONE
| SND_JACK_HEADPHONE
);
401 EXPORT_SYMBOL_GPL(rt286_mic_detect
);
403 static int is_mclk_mode(struct snd_soc_dapm_widget
*source
,
404 struct snd_soc_dapm_widget
*sink
)
406 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(source
->codec
);
408 if (rt286
->clk_id
== RT286_SCLK_S_MCLK
)
414 static const DECLARE_TLV_DB_SCALE(out_vol_tlv
, -6350, 50, 0);
415 static const DECLARE_TLV_DB_SCALE(mic_vol_tlv
, 0, 1000, 0);
417 static const struct snd_kcontrol_new rt286_snd_controls
[] = {
418 SOC_DOUBLE_R_TLV("DAC0 Playback Volume", RT286_DACL_GAIN
,
419 RT286_DACR_GAIN
, 0, 0x7f, 0, out_vol_tlv
),
420 SOC_DOUBLE_R_TLV("ADC0 Capture Volume", RT286_ADCL_GAIN
,
421 RT286_ADCR_GAIN
, 0, 0x7f, 0, out_vol_tlv
),
422 SOC_SINGLE_TLV("AMIC Volume", RT286_MIC_GAIN
,
423 0, 0x3, 0, mic_vol_tlv
),
424 SOC_DOUBLE_R("Speaker Playback Switch", RT286_SPOL_GAIN
,
425 RT286_SPOR_GAIN
, RT286_MUTE_SFT
, 1, 1),
429 static const struct snd_kcontrol_new rt286_front_mix
[] = {
430 SOC_DAPM_SINGLE("DAC Switch", RT286_F_DAC_SWITCH
,
431 RT286_MUTE_SFT
, 1, 1),
432 SOC_DAPM_SINGLE("RECMIX Switch", RT286_F_RECMIX_SWITCH
,
433 RT286_MUTE_SFT
, 1, 1),
436 /* Analog Input Mixer */
437 static const struct snd_kcontrol_new rt286_rec_mix
[] = {
438 SOC_DAPM_SINGLE("Mic1 Switch", RT286_REC_MIC_SWITCH
,
439 RT286_MUTE_SFT
, 1, 1),
440 SOC_DAPM_SINGLE("I2S Switch", RT286_REC_I2S_SWITCH
,
441 RT286_MUTE_SFT
, 1, 1),
442 SOC_DAPM_SINGLE("Line1 Switch", RT286_REC_LINE_SWITCH
,
443 RT286_MUTE_SFT
, 1, 1),
444 SOC_DAPM_SINGLE("Beep Switch", RT286_REC_BEEP_SWITCH
,
445 RT286_MUTE_SFT
, 1, 1),
448 static const struct snd_kcontrol_new spo_enable_control
=
449 SOC_DAPM_SINGLE("Switch", RT286_SET_PIN_SPK
,
450 RT286_SET_PIN_SFT
, 1, 0);
452 static const struct snd_kcontrol_new hpol_enable_control
=
453 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOL_GAIN
,
454 RT286_MUTE_SFT
, 1, 1);
456 static const struct snd_kcontrol_new hpor_enable_control
=
457 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT286_HPOR_GAIN
,
458 RT286_MUTE_SFT
, 1, 1);
461 static const char * const rt286_adc_src
[] = {
462 "Mic", "RECMIX", "Dmic"
465 static const int rt286_adc_values
[] = {
469 static SOC_VALUE_ENUM_SINGLE_DECL(
470 rt286_adc0_enum
, RT286_ADC0_MUX
, RT286_ADC_SEL_SFT
,
471 RT286_ADC_SEL_MASK
, rt286_adc_src
, rt286_adc_values
);
473 static const struct snd_kcontrol_new rt286_adc0_mux
=
474 SOC_DAPM_ENUM("ADC 0 source", rt286_adc0_enum
);
476 static SOC_VALUE_ENUM_SINGLE_DECL(
477 rt286_adc1_enum
, RT286_ADC1_MUX
, RT286_ADC_SEL_SFT
,
478 RT286_ADC_SEL_MASK
, rt286_adc_src
, rt286_adc_values
);
480 static const struct snd_kcontrol_new rt286_adc1_mux
=
481 SOC_DAPM_ENUM("ADC 1 source", rt286_adc1_enum
);
483 static const char * const rt286_dac_src
[] = {
487 static SOC_ENUM_SINGLE_DECL(rt286_hpo_enum
, RT286_HPO_MUX
,
490 static const struct snd_kcontrol_new rt286_hpo_mux
=
491 SOC_DAPM_ENUM("HPO source", rt286_hpo_enum
);
494 static SOC_ENUM_SINGLE_DECL(rt286_spo_enum
, RT286_SPK_MUX
,
497 static const struct snd_kcontrol_new rt286_spo_mux
=
498 SOC_DAPM_ENUM("SPO source", rt286_spo_enum
);
500 static int rt286_spk_event(struct snd_soc_dapm_widget
*w
,
501 struct snd_kcontrol
*kcontrol
, int event
)
503 struct snd_soc_codec
*codec
= w
->codec
;
506 case SND_SOC_DAPM_POST_PMU
:
508 RT286_SPK_EAPD
, RT286_SET_EAPD_HIGH
);
510 case SND_SOC_DAPM_PRE_PMD
:
512 RT286_SPK_EAPD
, RT286_SET_EAPD_LOW
);
522 static int rt286_set_dmic1_event(struct snd_soc_dapm_widget
*w
,
523 struct snd_kcontrol
*kcontrol
, int event
)
525 struct snd_soc_codec
*codec
= w
->codec
;
528 case SND_SOC_DAPM_POST_PMU
:
529 snd_soc_write(codec
, RT286_SET_PIN_DMIC1
, 0x20);
531 case SND_SOC_DAPM_PRE_PMD
:
532 snd_soc_write(codec
, RT286_SET_PIN_DMIC1
, 0);
541 static int rt286_adc_event(struct snd_soc_dapm_widget
*w
,
542 struct snd_kcontrol
*kcontrol
, int event
)
544 struct snd_soc_codec
*codec
= w
->codec
;
547 nid
= (w
->reg
>> 20) & 0xff;
550 case SND_SOC_DAPM_POST_PMU
:
551 snd_soc_update_bits(codec
,
552 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE
, nid
, 0),
555 case SND_SOC_DAPM_PRE_PMD
:
556 snd_soc_update_bits(codec
,
557 VERB_CMD(AC_VERB_SET_AMP_GAIN_MUTE
, nid
, 0),
567 static int rt286_vref_event(struct snd_soc_dapm_widget
*w
,
568 struct snd_kcontrol
*kcontrol
, int event
)
570 struct snd_soc_codec
*codec
= w
->codec
;
573 case SND_SOC_DAPM_PRE_PMU
:
574 snd_soc_update_bits(codec
,
575 RT286_CBJ_CTRL1
, 0x0400, 0x0000);
585 static int rt286_ldo2_event(struct snd_soc_dapm_widget
*w
,
586 struct snd_kcontrol
*kcontrol
, int event
)
588 struct snd_soc_codec
*codec
= w
->codec
;
591 case SND_SOC_DAPM_POST_PMU
:
592 snd_soc_update_bits(codec
, RT286_POWER_CTRL2
, 0x38, 0x08);
594 case SND_SOC_DAPM_PRE_PMD
:
595 snd_soc_update_bits(codec
, RT286_POWER_CTRL2
, 0x38, 0x30);
604 static int rt286_mic1_event(struct snd_soc_dapm_widget
*w
,
605 struct snd_kcontrol
*kcontrol
, int event
)
607 struct snd_soc_codec
*codec
= w
->codec
;
610 case SND_SOC_DAPM_PRE_PMU
:
611 snd_soc_update_bits(codec
,
612 RT286_A_BIAS_CTRL3
, 0xc000, 0x8000);
613 snd_soc_update_bits(codec
,
614 RT286_A_BIAS_CTRL2
, 0xc000, 0x8000);
616 case SND_SOC_DAPM_POST_PMD
:
617 snd_soc_update_bits(codec
,
618 RT286_A_BIAS_CTRL3
, 0xc000, 0x0000);
619 snd_soc_update_bits(codec
,
620 RT286_A_BIAS_CTRL2
, 0xc000, 0x0000);
629 static const struct snd_soc_dapm_widget rt286_dapm_widgets
[] = {
630 SND_SOC_DAPM_SUPPLY_S("HV", 1, RT286_POWER_CTRL1
,
632 SND_SOC_DAPM_SUPPLY("VREF", RT286_POWER_CTRL1
,
633 0, 1, rt286_vref_event
, SND_SOC_DAPM_PRE_PMU
),
634 SND_SOC_DAPM_SUPPLY_S("LDO1", 1, RT286_POWER_CTRL2
,
636 SND_SOC_DAPM_SUPPLY_S("LDO2", 2, RT286_POWER_CTRL1
,
637 13, 1, rt286_ldo2_event
, SND_SOC_DAPM_PRE_PMD
|
638 SND_SOC_DAPM_POST_PMU
),
639 SND_SOC_DAPM_SUPPLY("MCLK MODE", RT286_PLL_CTRL1
,
641 SND_SOC_DAPM_SUPPLY("MIC1 Input Buffer", SND_SOC_NOPM
,
642 0, 0, rt286_mic1_event
, SND_SOC_DAPM_PRE_PMU
|
643 SND_SOC_DAPM_POST_PMD
),
646 SND_SOC_DAPM_INPUT("DMIC1 Pin"),
647 SND_SOC_DAPM_INPUT("DMIC2 Pin"),
648 SND_SOC_DAPM_INPUT("MIC1"),
649 SND_SOC_DAPM_INPUT("LINE1"),
650 SND_SOC_DAPM_INPUT("Beep"),
653 SND_SOC_DAPM_PGA_E("DMIC1", RT286_SET_POWER(RT286_DMIC1
), 0, 1,
654 NULL
, 0, rt286_set_dmic1_event
,
655 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
656 SND_SOC_DAPM_PGA("DMIC2", RT286_SET_POWER(RT286_DMIC2
), 0, 1,
658 SND_SOC_DAPM_SUPPLY("DMIC Receiver", SND_SOC_NOPM
,
662 SND_SOC_DAPM_MIXER("RECMIX", SND_SOC_NOPM
, 0, 0,
663 rt286_rec_mix
, ARRAY_SIZE(rt286_rec_mix
)),
666 SND_SOC_DAPM_ADC("ADC 0", NULL
, SND_SOC_NOPM
, 0, 0),
667 SND_SOC_DAPM_ADC("ADC 1", NULL
, SND_SOC_NOPM
, 0, 0),
670 SND_SOC_DAPM_MUX_E("ADC 0 Mux", RT286_SET_POWER(RT286_ADC_IN1
), 0, 1,
671 &rt286_adc0_mux
, rt286_adc_event
, SND_SOC_DAPM_PRE_PMD
|
672 SND_SOC_DAPM_POST_PMU
),
673 SND_SOC_DAPM_MUX_E("ADC 1 Mux", RT286_SET_POWER(RT286_ADC_IN2
), 0, 1,
674 &rt286_adc1_mux
, rt286_adc_event
, SND_SOC_DAPM_PRE_PMD
|
675 SND_SOC_DAPM_POST_PMU
),
677 /* Audio Interface */
678 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM
, 0, 0),
679 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM
, 0, 0),
680 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM
, 0, 0),
681 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM
, 0, 0),
685 SND_SOC_DAPM_DAC("DAC 0", NULL
, SND_SOC_NOPM
, 0, 0),
686 SND_SOC_DAPM_DAC("DAC 1", NULL
, SND_SOC_NOPM
, 0, 0),
689 SND_SOC_DAPM_MUX("SPK Mux", SND_SOC_NOPM
, 0, 0, &rt286_spo_mux
),
690 SND_SOC_DAPM_MUX("HPO Mux", SND_SOC_NOPM
, 0, 0, &rt286_hpo_mux
),
692 SND_SOC_DAPM_SUPPLY("HP Power", RT286_SET_PIN_HPO
,
693 RT286_SET_PIN_SFT
, 0, NULL
, 0),
696 SND_SOC_DAPM_MIXER("Front", RT286_SET_POWER(RT286_DAC_OUT1
), 0, 1,
697 rt286_front_mix
, ARRAY_SIZE(rt286_front_mix
)),
698 SND_SOC_DAPM_PGA("Surround", RT286_SET_POWER(RT286_DAC_OUT2
), 0, 1,
702 SND_SOC_DAPM_SWITCH_E("SPO", SND_SOC_NOPM
, 0, 0,
703 &spo_enable_control
, rt286_spk_event
,
704 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
705 SND_SOC_DAPM_SWITCH("HPO L", SND_SOC_NOPM
, 0, 0,
706 &hpol_enable_control
),
707 SND_SOC_DAPM_SWITCH("HPO R", SND_SOC_NOPM
, 0, 0,
708 &hpor_enable_control
),
711 SND_SOC_DAPM_OUTPUT("SPOL"),
712 SND_SOC_DAPM_OUTPUT("SPOR"),
713 SND_SOC_DAPM_OUTPUT("HPO Pin"),
714 SND_SOC_DAPM_OUTPUT("SPDIF"),
717 static const struct snd_soc_dapm_route rt286_dapm_routes
[] = {
718 {"ADC 0", NULL
, "MCLK MODE", is_mclk_mode
},
719 {"ADC 1", NULL
, "MCLK MODE", is_mclk_mode
},
720 {"Front", NULL
, "MCLK MODE", is_mclk_mode
},
721 {"Surround", NULL
, "MCLK MODE", is_mclk_mode
},
723 {"HP Power", NULL
, "LDO1"},
724 {"HP Power", NULL
, "LDO2"},
726 {"MIC1", NULL
, "LDO1"},
727 {"MIC1", NULL
, "LDO2"},
728 {"MIC1", NULL
, "HV"},
729 {"MIC1", NULL
, "VREF"},
730 {"MIC1", NULL
, "MIC1 Input Buffer"},
732 {"SPO", NULL
, "LDO1"},
733 {"SPO", NULL
, "LDO2"},
735 {"SPO", NULL
, "VREF"},
737 {"DMIC1", NULL
, "DMIC1 Pin"},
738 {"DMIC2", NULL
, "DMIC2 Pin"},
739 {"DMIC1", NULL
, "DMIC Receiver"},
740 {"DMIC2", NULL
, "DMIC Receiver"},
742 {"RECMIX", "Beep Switch", "Beep"},
743 {"RECMIX", "Line1 Switch", "LINE1"},
744 {"RECMIX", "Mic1 Switch", "MIC1"},
746 {"ADC 0 Mux", "Dmic", "DMIC1"},
747 {"ADC 0 Mux", "RECMIX", "RECMIX"},
748 {"ADC 0 Mux", "Mic", "MIC1"},
749 {"ADC 1 Mux", "Dmic", "DMIC2"},
750 {"ADC 1 Mux", "RECMIX", "RECMIX"},
751 {"ADC 1 Mux", "Mic", "MIC1"},
753 {"ADC 0", NULL
, "ADC 0 Mux"},
754 {"ADC 1", NULL
, "ADC 1 Mux"},
756 {"AIF1TX", NULL
, "ADC 0"},
757 {"AIF2TX", NULL
, "ADC 1"},
759 {"DAC 0", NULL
, "AIF1RX"},
760 {"DAC 1", NULL
, "AIF2RX"},
762 {"Front", "DAC Switch", "DAC 0"},
763 {"Front", "RECMIX Switch", "RECMIX"},
765 {"Surround", NULL
, "DAC 1"},
767 {"SPK Mux", "Front", "Front"},
768 {"SPK Mux", "Surround", "Surround"},
770 {"HPO Mux", "Front", "Front"},
771 {"HPO Mux", "Surround", "Surround"},
773 {"SPO", "Switch", "SPK Mux"},
774 {"HPO L", "Switch", "HPO Mux"},
775 {"HPO R", "Switch", "HPO Mux"},
776 {"HPO L", NULL
, "HP Power"},
777 {"HPO R", NULL
, "HP Power"},
779 {"SPOL", NULL
, "SPO"},
780 {"SPOR", NULL
, "SPO"},
781 {"HPO Pin", NULL
, "HPO L"},
782 {"HPO Pin", NULL
, "HPO R"},
785 static int rt286_hw_params(struct snd_pcm_substream
*substream
,
786 struct snd_pcm_hw_params
*params
,
787 struct snd_soc_dai
*dai
)
789 struct snd_soc_codec
*codec
= dai
->codec
;
790 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(codec
);
791 unsigned int val
= 0;
794 switch (params_rate(params
)) {
795 /* bit 14 0:48K 1:44.1K */
802 dev_err(codec
->dev
, "Unsupported sample rate %d\n",
803 params_rate(params
));
806 switch (rt286
->sys_clk
) {
809 if (params_rate(params
) != 48000) {
810 dev_err(codec
->dev
, "Sys_clk is not matched (%d %d)\n",
811 params_rate(params
), rt286
->sys_clk
);
817 if (params_rate(params
) != 44100) {
818 dev_err(codec
->dev
, "Sys_clk is not matched (%d %d)\n",
819 params_rate(params
), rt286
->sys_clk
);
825 if (params_channels(params
) <= 16) {
826 /* bit 3:0 Number of Channel */
827 val
|= (params_channels(params
) - 1);
829 dev_err(codec
->dev
, "Unsupported channels %d\n",
830 params_channels(params
));
835 switch (params_width(params
)) {
836 /* bit 6:4 Bits per Sample */
860 snd_soc_update_bits(codec
,
861 RT286_I2S_CTRL1
, 0x0018, d_len_code
<< 3);
862 dev_dbg(codec
->dev
, "format val = 0x%x\n", val
);
864 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
865 snd_soc_update_bits(codec
, RT286_DAC_FORMAT
, 0x407f, val
);
867 snd_soc_update_bits(codec
, RT286_ADC_FORMAT
, 0x407f, val
);
872 static int rt286_set_dai_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
874 struct snd_soc_codec
*codec
= dai
->codec
;
876 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
877 case SND_SOC_DAIFMT_CBM_CFM
:
878 snd_soc_update_bits(codec
,
879 RT286_I2S_CTRL1
, 0x800, 0x800);
881 case SND_SOC_DAIFMT_CBS_CFS
:
882 snd_soc_update_bits(codec
,
883 RT286_I2S_CTRL1
, 0x800, 0x0);
889 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
890 case SND_SOC_DAIFMT_I2S
:
891 snd_soc_update_bits(codec
,
892 RT286_I2S_CTRL1
, 0x300, 0x0);
894 case SND_SOC_DAIFMT_LEFT_J
:
895 snd_soc_update_bits(codec
,
896 RT286_I2S_CTRL1
, 0x300, 0x1 << 8);
898 case SND_SOC_DAIFMT_DSP_A
:
899 snd_soc_update_bits(codec
,
900 RT286_I2S_CTRL1
, 0x300, 0x2 << 8);
902 case SND_SOC_DAIFMT_DSP_B
:
903 snd_soc_update_bits(codec
,
904 RT286_I2S_CTRL1
, 0x300, 0x3 << 8);
909 /* bit 15 Stream Type 0:PCM 1:Non-PCM */
910 snd_soc_update_bits(codec
, RT286_DAC_FORMAT
, 0x8000, 0);
911 snd_soc_update_bits(codec
, RT286_ADC_FORMAT
, 0x8000, 0);
916 static int rt286_set_dai_sysclk(struct snd_soc_dai
*dai
,
917 int clk_id
, unsigned int freq
, int dir
)
919 struct snd_soc_codec
*codec
= dai
->codec
;
920 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(codec
);
922 dev_dbg(codec
->dev
, "%s freq=%d\n", __func__
, freq
);
924 if (RT286_SCLK_S_MCLK
== clk_id
) {
925 snd_soc_update_bits(codec
,
926 RT286_I2S_CTRL2
, 0x0100, 0x0);
927 snd_soc_update_bits(codec
,
928 RT286_PLL_CTRL1
, 0x20, 0x20);
930 snd_soc_update_bits(codec
,
931 RT286_I2S_CTRL2
, 0x0100, 0x0100);
932 snd_soc_update_bits(codec
,
933 RT286_PLL_CTRL
, 0x4, 0x4);
934 snd_soc_update_bits(codec
,
935 RT286_PLL_CTRL1
, 0x20, 0x0);
940 if (RT286_SCLK_S_MCLK
== clk_id
) {
941 dev_err(codec
->dev
, "Should not use MCLK\n");
944 snd_soc_update_bits(codec
,
945 RT286_I2S_CTRL2
, 0x40, 0x40);
948 if (RT286_SCLK_S_MCLK
== clk_id
) {
949 dev_err(codec
->dev
, "Should not use MCLK\n");
952 snd_soc_update_bits(codec
,
953 RT286_I2S_CTRL2
, 0x40, 0x0);
957 snd_soc_update_bits(codec
,
958 RT286_I2S_CTRL2
, 0x8, 0x0);
959 snd_soc_update_bits(codec
,
960 RT286_CLK_DIV
, 0xfc1e, 0x0004);
964 snd_soc_update_bits(codec
,
965 RT286_I2S_CTRL2
, 0x8, 0x8);
966 snd_soc_update_bits(codec
,
967 RT286_CLK_DIV
, 0xfc1e, 0x5406);
970 dev_err(codec
->dev
, "Unsupported system clock\n");
974 rt286
->sys_clk
= freq
;
975 rt286
->clk_id
= clk_id
;
980 static int rt286_set_bclk_ratio(struct snd_soc_dai
*dai
, unsigned int ratio
)
982 struct snd_soc_codec
*codec
= dai
->codec
;
984 dev_dbg(codec
->dev
, "%s ratio=%d\n", __func__
, ratio
);
986 snd_soc_update_bits(codec
,
987 RT286_I2S_CTRL1
, 0x1000, 0x1000);
989 snd_soc_update_bits(codec
,
990 RT286_I2S_CTRL1
, 0x1000, 0x0);
996 static int rt286_set_bias_level(struct snd_soc_codec
*codec
,
997 enum snd_soc_bias_level level
)
1000 case SND_SOC_BIAS_PREPARE
:
1001 if (SND_SOC_BIAS_STANDBY
== codec
->dapm
.bias_level
) {
1002 snd_soc_write(codec
,
1003 RT286_SET_AUDIO_POWER
, AC_PWRST_D0
);
1004 snd_soc_update_bits(codec
,
1005 RT286_DC_GAIN
, 0x200, 0x200);
1009 case SND_SOC_BIAS_ON
:
1011 snd_soc_update_bits(codec
,
1012 RT286_CBJ_CTRL1
, 0x0400, 0x0400);
1013 snd_soc_update_bits(codec
,
1014 RT286_DC_GAIN
, 0x200, 0x0);
1018 case SND_SOC_BIAS_STANDBY
:
1019 snd_soc_write(codec
,
1020 RT286_SET_AUDIO_POWER
, AC_PWRST_D3
);
1021 snd_soc_update_bits(codec
,
1022 RT286_CBJ_CTRL1
, 0x0400, 0x0000);
1028 codec
->dapm
.bias_level
= level
;
1033 static irqreturn_t
rt286_irq(int irq
, void *data
)
1035 struct rt286_priv
*rt286
= data
;
1040 rt286_jack_detect(rt286
, &hp
, &mic
);
1043 regmap_update_bits(rt286
->regmap
, RT286_IRQ_CTRL
, 0x1, 0x1);
1046 status
|= SND_JACK_HEADPHONE
;
1049 status
|= SND_JACK_MICROPHONE
;
1051 snd_soc_jack_report(rt286
->jack
, status
,
1052 SND_JACK_MICROPHONE
| SND_JACK_HEADPHONE
);
1054 pm_wakeup_event(&rt286
->i2c
->dev
, 300);
1059 static int rt286_probe(struct snd_soc_codec
*codec
)
1061 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(codec
);
1063 rt286
->codec
= codec
;
1064 codec
->dapm
.bias_level
= SND_SOC_BIAS_OFF
;
1066 if (rt286
->i2c
->irq
) {
1067 regmap_update_bits(rt286
->regmap
,
1068 RT286_IRQ_CTRL
, 0x2, 0x2);
1070 INIT_DELAYED_WORK(&rt286
->jack_detect_work
,
1071 rt286_jack_detect_work
);
1072 schedule_delayed_work(&rt286
->jack_detect_work
,
1073 msecs_to_jiffies(1250));
1079 static int rt286_remove(struct snd_soc_codec
*codec
)
1081 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(codec
);
1083 cancel_delayed_work_sync(&rt286
->jack_detect_work
);
1089 static int rt286_suspend(struct snd_soc_codec
*codec
)
1091 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(codec
);
1093 regcache_cache_only(rt286
->regmap
, true);
1094 regcache_mark_dirty(rt286
->regmap
);
1099 static int rt286_resume(struct snd_soc_codec
*codec
)
1101 struct rt286_priv
*rt286
= snd_soc_codec_get_drvdata(codec
);
1103 regcache_cache_only(rt286
->regmap
, false);
1104 rt286_index_sync(codec
);
1105 regcache_sync(rt286
->regmap
);
1110 #define rt286_suspend NULL
1111 #define rt286_resume NULL
1114 #define RT286_STEREO_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
1115 #define RT286_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1116 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1118 static const struct snd_soc_dai_ops rt286_aif_dai_ops
= {
1119 .hw_params
= rt286_hw_params
,
1120 .set_fmt
= rt286_set_dai_fmt
,
1121 .set_sysclk
= rt286_set_dai_sysclk
,
1122 .set_bclk_ratio
= rt286_set_bclk_ratio
,
1125 static struct snd_soc_dai_driver rt286_dai
[] = {
1127 .name
= "rt286-aif1",
1130 .stream_name
= "AIF1 Playback",
1133 .rates
= RT286_STEREO_RATES
,
1134 .formats
= RT286_FORMATS
,
1137 .stream_name
= "AIF1 Capture",
1140 .rates
= RT286_STEREO_RATES
,
1141 .formats
= RT286_FORMATS
,
1143 .ops
= &rt286_aif_dai_ops
,
1144 .symmetric_rates
= 1,
1147 .name
= "rt286-aif2",
1150 .stream_name
= "AIF2 Playback",
1153 .rates
= RT286_STEREO_RATES
,
1154 .formats
= RT286_FORMATS
,
1157 .stream_name
= "AIF2 Capture",
1160 .rates
= RT286_STEREO_RATES
,
1161 .formats
= RT286_FORMATS
,
1163 .ops
= &rt286_aif_dai_ops
,
1164 .symmetric_rates
= 1,
1169 static struct snd_soc_codec_driver soc_codec_dev_rt286
= {
1170 .probe
= rt286_probe
,
1171 .remove
= rt286_remove
,
1172 .suspend
= rt286_suspend
,
1173 .resume
= rt286_resume
,
1174 .set_bias_level
= rt286_set_bias_level
,
1175 .idle_bias_off
= true,
1176 .controls
= rt286_snd_controls
,
1177 .num_controls
= ARRAY_SIZE(rt286_snd_controls
),
1178 .dapm_widgets
= rt286_dapm_widgets
,
1179 .num_dapm_widgets
= ARRAY_SIZE(rt286_dapm_widgets
),
1180 .dapm_routes
= rt286_dapm_routes
,
1181 .num_dapm_routes
= ARRAY_SIZE(rt286_dapm_routes
),
1184 static const struct regmap_config rt286_regmap
= {
1187 .max_register
= 0x02370100,
1188 .volatile_reg
= rt286_volatile_register
,
1189 .readable_reg
= rt286_readable_register
,
1190 .reg_write
= rt286_hw_write
,
1191 .reg_read
= rt286_hw_read
,
1192 .cache_type
= REGCACHE_RBTREE
,
1193 .reg_defaults
= rt286_reg
,
1194 .num_reg_defaults
= ARRAY_SIZE(rt286_reg
),
1197 static const struct i2c_device_id rt286_i2c_id
[] = {
1201 MODULE_DEVICE_TABLE(i2c
, rt286_i2c_id
);
1203 static const struct acpi_device_id rt286_acpi_match
[] = {
1207 MODULE_DEVICE_TABLE(acpi
, rt286_acpi_match
);
1209 static struct dmi_system_id force_combo_jack_table
[] = {
1211 .ident
= "Intel Wilson Beach",
1213 DMI_MATCH(DMI_BOARD_NAME
, "Wilson Beach SDS")
1219 static int rt286_i2c_probe(struct i2c_client
*i2c
,
1220 const struct i2c_device_id
*id
)
1222 struct rt286_platform_data
*pdata
= dev_get_platdata(&i2c
->dev
);
1223 struct rt286_priv
*rt286
;
1226 rt286
= devm_kzalloc(&i2c
->dev
, sizeof(*rt286
),
1231 rt286
->regmap
= devm_regmap_init(&i2c
->dev
, NULL
, i2c
, &rt286_regmap
);
1232 if (IS_ERR(rt286
->regmap
)) {
1233 ret
= PTR_ERR(rt286
->regmap
);
1234 dev_err(&i2c
->dev
, "Failed to allocate register map: %d\n",
1239 regmap_read(rt286
->regmap
,
1240 RT286_GET_PARAM(AC_NODE_ROOT
, AC_PAR_VENDOR_ID
), &ret
);
1241 if (ret
!= RT286_VENDOR_ID
) {
1243 "Device with ID register %x is not rt286\n", ret
);
1247 rt286
->index_cache
= rt286_index_def
;
1249 i2c_set_clientdata(i2c
, rt286
);
1252 rt286
->pdata
= *pdata
;
1254 if (dmi_check_system(force_combo_jack_table
))
1255 rt286
->pdata
.cbj_en
= true;
1257 regmap_write(rt286
->regmap
, RT286_SET_AUDIO_POWER
, AC_PWRST_D3
);
1259 for (i
= 0; i
< RT286_POWER_REG_LEN
; i
++)
1260 regmap_write(rt286
->regmap
,
1261 RT286_SET_POWER(rt286_support_power_controls
[i
]),
1264 if (!rt286
->pdata
.cbj_en
) {
1265 regmap_write(rt286
->regmap
, RT286_CBJ_CTRL2
, 0x0000);
1266 regmap_write(rt286
->regmap
, RT286_MIC1_DET_CTRL
, 0x0816);
1267 regmap_update_bits(rt286
->regmap
,
1268 RT286_CBJ_CTRL1
, 0xf000, 0xb000);
1270 regmap_update_bits(rt286
->regmap
,
1271 RT286_CBJ_CTRL1
, 0xf000, 0x5000);
1276 if (!rt286
->pdata
.gpio2_en
)
1277 regmap_write(rt286
->regmap
, RT286_SET_DMIC2_DEFAULT
, 0x4000);
1279 regmap_write(rt286
->regmap
, RT286_SET_DMIC2_DEFAULT
, 0);
1283 regmap_write(rt286
->regmap
, RT286_MISC_CTRL1
, 0x0000);
1284 /* Power down LDO, VREF */
1285 regmap_update_bits(rt286
->regmap
, RT286_POWER_CTRL2
, 0xc, 0x0);
1286 regmap_update_bits(rt286
->regmap
, RT286_POWER_CTRL1
, 0x1001, 0x1001);
1288 /* Set depop parameter */
1289 regmap_update_bits(rt286
->regmap
, RT286_DEPOP_CTRL2
, 0x403a, 0x401a);
1290 regmap_update_bits(rt286
->regmap
, RT286_DEPOP_CTRL3
, 0xf777, 0x4737);
1291 regmap_update_bits(rt286
->regmap
, RT286_DEPOP_CTRL4
, 0x00ff, 0x003f);
1293 if (rt286
->i2c
->irq
) {
1294 ret
= request_threaded_irq(rt286
->i2c
->irq
, NULL
, rt286_irq
,
1295 IRQF_TRIGGER_HIGH
| IRQF_ONESHOT
, "rt286", rt286
);
1298 "Failed to reguest IRQ: %d\n", ret
);
1303 ret
= snd_soc_register_codec(&i2c
->dev
, &soc_codec_dev_rt286
,
1304 rt286_dai
, ARRAY_SIZE(rt286_dai
));
1309 static int rt286_i2c_remove(struct i2c_client
*i2c
)
1311 struct rt286_priv
*rt286
= i2c_get_clientdata(i2c
);
1314 free_irq(i2c
->irq
, rt286
);
1315 snd_soc_unregister_codec(&i2c
->dev
);
1321 static struct i2c_driver rt286_i2c_driver
= {
1324 .owner
= THIS_MODULE
,
1325 .acpi_match_table
= ACPI_PTR(rt286_acpi_match
),
1327 .probe
= rt286_i2c_probe
,
1328 .remove
= rt286_i2c_remove
,
1329 .id_table
= rt286_i2c_id
,
1332 module_i2c_driver(rt286_i2c_driver
);
1334 MODULE_DESCRIPTION("ASoC RT286 driver");
1335 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
1336 MODULE_LICENSE("GPL");