projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
Merge branches 'fixes' and 'misc' into for-next
[deliverable/linux.git] / sound / soc / codecs / rt5640.c
1 /*
2 * rt5640.c -- RT5640 ALSA SoC audio codec driver
3 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/gpio.h>
19 #include <linux/i2c.h>
20 #include <linux/regmap.h>
21 #include <linux/of_gpio.h>
22 #include <linux/platform_device.h>
23 #include <linux/spi/spi.h>
24 #include <linux/acpi.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/soc.h>
29 #include <sound/soc-dapm.h>
30 #include <sound/initval.h>
31 #include <sound/tlv.h>
32
33 #include "rt5640.h"
34
35 #define RT5640_DEVICE_ID 0x6231
36
37 #define RT5640_PR_RANGE_BASE (0xff + 1)
38 #define RT5640_PR_SPACING 0x100
39
40 #define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
41
42 static const struct regmap_range_cfg rt5640_ranges[] = {
43 { .name = "PR", .range_min = RT5640_PR_BASE,
44 .range_max = RT5640_PR_BASE + 0xb4,
45 .selector_reg = RT5640_PRIV_INDEX,
46 .selector_mask = 0xff,
47 .selector_shift = 0x0,
48 .window_start = RT5640_PRIV_DATA,
49 .window_len = 0x1, },
50 };
51
52 static struct reg_default init_list[] = {
53 {RT5640_PR_BASE + 0x3d, 0x3600},
54 {RT5640_PR_BASE + 0x12, 0x0aa8},
55 {RT5640_PR_BASE + 0x14, 0x0aaa},
56 {RT5640_PR_BASE + 0x20, 0x6110},
57 {RT5640_PR_BASE + 0x21, 0xe0e0},
58 {RT5640_PR_BASE + 0x23, 0x1804},
59 };
60 #define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
61
62 static const struct reg_default rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
63 { 0x00, 0x000e },
64 { 0x01, 0xc8c8 },
65 { 0x02, 0xc8c8 },
66 { 0x03, 0xc8c8 },
67 { 0x04, 0x8000 },
68 { 0x0d, 0x0000 },
69 { 0x0e, 0x0000 },
70 { 0x0f, 0x0808 },
71 { 0x19, 0xafaf },
72 { 0x1a, 0xafaf },
73 { 0x1b, 0x0000 },
74 { 0x1c, 0x2f2f },
75 { 0x1d, 0x2f2f },
76 { 0x1e, 0x0000 },
77 { 0x27, 0x7060 },
78 { 0x28, 0x7070 },
79 { 0x29, 0x8080 },
80 { 0x2a, 0x5454 },
81 { 0x2b, 0x5454 },
82 { 0x2c, 0xaa00 },
83 { 0x2d, 0x0000 },
84 { 0x2e, 0xa000 },
85 { 0x2f, 0x0000 },
86 { 0x3b, 0x0000 },
87 { 0x3c, 0x007f },
88 { 0x3d, 0x0000 },
89 { 0x3e, 0x007f },
90 { 0x45, 0xe000 },
91 { 0x46, 0x003e },
92 { 0x47, 0x003e },
93 { 0x48, 0xf800 },
94 { 0x49, 0x3800 },
95 { 0x4a, 0x0004 },
96 { 0x4c, 0xfc00 },
97 { 0x4d, 0x0000 },
98 { 0x4f, 0x01ff },
99 { 0x50, 0x0000 },
100 { 0x51, 0x0000 },
101 { 0x52, 0x01ff },
102 { 0x53, 0xf000 },
103 { 0x61, 0x0000 },
104 { 0x62, 0x0000 },
105 { 0x63, 0x00c0 },
106 { 0x64, 0x0000 },
107 { 0x65, 0x0000 },
108 { 0x66, 0x0000 },
109 { 0x6a, 0x0000 },
110 { 0x6c, 0x0000 },
111 { 0x70, 0x8000 },
112 { 0x71, 0x8000 },
113 { 0x72, 0x8000 },
114 { 0x73, 0x1114 },
115 { 0x74, 0x0c00 },
116 { 0x75, 0x1d00 },
117 { 0x80, 0x0000 },
118 { 0x81, 0x0000 },
119 { 0x82, 0x0000 },
120 { 0x83, 0x0000 },
121 { 0x84, 0x0000 },
122 { 0x85, 0x0008 },
123 { 0x89, 0x0000 },
124 { 0x8a, 0x0000 },
125 { 0x8b, 0x0600 },
126 { 0x8c, 0x0228 },
127 { 0x8d, 0xa000 },
128 { 0x8e, 0x0004 },
129 { 0x8f, 0x1100 },
130 { 0x90, 0x0646 },
131 { 0x91, 0x0c00 },
132 { 0x92, 0x0000 },
133 { 0x93, 0x3000 },
134 { 0xb0, 0x2080 },
135 { 0xb1, 0x0000 },
136 { 0xb4, 0x2206 },
137 { 0xb5, 0x1f00 },
138 { 0xb6, 0x0000 },
139 { 0xb8, 0x034b },
140 { 0xb9, 0x0066 },
141 { 0xba, 0x000b },
142 { 0xbb, 0x0000 },
143 { 0xbc, 0x0000 },
144 { 0xbd, 0x0000 },
145 { 0xbe, 0x0000 },
146 { 0xbf, 0x0000 },
147 { 0xc0, 0x0400 },
148 { 0xc2, 0x0000 },
149 { 0xc4, 0x0000 },
150 { 0xc5, 0x0000 },
151 { 0xc6, 0x2000 },
152 { 0xc8, 0x0000 },
153 { 0xc9, 0x0000 },
154 { 0xca, 0x0000 },
155 { 0xcb, 0x0000 },
156 { 0xcc, 0x0000 },
157 { 0xcf, 0x0013 },
158 { 0xd0, 0x0680 },
159 { 0xd1, 0x1c17 },
160 { 0xd2, 0x8c00 },
161 { 0xd3, 0xaa20 },
162 { 0xd6, 0x0400 },
163 { 0xd9, 0x0809 },
164 { 0xfe, 0x10ec },
165 { 0xff, 0x6231 },
166 };
167
168 static int rt5640_reset(struct snd_soc_codec *codec)
169 {
170 return snd_soc_write(codec, RT5640_RESET, 0);
171 }
172
173 static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
174 {
175 int i;
176
177 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
178 if ((reg >= rt5640_ranges[i].window_start &&
179 reg <= rt5640_ranges[i].window_start +
180 rt5640_ranges[i].window_len) ||
181 (reg >= rt5640_ranges[i].range_min &&
182 reg <= rt5640_ranges[i].range_max))
183 return true;
184
185 switch (reg) {
186 case RT5640_RESET:
187 case RT5640_ASRC_5:
188 case RT5640_EQ_CTRL1:
189 case RT5640_DRC_AGC_1:
190 case RT5640_ANC_CTRL1:
191 case RT5640_IRQ_CTRL2:
192 case RT5640_INT_IRQ_ST:
193 case RT5640_DSP_CTRL2:
194 case RT5640_DSP_CTRL3:
195 case RT5640_PRIV_INDEX:
196 case RT5640_PRIV_DATA:
197 case RT5640_PGM_REG_ARR1:
198 case RT5640_PGM_REG_ARR3:
199 case RT5640_VENDOR_ID:
200 case RT5640_VENDOR_ID1:
201 case RT5640_VENDOR_ID2:
202 return true;
203 default:
204 return false;
205 }
206 }
207
208 static bool rt5640_readable_register(struct device *dev, unsigned int reg)
209 {
210 int i;
211
212 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
213 if ((reg >= rt5640_ranges[i].window_start &&
214 reg <= rt5640_ranges[i].window_start +
215 rt5640_ranges[i].window_len) ||
216 (reg >= rt5640_ranges[i].range_min &&
217 reg <= rt5640_ranges[i].range_max))
218 return true;
219
220 switch (reg) {
221 case RT5640_RESET:
222 case RT5640_SPK_VOL:
223 case RT5640_HP_VOL:
224 case RT5640_OUTPUT:
225 case RT5640_MONO_OUT:
226 case RT5640_IN1_IN2:
227 case RT5640_IN3_IN4:
228 case RT5640_INL_INR_VOL:
229 case RT5640_DAC1_DIG_VOL:
230 case RT5640_DAC2_DIG_VOL:
231 case RT5640_DAC2_CTRL:
232 case RT5640_ADC_DIG_VOL:
233 case RT5640_ADC_DATA:
234 case RT5640_ADC_BST_VOL:
235 case RT5640_STO_ADC_MIXER:
236 case RT5640_MONO_ADC_MIXER:
237 case RT5640_AD_DA_MIXER:
238 case RT5640_STO_DAC_MIXER:
239 case RT5640_MONO_DAC_MIXER:
240 case RT5640_DIG_MIXER:
241 case RT5640_DSP_PATH1:
242 case RT5640_DSP_PATH2:
243 case RT5640_DIG_INF_DATA:
244 case RT5640_REC_L1_MIXER:
245 case RT5640_REC_L2_MIXER:
246 case RT5640_REC_R1_MIXER:
247 case RT5640_REC_R2_MIXER:
248 case RT5640_HPO_MIXER:
249 case RT5640_SPK_L_MIXER:
250 case RT5640_SPK_R_MIXER:
251 case RT5640_SPO_L_MIXER:
252 case RT5640_SPO_R_MIXER:
253 case RT5640_SPO_CLSD_RATIO:
254 case RT5640_MONO_MIXER:
255 case RT5640_OUT_L1_MIXER:
256 case RT5640_OUT_L2_MIXER:
257 case RT5640_OUT_L3_MIXER:
258 case RT5640_OUT_R1_MIXER:
259 case RT5640_OUT_R2_MIXER:
260 case RT5640_OUT_R3_MIXER:
261 case RT5640_LOUT_MIXER:
262 case RT5640_PWR_DIG1:
263 case RT5640_PWR_DIG2:
264 case RT5640_PWR_ANLG1:
265 case RT5640_PWR_ANLG2:
266 case RT5640_PWR_MIXER:
267 case RT5640_PWR_VOL:
268 case RT5640_PRIV_INDEX:
269 case RT5640_PRIV_DATA:
270 case RT5640_I2S1_SDP:
271 case RT5640_I2S2_SDP:
272 case RT5640_ADDA_CLK1:
273 case RT5640_ADDA_CLK2:
274 case RT5640_DMIC:
275 case RT5640_GLB_CLK:
276 case RT5640_PLL_CTRL1:
277 case RT5640_PLL_CTRL2:
278 case RT5640_ASRC_1:
279 case RT5640_ASRC_2:
280 case RT5640_ASRC_3:
281 case RT5640_ASRC_4:
282 case RT5640_ASRC_5:
283 case RT5640_HP_OVCD:
284 case RT5640_CLS_D_OVCD:
285 case RT5640_CLS_D_OUT:
286 case RT5640_DEPOP_M1:
287 case RT5640_DEPOP_M2:
288 case RT5640_DEPOP_M3:
289 case RT5640_CHARGE_PUMP:
290 case RT5640_PV_DET_SPK_G:
291 case RT5640_MICBIAS:
292 case RT5640_EQ_CTRL1:
293 case RT5640_EQ_CTRL2:
294 case RT5640_WIND_FILTER:
295 case RT5640_DRC_AGC_1:
296 case RT5640_DRC_AGC_2:
297 case RT5640_DRC_AGC_3:
298 case RT5640_SVOL_ZC:
299 case RT5640_ANC_CTRL1:
300 case RT5640_ANC_CTRL2:
301 case RT5640_ANC_CTRL3:
302 case RT5640_JD_CTRL:
303 case RT5640_ANC_JD:
304 case RT5640_IRQ_CTRL1:
305 case RT5640_IRQ_CTRL2:
306 case RT5640_INT_IRQ_ST:
307 case RT5640_GPIO_CTRL1:
308 case RT5640_GPIO_CTRL2:
309 case RT5640_GPIO_CTRL3:
310 case RT5640_DSP_CTRL1:
311 case RT5640_DSP_CTRL2:
312 case RT5640_DSP_CTRL3:
313 case RT5640_DSP_CTRL4:
314 case RT5640_PGM_REG_ARR1:
315 case RT5640_PGM_REG_ARR2:
316 case RT5640_PGM_REG_ARR3:
317 case RT5640_PGM_REG_ARR4:
318 case RT5640_PGM_REG_ARR5:
319 case RT5640_SCB_FUNC:
320 case RT5640_SCB_CTRL:
321 case RT5640_BASE_BACK:
322 case RT5640_MP3_PLUS1:
323 case RT5640_MP3_PLUS2:
324 case RT5640_3D_HP:
325 case RT5640_ADJ_HPF:
326 case RT5640_HP_CALIB_AMP_DET:
327 case RT5640_HP_CALIB2:
328 case RT5640_SV_ZCD1:
329 case RT5640_SV_ZCD2:
330 case RT5640_DUMMY1:
331 case RT5640_DUMMY2:
332 case RT5640_DUMMY3:
333 case RT5640_VENDOR_ID:
334 case RT5640_VENDOR_ID1:
335 case RT5640_VENDOR_ID2:
336 return true;
337 default:
338 return false;
339 }
340 }
341
342 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
343 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
344 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
345 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
346 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
347
348 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
349 static unsigned int bst_tlv[] = {
350 TLV_DB_RANGE_HEAD(7),
351 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
352 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
353 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
354 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
355 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
356 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
357 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
358 };
359
360 /* Interface data select */
361 static const char * const rt5640_data_select[] = {
362 "Normal", "left copy to right", "right copy to left", "Swap"};
363
364 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
365 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
366
367 static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
368 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
369
370 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
371 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
372
373 static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
374 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
375
376 /* Class D speaker gain ratio */
377 static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
378 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
379
380 static const SOC_ENUM_SINGLE_DECL(
381 rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
382 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
383
384 static const struct snd_kcontrol_new rt5640_snd_controls[] = {
385 /* Speaker Output Volume */
386 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
387 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
388 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
389 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
390 /* Headphone Output Volume */
391 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
392 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
393 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
394 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
395 /* OUTPUT Control */
396 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
397 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
398 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
399 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
400 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
401 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
402 /* MONO Output Control */
403 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
404 RT5640_L_MUTE_SFT, 1, 1),
405 /* DAC Digital Volume */
406 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
407 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
408 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
409 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
410 175, 0, dac_vol_tlv),
411 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
412 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
413 175, 0, dac_vol_tlv),
414 /* IN1/IN2 Control */
415 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
416 RT5640_BST_SFT1, 8, 0, bst_tlv),
417 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
418 RT5640_BST_SFT2, 8, 0, bst_tlv),
419 /* INL/INR Volume Control */
420 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
421 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
422 31, 1, in_vol_tlv),
423 /* ADC Digital Volume Control */
424 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
425 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
426 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
427 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
428 127, 0, adc_vol_tlv),
429 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
430 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
431 127, 0, adc_vol_tlv),
432 /* ADC Boost Volume Control */
433 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
434 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
435 3, 0, adc_bst_tlv),
436 /* Class D speaker gain ratio */
437 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
438
439 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
440 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
441 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
442 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
443 };
444
445 /**
446 * set_dmic_clk - Set parameter of dmic.
447 *
448 * @w: DAPM widget.
449 * @kcontrol: The kcontrol of this widget.
450 * @event: Event id.
451 *
452 * Choose dmic clock between 1MHz and 3MHz.
453 * It is better for clock to approximate 3MHz.
454 */
455 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
456 struct snd_kcontrol *kcontrol, int event)
457 {
458 struct snd_soc_codec *codec = w->codec;
459 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
460 int div[] = {2, 3, 4, 6, 8, 12};
461 int idx = -EINVAL, i;
462 int rate, red, bound, temp;
463
464 rate = rt5640->sysclk;
465 red = 3000000 * 12;
466 for (i = 0; i < ARRAY_SIZE(div); i++) {
467 bound = div[i] * 3000000;
468 if (rate > bound)
469 continue;
470 temp = bound - rate;
471 if (temp < red) {
472 red = temp;
473 idx = i;
474 }
475 }
476 if (idx < 0)
477 dev_err(codec->dev, "Failed to set DMIC clock\n");
478 else
479 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
480 idx << RT5640_DMIC_CLK_SFT);
481 return idx;
482 }
483
484 static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
485 struct snd_soc_dapm_widget *sink)
486 {
487 unsigned int val;
488
489 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
490 val &= RT5640_SCLK_SRC_MASK;
491 if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
492 return 1;
493 else
494 return 0;
495 }
496
497 /* Digital Mixer */
498 static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
499 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
500 RT5640_M_ADC_L1_SFT, 1, 1),
501 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
502 RT5640_M_ADC_L2_SFT, 1, 1),
503 };
504
505 static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
506 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
507 RT5640_M_ADC_R1_SFT, 1, 1),
508 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
509 RT5640_M_ADC_R2_SFT, 1, 1),
510 };
511
512 static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
513 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
514 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
515 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
516 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
517 };
518
519 static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
520 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
521 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
522 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
523 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
524 };
525
526 static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
527 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
528 RT5640_M_ADCMIX_L_SFT, 1, 1),
529 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
530 RT5640_M_IF1_DAC_L_SFT, 1, 1),
531 };
532
533 static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
534 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
535 RT5640_M_ADCMIX_R_SFT, 1, 1),
536 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
537 RT5640_M_IF1_DAC_R_SFT, 1, 1),
538 };
539
540 static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
541 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
542 RT5640_M_DAC_L1_SFT, 1, 1),
543 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
544 RT5640_M_DAC_L2_SFT, 1, 1),
545 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
546 RT5640_M_ANC_DAC_L_SFT, 1, 1),
547 };
548
549 static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
550 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
551 RT5640_M_DAC_R1_SFT, 1, 1),
552 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
553 RT5640_M_DAC_R2_SFT, 1, 1),
554 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
555 RT5640_M_ANC_DAC_R_SFT, 1, 1),
556 };
557
558 static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
559 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
560 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
561 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
562 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
563 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
564 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
565 };
566
567 static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
568 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
569 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
570 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
571 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
572 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
573 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
574 };
575
576 static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
577 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
578 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
579 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
580 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
581 };
582
583 static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
584 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
585 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
586 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
587 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
588 };
589
590 /* Analog Input Mixer */
591 static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
592 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
593 RT5640_M_HP_L_RM_L_SFT, 1, 1),
594 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
595 RT5640_M_IN_L_RM_L_SFT, 1, 1),
596 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
597 RT5640_M_BST4_RM_L_SFT, 1, 1),
598 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
599 RT5640_M_BST1_RM_L_SFT, 1, 1),
600 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
601 RT5640_M_OM_L_RM_L_SFT, 1, 1),
602 };
603
604 static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
605 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
606 RT5640_M_HP_R_RM_R_SFT, 1, 1),
607 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
608 RT5640_M_IN_R_RM_R_SFT, 1, 1),
609 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
610 RT5640_M_BST4_RM_R_SFT, 1, 1),
611 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
612 RT5640_M_BST1_RM_R_SFT, 1, 1),
613 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
614 RT5640_M_OM_R_RM_R_SFT, 1, 1),
615 };
616
617 /* Analog Output Mixer */
618 static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
619 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
620 RT5640_M_RM_L_SM_L_SFT, 1, 1),
621 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
622 RT5640_M_IN_L_SM_L_SFT, 1, 1),
623 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
624 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
625 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
626 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
627 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
628 RT5640_M_OM_L_SM_L_SFT, 1, 1),
629 };
630
631 static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
632 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
633 RT5640_M_RM_R_SM_R_SFT, 1, 1),
634 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
635 RT5640_M_IN_R_SM_R_SFT, 1, 1),
636 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
637 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
638 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
639 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
640 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
641 RT5640_M_OM_R_SM_R_SFT, 1, 1),
642 };
643
644 static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
645 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
646 RT5640_M_SM_L_OM_L_SFT, 1, 1),
647 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
648 RT5640_M_BST1_OM_L_SFT, 1, 1),
649 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
650 RT5640_M_IN_L_OM_L_SFT, 1, 1),
651 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
652 RT5640_M_RM_L_OM_L_SFT, 1, 1),
653 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
654 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
655 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
656 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
657 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
658 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
659 };
660
661 static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
662 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
663 RT5640_M_SM_L_OM_R_SFT, 1, 1),
664 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
665 RT5640_M_BST4_OM_R_SFT, 1, 1),
666 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
667 RT5640_M_BST1_OM_R_SFT, 1, 1),
668 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
669 RT5640_M_IN_R_OM_R_SFT, 1, 1),
670 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
671 RT5640_M_RM_R_OM_R_SFT, 1, 1),
672 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
673 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
674 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
675 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
676 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
677 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
678 };
679
680 static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
681 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
682 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
683 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
684 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
685 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
686 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
687 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
688 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
689 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
690 RT5640_M_BST1_SPM_L_SFT, 1, 1),
691 };
692
693 static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
694 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
695 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
696 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
697 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
698 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
699 RT5640_M_BST1_SPM_R_SFT, 1, 1),
700 };
701
702 static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
703 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
704 RT5640_M_DAC2_HM_SFT, 1, 1),
705 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
706 RT5640_M_DAC1_HM_SFT, 1, 1),
707 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
708 RT5640_M_HPVOL_HM_SFT, 1, 1),
709 };
710
711 static const struct snd_kcontrol_new rt5640_lout_mix[] = {
712 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
713 RT5640_M_DAC_L1_LM_SFT, 1, 1),
714 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
715 RT5640_M_DAC_R1_LM_SFT, 1, 1),
716 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
717 RT5640_M_OV_L_LM_SFT, 1, 1),
718 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
719 RT5640_M_OV_R_LM_SFT, 1, 1),
720 };
721
722 static const struct snd_kcontrol_new rt5640_mono_mix[] = {
723 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
724 RT5640_M_DAC_R2_MM_SFT, 1, 1),
725 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
726 RT5640_M_DAC_L2_MM_SFT, 1, 1),
727 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
728 RT5640_M_OV_R_MM_SFT, 1, 1),
729 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
730 RT5640_M_OV_L_MM_SFT, 1, 1),
731 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
732 RT5640_M_BST1_MM_SFT, 1, 1),
733 };
734
735 static const struct snd_kcontrol_new spk_l_enable_control =
736 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
737 RT5640_L_MUTE_SFT, 1, 1);
738
739 static const struct snd_kcontrol_new spk_r_enable_control =
740 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_SPK_VOL,
741 RT5640_R_MUTE_SFT, 1, 1);
742
743 static const struct snd_kcontrol_new hp_l_enable_control =
744 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
745 RT5640_L_MUTE_SFT, 1, 1);
746
747 static const struct snd_kcontrol_new hp_r_enable_control =
748 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5640_HP_VOL,
749 RT5640_R_MUTE_SFT, 1, 1);
750
751 /* Stereo ADC source */
752 static const char * const rt5640_stereo_adc1_src[] = {
753 "DIG MIX", "ADC"
754 };
755
756 static const SOC_ENUM_SINGLE_DECL(
757 rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
758 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
759
760 static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
761 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
762
763 static const char * const rt5640_stereo_adc2_src[] = {
764 "DMIC1", "DMIC2", "DIG MIX"
765 };
766
767 static const SOC_ENUM_SINGLE_DECL(
768 rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
769 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
770
771 static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
772 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
773
774 /* Mono ADC source */
775 static const char * const rt5640_mono_adc_l1_src[] = {
776 "Mono DAC MIXL", "ADCL"
777 };
778
779 static const SOC_ENUM_SINGLE_DECL(
780 rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
781 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
782
783 static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
784 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
785
786 static const char * const rt5640_mono_adc_l2_src[] = {
787 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
788 };
789
790 static const SOC_ENUM_SINGLE_DECL(
791 rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
792 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
793
794 static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
795 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
796
797 static const char * const rt5640_mono_adc_r1_src[] = {
798 "Mono DAC MIXR", "ADCR"
799 };
800
801 static const SOC_ENUM_SINGLE_DECL(
802 rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
803 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
804
805 static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
806 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
807
808 static const char * const rt5640_mono_adc_r2_src[] = {
809 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
810 };
811
812 static const SOC_ENUM_SINGLE_DECL(
813 rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
814 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
815
816 static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
817 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
818
819 /* DAC2 channel source */
820 static const char * const rt5640_dac_l2_src[] = {
821 "IF2", "Base L/R"
822 };
823
824 static int rt5640_dac_l2_values[] = {
825 0,
826 3,
827 };
828
829 static const SOC_VALUE_ENUM_SINGLE_DECL(
830 rt5640_dac_l2_enum, RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
831 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
832
833 static const struct snd_kcontrol_new rt5640_dac_l2_mux =
834 SOC_DAPM_VALUE_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
835
836 static const char * const rt5640_dac_r2_src[] = {
837 "IF2",
838 };
839
840 static int rt5640_dac_r2_values[] = {
841 0,
842 };
843
844 static const SOC_VALUE_ENUM_SINGLE_DECL(
845 rt5640_dac_r2_enum, RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
846 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
847
848 static const struct snd_kcontrol_new rt5640_dac_r2_mux =
849 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
850
851 /* digital interface and iis interface map */
852 static const char * const rt5640_dai_iis_map[] = {
853 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
854 };
855
856 static int rt5640_dai_iis_map_values[] = {
857 0,
858 5,
859 6,
860 7,
861 };
862
863 static const SOC_VALUE_ENUM_SINGLE_DECL(
864 rt5640_dai_iis_map_enum, RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
865 0x7, rt5640_dai_iis_map, rt5640_dai_iis_map_values);
866
867 static const struct snd_kcontrol_new rt5640_dai_mux =
868 SOC_DAPM_VALUE_ENUM("DAI select", rt5640_dai_iis_map_enum);
869
870 /* SDI select */
871 static const char * const rt5640_sdi_sel[] = {
872 "IF1", "IF2"
873 };
874
875 static const SOC_ENUM_SINGLE_DECL(
876 rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
877 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
878
879 static const struct snd_kcontrol_new rt5640_sdi_mux =
880 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
881
882 static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
883 struct snd_kcontrol *kcontrol, int event)
884 {
885 struct snd_soc_codec *codec = w->codec;
886
887 switch (event) {
888 case SND_SOC_DAPM_PRE_PMU:
889 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
890 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
891 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
892 snd_soc_update_bits(codec, RT5640_DMIC,
893 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
894 RT5640_DMIC_1_DP_MASK,
895 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
896 RT5640_DMIC_1_DP_IN1P);
897 break;
898
899 default:
900 return 0;
901 }
902
903 return 0;
904 }
905
906 static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
907 struct snd_kcontrol *kcontrol, int event)
908 {
909 struct snd_soc_codec *codec = w->codec;
910
911 switch (event) {
912 case SND_SOC_DAPM_PRE_PMU:
913 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
914 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
915 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
916 snd_soc_update_bits(codec, RT5640_DMIC,
917 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
918 RT5640_DMIC_2_DP_MASK,
919 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
920 RT5640_DMIC_2_DP_IN1N);
921 break;
922
923 default:
924 return 0;
925 }
926
927 return 0;
928 }
929
930 static void hp_amp_power_on(struct snd_soc_codec *codec)
931 {
932 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
933
934 /* depop parameters */
935 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
936 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0200);
937 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
938 RT5640_DEPOP_MASK, RT5640_DEPOP_MAN);
939 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
940 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK | RT5640_HP_CB_MASK,
941 RT5640_HP_CP_PU | RT5640_HP_SG_DIS | RT5640_HP_CB_PU);
942 regmap_write(rt5640->regmap, RT5640_PR_BASE + RT5640_HP_DCC_INT1,
943 0x9f00);
944 /* headphone amp power on */
945 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
946 RT5640_PWR_FV1 | RT5640_PWR_FV2, 0);
947 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
948 RT5640_PWR_HA,
949 RT5640_PWR_HA);
950 usleep_range(10000, 15000);
951 regmap_update_bits(rt5640->regmap, RT5640_PWR_ANLG1,
952 RT5640_PWR_FV1 | RT5640_PWR_FV2 ,
953 RT5640_PWR_FV1 | RT5640_PWR_FV2);
954 }
955
956 static void rt5640_pmu_depop(struct snd_soc_codec *codec)
957 {
958 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
959
960 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M2,
961 RT5640_DEPOP_MASK | RT5640_DIG_DP_MASK,
962 RT5640_DEPOP_AUTO | RT5640_DIG_DP_EN);
963 regmap_update_bits(rt5640->regmap, RT5640_CHARGE_PUMP,
964 RT5640_PM_HP_MASK, RT5640_PM_HP_HV);
965
966 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M3,
967 RT5640_CP_FQ1_MASK | RT5640_CP_FQ2_MASK | RT5640_CP_FQ3_MASK,
968 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ1_SFT) |
969 (RT5640_CP_FQ_12_KHZ << RT5640_CP_FQ2_SFT) |
970 (RT5640_CP_FQ_192_KHZ << RT5640_CP_FQ3_SFT));
971
972 regmap_write(rt5640->regmap, RT5640_PR_BASE +
973 RT5640_MAMP_INT_REG2, 0x1c00);
974 regmap_update_bits(rt5640->regmap, RT5640_DEPOP_M1,
975 RT5640_HP_CP_MASK | RT5640_HP_SG_MASK,
976 RT5640_HP_CP_PD | RT5640_HP_SG_EN);
977 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE +
978 RT5640_CHPUMP_INT_REG1, 0x0700, 0x0400);
979 }
980
981 static int rt5640_hp_event(struct snd_soc_dapm_widget *w,
982 struct snd_kcontrol *kcontrol, int event)
983 {
984 struct snd_soc_codec *codec = w->codec;
985 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
986
987 switch (event) {
988 case SND_SOC_DAPM_POST_PMU:
989 rt5640_pmu_depop(codec);
990 rt5640->hp_mute = 0;
991 break;
992
993 case SND_SOC_DAPM_PRE_PMD:
994 rt5640->hp_mute = 1;
995 usleep_range(70000, 75000);
996 break;
997
998 default:
999 return 0;
1000 }
1001
1002 return 0;
1003 }
1004
1005 static int rt5640_hp_power_event(struct snd_soc_dapm_widget *w,
1006 struct snd_kcontrol *kcontrol, int event)
1007 {
1008 struct snd_soc_codec *codec = w->codec;
1009
1010 switch (event) {
1011 case SND_SOC_DAPM_POST_PMU:
1012 hp_amp_power_on(codec);
1013 break;
1014 default:
1015 return 0;
1016 }
1017
1018 return 0;
1019 }
1020
1021 static int rt5640_hp_post_event(struct snd_soc_dapm_widget *w,
1022 struct snd_kcontrol *kcontrol, int event)
1023 {
1024 struct snd_soc_codec *codec = w->codec;
1025 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1026
1027 switch (event) {
1028 case SND_SOC_DAPM_POST_PMU:
1029 if (!rt5640->hp_mute)
1030 usleep_range(80000, 85000);
1031
1032 break;
1033
1034 default:
1035 return 0;
1036 }
1037
1038 return 0;
1039 }
1040
1041 static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
1042 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
1043 RT5640_PWR_PLL_BIT, 0, NULL, 0),
1044 /* Input Side */
1045 /* micbias */
1046 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
1047 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
1048 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
1049 RT5640_PWR_MB1_BIT, 0, NULL, 0),
1050 /* Input Lines */
1051 SND_SOC_DAPM_INPUT("DMIC1"),
1052 SND_SOC_DAPM_INPUT("DMIC2"),
1053 SND_SOC_DAPM_INPUT("IN1P"),
1054 SND_SOC_DAPM_INPUT("IN1N"),
1055 SND_SOC_DAPM_INPUT("IN2P"),
1056 SND_SOC_DAPM_INPUT("IN2N"),
1057 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
1058 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
1059 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
1060 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
1061
1062 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1063 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1064 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC,
1065 RT5640_DMIC_1_EN_SFT, 0, rt5640_set_dmic1_event,
1066 SND_SOC_DAPM_PRE_PMU),
1067 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC,
1068 RT5640_DMIC_2_EN_SFT, 0, rt5640_set_dmic2_event,
1069 SND_SOC_DAPM_PRE_PMU),
1070 /* Boost */
1071 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
1072 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1073 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1074 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1075 /* Input Volume */
1076 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1077 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1078 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1079 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1080 /* REC Mixer */
1081 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1082 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1083 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1084 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1085 /* ADCs */
1086 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1087 RT5640_PWR_ADC_L_BIT, 0),
1088 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1089 RT5640_PWR_ADC_R_BIT, 0),
1090 /* ADC Mux */
1091 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1092 &rt5640_sto_adc_2_mux),
1093 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1094 &rt5640_sto_adc_2_mux),
1095 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1096 &rt5640_sto_adc_1_mux),
1097 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1098 &rt5640_sto_adc_1_mux),
1099 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1100 &rt5640_mono_adc_l2_mux),
1101 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1102 &rt5640_mono_adc_l1_mux),
1103 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1104 &rt5640_mono_adc_r1_mux),
1105 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1106 &rt5640_mono_adc_r2_mux),
1107 /* ADC Mixer */
1108 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1109 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1110 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1111 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1112 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1113 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1114 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1115 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1116 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1117 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1118 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1119 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1120 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1121 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1122
1123 /* Digital Interface */
1124 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1125 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1126 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1127 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1128 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1129 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1130 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1131 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1132 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1133 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1134 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1135 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1136 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1137 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1138 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1139 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1140 /* Digital Interface Select */
1141 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1142 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1143 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1144 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1145 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1146 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1147 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1148 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1149 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1150 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1151 /* Audio Interface */
1152 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1153 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1154 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1155 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1156 /* Audio DSP */
1157 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1158 /* ANC */
1159 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1160 /* Output Side */
1161 /* DAC mixer before sound effect */
1162 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1163 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1164 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1165 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1166 /* DAC2 channel Mux */
1167 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1168 &rt5640_dac_l2_mux),
1169 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1170 &rt5640_dac_r2_mux),
1171 /* DAC Mixer */
1172 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1173 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1174 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1175 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1176 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1177 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1178 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1179 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1180 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1181 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1182 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1183 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1184 /* DACs */
1185 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1186 RT5640_PWR_DAC_L1_BIT, 0),
1187 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1188 RT5640_PWR_DAC_L2_BIT, 0),
1189 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1190 RT5640_PWR_DAC_R1_BIT, 0),
1191 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1192 RT5640_PWR_DAC_R2_BIT, 0),
1193 /* SPK/OUT Mixer */
1194 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1195 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1196 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1197 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1198 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1199 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1200 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1201 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1202 /* Ouput Volume */
1203 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1204 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1205 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1206 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1207 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1208 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1209 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1210 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1211 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1212 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1213 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1214 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1215 /* SPO/HPO/LOUT/Mono Mixer */
1216 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1217 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1218 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1219 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1220 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1221 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1222 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1223 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1224 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1225 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1226 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1227 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1228 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1229 RT5640_PWR_MA_BIT, 0, NULL, 0),
1230 SND_SOC_DAPM_SUPPLY_S("Improve HP Amp Drv", 1, SND_SOC_NOPM,
1231 0, 0, rt5640_hp_power_event, SND_SOC_DAPM_POST_PMU),
1232 SND_SOC_DAPM_PGA_S("HP Amp", 1, SND_SOC_NOPM, 0, 0,
1233 rt5640_hp_event,
1234 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1235 SND_SOC_DAPM_SUPPLY("HP L Amp", RT5640_PWR_ANLG1,
1236 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1237 SND_SOC_DAPM_SUPPLY("HP R Amp", RT5640_PWR_ANLG1,
1238 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1239 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
1240 RT5640_PWR_CLS_D_BIT, 0, NULL, 0),
1241
1242 /* Output Switch */
1243 SND_SOC_DAPM_SWITCH("Speaker L Playback", SND_SOC_NOPM, 0, 0,
1244 &spk_l_enable_control),
1245 SND_SOC_DAPM_SWITCH("Speaker R Playback", SND_SOC_NOPM, 0, 0,
1246 &spk_r_enable_control),
1247 SND_SOC_DAPM_SWITCH("HP L Playback", SND_SOC_NOPM, 0, 0,
1248 &hp_l_enable_control),
1249 SND_SOC_DAPM_SWITCH("HP R Playback", SND_SOC_NOPM, 0, 0,
1250 &hp_r_enable_control),
1251 SND_SOC_DAPM_POST("HP Post", rt5640_hp_post_event),
1252 /* Output Lines */
1253 SND_SOC_DAPM_OUTPUT("SPOLP"),
1254 SND_SOC_DAPM_OUTPUT("SPOLN"),
1255 SND_SOC_DAPM_OUTPUT("SPORP"),
1256 SND_SOC_DAPM_OUTPUT("SPORN"),
1257 SND_SOC_DAPM_OUTPUT("HPOL"),
1258 SND_SOC_DAPM_OUTPUT("HPOR"),
1259 SND_SOC_DAPM_OUTPUT("LOUTL"),
1260 SND_SOC_DAPM_OUTPUT("LOUTR"),
1261 SND_SOC_DAPM_OUTPUT("MONOP"),
1262 SND_SOC_DAPM_OUTPUT("MONON"),
1263 };
1264
1265 static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1266 {"IN1P", NULL, "LDO2"},
1267 {"IN2P", NULL, "LDO2"},
1268
1269 {"DMIC L1", NULL, "DMIC1"},
1270 {"DMIC R1", NULL, "DMIC1"},
1271 {"DMIC L2", NULL, "DMIC2"},
1272 {"DMIC R2", NULL, "DMIC2"},
1273
1274 {"BST1", NULL, "IN1P"},
1275 {"BST1", NULL, "IN1N"},
1276 {"BST2", NULL, "IN2P"},
1277 {"BST2", NULL, "IN2N"},
1278
1279 {"INL VOL", NULL, "IN2P"},
1280 {"INR VOL", NULL, "IN2N"},
1281
1282 {"RECMIXL", "HPOL Switch", "HPOL"},
1283 {"RECMIXL", "INL Switch", "INL VOL"},
1284 {"RECMIXL", "BST2 Switch", "BST2"},
1285 {"RECMIXL", "BST1 Switch", "BST1"},
1286 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1287
1288 {"RECMIXR", "HPOR Switch", "HPOR"},
1289 {"RECMIXR", "INR Switch", "INR VOL"},
1290 {"RECMIXR", "BST2 Switch", "BST2"},
1291 {"RECMIXR", "BST1 Switch", "BST1"},
1292 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1293
1294 {"ADC L", NULL, "RECMIXL"},
1295 {"ADC R", NULL, "RECMIXR"},
1296
1297 {"DMIC L1", NULL, "DMIC CLK"},
1298 {"DMIC L1", NULL, "DMIC1 Power"},
1299 {"DMIC R1", NULL, "DMIC CLK"},
1300 {"DMIC R1", NULL, "DMIC1 Power"},
1301 {"DMIC L2", NULL, "DMIC CLK"},
1302 {"DMIC L2", NULL, "DMIC2 Power"},
1303 {"DMIC R2", NULL, "DMIC CLK"},
1304 {"DMIC R2", NULL, "DMIC2 Power"},
1305
1306 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1307 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1308 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1309 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1310 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1311
1312 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1313 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1314 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1315 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1316 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1317
1318 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1319 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1320 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1321 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1322 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1323
1324 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1325 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1326 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1327 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1328 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1329
1330 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1331 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1332 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
1333 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1334
1335 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1336 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1337 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
1338 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1339
1340 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1341 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1342 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
1343 {"Mono Left Filter", NULL, "PLL1", check_sysclk1_source},
1344
1345 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1346 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1347 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
1348 {"Mono Right Filter", NULL, "PLL1", check_sysclk1_source},
1349
1350 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1351 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1352 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1353 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1354
1355 {"IF1 ADC", NULL, "I2S1"},
1356 {"IF1 ADC", NULL, "IF1 ADC L"},
1357 {"IF1 ADC", NULL, "IF1 ADC R"},
1358 {"IF2 ADC", NULL, "I2S2"},
1359 {"IF2 ADC", NULL, "IF2 ADC L"},
1360 {"IF2 ADC", NULL, "IF2 ADC R"},
1361
1362 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1363 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1364 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1365 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1366 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1367 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1368
1369 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1370 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1371 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1372 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1373 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1374 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1375
1376 {"AIF1TX", NULL, "DAI1 TX Mux"},
1377 {"AIF1TX", NULL, "SDI1 TX Mux"},
1378 {"AIF2TX", NULL, "DAI2 TX Mux"},
1379 {"AIF2TX", NULL, "SDI2 TX Mux"},
1380
1381 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1382 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1383 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1384 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1385
1386 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1387 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1388 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1389 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1390
1391 {"IF1 DAC", NULL, "I2S1"},
1392 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1393 {"IF2 DAC", NULL, "I2S2"},
1394 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1395
1396 {"IF1 DAC L", NULL, "IF1 DAC"},
1397 {"IF1 DAC R", NULL, "IF1 DAC"},
1398 {"IF2 DAC L", NULL, "IF2 DAC"},
1399 {"IF2 DAC R", NULL, "IF2 DAC"},
1400
1401 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1402 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1403 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1404 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1405
1406 {"ANC", NULL, "Stereo ADC MIXL"},
1407 {"ANC", NULL, "Stereo ADC MIXR"},
1408
1409 {"Audio DSP", NULL, "DAC MIXL"},
1410 {"Audio DSP", NULL, "DAC MIXR"},
1411
1412 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1413 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1414
1415 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1416
1417 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1418 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1419 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1420 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1421 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1422 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1423
1424 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1425 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1426 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1427 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1428 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1429 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1430
1431 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1432 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1433 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1434 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1435
1436 {"DAC L1", NULL, "Stereo DAC MIXL"},
1437 {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1438 {"DAC R1", NULL, "Stereo DAC MIXR"},
1439 {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1440 {"DAC L2", NULL, "Mono DAC MIXL"},
1441 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1442 {"DAC R2", NULL, "Mono DAC MIXR"},
1443 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1444
1445 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1446 {"SPK MIXL", "INL Switch", "INL VOL"},
1447 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1448 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1449 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1450 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1451 {"SPK MIXR", "INR Switch", "INR VOL"},
1452 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1453 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1454 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1455
1456 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1457 {"OUT MIXL", "BST1 Switch", "BST1"},
1458 {"OUT MIXL", "INL Switch", "INL VOL"},
1459 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1460 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1461 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1462 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1463
1464 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1465 {"OUT MIXR", "BST2 Switch", "BST2"},
1466 {"OUT MIXR", "BST1 Switch", "BST1"},
1467 {"OUT MIXR", "INR Switch", "INR VOL"},
1468 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1469 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1470 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1471 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1472
1473 {"SPKVOL L", NULL, "SPK MIXL"},
1474 {"SPKVOL R", NULL, "SPK MIXR"},
1475 {"HPOVOL L", NULL, "OUT MIXL"},
1476 {"HPOVOL R", NULL, "OUT MIXR"},
1477 {"OUTVOL L", NULL, "OUT MIXL"},
1478 {"OUTVOL R", NULL, "OUT MIXR"},
1479
1480 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1481 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1482 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1483 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1484 {"SPOL MIX", "BST1 Switch", "BST1"},
1485 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1486 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1487 {"SPOR MIX", "BST1 Switch", "BST1"},
1488
1489 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1490 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1491 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
1492 {"HPO MIX L", NULL, "HP L Amp"},
1493 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1494 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1495 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
1496 {"HPO MIX R", NULL, "HP R Amp"},
1497
1498 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1499 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1500 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1501 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1502
1503 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1504 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1505 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1506 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1507 {"Mono MIX", "BST1 Switch", "BST1"},
1508
1509 {"HP Amp", NULL, "HPO MIX L"},
1510 {"HP Amp", NULL, "HPO MIX R"},
1511
1512 {"Speaker L Playback", "Switch", "SPOL MIX"},
1513 {"Speaker R Playback", "Switch", "SPOR MIX"},
1514 {"SPOLP", NULL, "Speaker L Playback"},
1515 {"SPOLN", NULL, "Speaker L Playback"},
1516 {"SPORP", NULL, "Speaker R Playback"},
1517 {"SPORN", NULL, "Speaker R Playback"},
1518
1519 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1520 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1521 {"SPORP", NULL, "Improve SPK Amp Drv"},
1522 {"SPORN", NULL, "Improve SPK Amp Drv"},
1523
1524 {"HPOL", NULL, "Improve HP Amp Drv"},
1525 {"HPOR", NULL, "Improve HP Amp Drv"},
1526
1527 {"HP L Playback", "Switch", "HP Amp"},
1528 {"HP R Playback", "Switch", "HP Amp"},
1529 {"HPOL", NULL, "HP L Playback"},
1530 {"HPOR", NULL, "HP R Playback"},
1531 {"LOUTL", NULL, "LOUT MIX"},
1532 {"LOUTR", NULL, "LOUT MIX"},
1533 {"MONOP", NULL, "Mono MIX"},
1534 {"MONON", NULL, "Mono MIX"},
1535 {"MONOP", NULL, "Improve MONO Amp Drv"},
1536 };
1537
1538 static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1539 {
1540 int ret = 0, val;
1541
1542 if (codec == NULL)
1543 return -EINVAL;
1544
1545 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1546 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1547 switch (dai_id) {
1548 case RT5640_AIF1:
1549 switch (val) {
1550 case RT5640_IF_123:
1551 case RT5640_IF_132:
1552 ret |= RT5640_U_IF1;
1553 break;
1554 case RT5640_IF_113:
1555 ret |= RT5640_U_IF1;
1556 case RT5640_IF_312:
1557 case RT5640_IF_213:
1558 ret |= RT5640_U_IF2;
1559 break;
1560 }
1561 break;
1562
1563 case RT5640_AIF2:
1564 switch (val) {
1565 case RT5640_IF_231:
1566 case RT5640_IF_213:
1567 ret |= RT5640_U_IF1;
1568 break;
1569 case RT5640_IF_223:
1570 ret |= RT5640_U_IF1;
1571 case RT5640_IF_123:
1572 case RT5640_IF_321:
1573 ret |= RT5640_U_IF2;
1574 break;
1575 }
1576 break;
1577
1578 default:
1579 ret = -EINVAL;
1580 break;
1581 }
1582
1583 return ret;
1584 }
1585
1586 static int get_clk_info(int sclk, int rate)
1587 {
1588 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1589
1590 if (sclk <= 0 || rate <= 0)
1591 return -EINVAL;
1592
1593 rate = rate << 8;
1594 for (i = 0; i < ARRAY_SIZE(pd); i++)
1595 if (sclk == rate * pd[i])
1596 return i;
1597
1598 return -EINVAL;
1599 }
1600
1601 static int rt5640_hw_params(struct snd_pcm_substream *substream,
1602 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1603 {
1604 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1605 struct snd_soc_codec *codec = rtd->codec;
1606 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1607 unsigned int val_len = 0, val_clk, mask_clk;
1608 int dai_sel, pre_div, bclk_ms, frame_size;
1609
1610 rt5640->lrck[dai->id] = params_rate(params);
1611 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1612 if (pre_div < 0) {
1613 dev_err(codec->dev, "Unsupported clock setting %d for DAI %d\n",
1614 rt5640->lrck[dai->id], dai->id);
1615 return -EINVAL;
1616 }
1617 frame_size = snd_soc_params_to_frame_size(params);
1618 if (frame_size < 0) {
1619 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1620 return frame_size;
1621 }
1622 if (frame_size > 32)
1623 bclk_ms = 1;
1624 else
1625 bclk_ms = 0;
1626 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1627
1628 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1629 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1630 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1631 bclk_ms, pre_div, dai->id);
1632
1633 switch (params_format(params)) {
1634 case SNDRV_PCM_FORMAT_S16_LE:
1635 break;
1636 case SNDRV_PCM_FORMAT_S20_3LE:
1637 val_len |= RT5640_I2S_DL_20;
1638 break;
1639 case SNDRV_PCM_FORMAT_S24_LE:
1640 val_len |= RT5640_I2S_DL_24;
1641 break;
1642 case SNDRV_PCM_FORMAT_S8:
1643 val_len |= RT5640_I2S_DL_8;
1644 break;
1645 default:
1646 return -EINVAL;
1647 }
1648
1649 dai_sel = get_sdp_info(codec, dai->id);
1650 if (dai_sel < 0) {
1651 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1652 return -EINVAL;
1653 }
1654 if (dai_sel & RT5640_U_IF1) {
1655 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1656 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1657 pre_div << RT5640_I2S_PD1_SFT;
1658 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1659 RT5640_I2S_DL_MASK, val_len);
1660 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1661 }
1662 if (dai_sel & RT5640_U_IF2) {
1663 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1664 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1665 pre_div << RT5640_I2S_PD2_SFT;
1666 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1667 RT5640_I2S_DL_MASK, val_len);
1668 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1669 }
1670
1671 return 0;
1672 }
1673
1674 static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1675 {
1676 struct snd_soc_codec *codec = dai->codec;
1677 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1678 unsigned int reg_val = 0;
1679 int dai_sel;
1680
1681 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1682 case SND_SOC_DAIFMT_CBM_CFM:
1683 rt5640->master[dai->id] = 1;
1684 break;
1685 case SND_SOC_DAIFMT_CBS_CFS:
1686 reg_val |= RT5640_I2S_MS_S;
1687 rt5640->master[dai->id] = 0;
1688 break;
1689 default:
1690 return -EINVAL;
1691 }
1692
1693 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1694 case SND_SOC_DAIFMT_NB_NF:
1695 break;
1696 case SND_SOC_DAIFMT_IB_NF:
1697 reg_val |= RT5640_I2S_BP_INV;
1698 break;
1699 default:
1700 return -EINVAL;
1701 }
1702
1703 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1704 case SND_SOC_DAIFMT_I2S:
1705 break;
1706 case SND_SOC_DAIFMT_LEFT_J:
1707 reg_val |= RT5640_I2S_DF_LEFT;
1708 break;
1709 case SND_SOC_DAIFMT_DSP_A:
1710 reg_val |= RT5640_I2S_DF_PCM_A;
1711 break;
1712 case SND_SOC_DAIFMT_DSP_B:
1713 reg_val |= RT5640_I2S_DF_PCM_B;
1714 break;
1715 default:
1716 return -EINVAL;
1717 }
1718
1719 dai_sel = get_sdp_info(codec, dai->id);
1720 if (dai_sel < 0) {
1721 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1722 return -EINVAL;
1723 }
1724 if (dai_sel & RT5640_U_IF1) {
1725 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1726 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1727 RT5640_I2S_DF_MASK, reg_val);
1728 }
1729 if (dai_sel & RT5640_U_IF2) {
1730 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1731 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1732 RT5640_I2S_DF_MASK, reg_val);
1733 }
1734
1735 return 0;
1736 }
1737
1738 static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1739 int clk_id, unsigned int freq, int dir)
1740 {
1741 struct snd_soc_codec *codec = dai->codec;
1742 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1743 unsigned int reg_val = 0;
1744
1745 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1746 return 0;
1747
1748 switch (clk_id) {
1749 case RT5640_SCLK_S_MCLK:
1750 reg_val |= RT5640_SCLK_SRC_MCLK;
1751 break;
1752 case RT5640_SCLK_S_PLL1:
1753 reg_val |= RT5640_SCLK_SRC_PLL1;
1754 break;
1755 case RT5640_SCLK_S_PLL1_TK:
1756 reg_val |= RT5640_SCLK_SRC_PLL1T;
1757 break;
1758 case RT5640_SCLK_S_RCCLK:
1759 reg_val |= RT5640_SCLK_SRC_RCCLK;
1760 break;
1761 default:
1762 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1763 return -EINVAL;
1764 }
1765 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1766 RT5640_SCLK_SRC_MASK, reg_val);
1767 rt5640->sysclk = freq;
1768 rt5640->sysclk_src = clk_id;
1769
1770 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1771 return 0;
1772 }
1773
1774 /**
1775 * rt5640_pll_calc - Calculate PLL M/N/K code.
1776 * @freq_in: external clock provided to codec.
1777 * @freq_out: target clock which codec works on.
1778 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1779 *
1780 * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1781 * which make calculation more efficiently.
1782 *
1783 * Returns 0 for success or negative error code.
1784 */
1785 static int rt5640_pll_calc(const unsigned int freq_in,
1786 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1787 {
1788 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1789 int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1790 int red_t = abs(freq_out - freq_in);
1791 bool bypass = false;
1792
1793 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1794 return -EINVAL;
1795
1796 for (n_t = 0; n_t <= max_n; n_t++) {
1797 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1798 if (in_t < 0)
1799 continue;
1800 if (in_t == freq_out) {
1801 bypass = true;
1802 n = n_t;
1803 goto code_find;
1804 }
1805 for (m_t = 0; m_t <= max_m; m_t++) {
1806 out_t = in_t / (m_t + 2);
1807 red = abs(out_t - freq_out);
1808 if (red < red_t) {
1809 n = n_t;
1810 m = m_t;
1811 if (red == 0)
1812 goto code_find;
1813 red_t = red;
1814 }
1815 }
1816 }
1817 pr_debug("Only get approximation about PLL\n");
1818
1819 code_find:
1820 pll_code->m_bp = bypass;
1821 pll_code->m_code = m;
1822 pll_code->n_code = n;
1823 pll_code->k_code = 2;
1824 return 0;
1825 }
1826
1827 static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1828 unsigned int freq_in, unsigned int freq_out)
1829 {
1830 struct snd_soc_codec *codec = dai->codec;
1831 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1832 struct rt5640_pll_code *pll_code = &rt5640->pll_code;
1833 int ret, dai_sel;
1834
1835 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1836 freq_out == rt5640->pll_out)
1837 return 0;
1838
1839 if (!freq_in || !freq_out) {
1840 dev_dbg(codec->dev, "PLL disabled\n");
1841
1842 rt5640->pll_in = 0;
1843 rt5640->pll_out = 0;
1844 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1845 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1846 return 0;
1847 }
1848
1849 switch (source) {
1850 case RT5640_PLL1_S_MCLK:
1851 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1852 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1853 break;
1854 case RT5640_PLL1_S_BCLK1:
1855 case RT5640_PLL1_S_BCLK2:
1856 dai_sel = get_sdp_info(codec, dai->id);
1857 if (dai_sel < 0) {
1858 dev_err(codec->dev,
1859 "Failed to get sdp info: %d\n", dai_sel);
1860 return -EINVAL;
1861 }
1862 if (dai_sel & RT5640_U_IF1) {
1863 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1864 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1865 }
1866 if (dai_sel & RT5640_U_IF2) {
1867 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1868 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1869 }
1870 break;
1871 default:
1872 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1873 return -EINVAL;
1874 }
1875
1876 ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
1877 if (ret < 0) {
1878 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1879 return ret;
1880 }
1881
1882 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
1883 (pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
1884
1885 snd_soc_write(codec, RT5640_PLL_CTRL1,
1886 pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
1887 snd_soc_write(codec, RT5640_PLL_CTRL2,
1888 (pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
1889 pll_code->m_bp << RT5640_PLL_M_BP_SFT);
1890
1891 rt5640->pll_in = freq_in;
1892 rt5640->pll_out = freq_out;
1893 rt5640->pll_src = source;
1894
1895 return 0;
1896 }
1897
1898 static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1899 enum snd_soc_bias_level level)
1900 {
1901 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1902 switch (level) {
1903 case SND_SOC_BIAS_STANDBY:
1904 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1905 regcache_cache_only(rt5640->regmap, false);
1906 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1907 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1908 RT5640_PWR_BG | RT5640_PWR_VREF2,
1909 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1910 RT5640_PWR_BG | RT5640_PWR_VREF2);
1911 usleep_range(10000, 15000);
1912 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1913 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1914 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1915 regcache_sync(rt5640->regmap);
1916 snd_soc_update_bits(codec, RT5640_DUMMY1,
1917 0x0301, 0x0301);
1918 snd_soc_update_bits(codec, RT5640_MICBIAS,
1919 0x0030, 0x0030);
1920 }
1921 break;
1922
1923 case SND_SOC_BIAS_OFF:
1924 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1925 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1926 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1927 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1928 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1929 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1930 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1931 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1932 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1933 break;
1934
1935 default:
1936 break;
1937 }
1938 codec->dapm.bias_level = level;
1939
1940 return 0;
1941 }
1942
1943 static int rt5640_probe(struct snd_soc_codec *codec)
1944 {
1945 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1946 int ret;
1947
1948 rt5640->codec = codec;
1949 codec->control_data = rt5640->regmap;
1950
1951 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
1952 if (ret != 0) {
1953 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1954 return ret;
1955 }
1956
1957 codec->dapm.idle_bias_off = 1;
1958 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1959
1960 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
1961 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1962 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1963
1964 return 0;
1965 }
1966
1967 static int rt5640_remove(struct snd_soc_codec *codec)
1968 {
1969 rt5640_reset(codec);
1970
1971 return 0;
1972 }
1973
1974 #ifdef CONFIG_PM
1975 static int rt5640_suspend(struct snd_soc_codec *codec)
1976 {
1977 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1978
1979 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1980 rt5640_reset(codec);
1981 regcache_cache_only(rt5640->regmap, true);
1982 regcache_mark_dirty(rt5640->regmap);
1983 if (gpio_is_valid(rt5640->pdata.ldo1_en))
1984 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 0);
1985
1986 return 0;
1987 }
1988
1989 static int rt5640_resume(struct snd_soc_codec *codec)
1990 {
1991 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1992
1993 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
1994 gpio_set_value_cansleep(rt5640->pdata.ldo1_en, 1);
1995 msleep(400);
1996 }
1997
1998 return 0;
1999 }
2000 #else
2001 #define rt5640_suspend NULL
2002 #define rt5640_resume NULL
2003 #endif
2004
2005 #define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2006 #define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2007 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2008
2009 static const struct snd_soc_dai_ops rt5640_aif_dai_ops = {
2010 .hw_params = rt5640_hw_params,
2011 .set_fmt = rt5640_set_dai_fmt,
2012 .set_sysclk = rt5640_set_dai_sysclk,
2013 .set_pll = rt5640_set_dai_pll,
2014 };
2015
2016 static struct snd_soc_dai_driver rt5640_dai[] = {
2017 {
2018 .name = "rt5640-aif1",
2019 .id = RT5640_AIF1,
2020 .playback = {
2021 .stream_name = "AIF1 Playback",
2022 .channels_min = 1,
2023 .channels_max = 2,
2024 .rates = RT5640_STEREO_RATES,
2025 .formats = RT5640_FORMATS,
2026 },
2027 .capture = {
2028 .stream_name = "AIF1 Capture",
2029 .channels_min = 1,
2030 .channels_max = 2,
2031 .rates = RT5640_STEREO_RATES,
2032 .formats = RT5640_FORMATS,
2033 },
2034 .ops = &rt5640_aif_dai_ops,
2035 },
2036 {
2037 .name = "rt5640-aif2",
2038 .id = RT5640_AIF2,
2039 .playback = {
2040 .stream_name = "AIF2 Playback",
2041 .channels_min = 1,
2042 .channels_max = 2,
2043 .rates = RT5640_STEREO_RATES,
2044 .formats = RT5640_FORMATS,
2045 },
2046 .capture = {
2047 .stream_name = "AIF2 Capture",
2048 .channels_min = 1,
2049 .channels_max = 2,
2050 .rates = RT5640_STEREO_RATES,
2051 .formats = RT5640_FORMATS,
2052 },
2053 .ops = &rt5640_aif_dai_ops,
2054 },
2055 };
2056
2057 static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
2058 .probe = rt5640_probe,
2059 .remove = rt5640_remove,
2060 .suspend = rt5640_suspend,
2061 .resume = rt5640_resume,
2062 .set_bias_level = rt5640_set_bias_level,
2063 .controls = rt5640_snd_controls,
2064 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
2065 .dapm_widgets = rt5640_dapm_widgets,
2066 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
2067 .dapm_routes = rt5640_dapm_routes,
2068 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
2069 };
2070
2071 static const struct regmap_config rt5640_regmap = {
2072 .reg_bits = 8,
2073 .val_bits = 16,
2074
2075 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
2076 RT5640_PR_SPACING),
2077 .volatile_reg = rt5640_volatile_register,
2078 .readable_reg = rt5640_readable_register,
2079
2080 .cache_type = REGCACHE_RBTREE,
2081 .reg_defaults = rt5640_reg,
2082 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
2083 .ranges = rt5640_ranges,
2084 .num_ranges = ARRAY_SIZE(rt5640_ranges),
2085 };
2086
2087 static const struct i2c_device_id rt5640_i2c_id[] = {
2088 { "rt5640", 0 },
2089 { }
2090 };
2091 MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2092
2093 #ifdef CONFIG_ACPI
2094 static struct acpi_device_id rt5640_acpi_match[] = {
2095 { "INT33CA", 0 },
2096 { "10EC5640", 0 },
2097 { },
2098 };
2099 MODULE_DEVICE_TABLE(acpi, rt5640_acpi_match);
2100 #endif
2101
2102 static int rt5640_parse_dt(struct rt5640_priv *rt5640, struct device_node *np)
2103 {
2104 rt5640->pdata.in1_diff = of_property_read_bool(np,
2105 "realtek,in1-differential");
2106 rt5640->pdata.in2_diff = of_property_read_bool(np,
2107 "realtek,in2-differential");
2108
2109 rt5640->pdata.ldo1_en = of_get_named_gpio(np,
2110 "realtek,ldo1-en-gpios", 0);
2111 /*
2112 * LDO1_EN is optional (it may be statically tied on the board).
2113 * -ENOENT means that the property doesn't exist, i.e. there is no
2114 * GPIO, so is not an error. Any other error code means the property
2115 * exists, but could not be parsed.
2116 */
2117 if (!gpio_is_valid(rt5640->pdata.ldo1_en) &&
2118 (rt5640->pdata.ldo1_en != -ENOENT))
2119 return rt5640->pdata.ldo1_en;
2120
2121 return 0;
2122 }
2123
2124 static int rt5640_i2c_probe(struct i2c_client *i2c,
2125 const struct i2c_device_id *id)
2126 {
2127 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2128 struct rt5640_priv *rt5640;
2129 int ret;
2130 unsigned int val;
2131
2132 rt5640 = devm_kzalloc(&i2c->dev,
2133 sizeof(struct rt5640_priv),
2134 GFP_KERNEL);
2135 if (NULL == rt5640)
2136 return -ENOMEM;
2137 i2c_set_clientdata(i2c, rt5640);
2138
2139 if (pdata) {
2140 rt5640->pdata = *pdata;
2141 /*
2142 * Translate zero'd out (default) pdata value to an invalid
2143 * GPIO ID. This makes the pdata and DT paths consistent in
2144 * terms of the value left in this field when no GPIO is
2145 * specified, but means we can't actually use GPIO 0.
2146 */
2147 if (!rt5640->pdata.ldo1_en)
2148 rt5640->pdata.ldo1_en = -EINVAL;
2149 } else if (i2c->dev.of_node) {
2150 ret = rt5640_parse_dt(rt5640, i2c->dev.of_node);
2151 if (ret)
2152 return ret;
2153 } else
2154 rt5640->pdata.ldo1_en = -EINVAL;
2155
2156 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2157 if (IS_ERR(rt5640->regmap)) {
2158 ret = PTR_ERR(rt5640->regmap);
2159 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2160 ret);
2161 return ret;
2162 }
2163
2164 if (gpio_is_valid(rt5640->pdata.ldo1_en)) {
2165 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2166 GPIOF_OUT_INIT_HIGH,
2167 "RT5640 LDO1_EN");
2168 if (ret < 0) {
2169 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2170 rt5640->pdata.ldo1_en, ret);
2171 return ret;
2172 }
2173 msleep(400);
2174 }
2175
2176 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2177 if ((val != RT5640_DEVICE_ID)) {
2178 dev_err(&i2c->dev,
2179 "Device with ID register %x is not rt5640/39\n", val);
2180 return -ENODEV;
2181 }
2182
2183 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2184
2185 ret = regmap_register_patch(rt5640->regmap, init_list,
2186 ARRAY_SIZE(init_list));
2187 if (ret != 0)
2188 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2189
2190 if (rt5640->pdata.in1_diff)
2191 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2192 RT5640_IN_DF1, RT5640_IN_DF1);
2193
2194 if (rt5640->pdata.in2_diff)
2195 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2196 RT5640_IN_DF2, RT5640_IN_DF2);
2197
2198 rt5640->hp_mute = 1;
2199
2200 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2201 rt5640_dai, ARRAY_SIZE(rt5640_dai));
2202 if (ret < 0)
2203 goto err;
2204
2205 return 0;
2206 err:
2207 return ret;
2208 }
2209
2210 static int rt5640_i2c_remove(struct i2c_client *i2c)
2211 {
2212 snd_soc_unregister_codec(&i2c->dev);
2213
2214 return 0;
2215 }
2216
2217 static struct i2c_driver rt5640_i2c_driver = {
2218 .driver = {
2219 .name = "rt5640",
2220 .owner = THIS_MODULE,
2221 .acpi_match_table = ACPI_PTR(rt5640_acpi_match),
2222 },
2223 .probe = rt5640_i2c_probe,
2224 .remove = rt5640_i2c_remove,
2225 .id_table = rt5640_i2c_id,
2226 };
2227 module_i2c_driver(rt5640_i2c_driver);
2228
2229 MODULE_DESCRIPTION("ASoC RT5640 driver");
2230 MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2231 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
This page took 0.088161 seconds and 6 git commands to generate.