2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/gpio.h>
21 #include <linux/gpio/consumer.h>
22 #include <linux/acpi.h>
23 #include <linux/dmi.h>
24 #include <linux/regulator/consumer.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/pcm_params.h>
28 #include <sound/jack.h>
29 #include <sound/soc.h>
30 #include <sound/soc-dapm.h>
31 #include <sound/initval.h>
32 #include <sound/tlv.h>
37 #define RT5645_DEVICE_ID 0x6308
38 #define RT5650_DEVICE_ID 0x6419
40 #define RT5645_PR_RANGE_BASE (0xff + 1)
41 #define RT5645_PR_SPACING 0x100
43 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
45 #define RT5645_HWEQ_NUM 57
47 static const struct regmap_range_cfg rt5645_ranges
[] = {
50 .range_min
= RT5645_PR_BASE
,
51 .range_max
= RT5645_PR_BASE
+ 0xf8,
52 .selector_reg
= RT5645_PRIV_INDEX
,
53 .selector_mask
= 0xff,
54 .selector_shift
= 0x0,
55 .window_start
= RT5645_PRIV_DATA
,
60 static const struct reg_sequence init_list
[] = {
61 {RT5645_PR_BASE
+ 0x3d, 0x3600},
62 {RT5645_PR_BASE
+ 0x1c, 0xfd20},
63 {RT5645_PR_BASE
+ 0x20, 0x611f},
64 {RT5645_PR_BASE
+ 0x21, 0x4040},
65 {RT5645_PR_BASE
+ 0x23, 0x0004},
67 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
69 static const struct reg_sequence rt5650_init_list
[] = {
73 static const struct reg_default rt5645_reg
[] = {
229 struct rt5645_eq_param_s
{
234 static const char *const rt5645_supply_names
[] = {
240 struct snd_soc_codec
*codec
;
241 struct rt5645_platform_data pdata
;
242 struct regmap
*regmap
;
243 struct i2c_client
*i2c
;
244 struct gpio_desc
*gpiod_hp_det
;
245 struct snd_soc_jack
*hp_jack
;
246 struct snd_soc_jack
*mic_jack
;
247 struct snd_soc_jack
*btn_jack
;
248 struct delayed_work jack_detect_work
, rcclock_work
;
249 struct regulator_bulk_data supplies
[ARRAY_SIZE(rt5645_supply_names
)];
250 struct rt5645_eq_param_s
*eq_param
;
255 int lrck
[RT5645_AIFS
];
256 int bclk
[RT5645_AIFS
];
257 int master
[RT5645_AIFS
];
268 static int rt5645_reset(struct snd_soc_codec
*codec
)
270 return snd_soc_write(codec
, RT5645_RESET
, 0);
273 static bool rt5645_volatile_register(struct device
*dev
, unsigned int reg
)
277 for (i
= 0; i
< ARRAY_SIZE(rt5645_ranges
); i
++) {
278 if (reg
>= rt5645_ranges
[i
].range_min
&&
279 reg
<= rt5645_ranges
[i
].range_max
) {
286 case RT5645_PRIV_DATA
:
287 case RT5645_IN1_CTRL1
:
288 case RT5645_IN1_CTRL2
:
289 case RT5645_IN1_CTRL3
:
290 case RT5645_A_JD_CTRL1
:
291 case RT5645_ADC_EQ_CTRL1
:
292 case RT5645_EQ_CTRL1
:
293 case RT5645_ALC_CTRL_1
:
294 case RT5645_IRQ_CTRL2
:
295 case RT5645_IRQ_CTRL3
:
296 case RT5645_INT_IRQ_ST
:
298 case RT5650_4BTN_IL_CMD1
:
299 case RT5645_VENDOR_ID
:
300 case RT5645_VENDOR_ID1
:
301 case RT5645_VENDOR_ID2
:
308 static bool rt5645_readable_register(struct device
*dev
, unsigned int reg
)
312 for (i
= 0; i
< ARRAY_SIZE(rt5645_ranges
); i
++) {
313 if (reg
>= rt5645_ranges
[i
].range_min
&&
314 reg
<= rt5645_ranges
[i
].range_max
) {
324 case RT5645_IN1_CTRL1
:
325 case RT5645_IN1_CTRL2
:
326 case RT5645_IN1_CTRL3
:
327 case RT5645_IN2_CTRL
:
328 case RT5645_INL1_INR1_VOL
:
329 case RT5645_SPK_FUNC_LIM
:
330 case RT5645_ADJ_HPF_CTRL
:
331 case RT5645_DAC1_DIG_VOL
:
332 case RT5645_DAC2_DIG_VOL
:
333 case RT5645_DAC_CTRL
:
334 case RT5645_STO1_ADC_DIG_VOL
:
335 case RT5645_MONO_ADC_DIG_VOL
:
336 case RT5645_ADC_BST_VOL1
:
337 case RT5645_ADC_BST_VOL2
:
338 case RT5645_STO1_ADC_MIXER
:
339 case RT5645_MONO_ADC_MIXER
:
340 case RT5645_AD_DA_MIXER
:
341 case RT5645_STO_DAC_MIXER
:
342 case RT5645_MONO_DAC_MIXER
:
343 case RT5645_DIG_MIXER
:
344 case RT5650_A_DAC_SOUR
:
345 case RT5645_DIG_INF1_DATA
:
346 case RT5645_PDM_OUT_CTRL
:
347 case RT5645_REC_L1_MIXER
:
348 case RT5645_REC_L2_MIXER
:
349 case RT5645_REC_R1_MIXER
:
350 case RT5645_REC_R2_MIXER
:
351 case RT5645_HPMIXL_CTRL
:
352 case RT5645_HPOMIXL_CTRL
:
353 case RT5645_HPMIXR_CTRL
:
354 case RT5645_HPOMIXR_CTRL
:
355 case RT5645_HPO_MIXER
:
356 case RT5645_SPK_L_MIXER
:
357 case RT5645_SPK_R_MIXER
:
358 case RT5645_SPO_MIXER
:
359 case RT5645_SPO_CLSD_RATIO
:
360 case RT5645_OUT_L1_MIXER
:
361 case RT5645_OUT_R1_MIXER
:
362 case RT5645_OUT_L_GAIN1
:
363 case RT5645_OUT_L_GAIN2
:
364 case RT5645_OUT_R_GAIN1
:
365 case RT5645_OUT_R_GAIN2
:
366 case RT5645_LOUT_MIXER
:
367 case RT5645_HAPTIC_CTRL1
:
368 case RT5645_HAPTIC_CTRL2
:
369 case RT5645_HAPTIC_CTRL3
:
370 case RT5645_HAPTIC_CTRL4
:
371 case RT5645_HAPTIC_CTRL5
:
372 case RT5645_HAPTIC_CTRL6
:
373 case RT5645_HAPTIC_CTRL7
:
374 case RT5645_HAPTIC_CTRL8
:
375 case RT5645_HAPTIC_CTRL9
:
376 case RT5645_HAPTIC_CTRL10
:
377 case RT5645_PWR_DIG1
:
378 case RT5645_PWR_DIG2
:
379 case RT5645_PWR_ANLG1
:
380 case RT5645_PWR_ANLG2
:
381 case RT5645_PWR_MIXER
:
383 case RT5645_PRIV_INDEX
:
384 case RT5645_PRIV_DATA
:
385 case RT5645_I2S1_SDP
:
386 case RT5645_I2S2_SDP
:
387 case RT5645_ADDA_CLK1
:
388 case RT5645_ADDA_CLK2
:
389 case RT5645_DMIC_CTRL1
:
390 case RT5645_DMIC_CTRL2
:
391 case RT5645_TDM_CTRL_1
:
392 case RT5645_TDM_CTRL_2
:
393 case RT5645_TDM_CTRL_3
:
394 case RT5650_TDM_CTRL_4
:
396 case RT5645_PLL_CTRL1
:
397 case RT5645_PLL_CTRL2
:
402 case RT5645_DEPOP_M1
:
403 case RT5645_DEPOP_M2
:
404 case RT5645_DEPOP_M3
:
405 case RT5645_CHARGE_PUMP
:
407 case RT5645_A_JD_CTRL1
:
408 case RT5645_VAD_CTRL4
:
409 case RT5645_CLSD_OUT_CTRL
:
410 case RT5645_ADC_EQ_CTRL1
:
411 case RT5645_ADC_EQ_CTRL2
:
412 case RT5645_EQ_CTRL1
:
413 case RT5645_EQ_CTRL2
:
414 case RT5645_ALC_CTRL_1
:
415 case RT5645_ALC_CTRL_2
:
416 case RT5645_ALC_CTRL_3
:
417 case RT5645_ALC_CTRL_4
:
418 case RT5645_ALC_CTRL_5
:
420 case RT5645_IRQ_CTRL1
:
421 case RT5645_IRQ_CTRL2
:
422 case RT5645_IRQ_CTRL3
:
423 case RT5645_INT_IRQ_ST
:
424 case RT5645_GPIO_CTRL1
:
425 case RT5645_GPIO_CTRL2
:
426 case RT5645_GPIO_CTRL3
:
427 case RT5645_BASS_BACK
:
428 case RT5645_MP3_PLUS1
:
429 case RT5645_MP3_PLUS2
:
430 case RT5645_ADJ_HPF1
:
431 case RT5645_ADJ_HPF2
:
432 case RT5645_HP_CALIB_AMP_DET
:
438 case RT5650_4BTN_IL_CMD1
:
439 case RT5650_4BTN_IL_CMD2
:
440 case RT5645_DRC1_HL_CTRL1
:
441 case RT5645_DRC2_HL_CTRL1
:
442 case RT5645_ADC_MONO_HP_CTRL1
:
443 case RT5645_ADC_MONO_HP_CTRL2
:
444 case RT5645_DRC2_CTRL1
:
445 case RT5645_DRC2_CTRL2
:
446 case RT5645_DRC2_CTRL3
:
447 case RT5645_DRC2_CTRL4
:
448 case RT5645_DRC2_CTRL5
:
449 case RT5645_JD_CTRL3
:
450 case RT5645_JD_CTRL4
:
451 case RT5645_GEN_CTRL1
:
452 case RT5645_GEN_CTRL2
:
453 case RT5645_GEN_CTRL3
:
454 case RT5645_VENDOR_ID
:
455 case RT5645_VENDOR_ID1
:
456 case RT5645_VENDOR_ID2
:
463 static const DECLARE_TLV_DB_SCALE(out_vol_tlv
, -4650, 150, 0);
464 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv
, -6525, 75, 0);
465 static const DECLARE_TLV_DB_SCALE(in_vol_tlv
, -3450, 150, 0);
466 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv
, -1725, 75, 0);
467 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv
, 0, 1200, 0);
469 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
470 static const DECLARE_TLV_DB_RANGE(bst_tlv
,
471 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
472 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
473 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
474 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
475 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
476 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
477 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0)
480 /* {-6, -4.5, -3, -1.5, 0, 0.82, 1.58, 2.28} dB */
481 static const DECLARE_TLV_DB_RANGE(spk_clsd_tlv
,
482 0, 4, TLV_DB_SCALE_ITEM(-600, 150, 0),
483 5, 5, TLV_DB_SCALE_ITEM(82, 0, 0),
484 6, 6, TLV_DB_SCALE_ITEM(158, 0, 0),
485 7, 7, TLV_DB_SCALE_ITEM(228, 0, 0)
488 static int rt5645_hweq_info(struct snd_kcontrol
*kcontrol
,
489 struct snd_ctl_elem_info
*uinfo
)
491 uinfo
->type
= SNDRV_CTL_ELEM_TYPE_BYTES
;
492 uinfo
->count
= RT5645_HWEQ_NUM
* sizeof(struct rt5645_eq_param_s
);
497 static int rt5645_hweq_get(struct snd_kcontrol
*kcontrol
,
498 struct snd_ctl_elem_value
*ucontrol
)
500 struct snd_soc_component
*component
= snd_kcontrol_chip(kcontrol
);
501 struct rt5645_priv
*rt5645
= snd_soc_component_get_drvdata(component
);
502 struct rt5645_eq_param_s
*eq_param
=
503 (struct rt5645_eq_param_s
*)ucontrol
->value
.bytes
.data
;
506 for (i
= 0; i
< RT5645_HWEQ_NUM
; i
++) {
507 eq_param
[i
].reg
= cpu_to_be16(rt5645
->eq_param
[i
].reg
);
508 eq_param
[i
].val
= cpu_to_be16(rt5645
->eq_param
[i
].val
);
514 static bool rt5645_validate_hweq(unsigned short reg
)
516 if ((reg
>= 0x1a4 && reg
<= 0x1cd) | (reg
>= 0x1e5 && reg
<= 0x1f8) |
517 (reg
== RT5645_EQ_CTRL2
))
523 static int rt5645_hweq_put(struct snd_kcontrol
*kcontrol
,
524 struct snd_ctl_elem_value
*ucontrol
)
526 struct snd_soc_component
*component
= snd_kcontrol_chip(kcontrol
);
527 struct rt5645_priv
*rt5645
= snd_soc_component_get_drvdata(component
);
528 struct rt5645_eq_param_s
*eq_param
=
529 (struct rt5645_eq_param_s
*)ucontrol
->value
.bytes
.data
;
532 for (i
= 0; i
< RT5645_HWEQ_NUM
; i
++) {
533 eq_param
[i
].reg
= be16_to_cpu(eq_param
[i
].reg
);
534 eq_param
[i
].val
= be16_to_cpu(eq_param
[i
].val
);
537 /* The final setting of the table should be RT5645_EQ_CTRL2 */
538 for (i
= RT5645_HWEQ_NUM
- 1; i
>= 0; i
--) {
539 if (eq_param
[i
].reg
== 0)
541 else if (eq_param
[i
].reg
!= RT5645_EQ_CTRL2
)
547 for (i
= 0; i
< RT5645_HWEQ_NUM
; i
++) {
548 if (!rt5645_validate_hweq(eq_param
[i
].reg
) &&
549 eq_param
[i
].reg
!= 0)
551 else if (eq_param
[i
].reg
== 0)
555 memcpy(rt5645
->eq_param
, eq_param
,
556 RT5645_HWEQ_NUM
* sizeof(struct rt5645_eq_param_s
));
561 #define RT5645_HWEQ(xname) \
562 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
563 .info = rt5645_hweq_info, \
564 .get = rt5645_hweq_get, \
565 .put = rt5645_hweq_put \
568 static int rt5645_spk_put_volsw(struct snd_kcontrol
*kcontrol
,
569 struct snd_ctl_elem_value
*ucontrol
)
571 struct snd_soc_component
*component
= snd_kcontrol_chip(kcontrol
);
572 struct rt5645_priv
*rt5645
= snd_soc_component_get_drvdata(component
);
575 cancel_delayed_work_sync(&rt5645
->rcclock_work
);
577 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
578 RT5645_PWR_CLK25M_MASK
, RT5645_PWR_CLK25M_PU
);
580 ret
= snd_soc_put_volsw(kcontrol
, ucontrol
);
582 queue_delayed_work(system_power_efficient_wq
, &rt5645
->rcclock_work
,
583 msecs_to_jiffies(200));
588 static const struct snd_kcontrol_new rt5645_snd_controls
[] = {
589 /* Speaker Output Volume */
590 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL
,
591 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
592 SOC_DOUBLE_EXT_TLV("Speaker Playback Volume", RT5645_SPK_VOL
,
593 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, snd_soc_get_volsw
,
594 rt5645_spk_put_volsw
, out_vol_tlv
),
596 /* ClassD modulator Speaker Gain Ratio */
597 SOC_SINGLE_TLV("Speaker ClassD Playback Volume", RT5645_SPO_CLSD_RATIO
,
598 RT5645_SPK_G_CLSD_SFT
, 7, 0, spk_clsd_tlv
),
600 /* Headphone Output Volume */
601 SOC_DOUBLE("Headphone Channel Switch", RT5645_HP_VOL
,
602 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
603 SOC_DOUBLE_TLV("Headphone Playback Volume", RT5645_HP_VOL
,
604 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, out_vol_tlv
),
607 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1
,
608 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
609 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1
,
610 RT5645_VOL_L_SFT
, RT5645_VOL_R_SFT
, 1, 1),
611 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1
,
612 RT5645_L_VOL_SFT
, RT5645_R_VOL_SFT
, 39, 1, out_vol_tlv
),
614 /* DAC Digital Volume */
615 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL
,
616 RT5645_M_DAC_L2_VOL_SFT
, RT5645_M_DAC_R2_VOL_SFT
, 1, 1),
617 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL
,
618 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 87, 0, dac_vol_tlv
),
619 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL
,
620 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 87, 0, dac_vol_tlv
),
622 /* IN1/IN2 Control */
623 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1
,
624 RT5645_BST_SFT1
, 8, 0, bst_tlv
),
625 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL
,
626 RT5645_BST_SFT2
, 8, 0, bst_tlv
),
628 /* INL/INR Volume Control */
629 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL
,
630 RT5645_INL_VOL_SFT
, RT5645_INR_VOL_SFT
, 31, 1, in_vol_tlv
),
632 /* ADC Digital Volume Control */
633 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL
,
634 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
635 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL
,
636 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 63, 0, adc_vol_tlv
),
637 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL
,
638 RT5645_L_MUTE_SFT
, RT5645_R_MUTE_SFT
, 1, 1),
639 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL
,
640 RT5645_L_VOL_SFT
+ 1, RT5645_R_VOL_SFT
+ 1, 63, 0, adc_vol_tlv
),
642 /* ADC Boost Volume Control */
643 SOC_DOUBLE_TLV("ADC Boost Capture Volume", RT5645_ADC_BST_VOL1
,
644 RT5645_STO1_ADC_L_BST_SFT
, RT5645_STO1_ADC_R_BST_SFT
, 3, 0,
646 SOC_DOUBLE_TLV("Mono ADC Boost Capture Volume", RT5645_ADC_BST_VOL2
,
647 RT5645_MONO_ADC_L_BST_SFT
, RT5645_MONO_ADC_R_BST_SFT
, 3, 0,
650 /* I2S2 function select */
651 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1
, RT5645_I2S2_SEL_SFT
,
653 RT5645_HWEQ("Speaker HWEQ"),
657 * set_dmic_clk - Set parameter of dmic.
660 * @kcontrol: The kcontrol of this widget.
664 static int set_dmic_clk(struct snd_soc_dapm_widget
*w
,
665 struct snd_kcontrol
*kcontrol
, int event
)
667 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
668 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
671 rate
= rt5645
->sysclk
/ rl6231_get_pre_div(rt5645
->regmap
,
672 RT5645_ADDA_CLK1
, RT5645_I2S_PD1_SFT
);
673 idx
= rl6231_calc_dmic_clk(rate
);
675 dev_err(codec
->dev
, "Failed to set DMIC clock\n");
677 snd_soc_update_bits(codec
, RT5645_DMIC_CTRL1
,
678 RT5645_DMIC_CLK_MASK
, idx
<< RT5645_DMIC_CLK_SFT
);
682 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget
*source
,
683 struct snd_soc_dapm_widget
*sink
)
685 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(source
->dapm
);
688 val
= snd_soc_read(codec
, RT5645_GLB_CLK
);
689 val
&= RT5645_SCLK_SRC_MASK
;
690 if (val
== RT5645_SCLK_SRC_PLL1
)
696 static int is_using_asrc(struct snd_soc_dapm_widget
*source
,
697 struct snd_soc_dapm_widget
*sink
)
699 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(source
->dapm
);
700 unsigned int reg
, shift
, val
;
702 switch (source
->shift
) {
731 val
= (snd_soc_read(codec
, reg
) >> shift
) & 0xf;
744 static int rt5645_enable_hweq(struct snd_soc_codec
*codec
)
746 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
749 for (i
= 0; i
< RT5645_HWEQ_NUM
; i
++) {
750 if (rt5645_validate_hweq(rt5645
->eq_param
[i
].reg
))
751 regmap_write(rt5645
->regmap
, rt5645
->eq_param
[i
].reg
,
752 rt5645
->eq_param
[i
].val
);
761 * rt5645_sel_asrc_clk_src - select ASRC clock source for a set of filters
762 * @codec: SoC audio codec device.
763 * @filter_mask: mask of filters.
764 * @clk_src: clock source
766 * The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5645 can
767 * only support standard 32fs or 64fs i2s format, ASRC should be enabled to
768 * support special i2s clock format such as Intel's 100fs(100 * sampling rate).
769 * ASRC function will track i2s clock and generate a corresponding system clock
770 * for codec. This function provides an API to select the clock source for a
771 * set of filters specified by the mask. And the codec driver will turn on ASRC
772 * for these filters if ASRC is selected as their clock source.
774 int rt5645_sel_asrc_clk_src(struct snd_soc_codec
*codec
,
775 unsigned int filter_mask
, unsigned int clk_src
)
777 unsigned int asrc2_mask
= 0;
778 unsigned int asrc2_value
= 0;
779 unsigned int asrc3_mask
= 0;
780 unsigned int asrc3_value
= 0;
783 case RT5645_CLK_SEL_SYS
:
784 case RT5645_CLK_SEL_I2S1_ASRC
:
785 case RT5645_CLK_SEL_I2S2_ASRC
:
786 case RT5645_CLK_SEL_SYS2
:
793 if (filter_mask
& RT5645_DA_STEREO_FILTER
) {
794 asrc2_mask
|= RT5645_DA_STO_CLK_SEL_MASK
;
795 asrc2_value
= (asrc2_value
& ~RT5645_DA_STO_CLK_SEL_MASK
)
796 | (clk_src
<< RT5645_DA_STO_CLK_SEL_SFT
);
799 if (filter_mask
& RT5645_DA_MONO_L_FILTER
) {
800 asrc2_mask
|= RT5645_DA_MONOL_CLK_SEL_MASK
;
801 asrc2_value
= (asrc2_value
& ~RT5645_DA_MONOL_CLK_SEL_MASK
)
802 | (clk_src
<< RT5645_DA_MONOL_CLK_SEL_SFT
);
805 if (filter_mask
& RT5645_DA_MONO_R_FILTER
) {
806 asrc2_mask
|= RT5645_DA_MONOR_CLK_SEL_MASK
;
807 asrc2_value
= (asrc2_value
& ~RT5645_DA_MONOR_CLK_SEL_MASK
)
808 | (clk_src
<< RT5645_DA_MONOR_CLK_SEL_SFT
);
811 if (filter_mask
& RT5645_AD_STEREO_FILTER
) {
812 asrc2_mask
|= RT5645_AD_STO1_CLK_SEL_MASK
;
813 asrc2_value
= (asrc2_value
& ~RT5645_AD_STO1_CLK_SEL_MASK
)
814 | (clk_src
<< RT5645_AD_STO1_CLK_SEL_SFT
);
817 if (filter_mask
& RT5645_AD_MONO_L_FILTER
) {
818 asrc3_mask
|= RT5645_AD_MONOL_CLK_SEL_MASK
;
819 asrc3_value
= (asrc3_value
& ~RT5645_AD_MONOL_CLK_SEL_MASK
)
820 | (clk_src
<< RT5645_AD_MONOL_CLK_SEL_SFT
);
823 if (filter_mask
& RT5645_AD_MONO_R_FILTER
) {
824 asrc3_mask
|= RT5645_AD_MONOR_CLK_SEL_MASK
;
825 asrc3_value
= (asrc3_value
& ~RT5645_AD_MONOR_CLK_SEL_MASK
)
826 | (clk_src
<< RT5645_AD_MONOR_CLK_SEL_SFT
);
830 snd_soc_update_bits(codec
, RT5645_ASRC_2
,
831 asrc2_mask
, asrc2_value
);
834 snd_soc_update_bits(codec
, RT5645_ASRC_3
,
835 asrc3_mask
, asrc3_value
);
839 EXPORT_SYMBOL_GPL(rt5645_sel_asrc_clk_src
);
842 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix
[] = {
843 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER
,
844 RT5645_M_ADC_L1_SFT
, 1, 1),
845 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER
,
846 RT5645_M_ADC_L2_SFT
, 1, 1),
849 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix
[] = {
850 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER
,
851 RT5645_M_ADC_R1_SFT
, 1, 1),
852 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER
,
853 RT5645_M_ADC_R2_SFT
, 1, 1),
856 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix
[] = {
857 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER
,
858 RT5645_M_MONO_ADC_L1_SFT
, 1, 1),
859 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER
,
860 RT5645_M_MONO_ADC_L2_SFT
, 1, 1),
863 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix
[] = {
864 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER
,
865 RT5645_M_MONO_ADC_R1_SFT
, 1, 1),
866 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER
,
867 RT5645_M_MONO_ADC_R2_SFT
, 1, 1),
870 static const struct snd_kcontrol_new rt5645_dac_l_mix
[] = {
871 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER
,
872 RT5645_M_ADCMIX_L_SFT
, 1, 1),
873 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER
,
874 RT5645_M_DAC1_L_SFT
, 1, 1),
877 static const struct snd_kcontrol_new rt5645_dac_r_mix
[] = {
878 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER
,
879 RT5645_M_ADCMIX_R_SFT
, 1, 1),
880 SOC_DAPM_SINGLE_AUTODISABLE("DAC1 Switch", RT5645_AD_DA_MIXER
,
881 RT5645_M_DAC1_R_SFT
, 1, 1),
884 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix
[] = {
885 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER
,
886 RT5645_M_DAC_L1_SFT
, 1, 1),
887 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER
,
888 RT5645_M_DAC_L2_SFT
, 1, 1),
889 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER
,
890 RT5645_M_DAC_R1_STO_L_SFT
, 1, 1),
893 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix
[] = {
894 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER
,
895 RT5645_M_DAC_R1_SFT
, 1, 1),
896 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER
,
897 RT5645_M_DAC_R2_SFT
, 1, 1),
898 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER
,
899 RT5645_M_DAC_L1_STO_R_SFT
, 1, 1),
902 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix
[] = {
903 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER
,
904 RT5645_M_DAC_L1_MONO_L_SFT
, 1, 1),
905 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER
,
906 RT5645_M_DAC_L2_MONO_L_SFT
, 1, 1),
907 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER
,
908 RT5645_M_DAC_R2_MONO_L_SFT
, 1, 1),
911 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix
[] = {
912 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER
,
913 RT5645_M_DAC_R1_MONO_R_SFT
, 1, 1),
914 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER
,
915 RT5645_M_DAC_R2_MONO_R_SFT
, 1, 1),
916 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER
,
917 RT5645_M_DAC_L2_MONO_R_SFT
, 1, 1),
920 static const struct snd_kcontrol_new rt5645_dig_l_mix
[] = {
921 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER
,
922 RT5645_M_STO_L_DAC_L_SFT
, 1, 1),
923 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER
,
924 RT5645_M_DAC_L2_DAC_L_SFT
, 1, 1),
925 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER
,
926 RT5645_M_DAC_R2_DAC_L_SFT
, 1, 1),
929 static const struct snd_kcontrol_new rt5645_dig_r_mix
[] = {
930 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER
,
931 RT5645_M_STO_R_DAC_R_SFT
, 1, 1),
932 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER
,
933 RT5645_M_DAC_R2_DAC_R_SFT
, 1, 1),
934 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER
,
935 RT5645_M_DAC_L2_DAC_R_SFT
, 1, 1),
938 /* Analog Input Mixer */
939 static const struct snd_kcontrol_new rt5645_rec_l_mix
[] = {
940 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER
,
941 RT5645_M_HP_L_RM_L_SFT
, 1, 1),
942 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER
,
943 RT5645_M_IN_L_RM_L_SFT
, 1, 1),
944 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER
,
945 RT5645_M_BST2_RM_L_SFT
, 1, 1),
946 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER
,
947 RT5645_M_BST1_RM_L_SFT
, 1, 1),
948 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER
,
949 RT5645_M_OM_L_RM_L_SFT
, 1, 1),
952 static const struct snd_kcontrol_new rt5645_rec_r_mix
[] = {
953 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER
,
954 RT5645_M_HP_R_RM_R_SFT
, 1, 1),
955 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER
,
956 RT5645_M_IN_R_RM_R_SFT
, 1, 1),
957 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER
,
958 RT5645_M_BST2_RM_R_SFT
, 1, 1),
959 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER
,
960 RT5645_M_BST1_RM_R_SFT
, 1, 1),
961 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER
,
962 RT5645_M_OM_R_RM_R_SFT
, 1, 1),
965 static const struct snd_kcontrol_new rt5645_spk_l_mix
[] = {
966 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER
,
967 RT5645_M_DAC_L1_SM_L_SFT
, 1, 1),
968 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER
,
969 RT5645_M_DAC_L2_SM_L_SFT
, 1, 1),
970 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER
,
971 RT5645_M_IN_L_SM_L_SFT
, 1, 1),
972 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER
,
973 RT5645_M_BST1_L_SM_L_SFT
, 1, 1),
976 static const struct snd_kcontrol_new rt5645_spk_r_mix
[] = {
977 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER
,
978 RT5645_M_DAC_R1_SM_R_SFT
, 1, 1),
979 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER
,
980 RT5645_M_DAC_R2_SM_R_SFT
, 1, 1),
981 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER
,
982 RT5645_M_IN_R_SM_R_SFT
, 1, 1),
983 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER
,
984 RT5645_M_BST2_R_SM_R_SFT
, 1, 1),
987 static const struct snd_kcontrol_new rt5645_out_l_mix
[] = {
988 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER
,
989 RT5645_M_BST1_OM_L_SFT
, 1, 1),
990 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER
,
991 RT5645_M_IN_L_OM_L_SFT
, 1, 1),
992 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER
,
993 RT5645_M_DAC_L2_OM_L_SFT
, 1, 1),
994 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER
,
995 RT5645_M_DAC_L1_OM_L_SFT
, 1, 1),
998 static const struct snd_kcontrol_new rt5645_out_r_mix
[] = {
999 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER
,
1000 RT5645_M_BST2_OM_R_SFT
, 1, 1),
1001 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER
,
1002 RT5645_M_IN_R_OM_R_SFT
, 1, 1),
1003 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER
,
1004 RT5645_M_DAC_R2_OM_R_SFT
, 1, 1),
1005 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER
,
1006 RT5645_M_DAC_R1_OM_R_SFT
, 1, 1),
1009 static const struct snd_kcontrol_new rt5645_spo_l_mix
[] = {
1010 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER
,
1011 RT5645_M_DAC_R1_SPM_L_SFT
, 1, 1),
1012 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER
,
1013 RT5645_M_DAC_L1_SPM_L_SFT
, 1, 1),
1014 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER
,
1015 RT5645_M_SV_R_SPM_L_SFT
, 1, 1),
1016 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER
,
1017 RT5645_M_SV_L_SPM_L_SFT
, 1, 1),
1020 static const struct snd_kcontrol_new rt5645_spo_r_mix
[] = {
1021 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER
,
1022 RT5645_M_DAC_R1_SPM_R_SFT
, 1, 1),
1023 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER
,
1024 RT5645_M_SV_R_SPM_R_SFT
, 1, 1),
1027 static const struct snd_kcontrol_new rt5645_hpo_mix
[] = {
1028 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER
,
1029 RT5645_M_DAC1_HM_SFT
, 1, 1),
1030 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER
,
1031 RT5645_M_HPVOL_HM_SFT
, 1, 1),
1034 static const struct snd_kcontrol_new rt5645_hpvoll_mix
[] = {
1035 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL
,
1036 RT5645_M_DAC1_HV_SFT
, 1, 1),
1037 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL
,
1038 RT5645_M_DAC2_HV_SFT
, 1, 1),
1039 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL
,
1040 RT5645_M_IN_HV_SFT
, 1, 1),
1041 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL
,
1042 RT5645_M_BST1_HV_SFT
, 1, 1),
1045 static const struct snd_kcontrol_new rt5645_hpvolr_mix
[] = {
1046 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL
,
1047 RT5645_M_DAC1_HV_SFT
, 1, 1),
1048 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL
,
1049 RT5645_M_DAC2_HV_SFT
, 1, 1),
1050 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL
,
1051 RT5645_M_IN_HV_SFT
, 1, 1),
1052 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL
,
1053 RT5645_M_BST2_HV_SFT
, 1, 1),
1056 static const struct snd_kcontrol_new rt5645_lout_mix
[] = {
1057 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER
,
1058 RT5645_M_DAC_L1_LM_SFT
, 1, 1),
1059 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER
,
1060 RT5645_M_DAC_R1_LM_SFT
, 1, 1),
1061 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER
,
1062 RT5645_M_OV_L_LM_SFT
, 1, 1),
1063 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER
,
1064 RT5645_M_OV_R_LM_SFT
, 1, 1),
1067 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
1068 static const char * const rt5645_dac1_src
[] = {
1069 "IF1 DAC", "IF2 DAC", "IF3 DAC"
1072 static SOC_ENUM_SINGLE_DECL(
1073 rt5645_dac1l_enum
, RT5645_AD_DA_MIXER
,
1074 RT5645_DAC1_L_SEL_SFT
, rt5645_dac1_src
);
1076 static const struct snd_kcontrol_new rt5645_dac1l_mux
=
1077 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum
);
1079 static SOC_ENUM_SINGLE_DECL(
1080 rt5645_dac1r_enum
, RT5645_AD_DA_MIXER
,
1081 RT5645_DAC1_R_SEL_SFT
, rt5645_dac1_src
);
1083 static const struct snd_kcontrol_new rt5645_dac1r_mux
=
1084 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum
);
1086 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
1087 static const char * const rt5645_dac12_src
[] = {
1088 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
1091 static SOC_ENUM_SINGLE_DECL(
1092 rt5645_dac2l_enum
, RT5645_DAC_CTRL
,
1093 RT5645_DAC2_L_SEL_SFT
, rt5645_dac12_src
);
1095 static const struct snd_kcontrol_new rt5645_dac_l2_mux
=
1096 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum
);
1098 static const char * const rt5645_dacr2_src
[] = {
1099 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
1102 static SOC_ENUM_SINGLE_DECL(
1103 rt5645_dac2r_enum
, RT5645_DAC_CTRL
,
1104 RT5645_DAC2_R_SEL_SFT
, rt5645_dacr2_src
);
1106 static const struct snd_kcontrol_new rt5645_dac_r2_mux
=
1107 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum
);
1111 static const char * const rt5645_inl_src
[] = {
1115 static SOC_ENUM_SINGLE_DECL(
1116 rt5645_inl_enum
, RT5645_INL1_INR1_VOL
,
1117 RT5645_INL_SEL_SFT
, rt5645_inl_src
);
1119 static const struct snd_kcontrol_new rt5645_inl_mux
=
1120 SOC_DAPM_ENUM("INL source", rt5645_inl_enum
);
1122 static const char * const rt5645_inr_src
[] = {
1126 static SOC_ENUM_SINGLE_DECL(
1127 rt5645_inr_enum
, RT5645_INL1_INR1_VOL
,
1128 RT5645_INR_SEL_SFT
, rt5645_inr_src
);
1130 static const struct snd_kcontrol_new rt5645_inr_mux
=
1131 SOC_DAPM_ENUM("INR source", rt5645_inr_enum
);
1133 /* Stereo1 ADC source */
1135 static const char * const rt5645_stereo_adc1_src
[] = {
1139 static SOC_ENUM_SINGLE_DECL(
1140 rt5645_stereo1_adc1_enum
, RT5645_STO1_ADC_MIXER
,
1141 RT5645_ADC_1_SRC_SFT
, rt5645_stereo_adc1_src
);
1143 static const struct snd_kcontrol_new rt5645_sto_adc1_mux
=
1144 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum
);
1147 static const char * const rt5645_stereo_adc2_src
[] = {
1151 static SOC_ENUM_SINGLE_DECL(
1152 rt5645_stereo1_adc2_enum
, RT5645_STO1_ADC_MIXER
,
1153 RT5645_ADC_2_SRC_SFT
, rt5645_stereo_adc2_src
);
1155 static const struct snd_kcontrol_new rt5645_sto_adc2_mux
=
1156 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum
);
1159 static const char * const rt5645_stereo_dmic_src
[] = {
1163 static SOC_ENUM_SINGLE_DECL(
1164 rt5645_stereo1_dmic_enum
, RT5645_STO1_ADC_MIXER
,
1165 RT5645_DMIC_SRC_SFT
, rt5645_stereo_dmic_src
);
1167 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux
=
1168 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum
);
1170 /* Mono ADC source */
1172 static const char * const rt5645_mono_adc_l1_src
[] = {
1173 "Mono DAC MIXL", "ADC"
1176 static SOC_ENUM_SINGLE_DECL(
1177 rt5645_mono_adc_l1_enum
, RT5645_MONO_ADC_MIXER
,
1178 RT5645_MONO_ADC_L1_SRC_SFT
, rt5645_mono_adc_l1_src
);
1180 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux
=
1181 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum
);
1183 static const char * const rt5645_mono_adc_l2_src
[] = {
1184 "Mono DAC MIXL", "DMIC"
1187 static SOC_ENUM_SINGLE_DECL(
1188 rt5645_mono_adc_l2_enum
, RT5645_MONO_ADC_MIXER
,
1189 RT5645_MONO_ADC_L2_SRC_SFT
, rt5645_mono_adc_l2_src
);
1191 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux
=
1192 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum
);
1195 static const char * const rt5645_mono_dmic_src
[] = {
1199 static SOC_ENUM_SINGLE_DECL(
1200 rt5645_mono_dmic_l_enum
, RT5645_MONO_ADC_MIXER
,
1201 RT5645_MONO_DMIC_L_SRC_SFT
, rt5645_mono_dmic_src
);
1203 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux
=
1204 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum
);
1206 static SOC_ENUM_SINGLE_DECL(
1207 rt5645_mono_dmic_r_enum
, RT5645_MONO_ADC_MIXER
,
1208 RT5645_MONO_DMIC_R_SRC_SFT
, rt5645_mono_dmic_src
);
1210 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux
=
1211 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum
);
1213 static const char * const rt5645_mono_adc_r1_src
[] = {
1214 "Mono DAC MIXR", "ADC"
1217 static SOC_ENUM_SINGLE_DECL(
1218 rt5645_mono_adc_r1_enum
, RT5645_MONO_ADC_MIXER
,
1219 RT5645_MONO_ADC_R1_SRC_SFT
, rt5645_mono_adc_r1_src
);
1221 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux
=
1222 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum
);
1224 static const char * const rt5645_mono_adc_r2_src
[] = {
1225 "Mono DAC MIXR", "DMIC"
1228 static SOC_ENUM_SINGLE_DECL(
1229 rt5645_mono_adc_r2_enum
, RT5645_MONO_ADC_MIXER
,
1230 RT5645_MONO_ADC_R2_SRC_SFT
, rt5645_mono_adc_r2_src
);
1232 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux
=
1233 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum
);
1236 static const char * const rt5645_if1_adc_in_src
[] = {
1237 "IF_ADC1/IF_ADC2/VAD_ADC", "IF_ADC2/IF_ADC1/VAD_ADC",
1238 "VAD_ADC/IF_ADC1/IF_ADC2", "VAD_ADC/IF_ADC2/IF_ADC1"
1241 static SOC_ENUM_SINGLE_DECL(
1242 rt5645_if1_adc_in_enum
, RT5645_TDM_CTRL_1
,
1243 RT5645_IF1_ADC_IN_SFT
, rt5645_if1_adc_in_src
);
1245 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux
=
1246 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum
);
1249 static const char * const rt5650_if1_adc_in_src
[] = {
1250 "IF_ADC1/IF_ADC2/DAC_REF/Null",
1251 "IF_ADC1/IF_ADC2/Null/DAC_REF",
1252 "IF_ADC1/DAC_REF/IF_ADC2/Null",
1253 "IF_ADC1/DAC_REF/Null/IF_ADC2",
1254 "IF_ADC1/Null/DAC_REF/IF_ADC2",
1255 "IF_ADC1/Null/IF_ADC2/DAC_REF",
1257 "IF_ADC2/IF_ADC1/DAC_REF/Null",
1258 "IF_ADC2/IF_ADC1/Null/DAC_REF",
1259 "IF_ADC2/DAC_REF/IF_ADC1/Null",
1260 "IF_ADC2/DAC_REF/Null/IF_ADC1",
1261 "IF_ADC2/Null/DAC_REF/IF_ADC1",
1262 "IF_ADC2/Null/IF_ADC1/DAC_REF",
1264 "DAC_REF/IF_ADC1/IF_ADC2/Null",
1265 "DAC_REF/IF_ADC1/Null/IF_ADC2",
1266 "DAC_REF/IF_ADC2/IF_ADC1/Null",
1267 "DAC_REF/IF_ADC2/Null/IF_ADC1",
1268 "DAC_REF/Null/IF_ADC1/IF_ADC2",
1269 "DAC_REF/Null/IF_ADC2/IF_ADC1",
1271 "Null/IF_ADC1/IF_ADC2/DAC_REF",
1272 "Null/IF_ADC1/DAC_REF/IF_ADC2",
1273 "Null/IF_ADC2/IF_ADC1/DAC_REF",
1274 "Null/IF_ADC2/DAC_REF/IF_ADC1",
1275 "Null/DAC_REF/IF_ADC1/IF_ADC2",
1276 "Null/DAC_REF/IF_ADC2/IF_ADC1",
1279 static SOC_ENUM_SINGLE_DECL(
1280 rt5650_if1_adc_in_enum
, RT5645_TDM_CTRL_2
,
1281 0, rt5650_if1_adc_in_src
);
1283 static const struct snd_kcontrol_new rt5650_if1_adc_in_mux
=
1284 SOC_DAPM_ENUM("IF1 ADC IN source", rt5650_if1_adc_in_enum
);
1286 /* MX-78 [15:14][13:12][11:10] */
1287 static const char * const rt5645_tdm_adc_swap_select
[] = {
1288 "L/R", "R/L", "L/L", "R/R"
1291 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot0_1_enum
,
1292 RT5645_TDM_CTRL_2
, 14, rt5645_tdm_adc_swap_select
);
1294 static const struct snd_kcontrol_new rt5650_if1_adc1_in_mux
=
1295 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5650_tdm_adc_slot0_1_enum
);
1297 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot2_3_enum
,
1298 RT5645_TDM_CTRL_2
, 12, rt5645_tdm_adc_swap_select
);
1300 static const struct snd_kcontrol_new rt5650_if1_adc2_in_mux
=
1301 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5650_tdm_adc_slot2_3_enum
);
1303 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_adc_slot4_5_enum
,
1304 RT5645_TDM_CTRL_2
, 10, rt5645_tdm_adc_swap_select
);
1306 static const struct snd_kcontrol_new rt5650_if1_adc3_in_mux
=
1307 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5650_tdm_adc_slot4_5_enum
);
1309 /* MX-77 [7:6][5:4][3:2] */
1310 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum
,
1311 RT5645_TDM_CTRL_1
, 6, rt5645_tdm_adc_swap_select
);
1313 static const struct snd_kcontrol_new rt5645_if1_adc1_in_mux
=
1314 SOC_DAPM_ENUM("IF1 ADC1 IN source", rt5645_tdm_adc_slot0_1_enum
);
1316 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum
,
1317 RT5645_TDM_CTRL_1
, 4, rt5645_tdm_adc_swap_select
);
1319 static const struct snd_kcontrol_new rt5645_if1_adc2_in_mux
=
1320 SOC_DAPM_ENUM("IF1 ADC2 IN source", rt5645_tdm_adc_slot2_3_enum
);
1322 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum
,
1323 RT5645_TDM_CTRL_1
, 2, rt5645_tdm_adc_swap_select
);
1325 static const struct snd_kcontrol_new rt5645_if1_adc3_in_mux
=
1326 SOC_DAPM_ENUM("IF1 ADC3 IN source", rt5645_tdm_adc_slot4_5_enum
);
1328 /* MX-79 [14:12][10:8][6:4][2:0] */
1329 static const char * const rt5645_tdm_dac_swap_select
[] = {
1330 "Slot0", "Slot1", "Slot2", "Slot3"
1333 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac0_enum
,
1334 RT5645_TDM_CTRL_3
, 12, rt5645_tdm_dac_swap_select
);
1336 static const struct snd_kcontrol_new rt5645_if1_dac0_tdm_sel_mux
=
1337 SOC_DAPM_ENUM("IF1 DAC0 source", rt5645_tdm_dac0_enum
);
1339 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac1_enum
,
1340 RT5645_TDM_CTRL_3
, 8, rt5645_tdm_dac_swap_select
);
1342 static const struct snd_kcontrol_new rt5645_if1_dac1_tdm_sel_mux
=
1343 SOC_DAPM_ENUM("IF1 DAC1 source", rt5645_tdm_dac1_enum
);
1345 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac2_enum
,
1346 RT5645_TDM_CTRL_3
, 4, rt5645_tdm_dac_swap_select
);
1348 static const struct snd_kcontrol_new rt5645_if1_dac2_tdm_sel_mux
=
1349 SOC_DAPM_ENUM("IF1 DAC2 source", rt5645_tdm_dac2_enum
);
1351 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_dac3_enum
,
1352 RT5645_TDM_CTRL_3
, 0, rt5645_tdm_dac_swap_select
);
1354 static const struct snd_kcontrol_new rt5645_if1_dac3_tdm_sel_mux
=
1355 SOC_DAPM_ENUM("IF1 DAC3 source", rt5645_tdm_dac3_enum
);
1357 /* MX-7a [14:12][10:8][6:4][2:0] */
1358 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac0_enum
,
1359 RT5650_TDM_CTRL_4
, 12, rt5645_tdm_dac_swap_select
);
1361 static const struct snd_kcontrol_new rt5650_if1_dac0_tdm_sel_mux
=
1362 SOC_DAPM_ENUM("IF1 DAC0 source", rt5650_tdm_dac0_enum
);
1364 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac1_enum
,
1365 RT5650_TDM_CTRL_4
, 8, rt5645_tdm_dac_swap_select
);
1367 static const struct snd_kcontrol_new rt5650_if1_dac1_tdm_sel_mux
=
1368 SOC_DAPM_ENUM("IF1 DAC1 source", rt5650_tdm_dac1_enum
);
1370 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac2_enum
,
1371 RT5650_TDM_CTRL_4
, 4, rt5645_tdm_dac_swap_select
);
1373 static const struct snd_kcontrol_new rt5650_if1_dac2_tdm_sel_mux
=
1374 SOC_DAPM_ENUM("IF1 DAC2 source", rt5650_tdm_dac2_enum
);
1376 static SOC_ENUM_SINGLE_DECL(rt5650_tdm_dac3_enum
,
1377 RT5650_TDM_CTRL_4
, 0, rt5645_tdm_dac_swap_select
);
1379 static const struct snd_kcontrol_new rt5650_if1_dac3_tdm_sel_mux
=
1380 SOC_DAPM_ENUM("IF1 DAC3 source", rt5650_tdm_dac3_enum
);
1383 static const char * const rt5650_a_dac1_src
[] = {
1384 "DAC1", "Stereo DAC Mixer"
1387 static SOC_ENUM_SINGLE_DECL(
1388 rt5650_a_dac1_l_enum
, RT5650_A_DAC_SOUR
,
1389 RT5650_A_DAC1_L_IN_SFT
, rt5650_a_dac1_src
);
1391 static const struct snd_kcontrol_new rt5650_a_dac1_l_mux
=
1392 SOC_DAPM_ENUM("A DAC1 L source", rt5650_a_dac1_l_enum
);
1394 static SOC_ENUM_SINGLE_DECL(
1395 rt5650_a_dac1_r_enum
, RT5650_A_DAC_SOUR
,
1396 RT5650_A_DAC1_R_IN_SFT
, rt5650_a_dac1_src
);
1398 static const struct snd_kcontrol_new rt5650_a_dac1_r_mux
=
1399 SOC_DAPM_ENUM("A DAC1 R source", rt5650_a_dac1_r_enum
);
1402 static const char * const rt5650_a_dac2_src
[] = {
1403 "Stereo DAC Mixer", "Mono DAC Mixer"
1406 static SOC_ENUM_SINGLE_DECL(
1407 rt5650_a_dac2_l_enum
, RT5650_A_DAC_SOUR
,
1408 RT5650_A_DAC2_L_IN_SFT
, rt5650_a_dac2_src
);
1410 static const struct snd_kcontrol_new rt5650_a_dac2_l_mux
=
1411 SOC_DAPM_ENUM("A DAC2 L source", rt5650_a_dac2_l_enum
);
1413 static SOC_ENUM_SINGLE_DECL(
1414 rt5650_a_dac2_r_enum
, RT5650_A_DAC_SOUR
,
1415 RT5650_A_DAC2_R_IN_SFT
, rt5650_a_dac2_src
);
1417 static const struct snd_kcontrol_new rt5650_a_dac2_r_mux
=
1418 SOC_DAPM_ENUM("A DAC2 R source", rt5650_a_dac2_r_enum
);
1421 static const char * const rt5645_if2_adc_in_src
[] = {
1422 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1425 static SOC_ENUM_SINGLE_DECL(
1426 rt5645_if2_adc_in_enum
, RT5645_DIG_INF1_DATA
,
1427 RT5645_IF2_ADC_IN_SFT
, rt5645_if2_adc_in_src
);
1429 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux
=
1430 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum
);
1433 static const char * const rt5645_if3_adc_in_src
[] = {
1434 "IF_ADC1", "IF_ADC2", "VAD_ADC"
1437 static SOC_ENUM_SINGLE_DECL(
1438 rt5645_if3_adc_in_enum
, RT5645_DIG_INF1_DATA
,
1439 RT5645_IF3_ADC_IN_SFT
, rt5645_if3_adc_in_src
);
1441 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux
=
1442 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum
);
1444 /* MX-31 [15] [13] [11] [9] */
1445 static const char * const rt5645_pdm_src
[] = {
1446 "Mono DAC", "Stereo DAC"
1449 static SOC_ENUM_SINGLE_DECL(
1450 rt5645_pdm1_l_enum
, RT5645_PDM_OUT_CTRL
,
1451 RT5645_PDM1_L_SFT
, rt5645_pdm_src
);
1453 static const struct snd_kcontrol_new rt5645_pdm1_l_mux
=
1454 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum
);
1456 static SOC_ENUM_SINGLE_DECL(
1457 rt5645_pdm1_r_enum
, RT5645_PDM_OUT_CTRL
,
1458 RT5645_PDM1_R_SFT
, rt5645_pdm_src
);
1460 static const struct snd_kcontrol_new rt5645_pdm1_r_mux
=
1461 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum
);
1464 static const char * const rt5645_vad_adc_src
[] = {
1465 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1468 static SOC_ENUM_SINGLE_DECL(
1469 rt5645_vad_adc_enum
, RT5645_VAD_CTRL4
,
1470 RT5645_VAD_SEL_SFT
, rt5645_vad_adc_src
);
1472 static const struct snd_kcontrol_new rt5645_vad_adc_mux
=
1473 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum
);
1475 static const struct snd_kcontrol_new spk_l_vol_control
=
1476 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL
,
1477 RT5645_L_MUTE_SFT
, 1, 1);
1479 static const struct snd_kcontrol_new spk_r_vol_control
=
1480 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL
,
1481 RT5645_R_MUTE_SFT
, 1, 1);
1483 static const struct snd_kcontrol_new hp_l_vol_control
=
1484 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL
,
1485 RT5645_L_MUTE_SFT
, 1, 1);
1487 static const struct snd_kcontrol_new hp_r_vol_control
=
1488 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL
,
1489 RT5645_R_MUTE_SFT
, 1, 1);
1491 static const struct snd_kcontrol_new pdm1_l_vol_control
=
1492 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL
,
1493 RT5645_M_PDM1_L
, 1, 1);
1495 static const struct snd_kcontrol_new pdm1_r_vol_control
=
1496 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL
,
1497 RT5645_M_PDM1_R
, 1, 1);
1499 static void hp_amp_power(struct snd_soc_codec
*codec
, int on
)
1501 static int hp_amp_power_count
;
1502 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
1505 if (hp_amp_power_count
<= 0) {
1506 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
1507 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x3100);
1508 snd_soc_write(codec
, RT5645_CHARGE_PUMP
,
1510 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x000d);
1511 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1512 RT5645_HP_DCC_INT1
, 0x9f01);
1514 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1515 RT5645_HP_CO_MASK
, RT5645_HP_CO_EN
);
1516 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1518 snd_soc_write(codec
, RT5645_DEPOP_M3
, 0x0737);
1519 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1520 RT5645_MAMP_INT_REG2
, 0xfc00);
1521 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1140);
1523 rt5645
->hp_on
= true;
1525 /* depop parameters */
1526 snd_soc_update_bits(codec
, RT5645_DEPOP_M2
,
1527 RT5645_DEPOP_MASK
, RT5645_DEPOP_MAN
);
1528 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x000d);
1529 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1530 RT5645_HP_DCC_INT1
, 0x9f01);
1532 /* headphone amp power on */
1533 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1534 RT5645_PWR_FV1
| RT5645_PWR_FV2
, 0);
1535 snd_soc_update_bits(codec
, RT5645_PWR_VOL
,
1536 RT5645_PWR_HV_L
| RT5645_PWR_HV_R
,
1537 RT5645_PWR_HV_L
| RT5645_PWR_HV_R
);
1538 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1539 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1541 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1544 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1545 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
1546 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
1548 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1549 RT5645_HP_CO_MASK
| RT5645_HP_SG_MASK
,
1550 RT5645_HP_CO_EN
| RT5645_HP_SG_EN
);
1551 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1553 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1557 hp_amp_power_count
++;
1559 hp_amp_power_count
--;
1560 if (hp_amp_power_count
<= 0) {
1561 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
1562 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1564 snd_soc_write(codec
, RT5645_DEPOP_M3
, 0x0737);
1565 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1566 RT5645_MAMP_INT_REG2
, 0xfc00);
1567 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1140);
1569 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x0001);
1572 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1574 RT5645_HP_L_SMT_MASK
|
1575 RT5645_HP_R_SMT_MASK
,
1577 RT5645_HP_L_SMT_DIS
|
1578 RT5645_HP_R_SMT_DIS
);
1579 /* headphone amp power down */
1580 snd_soc_write(codec
, RT5645_DEPOP_M1
, 0x0000);
1581 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1582 RT5645_PWR_HP_L
| RT5645_PWR_HP_R
|
1584 snd_soc_update_bits(codec
, RT5645_DEPOP_M2
,
1585 RT5645_DEPOP_MASK
, 0);
1591 static int rt5645_hp_event(struct snd_soc_dapm_widget
*w
,
1592 struct snd_kcontrol
*kcontrol
, int event
)
1594 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1595 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
1598 case SND_SOC_DAPM_POST_PMU
:
1599 hp_amp_power(codec
, 1);
1600 /* headphone unmute sequence */
1601 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
) {
1602 snd_soc_update_bits(codec
, RT5645_DEPOP_M3
,
1603 RT5645_CP_FQ1_MASK
| RT5645_CP_FQ2_MASK
|
1605 (RT5645_CP_FQ_192_KHZ
<< RT5645_CP_FQ1_SFT
) |
1606 (RT5645_CP_FQ_12_KHZ
<< RT5645_CP_FQ2_SFT
) |
1607 (RT5645_CP_FQ_192_KHZ
<< RT5645_CP_FQ3_SFT
));
1608 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1609 RT5645_MAMP_INT_REG2
, 0xfc00);
1610 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1611 RT5645_SMT_TRIG_MASK
, RT5645_SMT_TRIG_EN
);
1612 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1613 RT5645_RSTN_MASK
, RT5645_RSTN_EN
);
1614 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1615 RT5645_RSTN_MASK
| RT5645_HP_L_SMT_MASK
|
1616 RT5645_HP_R_SMT_MASK
, RT5645_RSTN_DIS
|
1617 RT5645_HP_L_SMT_EN
| RT5645_HP_R_SMT_EN
);
1619 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1620 RT5645_HP_SG_MASK
| RT5645_HP_L_SMT_MASK
|
1621 RT5645_HP_R_SMT_MASK
, RT5645_HP_SG_DIS
|
1622 RT5645_HP_L_SMT_DIS
| RT5645_HP_R_SMT_DIS
);
1626 case SND_SOC_DAPM_PRE_PMD
:
1627 /* headphone mute sequence */
1628 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
) {
1629 snd_soc_update_bits(codec
, RT5645_DEPOP_M3
,
1630 RT5645_CP_FQ1_MASK
| RT5645_CP_FQ2_MASK
|
1632 (RT5645_CP_FQ_96_KHZ
<< RT5645_CP_FQ1_SFT
) |
1633 (RT5645_CP_FQ_12_KHZ
<< RT5645_CP_FQ2_SFT
) |
1634 (RT5645_CP_FQ_96_KHZ
<< RT5645_CP_FQ3_SFT
));
1635 regmap_write(rt5645
->regmap
, RT5645_PR_BASE
+
1636 RT5645_MAMP_INT_REG2
, 0xfc00);
1637 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1638 RT5645_HP_SG_MASK
, RT5645_HP_SG_EN
);
1639 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1640 RT5645_RSTP_MASK
, RT5645_RSTP_EN
);
1641 snd_soc_update_bits(codec
, RT5645_DEPOP_M1
,
1642 RT5645_RSTP_MASK
| RT5645_HP_L_SMT_MASK
|
1643 RT5645_HP_R_SMT_MASK
, RT5645_RSTP_DIS
|
1644 RT5645_HP_L_SMT_EN
| RT5645_HP_R_SMT_EN
);
1647 hp_amp_power(codec
, 0);
1657 static int rt5645_spk_event(struct snd_soc_dapm_widget
*w
,
1658 struct snd_kcontrol
*kcontrol
, int event
)
1660 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1663 case SND_SOC_DAPM_POST_PMU
:
1664 rt5645_enable_hweq(codec
);
1665 snd_soc_update_bits(codec
, RT5645_PWR_DIG1
,
1666 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1668 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1669 RT5645_PWR_CLS_D_L
);
1670 snd_soc_update_bits(codec
, RT5645_GEN_CTRL3
,
1671 RT5645_DET_CLK_MASK
, RT5645_DET_CLK_MODE1
);
1674 case SND_SOC_DAPM_PRE_PMD
:
1675 snd_soc_update_bits(codec
, RT5645_GEN_CTRL3
,
1676 RT5645_DET_CLK_MASK
, RT5645_DET_CLK_DIS
);
1677 snd_soc_write(codec
, RT5645_EQ_CTRL2
, 0);
1678 snd_soc_update_bits(codec
, RT5645_PWR_DIG1
,
1679 RT5645_PWR_CLS_D
| RT5645_PWR_CLS_D_R
|
1680 RT5645_PWR_CLS_D_L
, 0);
1690 static int rt5645_lout_event(struct snd_soc_dapm_widget
*w
,
1691 struct snd_kcontrol
*kcontrol
, int event
)
1693 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1696 case SND_SOC_DAPM_POST_PMU
:
1697 hp_amp_power(codec
, 1);
1698 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1699 RT5645_PWR_LM
, RT5645_PWR_LM
);
1700 snd_soc_update_bits(codec
, RT5645_LOUT1
,
1701 RT5645_L_MUTE
| RT5645_R_MUTE
, 0);
1704 case SND_SOC_DAPM_PRE_PMD
:
1705 snd_soc_update_bits(codec
, RT5645_LOUT1
,
1706 RT5645_L_MUTE
| RT5645_R_MUTE
,
1707 RT5645_L_MUTE
| RT5645_R_MUTE
);
1708 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
1710 hp_amp_power(codec
, 0);
1720 static int rt5645_bst2_event(struct snd_soc_dapm_widget
*w
,
1721 struct snd_kcontrol
*kcontrol
, int event
)
1723 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1726 case SND_SOC_DAPM_POST_PMU
:
1727 snd_soc_update_bits(codec
, RT5645_PWR_ANLG2
,
1728 RT5645_PWR_BST2_P
, RT5645_PWR_BST2_P
);
1731 case SND_SOC_DAPM_PRE_PMD
:
1732 snd_soc_update_bits(codec
, RT5645_PWR_ANLG2
,
1733 RT5645_PWR_BST2_P
, 0);
1743 static int rt5650_hp_event(struct snd_soc_dapm_widget
*w
,
1744 struct snd_kcontrol
*k
, int event
)
1746 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
1747 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
1750 case SND_SOC_DAPM_POST_PMU
:
1751 if (rt5645
->hp_on
) {
1753 rt5645
->hp_on
= false;
1764 static const struct snd_soc_dapm_widget rt5645_dapm_widgets
[] = {
1765 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER
,
1766 RT5645_PWR_LDO2_BIT
, 0, NULL
, 0),
1767 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2
,
1768 RT5645_PWR_PLL_BIT
, 0, NULL
, 0),
1770 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2
,
1771 RT5645_PWR_JD1_BIT
, 0, NULL
, 0),
1772 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL
,
1773 RT5645_PWR_MIC_DET_BIT
, 0, NULL
, 0),
1776 SND_SOC_DAPM_SUPPLY_S("I2S1 ASRC", 1, RT5645_ASRC_1
,
1778 SND_SOC_DAPM_SUPPLY_S("I2S2 ASRC", 1, RT5645_ASRC_1
,
1780 SND_SOC_DAPM_SUPPLY_S("DAC STO ASRC", 1, RT5645_ASRC_1
,
1782 SND_SOC_DAPM_SUPPLY_S("DAC MONO L ASRC", 1, RT5645_ASRC_1
,
1784 SND_SOC_DAPM_SUPPLY_S("DAC MONO R ASRC", 1, RT5645_ASRC_1
,
1786 SND_SOC_DAPM_SUPPLY_S("DMIC STO1 ASRC", 1, RT5645_ASRC_1
,
1788 SND_SOC_DAPM_SUPPLY_S("DMIC MONO L ASRC", 1, RT5645_ASRC_1
,
1790 SND_SOC_DAPM_SUPPLY_S("DMIC MONO R ASRC", 1, RT5645_ASRC_1
,
1792 SND_SOC_DAPM_SUPPLY_S("ADC STO1 ASRC", 1, RT5645_ASRC_1
,
1794 SND_SOC_DAPM_SUPPLY_S("ADC MONO L ASRC", 1, RT5645_ASRC_1
,
1796 SND_SOC_DAPM_SUPPLY_S("ADC MONO R ASRC", 1, RT5645_ASRC_1
,
1801 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2
,
1802 RT5645_PWR_MB1_BIT
, 0),
1803 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2
,
1804 RT5645_PWR_MB2_BIT
, 0),
1806 SND_SOC_DAPM_INPUT("DMIC L1"),
1807 SND_SOC_DAPM_INPUT("DMIC R1"),
1808 SND_SOC_DAPM_INPUT("DMIC L2"),
1809 SND_SOC_DAPM_INPUT("DMIC R2"),
1811 SND_SOC_DAPM_INPUT("IN1P"),
1812 SND_SOC_DAPM_INPUT("IN1N"),
1813 SND_SOC_DAPM_INPUT("IN2P"),
1814 SND_SOC_DAPM_INPUT("IN2N"),
1816 SND_SOC_DAPM_INPUT("Haptic Generator"),
1818 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1819 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1820 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM
, 0, 0,
1821 set_dmic_clk
, SND_SOC_DAPM_PRE_PMU
),
1822 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1
,
1823 RT5645_DMIC_1_EN_SFT
, 0, NULL
, 0),
1824 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1
,
1825 RT5645_DMIC_2_EN_SFT
, 0, NULL
, 0),
1827 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2
,
1828 RT5645_PWR_BST1_BIT
, 0, NULL
, 0),
1829 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2
,
1830 RT5645_PWR_BST2_BIT
, 0, NULL
, 0, rt5645_bst2_event
,
1831 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
1833 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL
,
1834 RT5645_PWR_IN_L_BIT
, 0, NULL
, 0),
1835 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL
,
1836 RT5645_PWR_IN_R_BIT
, 0, NULL
, 0),
1838 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER
, RT5645_PWR_RM_L_BIT
,
1839 0, rt5645_rec_l_mix
, ARRAY_SIZE(rt5645_rec_l_mix
)),
1840 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER
, RT5645_PWR_RM_R_BIT
,
1841 0, rt5645_rec_r_mix
, ARRAY_SIZE(rt5645_rec_r_mix
)),
1843 SND_SOC_DAPM_ADC("ADC L", NULL
, SND_SOC_NOPM
, 0, 0),
1844 SND_SOC_DAPM_ADC("ADC R", NULL
, SND_SOC_NOPM
, 0, 0),
1846 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1
,
1847 RT5645_PWR_ADC_L_BIT
, 0, NULL
, 0),
1848 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1
,
1849 RT5645_PWR_ADC_R_BIT
, 0, NULL
, 0),
1852 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM
, 0, 0,
1853 &rt5645_sto1_dmic_mux
),
1854 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM
, 0, 0,
1855 &rt5645_sto_adc2_mux
),
1856 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM
, 0, 0,
1857 &rt5645_sto_adc2_mux
),
1858 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM
, 0, 0,
1859 &rt5645_sto_adc1_mux
),
1860 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM
, 0, 0,
1861 &rt5645_sto_adc1_mux
),
1862 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM
, 0, 0,
1863 &rt5645_mono_dmic_l_mux
),
1864 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM
, 0, 0,
1865 &rt5645_mono_dmic_r_mux
),
1866 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM
, 0, 0,
1867 &rt5645_mono_adc_l2_mux
),
1868 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM
, 0, 0,
1869 &rt5645_mono_adc_l1_mux
),
1870 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM
, 0, 0,
1871 &rt5645_mono_adc_r1_mux
),
1872 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM
, 0, 0,
1873 &rt5645_mono_adc_r2_mux
),
1876 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2
,
1877 RT5645_PWR_ADC_S1F_BIT
, 0, NULL
, 0),
1878 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM
, 0, 0,
1879 rt5645_sto1_adc_l_mix
, ARRAY_SIZE(rt5645_sto1_adc_l_mix
),
1881 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM
, 0, 0,
1882 rt5645_sto1_adc_r_mix
, ARRAY_SIZE(rt5645_sto1_adc_r_mix
),
1884 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2
,
1885 RT5645_PWR_ADC_MF_L_BIT
, 0, NULL
, 0),
1886 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM
, 0, 0,
1887 rt5645_mono_adc_l_mix
, ARRAY_SIZE(rt5645_mono_adc_l_mix
),
1889 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2
,
1890 RT5645_PWR_ADC_MF_R_BIT
, 0, NULL
, 0),
1891 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM
, 0, 0,
1892 rt5645_mono_adc_r_mix
, ARRAY_SIZE(rt5645_mono_adc_r_mix
),
1896 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1897 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1898 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1899 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1900 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1901 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1902 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1903 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1904 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1905 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1908 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM
,
1909 0, 0, &rt5645_if2_adc_in_mux
),
1911 /* Digital Interface */
1912 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1
,
1913 RT5645_PWR_I2S1_BIT
, 0, NULL
, 0),
1914 SND_SOC_DAPM_PGA("IF1 DAC0", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1915 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1916 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1917 SND_SOC_DAPM_PGA("IF1 DAC3", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1918 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1919 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1920 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1921 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1
,
1922 RT5645_PWR_I2S2_BIT
, 0, NULL
, 0),
1923 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1924 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1925 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1926 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM
, 0, 0, NULL
, 0),
1928 /* Digital Interface Select */
1929 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM
,
1930 0, 0, &rt5645_vad_adc_mux
),
1932 /* Audio Interface */
1933 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM
, 0, 0),
1934 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM
, 0, 0),
1935 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM
, 0, 0),
1936 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM
, 0, 0),
1939 /* DAC mixer before sound effect */
1940 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM
, 0, 0,
1941 rt5645_dac_l_mix
, ARRAY_SIZE(rt5645_dac_l_mix
)),
1942 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM
, 0, 0,
1943 rt5645_dac_r_mix
, ARRAY_SIZE(rt5645_dac_r_mix
)),
1945 /* DAC2 channel Mux */
1946 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac_l2_mux
),
1947 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac_r2_mux
),
1948 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1
,
1949 RT5645_PWR_DAC_L2_BIT
, 0, NULL
, 0),
1950 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1
,
1951 RT5645_PWR_DAC_R2_BIT
, 0, NULL
, 0),
1953 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac1l_mux
),
1954 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM
, 0, 0, &rt5645_dac1r_mux
),
1957 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2
,
1958 RT5645_PWR_DAC_S1F_BIT
, 0, NULL
, 0),
1959 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2
,
1960 RT5645_PWR_DAC_MF_L_BIT
, 0, NULL
, 0),
1961 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2
,
1962 RT5645_PWR_DAC_MF_R_BIT
, 0, NULL
, 0),
1963 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM
, 0, 0,
1964 rt5645_sto_dac_l_mix
, ARRAY_SIZE(rt5645_sto_dac_l_mix
)),
1965 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM
, 0, 0,
1966 rt5645_sto_dac_r_mix
, ARRAY_SIZE(rt5645_sto_dac_r_mix
)),
1967 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM
, 0, 0,
1968 rt5645_mono_dac_l_mix
, ARRAY_SIZE(rt5645_mono_dac_l_mix
)),
1969 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM
, 0, 0,
1970 rt5645_mono_dac_r_mix
, ARRAY_SIZE(rt5645_mono_dac_r_mix
)),
1971 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM
, 0, 0,
1972 rt5645_dig_l_mix
, ARRAY_SIZE(rt5645_dig_l_mix
)),
1973 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM
, 0, 0,
1974 rt5645_dig_r_mix
, ARRAY_SIZE(rt5645_dig_r_mix
)),
1977 SND_SOC_DAPM_DAC("DAC L1", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_L1_BIT
,
1979 SND_SOC_DAPM_DAC("DAC L2", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_L2_BIT
,
1981 SND_SOC_DAPM_DAC("DAC R1", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_R1_BIT
,
1983 SND_SOC_DAPM_DAC("DAC R2", NULL
, RT5645_PWR_DIG1
, RT5645_PWR_DAC_R2_BIT
,
1986 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER
, RT5645_PWR_SM_L_BIT
,
1987 0, rt5645_spk_l_mix
, ARRAY_SIZE(rt5645_spk_l_mix
)),
1988 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER
, RT5645_PWR_SM_R_BIT
,
1989 0, rt5645_spk_r_mix
, ARRAY_SIZE(rt5645_spk_r_mix
)),
1990 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER
, RT5645_PWR_OM_L_BIT
,
1991 0, rt5645_out_l_mix
, ARRAY_SIZE(rt5645_out_l_mix
)),
1992 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER
, RT5645_PWR_OM_R_BIT
,
1993 0, rt5645_out_r_mix
, ARRAY_SIZE(rt5645_out_r_mix
)),
1995 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL
, RT5645_PWR_SV_L_BIT
, 0,
1996 &spk_l_vol_control
),
1997 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL
, RT5645_PWR_SV_R_BIT
, 0,
1998 &spk_r_vol_control
),
1999 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL
, RT5645_PWR_HV_L_BIT
,
2000 0, rt5645_hpvoll_mix
, ARRAY_SIZE(rt5645_hpvoll_mix
)),
2001 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL
, RT5645_PWR_HV_R_BIT
,
2002 0, rt5645_hpvolr_mix
, ARRAY_SIZE(rt5645_hpvolr_mix
)),
2003 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER
,
2004 RT5645_PWR_HM_L_BIT
, 0, NULL
, 0),
2005 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER
,
2006 RT5645_PWR_HM_R_BIT
, 0, NULL
, 0),
2007 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2008 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2009 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM
, 0, 0, NULL
, 0),
2010 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM
, 0, 0, &hp_l_vol_control
),
2011 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM
, 0, 0, &hp_r_vol_control
),
2013 /* HPO/LOUT/Mono Mixer */
2014 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM
, 0, 0, rt5645_spo_l_mix
,
2015 ARRAY_SIZE(rt5645_spo_l_mix
)),
2016 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM
, 0, 0, rt5645_spo_r_mix
,
2017 ARRAY_SIZE(rt5645_spo_r_mix
)),
2018 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM
, 0, 0, rt5645_hpo_mix
,
2019 ARRAY_SIZE(rt5645_hpo_mix
)),
2020 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM
, 0, 0, rt5645_lout_mix
,
2021 ARRAY_SIZE(rt5645_lout_mix
)),
2023 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM
, 0, 0, rt5645_hp_event
,
2024 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
2025 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM
, 0, 0, rt5645_lout_event
,
2026 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
2027 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM
, 0, 0, rt5645_spk_event
,
2028 SND_SOC_DAPM_PRE_PMD
| SND_SOC_DAPM_POST_PMU
),
2031 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2
, RT5645_PWR_PDM1_BIT
,
2033 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM
, 0, 0, &rt5645_pdm1_l_mux
),
2034 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM
, 0, 0, &rt5645_pdm1_r_mux
),
2036 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM
, 0, 0, &pdm1_l_vol_control
),
2037 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM
, 0, 0, &pdm1_r_vol_control
),
2040 SND_SOC_DAPM_OUTPUT("HPOL"),
2041 SND_SOC_DAPM_OUTPUT("HPOR"),
2042 SND_SOC_DAPM_OUTPUT("LOUTL"),
2043 SND_SOC_DAPM_OUTPUT("LOUTR"),
2044 SND_SOC_DAPM_OUTPUT("PDM1L"),
2045 SND_SOC_DAPM_OUTPUT("PDM1R"),
2046 SND_SOC_DAPM_OUTPUT("SPOL"),
2047 SND_SOC_DAPM_OUTPUT("SPOR"),
2048 SND_SOC_DAPM_POST("DAPM_POST", rt5650_hp_event
),
2051 static const struct snd_soc_dapm_widget rt5645_specific_dapm_widgets
[] = {
2052 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 L Mux", SND_SOC_NOPM
, 0, 0,
2053 &rt5645_if1_dac0_tdm_sel_mux
),
2054 SND_SOC_DAPM_MUX("RT5645 IF1 DAC1 R Mux", SND_SOC_NOPM
, 0, 0,
2055 &rt5645_if1_dac1_tdm_sel_mux
),
2056 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 L Mux", SND_SOC_NOPM
, 0, 0,
2057 &rt5645_if1_dac2_tdm_sel_mux
),
2058 SND_SOC_DAPM_MUX("RT5645 IF1 DAC2 R Mux", SND_SOC_NOPM
, 0, 0,
2059 &rt5645_if1_dac3_tdm_sel_mux
),
2060 SND_SOC_DAPM_MUX("RT5645 IF1 ADC Mux", SND_SOC_NOPM
,
2061 0, 0, &rt5645_if1_adc_in_mux
),
2062 SND_SOC_DAPM_MUX("RT5645 IF1 ADC1 Swap Mux", SND_SOC_NOPM
,
2063 0, 0, &rt5645_if1_adc1_in_mux
),
2064 SND_SOC_DAPM_MUX("RT5645 IF1 ADC2 Swap Mux", SND_SOC_NOPM
,
2065 0, 0, &rt5645_if1_adc2_in_mux
),
2066 SND_SOC_DAPM_MUX("RT5645 IF1 ADC3 Swap Mux", SND_SOC_NOPM
,
2067 0, 0, &rt5645_if1_adc3_in_mux
),
2070 static const struct snd_soc_dapm_widget rt5650_specific_dapm_widgets
[] = {
2071 SND_SOC_DAPM_MUX("A DAC1 L Mux", SND_SOC_NOPM
,
2072 0, 0, &rt5650_a_dac1_l_mux
),
2073 SND_SOC_DAPM_MUX("A DAC1 R Mux", SND_SOC_NOPM
,
2074 0, 0, &rt5650_a_dac1_r_mux
),
2075 SND_SOC_DAPM_MUX("A DAC2 L Mux", SND_SOC_NOPM
,
2076 0, 0, &rt5650_a_dac2_l_mux
),
2077 SND_SOC_DAPM_MUX("A DAC2 R Mux", SND_SOC_NOPM
,
2078 0, 0, &rt5650_a_dac2_r_mux
),
2080 SND_SOC_DAPM_MUX("RT5650 IF1 ADC1 Swap Mux", SND_SOC_NOPM
,
2081 0, 0, &rt5650_if1_adc1_in_mux
),
2082 SND_SOC_DAPM_MUX("RT5650 IF1 ADC2 Swap Mux", SND_SOC_NOPM
,
2083 0, 0, &rt5650_if1_adc2_in_mux
),
2084 SND_SOC_DAPM_MUX("RT5650 IF1 ADC3 Swap Mux", SND_SOC_NOPM
,
2085 0, 0, &rt5650_if1_adc3_in_mux
),
2086 SND_SOC_DAPM_MUX("RT5650 IF1 ADC Mux", SND_SOC_NOPM
,
2087 0, 0, &rt5650_if1_adc_in_mux
),
2089 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 L Mux", SND_SOC_NOPM
, 0, 0,
2090 &rt5650_if1_dac0_tdm_sel_mux
),
2091 SND_SOC_DAPM_MUX("RT5650 IF1 DAC1 R Mux", SND_SOC_NOPM
, 0, 0,
2092 &rt5650_if1_dac1_tdm_sel_mux
),
2093 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 L Mux", SND_SOC_NOPM
, 0, 0,
2094 &rt5650_if1_dac2_tdm_sel_mux
),
2095 SND_SOC_DAPM_MUX("RT5650 IF1 DAC2 R Mux", SND_SOC_NOPM
, 0, 0,
2096 &rt5650_if1_dac3_tdm_sel_mux
),
2099 static const struct snd_soc_dapm_route rt5645_dapm_routes
[] = {
2100 { "adc stereo1 filter", NULL
, "ADC STO1 ASRC", is_using_asrc
},
2101 { "adc mono left filter", NULL
, "ADC MONO L ASRC", is_using_asrc
},
2102 { "adc mono right filter", NULL
, "ADC MONO R ASRC", is_using_asrc
},
2103 { "dac mono left filter", NULL
, "DAC MONO L ASRC", is_using_asrc
},
2104 { "dac mono right filter", NULL
, "DAC MONO R ASRC", is_using_asrc
},
2105 { "dac stereo1 filter", NULL
, "DAC STO ASRC", is_using_asrc
},
2107 { "I2S1", NULL
, "I2S1 ASRC" },
2108 { "I2S2", NULL
, "I2S2 ASRC" },
2110 { "IN1P", NULL
, "LDO2" },
2111 { "IN2P", NULL
, "LDO2" },
2113 { "DMIC1", NULL
, "DMIC L1" },
2114 { "DMIC1", NULL
, "DMIC R1" },
2115 { "DMIC2", NULL
, "DMIC L2" },
2116 { "DMIC2", NULL
, "DMIC R2" },
2118 { "BST1", NULL
, "IN1P" },
2119 { "BST1", NULL
, "IN1N" },
2120 { "BST1", NULL
, "JD Power" },
2121 { "BST1", NULL
, "Mic Det Power" },
2122 { "BST2", NULL
, "IN2P" },
2123 { "BST2", NULL
, "IN2N" },
2125 { "INL VOL", NULL
, "IN2P" },
2126 { "INR VOL", NULL
, "IN2N" },
2128 { "RECMIXL", "HPOL Switch", "HPOL" },
2129 { "RECMIXL", "INL Switch", "INL VOL" },
2130 { "RECMIXL", "BST2 Switch", "BST2" },
2131 { "RECMIXL", "BST1 Switch", "BST1" },
2132 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
2134 { "RECMIXR", "HPOR Switch", "HPOR" },
2135 { "RECMIXR", "INR Switch", "INR VOL" },
2136 { "RECMIXR", "BST2 Switch", "BST2" },
2137 { "RECMIXR", "BST1 Switch", "BST1" },
2138 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
2140 { "ADC L", NULL
, "RECMIXL" },
2141 { "ADC L", NULL
, "ADC L power" },
2142 { "ADC R", NULL
, "RECMIXR" },
2143 { "ADC R", NULL
, "ADC R power" },
2145 {"DMIC L1", NULL
, "DMIC CLK"},
2146 {"DMIC L1", NULL
, "DMIC1 Power"},
2147 {"DMIC R1", NULL
, "DMIC CLK"},
2148 {"DMIC R1", NULL
, "DMIC1 Power"},
2149 {"DMIC L2", NULL
, "DMIC CLK"},
2150 {"DMIC L2", NULL
, "DMIC2 Power"},
2151 {"DMIC R2", NULL
, "DMIC CLK"},
2152 {"DMIC R2", NULL
, "DMIC2 Power"},
2154 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
2155 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
2156 { "Stereo1 DMIC Mux", NULL
, "DMIC STO1 ASRC" },
2158 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
2159 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
2160 { "Mono DMIC L Mux", NULL
, "DMIC MONO L ASRC" },
2162 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
2163 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
2164 { "Mono DMIC R Mux", NULL
, "DMIC MONO R ASRC" },
2166 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2167 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
2168 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
2169 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
2171 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
2172 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
2173 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
2174 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
2176 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
2177 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2178 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
2179 { "Mono ADC L1 Mux", "ADC", "ADC L" },
2181 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2182 { "Mono ADC R1 Mux", "ADC", "ADC R" },
2183 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
2184 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
2186 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
2187 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
2188 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
2189 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
2191 { "Stereo1 ADC MIXL", NULL
, "Sto1 ADC MIXL" },
2192 { "Stereo1 ADC MIXL", NULL
, "adc stereo1 filter" },
2193 { "adc stereo1 filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2195 { "Stereo1 ADC MIXR", NULL
, "Sto1 ADC MIXR" },
2196 { "Stereo1 ADC MIXR", NULL
, "adc stereo1 filter" },
2197 { "adc stereo1 filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2199 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
2200 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
2201 { "Mono ADC MIXL", NULL
, "adc mono left filter" },
2202 { "adc mono left filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2204 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
2205 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
2206 { "Mono ADC MIXR", NULL
, "adc mono right filter" },
2207 { "adc mono right filter", NULL
, "PLL1", is_sys_clk_from_pll
},
2209 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
2210 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
2211 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
2213 { "IF_ADC1", NULL
, "Stereo1 ADC MIXL" },
2214 { "IF_ADC1", NULL
, "Stereo1 ADC MIXR" },
2215 { "IF_ADC2", NULL
, "Mono ADC MIXL" },
2216 { "IF_ADC2", NULL
, "Mono ADC MIXR" },
2217 { "VAD_ADC", NULL
, "VAD ADC Mux" },
2219 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
2220 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
2221 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
2223 { "IF1 ADC", NULL
, "I2S1" },
2224 { "IF2 ADC", NULL
, "I2S2" },
2225 { "IF2 ADC", NULL
, "IF2 ADC Mux" },
2227 { "AIF2TX", NULL
, "IF2 ADC" },
2229 { "IF1 DAC0", NULL
, "AIF1RX" },
2230 { "IF1 DAC1", NULL
, "AIF1RX" },
2231 { "IF1 DAC2", NULL
, "AIF1RX" },
2232 { "IF1 DAC3", NULL
, "AIF1RX" },
2233 { "IF2 DAC", NULL
, "AIF2RX" },
2235 { "IF1 DAC0", NULL
, "I2S1" },
2236 { "IF1 DAC1", NULL
, "I2S1" },
2237 { "IF1 DAC2", NULL
, "I2S1" },
2238 { "IF1 DAC3", NULL
, "I2S1" },
2239 { "IF2 DAC", NULL
, "I2S2" },
2241 { "IF2 DAC L", NULL
, "IF2 DAC" },
2242 { "IF2 DAC R", NULL
, "IF2 DAC" },
2244 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
2245 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
2247 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
2248 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
2249 { "DAC1 MIXL", NULL
, "dac stereo1 filter" },
2250 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
2251 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
2252 { "DAC1 MIXR", NULL
, "dac stereo1 filter" },
2254 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
2255 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
2256 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
2257 { "DAC L2 Volume", NULL
, "DAC L2 Mux" },
2258 { "DAC L2 Volume", NULL
, "dac mono left filter" },
2260 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
2261 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
2262 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
2263 { "DAC R2 Volume", NULL
, "DAC R2 Mux" },
2264 { "DAC R2 Volume", NULL
, "dac mono right filter" },
2266 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2267 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
2268 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2269 { "Stereo DAC MIXL", NULL
, "dac stereo1 filter" },
2270 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2271 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
2272 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2273 { "Stereo DAC MIXR", NULL
, "dac stereo1 filter" },
2275 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
2276 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2277 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2278 { "Mono DAC MIXL", NULL
, "dac mono left filter" },
2279 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
2280 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2281 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2282 { "Mono DAC MIXR", NULL
, "dac mono right filter" },
2284 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
2285 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
2286 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
2287 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
2288 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
2289 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
2291 { "DAC L1", NULL
, "PLL1", is_sys_clk_from_pll
},
2292 { "DAC R1", NULL
, "PLL1", is_sys_clk_from_pll
},
2293 { "DAC L2", NULL
, "PLL1", is_sys_clk_from_pll
},
2294 { "DAC R2", NULL
, "PLL1", is_sys_clk_from_pll
},
2296 { "SPK MIXL", "BST1 Switch", "BST1" },
2297 { "SPK MIXL", "INL Switch", "INL VOL" },
2298 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
2299 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
2300 { "SPK MIXR", "BST2 Switch", "BST2" },
2301 { "SPK MIXR", "INR Switch", "INR VOL" },
2302 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
2303 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
2305 { "OUT MIXL", "BST1 Switch", "BST1" },
2306 { "OUT MIXL", "INL Switch", "INL VOL" },
2307 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
2308 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
2310 { "OUT MIXR", "BST2 Switch", "BST2" },
2311 { "OUT MIXR", "INR Switch", "INR VOL" },
2312 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
2313 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
2315 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
2316 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
2317 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
2318 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
2319 { "HPOVOL MIXL", NULL
, "HPOVOL MIXL Power" },
2320 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
2321 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
2322 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
2323 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
2324 { "HPOVOL MIXR", NULL
, "HPOVOL MIXR Power" },
2326 { "DAC 2", NULL
, "DAC L2" },
2327 { "DAC 2", NULL
, "DAC R2" },
2328 { "DAC 1", NULL
, "DAC L1" },
2329 { "DAC 1", NULL
, "DAC R1" },
2330 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
2331 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
2332 { "HPOVOL", NULL
, "HPOVOL L" },
2333 { "HPOVOL", NULL
, "HPOVOL R" },
2334 { "HPO MIX", "DAC1 Switch", "DAC 1" },
2335 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
2337 { "SPKVOL L", "Switch", "SPK MIXL" },
2338 { "SPKVOL R", "Switch", "SPK MIXR" },
2340 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
2341 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
2342 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
2343 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
2344 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
2345 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
2347 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
2348 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
2349 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
2350 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
2352 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
2353 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
2354 { "PDM1 L Mux", NULL
, "PDM1 Power" },
2355 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
2356 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
2357 { "PDM1 R Mux", NULL
, "PDM1 Power" },
2359 { "HP amp", NULL
, "HPO MIX" },
2360 { "HP amp", NULL
, "JD Power" },
2361 { "HP amp", NULL
, "Mic Det Power" },
2362 { "HP amp", NULL
, "LDO2" },
2363 { "HPOL", NULL
, "HP amp" },
2364 { "HPOR", NULL
, "HP amp" },
2366 { "LOUT amp", NULL
, "LOUT MIX" },
2367 { "LOUTL", NULL
, "LOUT amp" },
2368 { "LOUTR", NULL
, "LOUT amp" },
2370 { "PDM1 L", "Switch", "PDM1 L Mux" },
2371 { "PDM1 R", "Switch", "PDM1 R Mux" },
2373 { "PDM1L", NULL
, "PDM1 L" },
2374 { "PDM1R", NULL
, "PDM1 R" },
2376 { "SPK amp", NULL
, "SPOL MIX" },
2377 { "SPK amp", NULL
, "SPOR MIX" },
2378 { "SPOL", NULL
, "SPK amp" },
2379 { "SPOR", NULL
, "SPK amp" },
2382 static const struct snd_soc_dapm_route rt5650_specific_dapm_routes
[] = {
2383 { "A DAC1 L Mux", "DAC1", "DAC1 MIXL"},
2384 { "A DAC1 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2385 { "A DAC1 R Mux", "DAC1", "DAC1 MIXR"},
2386 { "A DAC1 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2388 { "A DAC2 L Mux", "Stereo DAC Mixer", "Stereo DAC MIXL"},
2389 { "A DAC2 L Mux", "Mono DAC Mixer", "Mono DAC MIXL"},
2390 { "A DAC2 R Mux", "Stereo DAC Mixer", "Stereo DAC MIXR"},
2391 { "A DAC2 R Mux", "Mono DAC Mixer", "Mono DAC MIXR"},
2393 { "DAC L1", NULL
, "A DAC1 L Mux" },
2394 { "DAC R1", NULL
, "A DAC1 R Mux" },
2395 { "DAC L2", NULL
, "A DAC2 L Mux" },
2396 { "DAC R2", NULL
, "A DAC2 R Mux" },
2398 { "RT5650 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2399 { "RT5650 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2400 { "RT5650 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2401 { "RT5650 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2403 { "RT5650 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2404 { "RT5650 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2405 { "RT5650 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2406 { "RT5650 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2408 { "RT5650 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2409 { "RT5650 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2410 { "RT5650 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2411 { "RT5650 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2413 { "IF1 ADC", NULL
, "RT5650 IF1 ADC1 Swap Mux" },
2414 { "IF1 ADC", NULL
, "RT5650 IF1 ADC2 Swap Mux" },
2415 { "IF1 ADC", NULL
, "RT5650 IF1 ADC3 Swap Mux" },
2417 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/DAC_REF/Null", "IF1 ADC" },
2418 { "RT5650 IF1 ADC Mux", "IF_ADC1/IF_ADC2/Null/DAC_REF", "IF1 ADC" },
2419 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/IF_ADC2/Null", "IF1 ADC" },
2420 { "RT5650 IF1 ADC Mux", "IF_ADC1/DAC_REF/Null/IF_ADC2", "IF1 ADC" },
2421 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/DAC_REF/IF_ADC2", "IF1 ADC" },
2422 { "RT5650 IF1 ADC Mux", "IF_ADC1/Null/IF_ADC2/DAC_REF", "IF1 ADC" },
2424 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/DAC_REF/Null", "IF1 ADC" },
2425 { "RT5650 IF1 ADC Mux", "IF_ADC2/IF_ADC1/Null/DAC_REF", "IF1 ADC" },
2426 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/IF_ADC1/Null", "IF1 ADC" },
2427 { "RT5650 IF1 ADC Mux", "IF_ADC2/DAC_REF/Null/IF_ADC1", "IF1 ADC" },
2428 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/DAC_REF/IF_ADC1", "IF1 ADC" },
2429 { "RT5650 IF1 ADC Mux", "IF_ADC2/Null/IF_ADC1/DAC_REF", "IF1 ADC" },
2431 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/IF_ADC2/Null", "IF1 ADC" },
2432 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC1/Null/IF_ADC2", "IF1 ADC" },
2433 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/IF_ADC1/Null", "IF1 ADC" },
2434 { "RT5650 IF1 ADC Mux", "DAC_REF/IF_ADC2/Null/IF_ADC1", "IF1 ADC" },
2435 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC1/IF_ADC2", "IF1 ADC" },
2436 { "RT5650 IF1 ADC Mux", "DAC_REF/Null/IF_ADC2/IF_ADC1", "IF1 ADC" },
2438 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/IF_ADC2/DAC_REF", "IF1 ADC" },
2439 { "RT5650 IF1 ADC Mux", "Null/IF_ADC1/DAC_REF/IF_ADC2", "IF1 ADC" },
2440 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/IF_ADC1/DAC_REF", "IF1 ADC" },
2441 { "RT5650 IF1 ADC Mux", "Null/IF_ADC2/DAC_REF/IF_ADC1", "IF1 ADC" },
2442 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC1/IF_ADC2", "IF1 ADC" },
2443 { "RT5650 IF1 ADC Mux", "Null/DAC_REF/IF_ADC2/IF_ADC1", "IF1 ADC" },
2444 { "AIF1TX", NULL
, "RT5650 IF1 ADC Mux" },
2446 { "RT5650 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2447 { "RT5650 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2448 { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2449 { "RT5650 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2451 { "RT5650 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2452 { "RT5650 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2453 { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2454 { "RT5650 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2456 { "RT5650 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2457 { "RT5650 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2458 { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2459 { "RT5650 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2461 { "RT5650 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2462 { "RT5650 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2463 { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2464 { "RT5650 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2466 { "DAC1 L Mux", "IF1 DAC", "RT5650 IF1 DAC1 L Mux" },
2467 { "DAC1 R Mux", "IF1 DAC", "RT5650 IF1 DAC1 R Mux" },
2469 { "DAC L2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 L Mux" },
2470 { "DAC R2 Mux", "IF1 DAC", "RT5650 IF1 DAC2 R Mux" },
2473 static const struct snd_soc_dapm_route rt5645_specific_dapm_routes
[] = {
2474 { "DAC L1", NULL
, "Stereo DAC MIXL" },
2475 { "DAC R1", NULL
, "Stereo DAC MIXR" },
2476 { "DAC L2", NULL
, "Mono DAC MIXL" },
2477 { "DAC R2", NULL
, "Mono DAC MIXR" },
2479 { "RT5645 IF1 ADC1 Swap Mux", "L/R", "IF_ADC1" },
2480 { "RT5645 IF1 ADC1 Swap Mux", "R/L", "IF_ADC1" },
2481 { "RT5645 IF1 ADC1 Swap Mux", "L/L", "IF_ADC1" },
2482 { "RT5645 IF1 ADC1 Swap Mux", "R/R", "IF_ADC1" },
2484 { "RT5645 IF1 ADC2 Swap Mux", "L/R", "IF_ADC2" },
2485 { "RT5645 IF1 ADC2 Swap Mux", "R/L", "IF_ADC2" },
2486 { "RT5645 IF1 ADC2 Swap Mux", "L/L", "IF_ADC2" },
2487 { "RT5645 IF1 ADC2 Swap Mux", "R/R", "IF_ADC2" },
2489 { "RT5645 IF1 ADC3 Swap Mux", "L/R", "VAD_ADC" },
2490 { "RT5645 IF1 ADC3 Swap Mux", "R/L", "VAD_ADC" },
2491 { "RT5645 IF1 ADC3 Swap Mux", "L/L", "VAD_ADC" },
2492 { "RT5645 IF1 ADC3 Swap Mux", "R/R", "VAD_ADC" },
2494 { "IF1 ADC", NULL
, "RT5645 IF1 ADC1 Swap Mux" },
2495 { "IF1 ADC", NULL
, "RT5645 IF1 ADC2 Swap Mux" },
2496 { "IF1 ADC", NULL
, "RT5645 IF1 ADC3 Swap Mux" },
2498 { "RT5645 IF1 ADC Mux", "IF_ADC1/IF_ADC2/VAD_ADC", "IF1 ADC" },
2499 { "RT5645 IF1 ADC Mux", "IF_ADC2/IF_ADC1/VAD_ADC", "IF1 ADC" },
2500 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC1/IF_ADC2", "IF1 ADC" },
2501 { "RT5645 IF1 ADC Mux", "VAD_ADC/IF_ADC2/IF_ADC1", "IF1 ADC" },
2502 { "AIF1TX", NULL
, "RT5645 IF1 ADC Mux" },
2504 { "RT5645 IF1 DAC1 L Mux", "Slot0", "IF1 DAC0" },
2505 { "RT5645 IF1 DAC1 L Mux", "Slot1", "IF1 DAC1" },
2506 { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2507 { "RT5645 IF1 DAC1 L Mux", "Slot3", "IF1 DAC3" },
2509 { "RT5645 IF1 DAC1 R Mux", "Slot0", "IF1 DAC0" },
2510 { "RT5645 IF1 DAC1 R Mux", "Slot1", "IF1 DAC1" },
2511 { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2512 { "RT5645 IF1 DAC1 R Mux", "Slot3", "IF1 DAC3" },
2514 { "RT5645 IF1 DAC2 L Mux", "Slot0", "IF1 DAC0" },
2515 { "RT5645 IF1 DAC2 L Mux", "Slot1", "IF1 DAC1" },
2516 { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2517 { "RT5645 IF1 DAC2 L Mux", "Slot3", "IF1 DAC3" },
2519 { "RT5645 IF1 DAC2 R Mux", "Slot0", "IF1 DAC0" },
2520 { "RT5645 IF1 DAC2 R Mux", "Slot1", "IF1 DAC1" },
2521 { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2522 { "RT5645 IF1 DAC2 R Mux", "Slot3", "IF1 DAC3" },
2524 { "DAC1 L Mux", "IF1 DAC", "RT5645 IF1 DAC1 L Mux" },
2525 { "DAC1 R Mux", "IF1 DAC", "RT5645 IF1 DAC1 R Mux" },
2527 { "DAC L2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 L Mux" },
2528 { "DAC R2 Mux", "IF1 DAC", "RT5645 IF1 DAC2 R Mux" },
2531 static int rt5645_hw_params(struct snd_pcm_substream
*substream
,
2532 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
2534 struct snd_soc_codec
*codec
= dai
->codec
;
2535 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2536 unsigned int val_len
= 0, val_clk
, mask_clk
, dl_sft
;
2537 int pre_div
, bclk_ms
, frame_size
;
2539 rt5645
->lrck
[dai
->id
] = params_rate(params
);
2540 pre_div
= rl6231_get_clk_info(rt5645
->sysclk
, rt5645
->lrck
[dai
->id
]);
2542 dev_err(codec
->dev
, "Unsupported clock setting\n");
2545 frame_size
= snd_soc_params_to_frame_size(params
);
2546 if (frame_size
< 0) {
2547 dev_err(codec
->dev
, "Unsupported frame size: %d\n", frame_size
);
2551 switch (rt5645
->codec_type
) {
2552 case CODEC_TYPE_RT5650
:
2560 bclk_ms
= frame_size
> 32;
2561 rt5645
->bclk
[dai
->id
] = rt5645
->lrck
[dai
->id
] * (32 << bclk_ms
);
2563 dev_dbg(dai
->dev
, "bclk is %dHz and lrck is %dHz\n",
2564 rt5645
->bclk
[dai
->id
], rt5645
->lrck
[dai
->id
]);
2565 dev_dbg(dai
->dev
, "bclk_ms is %d and pre_div is %d for iis %d\n",
2566 bclk_ms
, pre_div
, dai
->id
);
2568 switch (params_width(params
)) {
2586 mask_clk
= RT5645_I2S_PD1_MASK
;
2587 val_clk
= pre_div
<< RT5645_I2S_PD1_SFT
;
2588 snd_soc_update_bits(codec
, RT5645_I2S1_SDP
,
2589 (0x3 << dl_sft
), (val_len
<< dl_sft
));
2590 snd_soc_update_bits(codec
, RT5645_ADDA_CLK1
, mask_clk
, val_clk
);
2593 mask_clk
= RT5645_I2S_BCLK_MS2_MASK
| RT5645_I2S_PD2_MASK
;
2594 val_clk
= bclk_ms
<< RT5645_I2S_BCLK_MS2_SFT
|
2595 pre_div
<< RT5645_I2S_PD2_SFT
;
2596 snd_soc_update_bits(codec
, RT5645_I2S2_SDP
,
2597 (0x3 << dl_sft
), (val_len
<< dl_sft
));
2598 snd_soc_update_bits(codec
, RT5645_ADDA_CLK1
, mask_clk
, val_clk
);
2601 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2608 static int rt5645_set_dai_fmt(struct snd_soc_dai
*dai
, unsigned int fmt
)
2610 struct snd_soc_codec
*codec
= dai
->codec
;
2611 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2612 unsigned int reg_val
= 0, pol_sft
;
2614 switch (rt5645
->codec_type
) {
2615 case CODEC_TYPE_RT5650
:
2623 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
2624 case SND_SOC_DAIFMT_CBM_CFM
:
2625 rt5645
->master
[dai
->id
] = 1;
2627 case SND_SOC_DAIFMT_CBS_CFS
:
2628 reg_val
|= RT5645_I2S_MS_S
;
2629 rt5645
->master
[dai
->id
] = 0;
2635 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
2636 case SND_SOC_DAIFMT_NB_NF
:
2638 case SND_SOC_DAIFMT_IB_NF
:
2639 reg_val
|= (1 << pol_sft
);
2645 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
2646 case SND_SOC_DAIFMT_I2S
:
2648 case SND_SOC_DAIFMT_LEFT_J
:
2649 reg_val
|= RT5645_I2S_DF_LEFT
;
2651 case SND_SOC_DAIFMT_DSP_A
:
2652 reg_val
|= RT5645_I2S_DF_PCM_A
;
2654 case SND_SOC_DAIFMT_DSP_B
:
2655 reg_val
|= RT5645_I2S_DF_PCM_B
;
2662 snd_soc_update_bits(codec
, RT5645_I2S1_SDP
,
2663 RT5645_I2S_MS_MASK
| (1 << pol_sft
) |
2664 RT5645_I2S_DF_MASK
, reg_val
);
2667 snd_soc_update_bits(codec
, RT5645_I2S2_SDP
,
2668 RT5645_I2S_MS_MASK
| (1 << pol_sft
) |
2669 RT5645_I2S_DF_MASK
, reg_val
);
2672 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2678 static int rt5645_set_dai_sysclk(struct snd_soc_dai
*dai
,
2679 int clk_id
, unsigned int freq
, int dir
)
2681 struct snd_soc_codec
*codec
= dai
->codec
;
2682 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2683 unsigned int reg_val
= 0;
2685 if (freq
== rt5645
->sysclk
&& clk_id
== rt5645
->sysclk_src
)
2689 case RT5645_SCLK_S_MCLK
:
2690 reg_val
|= RT5645_SCLK_SRC_MCLK
;
2692 case RT5645_SCLK_S_PLL1
:
2693 reg_val
|= RT5645_SCLK_SRC_PLL1
;
2695 case RT5645_SCLK_S_RCCLK
:
2696 reg_val
|= RT5645_SCLK_SRC_RCCLK
;
2699 dev_err(codec
->dev
, "Invalid clock id (%d)\n", clk_id
);
2702 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2703 RT5645_SCLK_SRC_MASK
, reg_val
);
2704 rt5645
->sysclk
= freq
;
2705 rt5645
->sysclk_src
= clk_id
;
2707 dev_dbg(dai
->dev
, "Sysclk is %dHz and clock id is %d\n", freq
, clk_id
);
2712 static int rt5645_set_dai_pll(struct snd_soc_dai
*dai
, int pll_id
, int source
,
2713 unsigned int freq_in
, unsigned int freq_out
)
2715 struct snd_soc_codec
*codec
= dai
->codec
;
2716 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2717 struct rl6231_pll_code pll_code
;
2720 if (source
== rt5645
->pll_src
&& freq_in
== rt5645
->pll_in
&&
2721 freq_out
== rt5645
->pll_out
)
2724 if (!freq_in
|| !freq_out
) {
2725 dev_dbg(codec
->dev
, "PLL disabled\n");
2728 rt5645
->pll_out
= 0;
2729 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2730 RT5645_SCLK_SRC_MASK
, RT5645_SCLK_SRC_MCLK
);
2735 case RT5645_PLL1_S_MCLK
:
2736 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2737 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_MCLK
);
2739 case RT5645_PLL1_S_BCLK1
:
2740 case RT5645_PLL1_S_BCLK2
:
2743 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2744 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_BCLK1
);
2747 snd_soc_update_bits(codec
, RT5645_GLB_CLK
,
2748 RT5645_PLL1_SRC_MASK
, RT5645_PLL1_SRC_BCLK2
);
2751 dev_err(codec
->dev
, "Invalid dai->id: %d\n", dai
->id
);
2756 dev_err(codec
->dev
, "Unknown PLL source %d\n", source
);
2760 ret
= rl6231_pll_calc(freq_in
, freq_out
, &pll_code
);
2762 dev_err(codec
->dev
, "Unsupport input clock %d\n", freq_in
);
2766 dev_dbg(codec
->dev
, "bypass=%d m=%d n=%d k=%d\n",
2767 pll_code
.m_bp
, (pll_code
.m_bp
? 0 : pll_code
.m_code
),
2768 pll_code
.n_code
, pll_code
.k_code
);
2770 snd_soc_write(codec
, RT5645_PLL_CTRL1
,
2771 pll_code
.n_code
<< RT5645_PLL_N_SFT
| pll_code
.k_code
);
2772 snd_soc_write(codec
, RT5645_PLL_CTRL2
,
2773 (pll_code
.m_bp
? 0 : pll_code
.m_code
) << RT5645_PLL_M_SFT
|
2774 pll_code
.m_bp
<< RT5645_PLL_M_BP_SFT
);
2776 rt5645
->pll_in
= freq_in
;
2777 rt5645
->pll_out
= freq_out
;
2778 rt5645
->pll_src
= source
;
2783 static int rt5645_set_tdm_slot(struct snd_soc_dai
*dai
, unsigned int tx_mask
,
2784 unsigned int rx_mask
, int slots
, int slot_width
)
2786 struct snd_soc_codec
*codec
= dai
->codec
;
2787 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2788 unsigned int i_slot_sft
, o_slot_sft
, i_width_sht
, o_width_sht
, en_sft
;
2789 unsigned int mask
, val
= 0;
2791 switch (rt5645
->codec_type
) {
2792 case CODEC_TYPE_RT5650
:
2802 i_slot_sft
= o_slot_sft
= 12;
2803 i_width_sht
= o_width_sht
= 10;
2807 if (rx_mask
|| tx_mask
) {
2808 val
|= (1 << en_sft
);
2809 if (rt5645
->codec_type
== CODEC_TYPE_RT5645
)
2810 snd_soc_update_bits(codec
, RT5645_BASS_BACK
,
2811 RT5645_G_BB_BST_MASK
, RT5645_G_BB_BST_25DB
);
2816 val
|= (1 << i_slot_sft
) | (1 << o_slot_sft
);
2819 val
|= (2 << i_slot_sft
) | (2 << o_slot_sft
);
2822 val
|= (3 << i_slot_sft
) | (3 << o_slot_sft
);
2829 switch (slot_width
) {
2831 val
|= (1 << i_width_sht
) | (1 << o_width_sht
);
2834 val
|= (2 << i_width_sht
) | (2 << o_width_sht
);
2837 val
|= (3 << i_width_sht
) | (3 << o_width_sht
);
2844 snd_soc_update_bits(codec
, RT5645_TDM_CTRL_1
, mask
, val
);
2849 static int rt5645_set_bias_level(struct snd_soc_codec
*codec
,
2850 enum snd_soc_bias_level level
)
2852 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2855 case SND_SOC_BIAS_PREPARE
:
2856 if (SND_SOC_BIAS_STANDBY
== snd_soc_codec_get_bias_level(codec
)) {
2857 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2858 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2859 RT5645_PWR_BG
| RT5645_PWR_VREF2
,
2860 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2861 RT5645_PWR_BG
| RT5645_PWR_VREF2
);
2863 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2864 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
2865 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
2866 snd_soc_update_bits(codec
, RT5645_GEN_CTRL1
,
2867 RT5645_DIG_GATE_CTRL
, RT5645_DIG_GATE_CTRL
);
2871 case SND_SOC_BIAS_STANDBY
:
2872 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2873 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2874 RT5645_PWR_BG
| RT5645_PWR_VREF2
,
2875 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2876 RT5645_PWR_BG
| RT5645_PWR_VREF2
);
2877 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2878 RT5645_PWR_FV1
| RT5645_PWR_FV2
,
2879 RT5645_PWR_FV1
| RT5645_PWR_FV2
);
2880 if (rt5645
->en_button_func
&&
2881 snd_soc_codec_get_bias_level(codec
) == SND_SOC_BIAS_OFF
)
2882 queue_delayed_work(system_power_efficient_wq
,
2883 &rt5645
->jack_detect_work
, msecs_to_jiffies(0));
2886 case SND_SOC_BIAS_OFF
:
2887 snd_soc_write(codec
, RT5645_DEPOP_M2
, 0x1100);
2888 if (!rt5645
->en_button_func
)
2889 snd_soc_update_bits(codec
, RT5645_GEN_CTRL1
,
2890 RT5645_DIG_GATE_CTRL
, 0);
2891 snd_soc_update_bits(codec
, RT5645_PWR_ANLG1
,
2892 RT5645_PWR_VREF1
| RT5645_PWR_MB
|
2893 RT5645_PWR_BG
| RT5645_PWR_VREF2
|
2894 RT5645_PWR_FV1
| RT5645_PWR_FV2
, 0x0);
2904 static void rt5645_enable_push_button_irq(struct snd_soc_codec
*codec
,
2907 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
2910 snd_soc_dapm_force_enable_pin(dapm
, "ADC L power");
2911 snd_soc_dapm_force_enable_pin(dapm
, "ADC R power");
2912 snd_soc_dapm_sync(dapm
);
2914 snd_soc_update_bits(codec
,
2915 RT5645_INT_IRQ_ST
, 0x8, 0x8);
2916 snd_soc_update_bits(codec
,
2917 RT5650_4BTN_IL_CMD2
, 0x8000, 0x8000);
2918 snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
);
2919 pr_debug("%s read %x = %x\n", __func__
, RT5650_4BTN_IL_CMD1
,
2920 snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
));
2922 snd_soc_update_bits(codec
, RT5650_4BTN_IL_CMD2
, 0x8000, 0x0);
2923 snd_soc_update_bits(codec
, RT5645_INT_IRQ_ST
, 0x8, 0x0);
2925 snd_soc_dapm_disable_pin(dapm
, "ADC L power");
2926 snd_soc_dapm_disable_pin(dapm
, "ADC R power");
2927 snd_soc_dapm_sync(dapm
);
2931 static int rt5645_jack_detect(struct snd_soc_codec
*codec
, int jack_insert
)
2933 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
2934 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
2938 regmap_write(rt5645
->regmap
, RT5645_CHARGE_PUMP
, 0x0006);
2940 /* for jack type detect */
2941 snd_soc_dapm_force_enable_pin(dapm
, "LDO2");
2942 snd_soc_dapm_force_enable_pin(dapm
, "Mic Det Power");
2943 snd_soc_dapm_sync(dapm
);
2944 if (!dapm
->card
->instantiated
) {
2945 /* Power up necessary bits for JD if dapm is
2947 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_ANLG1
,
2948 RT5645_PWR_MB
| RT5645_PWR_VREF2
,
2949 RT5645_PWR_MB
| RT5645_PWR_VREF2
);
2950 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_MIXER
,
2951 RT5645_PWR_LDO2
, RT5645_PWR_LDO2
);
2952 regmap_update_bits(rt5645
->regmap
, RT5645_PWR_VOL
,
2953 RT5645_PWR_MIC_DET
, RT5645_PWR_MIC_DET
);
2956 regmap_write(rt5645
->regmap
, RT5645_JD_CTRL3
, 0x00f0);
2957 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL2
,
2958 RT5645_CBJ_MN_JD
, RT5645_CBJ_MN_JD
);
2959 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL1
,
2960 RT5645_CBJ_BST1_EN
, RT5645_CBJ_BST1_EN
);
2962 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL2
,
2963 RT5645_CBJ_MN_JD
, 0);
2966 regmap_read(rt5645
->regmap
, RT5645_IN1_CTRL3
, &val
);
2968 dev_dbg(codec
->dev
, "val = %d\n", val
);
2970 if (val
== 1 || val
== 2) {
2971 rt5645
->jack_type
= SND_JACK_HEADSET
;
2972 if (rt5645
->en_button_func
) {
2973 rt5645_enable_push_button_irq(codec
, true);
2976 snd_soc_dapm_disable_pin(dapm
, "Mic Det Power");
2977 snd_soc_dapm_sync(dapm
);
2978 rt5645
->jack_type
= SND_JACK_HEADPHONE
;
2980 if (rt5645
->pdata
.jd_invert
)
2981 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
2982 RT5645_JD_1_1_MASK
, RT5645_JD_1_1_INV
);
2983 } else { /* jack out */
2984 rt5645
->jack_type
= 0;
2986 regmap_update_bits(rt5645
->regmap
, RT5645_HP_VOL
,
2987 RT5645_L_MUTE
| RT5645_R_MUTE
,
2988 RT5645_L_MUTE
| RT5645_R_MUTE
);
2989 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL2
,
2990 RT5645_CBJ_MN_JD
, RT5645_CBJ_MN_JD
);
2991 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL1
,
2992 RT5645_CBJ_BST1_EN
, 0);
2994 if (rt5645
->en_button_func
)
2995 rt5645_enable_push_button_irq(codec
, false);
2997 if (rt5645
->pdata
.jd_mode
== 0)
2998 snd_soc_dapm_disable_pin(dapm
, "LDO2");
2999 snd_soc_dapm_disable_pin(dapm
, "Mic Det Power");
3000 snd_soc_dapm_sync(dapm
);
3001 if (rt5645
->pdata
.jd_invert
)
3002 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
3003 RT5645_JD_1_1_MASK
, RT5645_JD_1_1_NOR
);
3006 return rt5645
->jack_type
;
3009 static int rt5645_button_detect(struct snd_soc_codec
*codec
)
3013 val
= snd_soc_read(codec
, RT5650_4BTN_IL_CMD1
);
3014 pr_debug("val=0x%x\n", val
);
3015 btn_type
= val
& 0xfff0;
3016 snd_soc_write(codec
, RT5650_4BTN_IL_CMD1
, val
);
3021 static irqreturn_t
rt5645_irq(int irq
, void *data
);
3023 int rt5645_set_jack_detect(struct snd_soc_codec
*codec
,
3024 struct snd_soc_jack
*hp_jack
, struct snd_soc_jack
*mic_jack
,
3025 struct snd_soc_jack
*btn_jack
)
3027 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3029 rt5645
->hp_jack
= hp_jack
;
3030 rt5645
->mic_jack
= mic_jack
;
3031 rt5645
->btn_jack
= btn_jack
;
3032 if (rt5645
->btn_jack
&& rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
3033 rt5645
->en_button_func
= true;
3034 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3035 RT5645_GP1_PIN_IRQ
, RT5645_GP1_PIN_IRQ
);
3036 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL1
,
3037 RT5645_DIG_GATE_CTRL
, RT5645_DIG_GATE_CTRL
);
3039 rt5645_irq(0, rt5645
);
3043 EXPORT_SYMBOL_GPL(rt5645_set_jack_detect
);
3045 static void rt5645_jack_detect_work(struct work_struct
*work
)
3047 struct rt5645_priv
*rt5645
=
3048 container_of(work
, struct rt5645_priv
, jack_detect_work
.work
);
3049 int val
, btn_type
, gpio_state
= 0, report
= 0;
3054 switch (rt5645
->pdata
.jd_mode
) {
3055 case 0: /* Not using rt5645 JD */
3056 if (rt5645
->gpiod_hp_det
) {
3057 gpio_state
= gpiod_get_value(rt5645
->gpiod_hp_det
);
3058 dev_dbg(rt5645
->codec
->dev
, "gpio_state = %d\n",
3060 report
= rt5645_jack_detect(rt5645
->codec
, gpio_state
);
3062 snd_soc_jack_report(rt5645
->hp_jack
,
3063 report
, SND_JACK_HEADPHONE
);
3064 snd_soc_jack_report(rt5645
->mic_jack
,
3065 report
, SND_JACK_MICROPHONE
);
3067 case 1: /* 2 port */
3068 val
= snd_soc_read(rt5645
->codec
, RT5645_A_JD_CTRL1
) & 0x0070;
3070 default: /* 1 port */
3071 val
= snd_soc_read(rt5645
->codec
, RT5645_A_JD_CTRL1
) & 0x0020;
3078 case 0x30: /* 2 port */
3079 case 0x0: /* 1 port or 2 port */
3080 if (rt5645
->jack_type
== 0) {
3081 report
= rt5645_jack_detect(rt5645
->codec
, 1);
3082 /* for push button and jack out */
3086 if (snd_soc_read(rt5645
->codec
, RT5645_INT_IRQ_ST
) & 0x4) {
3087 /* button pressed */
3088 report
= SND_JACK_HEADSET
;
3089 btn_type
= rt5645_button_detect(rt5645
->codec
);
3090 /* rt5650 can report three kinds of button behavior,
3091 one click, double click and hold. However,
3092 currently we will report button pressed/released
3093 event. So all the three button behaviors are
3094 treated as button pressed. */
3099 report
|= SND_JACK_BTN_0
;
3104 report
|= SND_JACK_BTN_1
;
3109 report
|= SND_JACK_BTN_2
;
3114 report
|= SND_JACK_BTN_3
;
3116 case 0x0000: /* unpressed */
3119 dev_err(rt5645
->codec
->dev
,
3120 "Unexpected button code 0x%04x\n",
3125 if (btn_type
== 0)/* button release */
3126 report
= rt5645
->jack_type
;
3130 case 0x70: /* 2 port */
3131 case 0x10: /* 2 port */
3132 case 0x20: /* 1 port */
3134 snd_soc_update_bits(rt5645
->codec
,
3135 RT5645_INT_IRQ_ST
, 0x1, 0x0);
3136 rt5645_jack_detect(rt5645
->codec
, 0);
3142 snd_soc_jack_report(rt5645
->hp_jack
, report
, SND_JACK_HEADPHONE
);
3143 snd_soc_jack_report(rt5645
->mic_jack
, report
, SND_JACK_MICROPHONE
);
3144 if (rt5645
->en_button_func
)
3145 snd_soc_jack_report(rt5645
->btn_jack
,
3146 report
, SND_JACK_BTN_0
| SND_JACK_BTN_1
|
3147 SND_JACK_BTN_2
| SND_JACK_BTN_3
);
3150 static void rt5645_rcclock_work(struct work_struct
*work
)
3152 struct rt5645_priv
*rt5645
=
3153 container_of(work
, struct rt5645_priv
, rcclock_work
.work
);
3155 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
3156 RT5645_PWR_CLK25M_MASK
, RT5645_PWR_CLK25M_PD
);
3159 static irqreturn_t
rt5645_irq(int irq
, void *data
)
3161 struct rt5645_priv
*rt5645
= data
;
3163 queue_delayed_work(system_power_efficient_wq
,
3164 &rt5645
->jack_detect_work
, msecs_to_jiffies(250));
3169 static int rt5645_probe(struct snd_soc_codec
*codec
)
3171 struct snd_soc_dapm_context
*dapm
= snd_soc_codec_get_dapm(codec
);
3172 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3174 rt5645
->codec
= codec
;
3176 switch (rt5645
->codec_type
) {
3177 case CODEC_TYPE_RT5645
:
3178 snd_soc_dapm_new_controls(dapm
,
3179 rt5645_specific_dapm_widgets
,
3180 ARRAY_SIZE(rt5645_specific_dapm_widgets
));
3181 snd_soc_dapm_add_routes(dapm
,
3182 rt5645_specific_dapm_routes
,
3183 ARRAY_SIZE(rt5645_specific_dapm_routes
));
3185 case CODEC_TYPE_RT5650
:
3186 snd_soc_dapm_new_controls(dapm
,
3187 rt5650_specific_dapm_widgets
,
3188 ARRAY_SIZE(rt5650_specific_dapm_widgets
));
3189 snd_soc_dapm_add_routes(dapm
,
3190 rt5650_specific_dapm_routes
,
3191 ARRAY_SIZE(rt5650_specific_dapm_routes
));
3195 snd_soc_codec_force_bias_level(codec
, SND_SOC_BIAS_OFF
);
3197 /* for JD function */
3198 if (rt5645
->pdata
.jd_mode
) {
3199 snd_soc_dapm_force_enable_pin(dapm
, "JD Power");
3200 snd_soc_dapm_force_enable_pin(dapm
, "LDO2");
3201 snd_soc_dapm_sync(dapm
);
3204 rt5645
->eq_param
= devm_kzalloc(codec
->dev
,
3205 RT5645_HWEQ_NUM
* sizeof(struct rt5645_eq_param_s
), GFP_KERNEL
);
3210 static int rt5645_remove(struct snd_soc_codec
*codec
)
3212 rt5645_reset(codec
);
3217 static int rt5645_suspend(struct snd_soc_codec
*codec
)
3219 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3221 regcache_cache_only(rt5645
->regmap
, true);
3222 regcache_mark_dirty(rt5645
->regmap
);
3227 static int rt5645_resume(struct snd_soc_codec
*codec
)
3229 struct rt5645_priv
*rt5645
= snd_soc_codec_get_drvdata(codec
);
3231 regcache_cache_only(rt5645
->regmap
, false);
3232 regcache_sync(rt5645
->regmap
);
3237 #define rt5645_suspend NULL
3238 #define rt5645_resume NULL
3241 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
3242 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
3243 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
3245 static const struct snd_soc_dai_ops rt5645_aif_dai_ops
= {
3246 .hw_params
= rt5645_hw_params
,
3247 .set_fmt
= rt5645_set_dai_fmt
,
3248 .set_sysclk
= rt5645_set_dai_sysclk
,
3249 .set_tdm_slot
= rt5645_set_tdm_slot
,
3250 .set_pll
= rt5645_set_dai_pll
,
3253 static struct snd_soc_dai_driver rt5645_dai
[] = {
3255 .name
= "rt5645-aif1",
3258 .stream_name
= "AIF1 Playback",
3261 .rates
= RT5645_STEREO_RATES
,
3262 .formats
= RT5645_FORMATS
,
3265 .stream_name
= "AIF1 Capture",
3268 .rates
= RT5645_STEREO_RATES
,
3269 .formats
= RT5645_FORMATS
,
3271 .ops
= &rt5645_aif_dai_ops
,
3274 .name
= "rt5645-aif2",
3277 .stream_name
= "AIF2 Playback",
3280 .rates
= RT5645_STEREO_RATES
,
3281 .formats
= RT5645_FORMATS
,
3284 .stream_name
= "AIF2 Capture",
3287 .rates
= RT5645_STEREO_RATES
,
3288 .formats
= RT5645_FORMATS
,
3290 .ops
= &rt5645_aif_dai_ops
,
3294 static struct snd_soc_codec_driver soc_codec_dev_rt5645
= {
3295 .probe
= rt5645_probe
,
3296 .remove
= rt5645_remove
,
3297 .suspend
= rt5645_suspend
,
3298 .resume
= rt5645_resume
,
3299 .set_bias_level
= rt5645_set_bias_level
,
3300 .idle_bias_off
= true,
3301 .controls
= rt5645_snd_controls
,
3302 .num_controls
= ARRAY_SIZE(rt5645_snd_controls
),
3303 .dapm_widgets
= rt5645_dapm_widgets
,
3304 .num_dapm_widgets
= ARRAY_SIZE(rt5645_dapm_widgets
),
3305 .dapm_routes
= rt5645_dapm_routes
,
3306 .num_dapm_routes
= ARRAY_SIZE(rt5645_dapm_routes
),
3309 static const struct regmap_config rt5645_regmap
= {
3312 .use_single_rw
= true,
3313 .max_register
= RT5645_VENDOR_ID2
+ 1 + (ARRAY_SIZE(rt5645_ranges
) *
3315 .volatile_reg
= rt5645_volatile_register
,
3316 .readable_reg
= rt5645_readable_register
,
3318 .cache_type
= REGCACHE_RBTREE
,
3319 .reg_defaults
= rt5645_reg
,
3320 .num_reg_defaults
= ARRAY_SIZE(rt5645_reg
),
3321 .ranges
= rt5645_ranges
,
3322 .num_ranges
= ARRAY_SIZE(rt5645_ranges
),
3325 static const struct i2c_device_id rt5645_i2c_id
[] = {
3330 MODULE_DEVICE_TABLE(i2c
, rt5645_i2c_id
);
3333 static struct acpi_device_id rt5645_acpi_match
[] = {
3338 MODULE_DEVICE_TABLE(acpi
, rt5645_acpi_match
);
3341 static struct rt5645_platform_data
*rt5645_pdata
;
3343 static struct rt5645_platform_data strago_platform_data
= {
3344 .dmic1_data_pin
= RT5645_DMIC1_DISABLE
,
3345 .dmic2_data_pin
= RT5645_DMIC_DATA_IN2P
,
3349 static int strago_quirk_cb(const struct dmi_system_id
*id
)
3351 rt5645_pdata
= &strago_platform_data
;
3356 static const struct dmi_system_id dmi_platform_intel_braswell
[] = {
3358 .ident
= "Intel Strago",
3359 .callback
= strago_quirk_cb
,
3361 DMI_MATCH(DMI_PRODUCT_NAME
, "Strago"),
3365 .ident
= "Google Celes",
3366 .callback
= strago_quirk_cb
,
3368 DMI_MATCH(DMI_PRODUCT_NAME
, "Celes"),
3372 .ident
= "Google Ultima",
3373 .callback
= strago_quirk_cb
,
3375 DMI_MATCH(DMI_PRODUCT_NAME
, "Ultima"),
3379 .ident
= "Google Reks",
3380 .callback
= strago_quirk_cb
,
3382 DMI_MATCH(DMI_PRODUCT_NAME
, "Reks"),
3386 .ident
= "Google Edgar",
3387 .callback
= strago_quirk_cb
,
3389 DMI_MATCH(DMI_PRODUCT_NAME
, "Edgar"),
3393 .ident
= "Google Wizpig",
3394 .callback
= strago_quirk_cb
,
3396 DMI_MATCH(DMI_PRODUCT_NAME
, "Wizpig"),
3400 .ident
= "Google Terra",
3401 .callback
= strago_quirk_cb
,
3403 DMI_MATCH(DMI_PRODUCT_NAME
, "Terra"),
3409 static struct rt5645_platform_data buddy_platform_data
= {
3410 .dmic1_data_pin
= RT5645_DMIC_DATA_GPIO5
,
3411 .dmic2_data_pin
= RT5645_DMIC_DATA_IN2P
,
3416 static int buddy_quirk_cb(const struct dmi_system_id
*id
)
3418 rt5645_pdata
= &buddy_platform_data
;
3423 static struct dmi_system_id dmi_platform_intel_broadwell
[] = {
3425 .ident
= "Chrome Buddy",
3426 .callback
= buddy_quirk_cb
,
3428 DMI_MATCH(DMI_PRODUCT_NAME
, "Buddy"),
3435 static int rt5645_parse_dt(struct rt5645_priv
*rt5645
, struct device
*dev
)
3437 rt5645
->pdata
.in2_diff
= device_property_read_bool(dev
,
3438 "realtek,in2-differential");
3439 device_property_read_u32(dev
,
3440 "realtek,dmic1-data-pin", &rt5645
->pdata
.dmic1_data_pin
);
3441 device_property_read_u32(dev
,
3442 "realtek,dmic2-data-pin", &rt5645
->pdata
.dmic2_data_pin
);
3443 device_property_read_u32(dev
,
3444 "realtek,jd-mode", &rt5645
->pdata
.jd_mode
);
3449 static int rt5645_i2c_probe(struct i2c_client
*i2c
,
3450 const struct i2c_device_id
*id
)
3452 struct rt5645_platform_data
*pdata
= dev_get_platdata(&i2c
->dev
);
3453 struct rt5645_priv
*rt5645
;
3457 rt5645
= devm_kzalloc(&i2c
->dev
, sizeof(struct rt5645_priv
),
3463 i2c_set_clientdata(i2c
, rt5645
);
3466 rt5645
->pdata
= *pdata
;
3467 else if (dmi_check_system(dmi_platform_intel_braswell
) ||
3468 dmi_check_system(dmi_platform_intel_broadwell
))
3469 rt5645
->pdata
= *rt5645_pdata
;
3471 rt5645_parse_dt(rt5645
, &i2c
->dev
);
3473 rt5645
->gpiod_hp_det
= devm_gpiod_get_optional(&i2c
->dev
, "hp-detect",
3476 if (IS_ERR(rt5645
->gpiod_hp_det
)) {
3477 dev_err(&i2c
->dev
, "failed to initialize gpiod\n");
3478 return PTR_ERR(rt5645
->gpiod_hp_det
);
3481 rt5645
->regmap
= devm_regmap_init_i2c(i2c
, &rt5645_regmap
);
3482 if (IS_ERR(rt5645
->regmap
)) {
3483 ret
= PTR_ERR(rt5645
->regmap
);
3484 dev_err(&i2c
->dev
, "Failed to allocate register map: %d\n",
3489 for (i
= 0; i
< ARRAY_SIZE(rt5645
->supplies
); i
++)
3490 rt5645
->supplies
[i
].supply
= rt5645_supply_names
[i
];
3492 ret
= devm_regulator_bulk_get(&i2c
->dev
,
3493 ARRAY_SIZE(rt5645
->supplies
),
3496 dev_err(&i2c
->dev
, "Failed to request supplies: %d\n", ret
);
3500 ret
= regulator_bulk_enable(ARRAY_SIZE(rt5645
->supplies
),
3503 dev_err(&i2c
->dev
, "Failed to enable supplies: %d\n", ret
);
3507 regmap_read(rt5645
->regmap
, RT5645_VENDOR_ID2
, &val
);
3510 case RT5645_DEVICE_ID
:
3511 rt5645
->codec_type
= CODEC_TYPE_RT5645
;
3513 case RT5650_DEVICE_ID
:
3514 rt5645
->codec_type
= CODEC_TYPE_RT5650
;
3518 "Device with ID register %#x is not rt5645 or rt5650\n",
3524 regmap_write(rt5645
->regmap
, RT5645_RESET
, 0);
3526 ret
= regmap_register_patch(rt5645
->regmap
, init_list
,
3527 ARRAY_SIZE(init_list
));
3529 dev_warn(&i2c
->dev
, "Failed to apply regmap patch: %d\n", ret
);
3531 if (rt5645
->codec_type
== CODEC_TYPE_RT5650
) {
3532 ret
= regmap_register_patch(rt5645
->regmap
, rt5650_init_list
,
3533 ARRAY_SIZE(rt5650_init_list
));
3535 dev_warn(&i2c
->dev
, "Apply rt5650 patch failed: %d\n",
3539 if (rt5645
->pdata
.in2_diff
)
3540 regmap_update_bits(rt5645
->regmap
, RT5645_IN2_CTRL
,
3541 RT5645_IN_DF2
, RT5645_IN_DF2
);
3543 if (rt5645
->pdata
.dmic1_data_pin
|| rt5645
->pdata
.dmic2_data_pin
) {
3544 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3545 RT5645_GP2_PIN_MASK
, RT5645_GP2_PIN_DMIC1_SCL
);
3547 switch (rt5645
->pdata
.dmic1_data_pin
) {
3548 case RT5645_DMIC_DATA_IN2N
:
3549 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3550 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_IN2N
);
3553 case RT5645_DMIC_DATA_GPIO5
:
3554 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3555 RT5645_I2S2_DAC_PIN_MASK
, RT5645_I2S2_DAC_PIN_GPIO
);
3556 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3557 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_GPIO5
);
3558 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3559 RT5645_GP5_PIN_MASK
, RT5645_GP5_PIN_DMIC1_SDA
);
3562 case RT5645_DMIC_DATA_GPIO11
:
3563 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3564 RT5645_DMIC_1_DP_MASK
, RT5645_DMIC_1_DP_GPIO11
);
3565 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3566 RT5645_GP11_PIN_MASK
,
3567 RT5645_GP11_PIN_DMIC1_SDA
);
3574 switch (rt5645
->pdata
.dmic2_data_pin
) {
3575 case RT5645_DMIC_DATA_IN2P
:
3576 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3577 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_IN2P
);
3580 case RT5645_DMIC_DATA_GPIO6
:
3581 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3582 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO6
);
3583 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3584 RT5645_GP6_PIN_MASK
, RT5645_GP6_PIN_DMIC2_SDA
);
3587 case RT5645_DMIC_DATA_GPIO10
:
3588 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3589 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO10
);
3590 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3591 RT5645_GP10_PIN_MASK
,
3592 RT5645_GP10_PIN_DMIC2_SDA
);
3595 case RT5645_DMIC_DATA_GPIO12
:
3596 regmap_update_bits(rt5645
->regmap
, RT5645_DMIC_CTRL1
,
3597 RT5645_DMIC_2_DP_MASK
, RT5645_DMIC_2_DP_GPIO12
);
3598 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3599 RT5645_GP12_PIN_MASK
,
3600 RT5645_GP12_PIN_DMIC2_SDA
);
3607 if (rt5645
->pdata
.jd_mode
) {
3608 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL3
,
3609 RT5645_IRQ_CLK_GATE_CTRL
,
3610 RT5645_IRQ_CLK_GATE_CTRL
);
3611 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
3612 RT5645_IRQ_CLK_INT
, RT5645_IRQ_CLK_INT
);
3613 regmap_update_bits(rt5645
->regmap
, RT5645_IRQ_CTRL2
,
3614 RT5645_IRQ_JD_1_1_EN
, RT5645_IRQ_JD_1_1_EN
);
3615 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL3
,
3616 RT5645_JD_PSV_MODE
, RT5645_JD_PSV_MODE
);
3617 regmap_update_bits(rt5645
->regmap
, RT5645_HPO_MIXER
,
3618 RT5645_IRQ_PSV_MODE
, RT5645_IRQ_PSV_MODE
);
3619 regmap_update_bits(rt5645
->regmap
, RT5645_MICBIAS
,
3620 RT5645_MIC2_OVCD_EN
, RT5645_MIC2_OVCD_EN
);
3621 regmap_update_bits(rt5645
->regmap
, RT5645_GPIO_CTRL1
,
3622 RT5645_GP1_PIN_IRQ
, RT5645_GP1_PIN_IRQ
);
3623 switch (rt5645
->pdata
.jd_mode
) {
3625 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3626 RT5645_JD1_MODE_MASK
,
3630 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3631 RT5645_JD1_MODE_MASK
,
3635 regmap_update_bits(rt5645
->regmap
, RT5645_A_JD_CTRL1
,
3636 RT5645_JD1_MODE_MASK
,
3644 INIT_DELAYED_WORK(&rt5645
->jack_detect_work
, rt5645_jack_detect_work
);
3645 INIT_DELAYED_WORK(&rt5645
->rcclock_work
, rt5645_rcclock_work
);
3647 if (rt5645
->i2c
->irq
) {
3648 ret
= request_threaded_irq(rt5645
->i2c
->irq
, NULL
, rt5645_irq
,
3649 IRQF_TRIGGER_RISING
| IRQF_TRIGGER_FALLING
3650 | IRQF_ONESHOT
, "rt5645", rt5645
);
3652 dev_err(&i2c
->dev
, "Failed to reguest IRQ: %d\n", ret
);
3657 ret
= snd_soc_register_codec(&i2c
->dev
, &soc_codec_dev_rt5645
,
3658 rt5645_dai
, ARRAY_SIZE(rt5645_dai
));
3665 if (rt5645
->i2c
->irq
)
3666 free_irq(rt5645
->i2c
->irq
, rt5645
);
3668 regulator_bulk_disable(ARRAY_SIZE(rt5645
->supplies
), rt5645
->supplies
);
3672 static int rt5645_i2c_remove(struct i2c_client
*i2c
)
3674 struct rt5645_priv
*rt5645
= i2c_get_clientdata(i2c
);
3677 free_irq(i2c
->irq
, rt5645
);
3679 cancel_delayed_work_sync(&rt5645
->jack_detect_work
);
3680 cancel_delayed_work_sync(&rt5645
->rcclock_work
);
3682 snd_soc_unregister_codec(&i2c
->dev
);
3683 regulator_bulk_disable(ARRAY_SIZE(rt5645
->supplies
), rt5645
->supplies
);
3688 static void rt5645_i2c_shutdown(struct i2c_client
*i2c
)
3690 struct rt5645_priv
*rt5645
= i2c_get_clientdata(i2c
);
3692 regmap_update_bits(rt5645
->regmap
, RT5645_GEN_CTRL3
,
3693 RT5645_RING2_SLEEVE_GND
, RT5645_RING2_SLEEVE_GND
);
3694 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL2
, RT5645_CBJ_MN_JD
,
3696 regmap_update_bits(rt5645
->regmap
, RT5645_IN1_CTRL1
, RT5645_CBJ_BST1_EN
,
3699 regmap_write(rt5645
->regmap
, RT5645_RESET
, 0);
3702 static struct i2c_driver rt5645_i2c_driver
= {
3705 .acpi_match_table
= ACPI_PTR(rt5645_acpi_match
),
3707 .probe
= rt5645_i2c_probe
,
3708 .remove
= rt5645_i2c_remove
,
3709 .shutdown
= rt5645_i2c_shutdown
,
3710 .id_table
= rt5645_i2c_id
,
3712 module_i2c_driver(rt5645_i2c_driver
);
3714 MODULE_DESCRIPTION("ASoC RT5645 driver");
3715 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
3716 MODULE_LICENSE("GPL v2");