projects / deliverable / linux.git / blob
? search:
summary | shortlog | log | commit | commitdiff | tree
blame | history | raw | HEAD
ASoC: rt5640: Add RL6231 class device shared support for RT5640, RT5645 and RT5651
[deliverable/linux.git] / sound / soc / codecs / rt5645.c
1 /*
2 * rt5645.c -- RT5645 ALSA SoC audio codec driver
3 *
4 * Copyright 2013 Realtek Semiconductor Corp.
5 * Author: Bard Liao <bardliao@realtek.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/module.h>
13 #include <linux/moduleparam.h>
14 #include <linux/init.h>
15 #include <linux/delay.h>
16 #include <linux/pm.h>
17 #include <linux/i2c.h>
18 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <sound/core.h>
21 #include <sound/pcm.h>
22 #include <sound/pcm_params.h>
23 #include <sound/jack.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/initval.h>
27 #include <sound/tlv.h>
28
29 #include "rl6231.h"
30 #include "rt5645.h"
31
32 #define RT5645_DEVICE_ID 0x6308
33
34 #define RT5645_PR_RANGE_BASE (0xff + 1)
35 #define RT5645_PR_SPACING 0x100
36
37 #define RT5645_PR_BASE (RT5645_PR_RANGE_BASE + (0 * RT5645_PR_SPACING))
38
39 static const struct regmap_range_cfg rt5645_ranges[] = {
40 {
41 .name = "PR",
42 .range_min = RT5645_PR_BASE,
43 .range_max = RT5645_PR_BASE + 0xf8,
44 .selector_reg = RT5645_PRIV_INDEX,
45 .selector_mask = 0xff,
46 .selector_shift = 0x0,
47 .window_start = RT5645_PRIV_DATA,
48 .window_len = 0x1,
49 },
50 };
51
52 static const struct reg_default init_list[] = {
53 {RT5645_PR_BASE + 0x3d, 0x3600},
54 {RT5645_PR_BASE + 0x1c, 0xfd20},
55 {RT5645_PR_BASE + 0x20, 0x611f},
56 {RT5645_PR_BASE + 0x21, 0x4040},
57 {RT5645_PR_BASE + 0x23, 0x0004},
58 };
59 #define RT5645_INIT_REG_LEN ARRAY_SIZE(init_list)
60
61 static const struct reg_default rt5645_reg[] = {
62 { 0x00, 0x0000 },
63 { 0x01, 0xc8c8 },
64 { 0x02, 0xc8c8 },
65 { 0x03, 0xc8c8 },
66 { 0x0a, 0x0002 },
67 { 0x0b, 0x2827 },
68 { 0x0c, 0xe000 },
69 { 0x0d, 0x0000 },
70 { 0x0e, 0x0000 },
71 { 0x0f, 0x0808 },
72 { 0x14, 0x3333 },
73 { 0x16, 0x4b00 },
74 { 0x18, 0x018b },
75 { 0x19, 0xafaf },
76 { 0x1a, 0xafaf },
77 { 0x1b, 0x0001 },
78 { 0x1c, 0x2f2f },
79 { 0x1d, 0x2f2f },
80 { 0x1e, 0x0000 },
81 { 0x20, 0x0000 },
82 { 0x27, 0x7060 },
83 { 0x28, 0x7070 },
84 { 0x29, 0x8080 },
85 { 0x2a, 0x5656 },
86 { 0x2b, 0x5454 },
87 { 0x2c, 0xaaa0 },
88 { 0x2f, 0x1002 },
89 { 0x31, 0x5000 },
90 { 0x32, 0x0000 },
91 { 0x33, 0x0000 },
92 { 0x34, 0x0000 },
93 { 0x35, 0x0000 },
94 { 0x3b, 0x0000 },
95 { 0x3c, 0x007f },
96 { 0x3d, 0x0000 },
97 { 0x3e, 0x007f },
98 { 0x3f, 0x0000 },
99 { 0x40, 0x001f },
100 { 0x41, 0x0000 },
101 { 0x42, 0x001f },
102 { 0x45, 0x6000 },
103 { 0x46, 0x003e },
104 { 0x47, 0x003e },
105 { 0x48, 0xf807 },
106 { 0x4a, 0x0004 },
107 { 0x4d, 0x0000 },
108 { 0x4e, 0x0000 },
109 { 0x4f, 0x01ff },
110 { 0x50, 0x0000 },
111 { 0x51, 0x0000 },
112 { 0x52, 0x01ff },
113 { 0x53, 0xf000 },
114 { 0x56, 0x0111 },
115 { 0x57, 0x0064 },
116 { 0x58, 0xef0e },
117 { 0x59, 0xf0f0 },
118 { 0x5a, 0xef0e },
119 { 0x5b, 0xf0f0 },
120 { 0x5c, 0xef0e },
121 { 0x5d, 0xf0f0 },
122 { 0x5e, 0xf000 },
123 { 0x5f, 0x0000 },
124 { 0x61, 0x0300 },
125 { 0x62, 0x0000 },
126 { 0x63, 0x00c2 },
127 { 0x64, 0x0000 },
128 { 0x65, 0x0000 },
129 { 0x66, 0x0000 },
130 { 0x6a, 0x0000 },
131 { 0x6c, 0x0aaa },
132 { 0x70, 0x8000 },
133 { 0x71, 0x8000 },
134 { 0x72, 0x8000 },
135 { 0x73, 0x7770 },
136 { 0x74, 0x3e00 },
137 { 0x75, 0x2409 },
138 { 0x76, 0x000a },
139 { 0x77, 0x0c00 },
140 { 0x78, 0x0000 },
141 { 0x80, 0x0000 },
142 { 0x81, 0x0000 },
143 { 0x82, 0x0000 },
144 { 0x83, 0x0000 },
145 { 0x84, 0x0000 },
146 { 0x85, 0x0000 },
147 { 0x8a, 0x0000 },
148 { 0x8e, 0x0004 },
149 { 0x8f, 0x1100 },
150 { 0x90, 0x0646 },
151 { 0x91, 0x0c06 },
152 { 0x93, 0x0000 },
153 { 0x94, 0x0200 },
154 { 0x95, 0x0000 },
155 { 0x9a, 0x2184 },
156 { 0x9b, 0x010a },
157 { 0x9c, 0x0aea },
158 { 0x9d, 0x000c },
159 { 0x9e, 0x0400 },
160 { 0xa0, 0xa0a8 },
161 { 0xa1, 0x0059 },
162 { 0xa2, 0x0001 },
163 { 0xae, 0x6000 },
164 { 0xaf, 0x0000 },
165 { 0xb0, 0x6000 },
166 { 0xb1, 0x0000 },
167 { 0xb2, 0x0000 },
168 { 0xb3, 0x001f },
169 { 0xb4, 0x020c },
170 { 0xb5, 0x1f00 },
171 { 0xb6, 0x0000 },
172 { 0xbb, 0x0000 },
173 { 0xbc, 0x0000 },
174 { 0xbd, 0x0000 },
175 { 0xbe, 0x0000 },
176 { 0xbf, 0x3100 },
177 { 0xc0, 0x0000 },
178 { 0xc1, 0x0000 },
179 { 0xc2, 0x0000 },
180 { 0xc3, 0x2000 },
181 { 0xcd, 0x0000 },
182 { 0xce, 0x0000 },
183 { 0xcf, 0x1813 },
184 { 0xd0, 0x0690 },
185 { 0xd1, 0x1c17 },
186 { 0xd3, 0xb320 },
187 { 0xd4, 0x0000 },
188 { 0xd6, 0x0400 },
189 { 0xd9, 0x0809 },
190 { 0xda, 0x0000 },
191 { 0xdb, 0x0003 },
192 { 0xdc, 0x0049 },
193 { 0xdd, 0x001b },
194 { 0xe6, 0x8000 },
195 { 0xe7, 0x0200 },
196 { 0xec, 0xb300 },
197 { 0xed, 0x0000 },
198 { 0xf0, 0x001f },
199 { 0xf1, 0x020c },
200 { 0xf2, 0x1f00 },
201 { 0xf3, 0x0000 },
202 { 0xf4, 0x4000 },
203 { 0xf8, 0x0000 },
204 { 0xf9, 0x0000 },
205 { 0xfa, 0x2060 },
206 { 0xfb, 0x4040 },
207 { 0xfc, 0x0000 },
208 { 0xfd, 0x0002 },
209 { 0xfe, 0x10ec },
210 { 0xff, 0x6308 },
211 };
212
213 static int rt5645_reset(struct snd_soc_codec *codec)
214 {
215 return snd_soc_write(codec, RT5645_RESET, 0);
216 }
217
218 static bool rt5645_volatile_register(struct device *dev, unsigned int reg)
219 {
220 int i;
221
222 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
223 if (reg >= rt5645_ranges[i].range_min &&
224 reg <= rt5645_ranges[i].range_max) {
225 return true;
226 }
227 }
228
229 switch (reg) {
230 case RT5645_RESET:
231 case RT5645_PRIV_DATA:
232 case RT5645_IN1_CTRL1:
233 case RT5645_IN1_CTRL2:
234 case RT5645_IN1_CTRL3:
235 case RT5645_A_JD_CTRL1:
236 case RT5645_ADC_EQ_CTRL1:
237 case RT5645_EQ_CTRL1:
238 case RT5645_ALC_CTRL_1:
239 case RT5645_IRQ_CTRL2:
240 case RT5645_IRQ_CTRL3:
241 case RT5645_INT_IRQ_ST:
242 case RT5645_IL_CMD:
243 case RT5645_VENDOR_ID:
244 case RT5645_VENDOR_ID1:
245 case RT5645_VENDOR_ID2:
246 return true;
247 default:
248 return false;
249 }
250 }
251
252 static bool rt5645_readable_register(struct device *dev, unsigned int reg)
253 {
254 int i;
255
256 for (i = 0; i < ARRAY_SIZE(rt5645_ranges); i++) {
257 if (reg >= rt5645_ranges[i].range_min &&
258 reg <= rt5645_ranges[i].range_max) {
259 return true;
260 }
261 }
262
263 switch (reg) {
264 case RT5645_RESET:
265 case RT5645_SPK_VOL:
266 case RT5645_HP_VOL:
267 case RT5645_LOUT1:
268 case RT5645_IN1_CTRL1:
269 case RT5645_IN1_CTRL2:
270 case RT5645_IN1_CTRL3:
271 case RT5645_IN2_CTRL:
272 case RT5645_INL1_INR1_VOL:
273 case RT5645_SPK_FUNC_LIM:
274 case RT5645_ADJ_HPF_CTRL:
275 case RT5645_DAC1_DIG_VOL:
276 case RT5645_DAC2_DIG_VOL:
277 case RT5645_DAC_CTRL:
278 case RT5645_STO1_ADC_DIG_VOL:
279 case RT5645_MONO_ADC_DIG_VOL:
280 case RT5645_ADC_BST_VOL1:
281 case RT5645_ADC_BST_VOL2:
282 case RT5645_STO1_ADC_MIXER:
283 case RT5645_MONO_ADC_MIXER:
284 case RT5645_AD_DA_MIXER:
285 case RT5645_STO_DAC_MIXER:
286 case RT5645_MONO_DAC_MIXER:
287 case RT5645_DIG_MIXER:
288 case RT5645_DIG_INF1_DATA:
289 case RT5645_PDM_OUT_CTRL:
290 case RT5645_REC_L1_MIXER:
291 case RT5645_REC_L2_MIXER:
292 case RT5645_REC_R1_MIXER:
293 case RT5645_REC_R2_MIXER:
294 case RT5645_HPMIXL_CTRL:
295 case RT5645_HPOMIXL_CTRL:
296 case RT5645_HPMIXR_CTRL:
297 case RT5645_HPOMIXR_CTRL:
298 case RT5645_HPO_MIXER:
299 case RT5645_SPK_L_MIXER:
300 case RT5645_SPK_R_MIXER:
301 case RT5645_SPO_MIXER:
302 case RT5645_SPO_CLSD_RATIO:
303 case RT5645_OUT_L1_MIXER:
304 case RT5645_OUT_R1_MIXER:
305 case RT5645_OUT_L_GAIN1:
306 case RT5645_OUT_L_GAIN2:
307 case RT5645_OUT_R_GAIN1:
308 case RT5645_OUT_R_GAIN2:
309 case RT5645_LOUT_MIXER:
310 case RT5645_HAPTIC_CTRL1:
311 case RT5645_HAPTIC_CTRL2:
312 case RT5645_HAPTIC_CTRL3:
313 case RT5645_HAPTIC_CTRL4:
314 case RT5645_HAPTIC_CTRL5:
315 case RT5645_HAPTIC_CTRL6:
316 case RT5645_HAPTIC_CTRL7:
317 case RT5645_HAPTIC_CTRL8:
318 case RT5645_HAPTIC_CTRL9:
319 case RT5645_HAPTIC_CTRL10:
320 case RT5645_PWR_DIG1:
321 case RT5645_PWR_DIG2:
322 case RT5645_PWR_ANLG1:
323 case RT5645_PWR_ANLG2:
324 case RT5645_PWR_MIXER:
325 case RT5645_PWR_VOL:
326 case RT5645_PRIV_INDEX:
327 case RT5645_PRIV_DATA:
328 case RT5645_I2S1_SDP:
329 case RT5645_I2S2_SDP:
330 case RT5645_ADDA_CLK1:
331 case RT5645_ADDA_CLK2:
332 case RT5645_DMIC_CTRL1:
333 case RT5645_DMIC_CTRL2:
334 case RT5645_TDM_CTRL_1:
335 case RT5645_TDM_CTRL_2:
336 case RT5645_GLB_CLK:
337 case RT5645_PLL_CTRL1:
338 case RT5645_PLL_CTRL2:
339 case RT5645_ASRC_1:
340 case RT5645_ASRC_2:
341 case RT5645_ASRC_3:
342 case RT5645_ASRC_4:
343 case RT5645_DEPOP_M1:
344 case RT5645_DEPOP_M2:
345 case RT5645_DEPOP_M3:
346 case RT5645_MICBIAS:
347 case RT5645_A_JD_CTRL1:
348 case RT5645_VAD_CTRL4:
349 case RT5645_CLSD_OUT_CTRL:
350 case RT5645_ADC_EQ_CTRL1:
351 case RT5645_ADC_EQ_CTRL2:
352 case RT5645_EQ_CTRL1:
353 case RT5645_EQ_CTRL2:
354 case RT5645_ALC_CTRL_1:
355 case RT5645_ALC_CTRL_2:
356 case RT5645_ALC_CTRL_3:
357 case RT5645_ALC_CTRL_4:
358 case RT5645_ALC_CTRL_5:
359 case RT5645_JD_CTRL:
360 case RT5645_IRQ_CTRL1:
361 case RT5645_IRQ_CTRL2:
362 case RT5645_IRQ_CTRL3:
363 case RT5645_INT_IRQ_ST:
364 case RT5645_GPIO_CTRL1:
365 case RT5645_GPIO_CTRL2:
366 case RT5645_GPIO_CTRL3:
367 case RT5645_BASS_BACK:
368 case RT5645_MP3_PLUS1:
369 case RT5645_MP3_PLUS2:
370 case RT5645_ADJ_HPF1:
371 case RT5645_ADJ_HPF2:
372 case RT5645_HP_CALIB_AMP_DET:
373 case RT5645_SV_ZCD1:
374 case RT5645_SV_ZCD2:
375 case RT5645_IL_CMD:
376 case RT5645_IL_CMD2:
377 case RT5645_IL_CMD3:
378 case RT5645_DRC1_HL_CTRL1:
379 case RT5645_DRC2_HL_CTRL1:
380 case RT5645_ADC_MONO_HP_CTRL1:
381 case RT5645_ADC_MONO_HP_CTRL2:
382 case RT5645_DRC2_CTRL1:
383 case RT5645_DRC2_CTRL2:
384 case RT5645_DRC2_CTRL3:
385 case RT5645_DRC2_CTRL4:
386 case RT5645_DRC2_CTRL5:
387 case RT5645_JD_CTRL3:
388 case RT5645_JD_CTRL4:
389 case RT5645_GEN_CTRL1:
390 case RT5645_GEN_CTRL2:
391 case RT5645_GEN_CTRL3:
392 case RT5645_VENDOR_ID:
393 case RT5645_VENDOR_ID1:
394 case RT5645_VENDOR_ID2:
395 return true;
396 default:
397 return false;
398 }
399 }
400
401 static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
402 static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
403 static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
404 static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
405 static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
406
407 /* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
408 static unsigned int bst_tlv[] = {
409 TLV_DB_RANGE_HEAD(7),
410 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
411 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
412 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
413 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
414 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
415 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
416 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
417 };
418
419 static const char * const rt5645_tdm_data_swap_select[] = {
420 "L/R", "R/L", "L/L", "R/R"
421 };
422
423 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot0_1_enum,
424 RT5645_TDM_CTRL_1, 6, rt5645_tdm_data_swap_select);
425
426 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot2_3_enum,
427 RT5645_TDM_CTRL_1, 4, rt5645_tdm_data_swap_select);
428
429 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot4_5_enum,
430 RT5645_TDM_CTRL_1, 2, rt5645_tdm_data_swap_select);
431
432 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_slot6_7_enum,
433 RT5645_TDM_CTRL_1, 0, rt5645_tdm_data_swap_select);
434
435 static const char * const rt5645_tdm_adc_data_select[] = {
436 "1/2/R", "2/1/R", "R/1/2", "R/2/1"
437 };
438
439 static SOC_ENUM_SINGLE_DECL(rt5645_tdm_adc_sel_enum,
440 RT5645_TDM_CTRL_1, 8,
441 rt5645_tdm_adc_data_select);
442
443 static const struct snd_kcontrol_new rt5645_snd_controls[] = {
444 /* Speaker Output Volume */
445 SOC_DOUBLE("Speaker Channel Switch", RT5645_SPK_VOL,
446 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
447 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5645_SPK_VOL,
448 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
449
450 /* Headphone Output Volume */
451 SOC_DOUBLE("HP Channel Switch", RT5645_HP_VOL,
452 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
453 SOC_DOUBLE_TLV("HP Playback Volume", RT5645_HP_VOL,
454 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
455
456 /* OUTPUT Control */
457 SOC_DOUBLE("OUT Playback Switch", RT5645_LOUT1,
458 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
459 SOC_DOUBLE("OUT Channel Switch", RT5645_LOUT1,
460 RT5645_VOL_L_SFT, RT5645_VOL_R_SFT, 1, 1),
461 SOC_DOUBLE_TLV("OUT Playback Volume", RT5645_LOUT1,
462 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 39, 1, out_vol_tlv),
463
464 /* DAC Digital Volume */
465 SOC_DOUBLE("DAC2 Playback Switch", RT5645_DAC_CTRL,
466 RT5645_M_DAC_L2_VOL_SFT, RT5645_M_DAC_R2_VOL_SFT, 1, 1),
467 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5645_DAC1_DIG_VOL,
468 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
469 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5645_DAC2_DIG_VOL,
470 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 175, 0, dac_vol_tlv),
471
472 /* IN1/IN2 Control */
473 SOC_SINGLE_TLV("IN1 Boost", RT5645_IN1_CTRL1,
474 RT5645_BST_SFT1, 8, 0, bst_tlv),
475 SOC_SINGLE_TLV("IN2 Boost", RT5645_IN2_CTRL,
476 RT5645_BST_SFT2, 8, 0, bst_tlv),
477
478 /* INL/INR Volume Control */
479 SOC_DOUBLE_TLV("IN Capture Volume", RT5645_INL1_INR1_VOL,
480 RT5645_INL_VOL_SFT, RT5645_INR_VOL_SFT, 31, 1, in_vol_tlv),
481
482 /* ADC Digital Volume Control */
483 SOC_DOUBLE("ADC Capture Switch", RT5645_STO1_ADC_DIG_VOL,
484 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
485 SOC_DOUBLE_TLV("ADC Capture Volume", RT5645_STO1_ADC_DIG_VOL,
486 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
487 SOC_DOUBLE("Mono ADC Capture Switch", RT5645_MONO_ADC_DIG_VOL,
488 RT5645_L_MUTE_SFT, RT5645_R_MUTE_SFT, 1, 1),
489 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5645_MONO_ADC_DIG_VOL,
490 RT5645_L_VOL_SFT, RT5645_R_VOL_SFT, 127, 0, adc_vol_tlv),
491
492 /* ADC Boost Volume Control */
493 SOC_DOUBLE_TLV("STO1 ADC Boost Gain", RT5645_ADC_BST_VOL1,
494 RT5645_STO1_ADC_L_BST_SFT, RT5645_STO1_ADC_R_BST_SFT, 3, 0,
495 adc_bst_tlv),
496 SOC_DOUBLE_TLV("STO2 ADC Boost Gain", RT5645_ADC_BST_VOL1,
497 RT5645_STO2_ADC_L_BST_SFT, RT5645_STO2_ADC_R_BST_SFT, 3, 0,
498 adc_bst_tlv),
499
500 /* I2S2 function select */
501 SOC_SINGLE("I2S2 Func Switch", RT5645_GPIO_CTRL1, RT5645_I2S2_SEL_SFT,
502 1, 1),
503
504 /* TDM */
505 SOC_ENUM("TDM Adc Slot0 1 Data", rt5645_tdm_adc_slot0_1_enum),
506 SOC_ENUM("TDM Adc Slot2 3 Data", rt5645_tdm_adc_slot2_3_enum),
507 SOC_ENUM("TDM Adc Slot4 5 Data", rt5645_tdm_adc_slot4_5_enum),
508 SOC_ENUM("TDM Adc Slot6 7 Data", rt5645_tdm_adc_slot6_7_enum),
509 SOC_ENUM("TDM IF1 ADC DATA Sel", rt5645_tdm_adc_sel_enum),
510 SOC_SINGLE("TDM IF1_DAC1_L Sel", RT5645_TDM_CTRL_3, 12, 7, 0),
511 SOC_SINGLE("TDM IF1_DAC1_R Sel", RT5645_TDM_CTRL_3, 8, 7, 0),
512 SOC_SINGLE("TDM IF1_DAC2_L Sel", RT5645_TDM_CTRL_3, 4, 7, 0),
513 SOC_SINGLE("TDM IF1_DAC2_R Sel", RT5645_TDM_CTRL_3, 0, 7, 0),
514 };
515
516 /**
517 * set_dmic_clk - Set parameter of dmic.
518 *
519 * @w: DAPM widget.
520 * @kcontrol: The kcontrol of this widget.
521 * @event: Event id.
522 *
523 */
524 static int set_dmic_clk(struct snd_soc_dapm_widget *w,
525 struct snd_kcontrol *kcontrol, int event)
526 {
527 struct snd_soc_codec *codec = w->codec;
528 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
529 int idx = -EINVAL;
530
531 idx = rl6231_calc_dmic_clk(rt5645->sysclk);
532
533 if (idx < 0)
534 dev_err(codec->dev, "Failed to set DMIC clock\n");
535 else
536 snd_soc_update_bits(codec, RT5645_DMIC_CTRL1,
537 RT5645_DMIC_CLK_MASK, idx << RT5645_DMIC_CLK_SFT);
538 return idx;
539 }
540
541 static int is_sys_clk_from_pll(struct snd_soc_dapm_widget *source,
542 struct snd_soc_dapm_widget *sink)
543 {
544 unsigned int val;
545
546 val = snd_soc_read(source->codec, RT5645_GLB_CLK);
547 val &= RT5645_SCLK_SRC_MASK;
548 if (val == RT5645_SCLK_SRC_PLL1)
549 return 1;
550 else
551 return 0;
552 }
553
554 /* Digital Mixer */
555 static const struct snd_kcontrol_new rt5645_sto1_adc_l_mix[] = {
556 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
557 RT5645_M_ADC_L1_SFT, 1, 1),
558 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
559 RT5645_M_ADC_L2_SFT, 1, 1),
560 };
561
562 static const struct snd_kcontrol_new rt5645_sto1_adc_r_mix[] = {
563 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_STO1_ADC_MIXER,
564 RT5645_M_ADC_R1_SFT, 1, 1),
565 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_STO1_ADC_MIXER,
566 RT5645_M_ADC_R2_SFT, 1, 1),
567 };
568
569 static const struct snd_kcontrol_new rt5645_mono_adc_l_mix[] = {
570 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
571 RT5645_M_MONO_ADC_L1_SFT, 1, 1),
572 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
573 RT5645_M_MONO_ADC_L2_SFT, 1, 1),
574 };
575
576 static const struct snd_kcontrol_new rt5645_mono_adc_r_mix[] = {
577 SOC_DAPM_SINGLE("ADC1 Switch", RT5645_MONO_ADC_MIXER,
578 RT5645_M_MONO_ADC_R1_SFT, 1, 1),
579 SOC_DAPM_SINGLE("ADC2 Switch", RT5645_MONO_ADC_MIXER,
580 RT5645_M_MONO_ADC_R2_SFT, 1, 1),
581 };
582
583 static const struct snd_kcontrol_new rt5645_dac_l_mix[] = {
584 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
585 RT5645_M_ADCMIX_L_SFT, 1, 1),
586 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
587 RT5645_M_DAC1_L_SFT, 1, 1),
588 };
589
590 static const struct snd_kcontrol_new rt5645_dac_r_mix[] = {
591 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5645_AD_DA_MIXER,
592 RT5645_M_ADCMIX_R_SFT, 1, 1),
593 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_AD_DA_MIXER,
594 RT5645_M_DAC1_R_SFT, 1, 1),
595 };
596
597 static const struct snd_kcontrol_new rt5645_sto_dac_l_mix[] = {
598 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
599 RT5645_M_DAC_L1_SFT, 1, 1),
600 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_STO_DAC_MIXER,
601 RT5645_M_DAC_L2_SFT, 1, 1),
602 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
603 RT5645_M_DAC_R1_STO_L_SFT, 1, 1),
604 };
605
606 static const struct snd_kcontrol_new rt5645_sto_dac_r_mix[] = {
607 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_STO_DAC_MIXER,
608 RT5645_M_DAC_R1_SFT, 1, 1),
609 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_STO_DAC_MIXER,
610 RT5645_M_DAC_R2_SFT, 1, 1),
611 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_STO_DAC_MIXER,
612 RT5645_M_DAC_L1_STO_R_SFT, 1, 1),
613 };
614
615 static const struct snd_kcontrol_new rt5645_mono_dac_l_mix[] = {
616 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_MONO_DAC_MIXER,
617 RT5645_M_DAC_L1_MONO_L_SFT, 1, 1),
618 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
619 RT5645_M_DAC_L2_MONO_L_SFT, 1, 1),
620 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
621 RT5645_M_DAC_R2_MONO_L_SFT, 1, 1),
622 };
623
624 static const struct snd_kcontrol_new rt5645_mono_dac_r_mix[] = {
625 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_MONO_DAC_MIXER,
626 RT5645_M_DAC_R1_MONO_R_SFT, 1, 1),
627 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_MONO_DAC_MIXER,
628 RT5645_M_DAC_R2_MONO_R_SFT, 1, 1),
629 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_MONO_DAC_MIXER,
630 RT5645_M_DAC_L2_MONO_R_SFT, 1, 1),
631 };
632
633 static const struct snd_kcontrol_new rt5645_dig_l_mix[] = {
634 SOC_DAPM_SINGLE("Sto DAC Mix L Switch", RT5645_DIG_MIXER,
635 RT5645_M_STO_L_DAC_L_SFT, 1, 1),
636 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
637 RT5645_M_DAC_L2_DAC_L_SFT, 1, 1),
638 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
639 RT5645_M_DAC_R2_DAC_L_SFT, 1, 1),
640 };
641
642 static const struct snd_kcontrol_new rt5645_dig_r_mix[] = {
643 SOC_DAPM_SINGLE("Sto DAC Mix R Switch", RT5645_DIG_MIXER,
644 RT5645_M_STO_R_DAC_R_SFT, 1, 1),
645 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_DIG_MIXER,
646 RT5645_M_DAC_R2_DAC_R_SFT, 1, 1),
647 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_DIG_MIXER,
648 RT5645_M_DAC_L2_DAC_R_SFT, 1, 1),
649 };
650
651 /* Analog Input Mixer */
652 static const struct snd_kcontrol_new rt5645_rec_l_mix[] = {
653 SOC_DAPM_SINGLE("HPOL Switch", RT5645_REC_L2_MIXER,
654 RT5645_M_HP_L_RM_L_SFT, 1, 1),
655 SOC_DAPM_SINGLE("INL Switch", RT5645_REC_L2_MIXER,
656 RT5645_M_IN_L_RM_L_SFT, 1, 1),
657 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_L2_MIXER,
658 RT5645_M_BST2_RM_L_SFT, 1, 1),
659 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_L2_MIXER,
660 RT5645_M_BST1_RM_L_SFT, 1, 1),
661 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5645_REC_L2_MIXER,
662 RT5645_M_OM_L_RM_L_SFT, 1, 1),
663 };
664
665 static const struct snd_kcontrol_new rt5645_rec_r_mix[] = {
666 SOC_DAPM_SINGLE("HPOR Switch", RT5645_REC_R2_MIXER,
667 RT5645_M_HP_R_RM_R_SFT, 1, 1),
668 SOC_DAPM_SINGLE("INR Switch", RT5645_REC_R2_MIXER,
669 RT5645_M_IN_R_RM_R_SFT, 1, 1),
670 SOC_DAPM_SINGLE("BST2 Switch", RT5645_REC_R2_MIXER,
671 RT5645_M_BST2_RM_R_SFT, 1, 1),
672 SOC_DAPM_SINGLE("BST1 Switch", RT5645_REC_R2_MIXER,
673 RT5645_M_BST1_RM_R_SFT, 1, 1),
674 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5645_REC_R2_MIXER,
675 RT5645_M_OM_R_RM_R_SFT, 1, 1),
676 };
677
678 static const struct snd_kcontrol_new rt5645_spk_l_mix[] = {
679 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPK_L_MIXER,
680 RT5645_M_DAC_L1_SM_L_SFT, 1, 1),
681 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_SPK_L_MIXER,
682 RT5645_M_DAC_L2_SM_L_SFT, 1, 1),
683 SOC_DAPM_SINGLE("INL Switch", RT5645_SPK_L_MIXER,
684 RT5645_M_IN_L_SM_L_SFT, 1, 1),
685 SOC_DAPM_SINGLE("BST1 Switch", RT5645_SPK_L_MIXER,
686 RT5645_M_BST1_L_SM_L_SFT, 1, 1),
687 };
688
689 static const struct snd_kcontrol_new rt5645_spk_r_mix[] = {
690 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPK_R_MIXER,
691 RT5645_M_DAC_R1_SM_R_SFT, 1, 1),
692 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_SPK_R_MIXER,
693 RT5645_M_DAC_R2_SM_R_SFT, 1, 1),
694 SOC_DAPM_SINGLE("INR Switch", RT5645_SPK_R_MIXER,
695 RT5645_M_IN_R_SM_R_SFT, 1, 1),
696 SOC_DAPM_SINGLE("BST2 Switch", RT5645_SPK_R_MIXER,
697 RT5645_M_BST2_R_SM_R_SFT, 1, 1),
698 };
699
700 static const struct snd_kcontrol_new rt5645_out_l_mix[] = {
701 SOC_DAPM_SINGLE("BST1 Switch", RT5645_OUT_L1_MIXER,
702 RT5645_M_BST1_OM_L_SFT, 1, 1),
703 SOC_DAPM_SINGLE("INL Switch", RT5645_OUT_L1_MIXER,
704 RT5645_M_IN_L_OM_L_SFT, 1, 1),
705 SOC_DAPM_SINGLE("DAC L2 Switch", RT5645_OUT_L1_MIXER,
706 RT5645_M_DAC_L2_OM_L_SFT, 1, 1),
707 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_OUT_L1_MIXER,
708 RT5645_M_DAC_L1_OM_L_SFT, 1, 1),
709 };
710
711 static const struct snd_kcontrol_new rt5645_out_r_mix[] = {
712 SOC_DAPM_SINGLE("BST2 Switch", RT5645_OUT_R1_MIXER,
713 RT5645_M_BST2_OM_R_SFT, 1, 1),
714 SOC_DAPM_SINGLE("INR Switch", RT5645_OUT_R1_MIXER,
715 RT5645_M_IN_R_OM_R_SFT, 1, 1),
716 SOC_DAPM_SINGLE("DAC R2 Switch", RT5645_OUT_R1_MIXER,
717 RT5645_M_DAC_R2_OM_R_SFT, 1, 1),
718 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_OUT_R1_MIXER,
719 RT5645_M_DAC_R1_OM_R_SFT, 1, 1),
720 };
721
722 static const struct snd_kcontrol_new rt5645_spo_l_mix[] = {
723 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
724 RT5645_M_DAC_R1_SPM_L_SFT, 1, 1),
725 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_SPO_MIXER,
726 RT5645_M_DAC_L1_SPM_L_SFT, 1, 1),
727 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
728 RT5645_M_SV_R_SPM_L_SFT, 1, 1),
729 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5645_SPO_MIXER,
730 RT5645_M_SV_L_SPM_L_SFT, 1, 1),
731 };
732
733 static const struct snd_kcontrol_new rt5645_spo_r_mix[] = {
734 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_SPO_MIXER,
735 RT5645_M_DAC_R1_SPM_R_SFT, 1, 1),
736 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5645_SPO_MIXER,
737 RT5645_M_SV_R_SPM_R_SFT, 1, 1),
738 };
739
740 static const struct snd_kcontrol_new rt5645_hpo_mix[] = {
741 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPO_MIXER,
742 RT5645_M_DAC1_HM_SFT, 1, 1),
743 SOC_DAPM_SINGLE("HPVOL Switch", RT5645_HPO_MIXER,
744 RT5645_M_HPVOL_HM_SFT, 1, 1),
745 };
746
747 static const struct snd_kcontrol_new rt5645_hpvoll_mix[] = {
748 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXL_CTRL,
749 RT5645_M_DAC1_HV_SFT, 1, 1),
750 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXL_CTRL,
751 RT5645_M_DAC2_HV_SFT, 1, 1),
752 SOC_DAPM_SINGLE("INL Switch", RT5645_HPOMIXL_CTRL,
753 RT5645_M_IN_HV_SFT, 1, 1),
754 SOC_DAPM_SINGLE("BST1 Switch", RT5645_HPOMIXL_CTRL,
755 RT5645_M_BST1_HV_SFT, 1, 1),
756 };
757
758 static const struct snd_kcontrol_new rt5645_hpvolr_mix[] = {
759 SOC_DAPM_SINGLE("DAC1 Switch", RT5645_HPOMIXR_CTRL,
760 RT5645_M_DAC1_HV_SFT, 1, 1),
761 SOC_DAPM_SINGLE("DAC2 Switch", RT5645_HPOMIXR_CTRL,
762 RT5645_M_DAC2_HV_SFT, 1, 1),
763 SOC_DAPM_SINGLE("INR Switch", RT5645_HPOMIXR_CTRL,
764 RT5645_M_IN_HV_SFT, 1, 1),
765 SOC_DAPM_SINGLE("BST2 Switch", RT5645_HPOMIXR_CTRL,
766 RT5645_M_BST2_HV_SFT, 1, 1),
767 };
768
769 static const struct snd_kcontrol_new rt5645_lout_mix[] = {
770 SOC_DAPM_SINGLE("DAC L1 Switch", RT5645_LOUT_MIXER,
771 RT5645_M_DAC_L1_LM_SFT, 1, 1),
772 SOC_DAPM_SINGLE("DAC R1 Switch", RT5645_LOUT_MIXER,
773 RT5645_M_DAC_R1_LM_SFT, 1, 1),
774 SOC_DAPM_SINGLE("OUTMIX L Switch", RT5645_LOUT_MIXER,
775 RT5645_M_OV_L_LM_SFT, 1, 1),
776 SOC_DAPM_SINGLE("OUTMIX R Switch", RT5645_LOUT_MIXER,
777 RT5645_M_OV_R_LM_SFT, 1, 1),
778 };
779
780 /*DAC1 L/R source*/ /* MX-29 [9:8] [11:10] */
781 static const char * const rt5645_dac1_src[] = {
782 "IF1 DAC", "IF2 DAC", "IF3 DAC"
783 };
784
785 static SOC_ENUM_SINGLE_DECL(
786 rt5645_dac1l_enum, RT5645_AD_DA_MIXER,
787 RT5645_DAC1_L_SEL_SFT, rt5645_dac1_src);
788
789 static const struct snd_kcontrol_new rt5645_dac1l_mux =
790 SOC_DAPM_ENUM("DAC1 L source", rt5645_dac1l_enum);
791
792 static SOC_ENUM_SINGLE_DECL(
793 rt5645_dac1r_enum, RT5645_AD_DA_MIXER,
794 RT5645_DAC1_R_SEL_SFT, rt5645_dac1_src);
795
796 static const struct snd_kcontrol_new rt5645_dac1r_mux =
797 SOC_DAPM_ENUM("DAC1 R source", rt5645_dac1r_enum);
798
799 /*DAC2 L/R source*/ /* MX-1B [6:4] [2:0] */
800 static const char * const rt5645_dac12_src[] = {
801 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "VAD_ADC"
802 };
803
804 static SOC_ENUM_SINGLE_DECL(
805 rt5645_dac2l_enum, RT5645_DAC_CTRL,
806 RT5645_DAC2_L_SEL_SFT, rt5645_dac12_src);
807
808 static const struct snd_kcontrol_new rt5645_dac_l2_mux =
809 SOC_DAPM_ENUM("DAC2 L source", rt5645_dac2l_enum);
810
811 static const char * const rt5645_dacr2_src[] = {
812 "IF1 DAC", "IF2 DAC", "IF3 DAC", "Mono ADC", "Haptic"
813 };
814
815 static SOC_ENUM_SINGLE_DECL(
816 rt5645_dac2r_enum, RT5645_DAC_CTRL,
817 RT5645_DAC2_R_SEL_SFT, rt5645_dacr2_src);
818
819 static const struct snd_kcontrol_new rt5645_dac_r2_mux =
820 SOC_DAPM_ENUM("DAC2 R source", rt5645_dac2r_enum);
821
822
823 /* INL/R source */
824 static const char * const rt5645_inl_src[] = {
825 "IN2P", "MonoP"
826 };
827
828 static SOC_ENUM_SINGLE_DECL(
829 rt5645_inl_enum, RT5645_INL1_INR1_VOL,
830 RT5645_INL_SEL_SFT, rt5645_inl_src);
831
832 static const struct snd_kcontrol_new rt5645_inl_mux =
833 SOC_DAPM_ENUM("INL source", rt5645_inl_enum);
834
835 static const char * const rt5645_inr_src[] = {
836 "IN2N", "MonoN"
837 };
838
839 static SOC_ENUM_SINGLE_DECL(
840 rt5645_inr_enum, RT5645_INL1_INR1_VOL,
841 RT5645_INR_SEL_SFT, rt5645_inr_src);
842
843 static const struct snd_kcontrol_new rt5645_inr_mux =
844 SOC_DAPM_ENUM("INR source", rt5645_inr_enum);
845
846 /* Stereo1 ADC source */
847 /* MX-27 [12] */
848 static const char * const rt5645_stereo_adc1_src[] = {
849 "DAC MIX", "ADC"
850 };
851
852 static SOC_ENUM_SINGLE_DECL(
853 rt5645_stereo1_adc1_enum, RT5645_STO1_ADC_MIXER,
854 RT5645_ADC_1_SRC_SFT, rt5645_stereo_adc1_src);
855
856 static const struct snd_kcontrol_new rt5645_sto_adc1_mux =
857 SOC_DAPM_ENUM("Stereo1 ADC1 Mux", rt5645_stereo1_adc1_enum);
858
859 /* MX-27 [11] */
860 static const char * const rt5645_stereo_adc2_src[] = {
861 "DAC MIX", "DMIC"
862 };
863
864 static SOC_ENUM_SINGLE_DECL(
865 rt5645_stereo1_adc2_enum, RT5645_STO1_ADC_MIXER,
866 RT5645_ADC_2_SRC_SFT, rt5645_stereo_adc2_src);
867
868 static const struct snd_kcontrol_new rt5645_sto_adc2_mux =
869 SOC_DAPM_ENUM("Stereo1 ADC2 Mux", rt5645_stereo1_adc2_enum);
870
871 /* MX-27 [8] */
872 static const char * const rt5645_stereo_dmic_src[] = {
873 "DMIC1", "DMIC2"
874 };
875
876 static SOC_ENUM_SINGLE_DECL(
877 rt5645_stereo1_dmic_enum, RT5645_STO1_ADC_MIXER,
878 RT5645_DMIC_SRC_SFT, rt5645_stereo_dmic_src);
879
880 static const struct snd_kcontrol_new rt5645_sto1_dmic_mux =
881 SOC_DAPM_ENUM("Stereo1 DMIC source", rt5645_stereo1_dmic_enum);
882
883 /* Mono ADC source */
884 /* MX-28 [12] */
885 static const char * const rt5645_mono_adc_l1_src[] = {
886 "Mono DAC MIXL", "ADC"
887 };
888
889 static SOC_ENUM_SINGLE_DECL(
890 rt5645_mono_adc_l1_enum, RT5645_MONO_ADC_MIXER,
891 RT5645_MONO_ADC_L1_SRC_SFT, rt5645_mono_adc_l1_src);
892
893 static const struct snd_kcontrol_new rt5645_mono_adc_l1_mux =
894 SOC_DAPM_ENUM("Mono ADC1 left source", rt5645_mono_adc_l1_enum);
895 /* MX-28 [11] */
896 static const char * const rt5645_mono_adc_l2_src[] = {
897 "Mono DAC MIXL", "DMIC"
898 };
899
900 static SOC_ENUM_SINGLE_DECL(
901 rt5645_mono_adc_l2_enum, RT5645_MONO_ADC_MIXER,
902 RT5645_MONO_ADC_L2_SRC_SFT, rt5645_mono_adc_l2_src);
903
904 static const struct snd_kcontrol_new rt5645_mono_adc_l2_mux =
905 SOC_DAPM_ENUM("Mono ADC2 left source", rt5645_mono_adc_l2_enum);
906
907 /* MX-28 [8] */
908 static const char * const rt5645_mono_dmic_src[] = {
909 "DMIC1", "DMIC2"
910 };
911
912 static SOC_ENUM_SINGLE_DECL(
913 rt5645_mono_dmic_l_enum, RT5645_MONO_ADC_MIXER,
914 RT5645_MONO_DMIC_L_SRC_SFT, rt5645_mono_dmic_src);
915
916 static const struct snd_kcontrol_new rt5645_mono_dmic_l_mux =
917 SOC_DAPM_ENUM("Mono DMIC left source", rt5645_mono_dmic_l_enum);
918 /* MX-28 [1:0] */
919 static SOC_ENUM_SINGLE_DECL(
920 rt5645_mono_dmic_r_enum, RT5645_MONO_ADC_MIXER,
921 RT5645_MONO_DMIC_R_SRC_SFT, rt5645_mono_dmic_src);
922
923 static const struct snd_kcontrol_new rt5645_mono_dmic_r_mux =
924 SOC_DAPM_ENUM("Mono DMIC Right source", rt5645_mono_dmic_r_enum);
925 /* MX-28 [4] */
926 static const char * const rt5645_mono_adc_r1_src[] = {
927 "Mono DAC MIXR", "ADC"
928 };
929
930 static SOC_ENUM_SINGLE_DECL(
931 rt5645_mono_adc_r1_enum, RT5645_MONO_ADC_MIXER,
932 RT5645_MONO_ADC_R1_SRC_SFT, rt5645_mono_adc_r1_src);
933
934 static const struct snd_kcontrol_new rt5645_mono_adc_r1_mux =
935 SOC_DAPM_ENUM("Mono ADC1 right source", rt5645_mono_adc_r1_enum);
936 /* MX-28 [3] */
937 static const char * const rt5645_mono_adc_r2_src[] = {
938 "Mono DAC MIXR", "DMIC"
939 };
940
941 static SOC_ENUM_SINGLE_DECL(
942 rt5645_mono_adc_r2_enum, RT5645_MONO_ADC_MIXER,
943 RT5645_MONO_ADC_R2_SRC_SFT, rt5645_mono_adc_r2_src);
944
945 static const struct snd_kcontrol_new rt5645_mono_adc_r2_mux =
946 SOC_DAPM_ENUM("Mono ADC2 right source", rt5645_mono_adc_r2_enum);
947
948 /* MX-77 [9:8] */
949 static const char * const rt5645_if1_adc_in_src[] = {
950 "IF_ADC1", "IF_ADC2", "VAD_ADC"
951 };
952
953 static SOC_ENUM_SINGLE_DECL(
954 rt5645_if1_adc_in_enum, RT5645_TDM_CTRL_1,
955 RT5645_IF1_ADC_IN_SFT, rt5645_if1_adc_in_src);
956
957 static const struct snd_kcontrol_new rt5645_if1_adc_in_mux =
958 SOC_DAPM_ENUM("IF1 ADC IN source", rt5645_if1_adc_in_enum);
959
960 /* MX-2F [13:12] */
961 static const char * const rt5645_if2_adc_in_src[] = {
962 "IF_ADC1", "IF_ADC2", "VAD_ADC"
963 };
964
965 static SOC_ENUM_SINGLE_DECL(
966 rt5645_if2_adc_in_enum, RT5645_DIG_INF1_DATA,
967 RT5645_IF2_ADC_IN_SFT, rt5645_if2_adc_in_src);
968
969 static const struct snd_kcontrol_new rt5645_if2_adc_in_mux =
970 SOC_DAPM_ENUM("IF2 ADC IN source", rt5645_if2_adc_in_enum);
971
972 /* MX-2F [1:0] */
973 static const char * const rt5645_if3_adc_in_src[] = {
974 "IF_ADC1", "IF_ADC2", "VAD_ADC"
975 };
976
977 static SOC_ENUM_SINGLE_DECL(
978 rt5645_if3_adc_in_enum, RT5645_DIG_INF1_DATA,
979 RT5645_IF3_ADC_IN_SFT, rt5645_if3_adc_in_src);
980
981 static const struct snd_kcontrol_new rt5645_if3_adc_in_mux =
982 SOC_DAPM_ENUM("IF3 ADC IN source", rt5645_if3_adc_in_enum);
983
984 /* MX-31 [15] [13] [11] [9] */
985 static const char * const rt5645_pdm_src[] = {
986 "Mono DAC", "Stereo DAC"
987 };
988
989 static SOC_ENUM_SINGLE_DECL(
990 rt5645_pdm1_l_enum, RT5645_PDM_OUT_CTRL,
991 RT5645_PDM1_L_SFT, rt5645_pdm_src);
992
993 static const struct snd_kcontrol_new rt5645_pdm1_l_mux =
994 SOC_DAPM_ENUM("PDM1 L source", rt5645_pdm1_l_enum);
995
996 static SOC_ENUM_SINGLE_DECL(
997 rt5645_pdm1_r_enum, RT5645_PDM_OUT_CTRL,
998 RT5645_PDM1_R_SFT, rt5645_pdm_src);
999
1000 static const struct snd_kcontrol_new rt5645_pdm1_r_mux =
1001 SOC_DAPM_ENUM("PDM1 R source", rt5645_pdm1_r_enum);
1002
1003 /* MX-9D [9:8] */
1004 static const char * const rt5645_vad_adc_src[] = {
1005 "Sto1 ADC L", "Mono ADC L", "Mono ADC R"
1006 };
1007
1008 static SOC_ENUM_SINGLE_DECL(
1009 rt5645_vad_adc_enum, RT5645_VAD_CTRL4,
1010 RT5645_VAD_SEL_SFT, rt5645_vad_adc_src);
1011
1012 static const struct snd_kcontrol_new rt5645_vad_adc_mux =
1013 SOC_DAPM_ENUM("VAD ADC source", rt5645_vad_adc_enum);
1014
1015 static const struct snd_kcontrol_new spk_l_vol_control =
1016 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1017 RT5645_L_MUTE_SFT, 1, 1);
1018
1019 static const struct snd_kcontrol_new spk_r_vol_control =
1020 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_SPK_VOL,
1021 RT5645_R_MUTE_SFT, 1, 1);
1022
1023 static const struct snd_kcontrol_new hp_l_vol_control =
1024 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1025 RT5645_L_MUTE_SFT, 1, 1);
1026
1027 static const struct snd_kcontrol_new hp_r_vol_control =
1028 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_HP_VOL,
1029 RT5645_R_MUTE_SFT, 1, 1);
1030
1031 static const struct snd_kcontrol_new pdm1_l_vol_control =
1032 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1033 RT5645_M_PDM1_L, 1, 1);
1034
1035 static const struct snd_kcontrol_new pdm1_r_vol_control =
1036 SOC_DAPM_SINGLE_AUTODISABLE("Switch", RT5645_PDM_OUT_CTRL,
1037 RT5645_M_PDM1_R, 1, 1);
1038
1039 static void hp_amp_power(struct snd_soc_codec *codec, int on)
1040 {
1041 static int hp_amp_power_count;
1042 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1043
1044 if (on) {
1045 if (hp_amp_power_count <= 0) {
1046 /* depop parameters */
1047 snd_soc_update_bits(codec, RT5645_DEPOP_M2,
1048 RT5645_DEPOP_MASK, RT5645_DEPOP_MAN);
1049 snd_soc_write(codec, RT5645_DEPOP_M1, 0x000d);
1050 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1051 RT5645_HP_DCC_INT1, 0x9f01);
1052 mdelay(150);
1053 /* headphone amp power on */
1054 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1055 RT5645_PWR_FV1 | RT5645_PWR_FV2 , 0);
1056 snd_soc_update_bits(codec, RT5645_PWR_VOL,
1057 RT5645_PWR_HV_L | RT5645_PWR_HV_R,
1058 RT5645_PWR_HV_L | RT5645_PWR_HV_R);
1059 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1060 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1061 RT5645_PWR_HA,
1062 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1063 RT5645_PWR_HA);
1064 mdelay(5);
1065 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1066 RT5645_PWR_FV1 | RT5645_PWR_FV2,
1067 RT5645_PWR_FV1 | RT5645_PWR_FV2);
1068
1069 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1070 RT5645_HP_CO_MASK | RT5645_HP_SG_MASK,
1071 RT5645_HP_CO_EN | RT5645_HP_SG_EN);
1072 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1073 0x14, 0x1aaa);
1074 regmap_write(rt5645->regmap, RT5645_PR_BASE +
1075 0x24, 0x0430);
1076 }
1077 hp_amp_power_count++;
1078 } else {
1079 hp_amp_power_count--;
1080 if (hp_amp_power_count <= 0) {
1081 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1082 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1083 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1084 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1085 /* headphone amp power down */
1086 snd_soc_write(codec, RT5645_DEPOP_M1, 0x0000);
1087 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1088 RT5645_PWR_HP_L | RT5645_PWR_HP_R |
1089 RT5645_PWR_HA, 0);
1090 }
1091 }
1092 }
1093
1094 static int rt5645_hp_event(struct snd_soc_dapm_widget *w,
1095 struct snd_kcontrol *kcontrol, int event)
1096 {
1097 struct snd_soc_codec *codec = w->codec;
1098 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1099
1100 switch (event) {
1101 case SND_SOC_DAPM_POST_PMU:
1102 hp_amp_power(codec, 1);
1103 /* headphone unmute sequence */
1104 snd_soc_update_bits(codec, RT5645_DEPOP_M3, RT5645_CP_FQ1_MASK |
1105 RT5645_CP_FQ2_MASK | RT5645_CP_FQ3_MASK,
1106 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ1_SFT) |
1107 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1108 (RT5645_CP_FQ_192_KHZ << RT5645_CP_FQ3_SFT));
1109 regmap_write(rt5645->regmap,
1110 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1111 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1112 RT5645_SMT_TRIG_MASK, RT5645_SMT_TRIG_EN);
1113 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1114 RT5645_RSTN_MASK, RT5645_RSTN_EN);
1115 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1116 RT5645_RSTN_MASK | RT5645_HP_L_SMT_MASK |
1117 RT5645_HP_R_SMT_MASK, RT5645_RSTN_DIS |
1118 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1119 msleep(40);
1120 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1121 RT5645_HP_SG_MASK | RT5645_HP_L_SMT_MASK |
1122 RT5645_HP_R_SMT_MASK, RT5645_HP_SG_DIS |
1123 RT5645_HP_L_SMT_DIS | RT5645_HP_R_SMT_DIS);
1124 break;
1125
1126 case SND_SOC_DAPM_PRE_PMD:
1127 /* headphone mute sequence */
1128 snd_soc_update_bits(codec, RT5645_DEPOP_M3,
1129 RT5645_CP_FQ1_MASK | RT5645_CP_FQ2_MASK |
1130 RT5645_CP_FQ3_MASK,
1131 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ1_SFT) |
1132 (RT5645_CP_FQ_12_KHZ << RT5645_CP_FQ2_SFT) |
1133 (RT5645_CP_FQ_96_KHZ << RT5645_CP_FQ3_SFT));
1134 regmap_write(rt5645->regmap,
1135 RT5645_PR_BASE + RT5645_MAMP_INT_REG2, 0xfc00);
1136 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1137 RT5645_HP_SG_MASK, RT5645_HP_SG_EN);
1138 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1139 RT5645_RSTP_MASK, RT5645_RSTP_EN);
1140 snd_soc_update_bits(codec, RT5645_DEPOP_M1,
1141 RT5645_RSTP_MASK | RT5645_HP_L_SMT_MASK |
1142 RT5645_HP_R_SMT_MASK, RT5645_RSTP_DIS |
1143 RT5645_HP_L_SMT_EN | RT5645_HP_R_SMT_EN);
1144 msleep(30);
1145 hp_amp_power(codec, 0);
1146 break;
1147
1148 default:
1149 return 0;
1150 }
1151
1152 return 0;
1153 }
1154
1155 static int rt5645_spk_event(struct snd_soc_dapm_widget *w,
1156 struct snd_kcontrol *kcontrol, int event)
1157 {
1158 struct snd_soc_codec *codec = w->codec;
1159
1160 switch (event) {
1161 case SND_SOC_DAPM_POST_PMU:
1162 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1163 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1164 RT5645_PWR_CLS_D_L,
1165 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1166 RT5645_PWR_CLS_D_L);
1167 break;
1168
1169 case SND_SOC_DAPM_PRE_PMD:
1170 snd_soc_update_bits(codec, RT5645_PWR_DIG1,
1171 RT5645_PWR_CLS_D | RT5645_PWR_CLS_D_R |
1172 RT5645_PWR_CLS_D_L, 0);
1173 break;
1174
1175 default:
1176 return 0;
1177 }
1178
1179 return 0;
1180 }
1181
1182 static int rt5645_lout_event(struct snd_soc_dapm_widget *w,
1183 struct snd_kcontrol *kcontrol, int event)
1184 {
1185 struct snd_soc_codec *codec = w->codec;
1186
1187 switch (event) {
1188 case SND_SOC_DAPM_POST_PMU:
1189 hp_amp_power(codec, 1);
1190 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1191 RT5645_PWR_LM, RT5645_PWR_LM);
1192 snd_soc_update_bits(codec, RT5645_LOUT1,
1193 RT5645_L_MUTE | RT5645_R_MUTE, 0);
1194 break;
1195
1196 case SND_SOC_DAPM_PRE_PMD:
1197 snd_soc_update_bits(codec, RT5645_LOUT1,
1198 RT5645_L_MUTE | RT5645_R_MUTE,
1199 RT5645_L_MUTE | RT5645_R_MUTE);
1200 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
1201 RT5645_PWR_LM, 0);
1202 hp_amp_power(codec, 0);
1203 break;
1204
1205 default:
1206 return 0;
1207 }
1208
1209 return 0;
1210 }
1211
1212 static int rt5645_bst2_event(struct snd_soc_dapm_widget *w,
1213 struct snd_kcontrol *kcontrol, int event)
1214 {
1215 struct snd_soc_codec *codec = w->codec;
1216
1217 switch (event) {
1218 case SND_SOC_DAPM_POST_PMU:
1219 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1220 RT5645_PWR_BST2_P, RT5645_PWR_BST2_P);
1221 break;
1222
1223 case SND_SOC_DAPM_PRE_PMD:
1224 snd_soc_update_bits(codec, RT5645_PWR_ANLG2,
1225 RT5645_PWR_BST2_P, 0);
1226 break;
1227
1228 default:
1229 return 0;
1230 }
1231
1232 return 0;
1233 }
1234
1235 static const struct snd_soc_dapm_widget rt5645_dapm_widgets[] = {
1236 SND_SOC_DAPM_SUPPLY("LDO2", RT5645_PWR_MIXER,
1237 RT5645_PWR_LDO2_BIT, 0, NULL, 0),
1238 SND_SOC_DAPM_SUPPLY("PLL1", RT5645_PWR_ANLG2,
1239 RT5645_PWR_PLL_BIT, 0, NULL, 0),
1240
1241 SND_SOC_DAPM_SUPPLY("JD Power", RT5645_PWR_ANLG2,
1242 RT5645_PWR_JD1_BIT, 0, NULL, 0),
1243 SND_SOC_DAPM_SUPPLY("Mic Det Power", RT5645_PWR_VOL,
1244 RT5645_PWR_MIC_DET_BIT, 0, NULL, 0),
1245
1246 /* Input Side */
1247 /* micbias */
1248 SND_SOC_DAPM_MICBIAS("micbias1", RT5645_PWR_ANLG2,
1249 RT5645_PWR_MB1_BIT, 0),
1250 SND_SOC_DAPM_MICBIAS("micbias2", RT5645_PWR_ANLG2,
1251 RT5645_PWR_MB2_BIT, 0),
1252 /* Input Lines */
1253 SND_SOC_DAPM_INPUT("DMIC L1"),
1254 SND_SOC_DAPM_INPUT("DMIC R1"),
1255 SND_SOC_DAPM_INPUT("DMIC L2"),
1256 SND_SOC_DAPM_INPUT("DMIC R2"),
1257
1258 SND_SOC_DAPM_INPUT("IN1P"),
1259 SND_SOC_DAPM_INPUT("IN1N"),
1260 SND_SOC_DAPM_INPUT("IN2P"),
1261 SND_SOC_DAPM_INPUT("IN2N"),
1262
1263 SND_SOC_DAPM_INPUT("Haptic Generator"),
1264
1265 SND_SOC_DAPM_PGA("DMIC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1266 SND_SOC_DAPM_PGA("DMIC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1267 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
1268 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
1269 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5645_DMIC_CTRL1,
1270 RT5645_DMIC_1_EN_SFT, 0, NULL, 0),
1271 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5645_DMIC_CTRL1,
1272 RT5645_DMIC_2_EN_SFT, 0, NULL, 0),
1273 /* Boost */
1274 SND_SOC_DAPM_PGA("BST1", RT5645_PWR_ANLG2,
1275 RT5645_PWR_BST1_BIT, 0, NULL, 0),
1276 SND_SOC_DAPM_PGA_E("BST2", RT5645_PWR_ANLG2,
1277 RT5645_PWR_BST2_BIT, 0, NULL, 0, rt5645_bst2_event,
1278 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1279 /* Input Volume */
1280 SND_SOC_DAPM_PGA("INL VOL", RT5645_PWR_VOL,
1281 RT5645_PWR_IN_L_BIT, 0, NULL, 0),
1282 SND_SOC_DAPM_PGA("INR VOL", RT5645_PWR_VOL,
1283 RT5645_PWR_IN_R_BIT, 0, NULL, 0),
1284 /* REC Mixer */
1285 SND_SOC_DAPM_MIXER("RECMIXL", RT5645_PWR_MIXER, RT5645_PWR_RM_L_BIT,
1286 0, rt5645_rec_l_mix, ARRAY_SIZE(rt5645_rec_l_mix)),
1287 SND_SOC_DAPM_MIXER("RECMIXR", RT5645_PWR_MIXER, RT5645_PWR_RM_R_BIT,
1288 0, rt5645_rec_r_mix, ARRAY_SIZE(rt5645_rec_r_mix)),
1289 /* ADCs */
1290 SND_SOC_DAPM_ADC("ADC L", NULL, SND_SOC_NOPM, 0, 0),
1291 SND_SOC_DAPM_ADC("ADC R", NULL, SND_SOC_NOPM, 0, 0),
1292
1293 SND_SOC_DAPM_SUPPLY("ADC L power", RT5645_PWR_DIG1,
1294 RT5645_PWR_ADC_L_BIT, 0, NULL, 0),
1295 SND_SOC_DAPM_SUPPLY("ADC R power", RT5645_PWR_DIG1,
1296 RT5645_PWR_ADC_R_BIT, 0, NULL, 0),
1297
1298 /* ADC Mux */
1299 SND_SOC_DAPM_MUX("Stereo1 DMIC Mux", SND_SOC_NOPM, 0, 0,
1300 &rt5645_sto1_dmic_mux),
1301 SND_SOC_DAPM_MUX("Stereo1 ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1302 &rt5645_sto_adc2_mux),
1303 SND_SOC_DAPM_MUX("Stereo1 ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1304 &rt5645_sto_adc2_mux),
1305 SND_SOC_DAPM_MUX("Stereo1 ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1306 &rt5645_sto_adc1_mux),
1307 SND_SOC_DAPM_MUX("Stereo1 ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1308 &rt5645_sto_adc1_mux),
1309 SND_SOC_DAPM_MUX("Mono DMIC L Mux", SND_SOC_NOPM, 0, 0,
1310 &rt5645_mono_dmic_l_mux),
1311 SND_SOC_DAPM_MUX("Mono DMIC R Mux", SND_SOC_NOPM, 0, 0,
1312 &rt5645_mono_dmic_r_mux),
1313 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1314 &rt5645_mono_adc_l2_mux),
1315 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1316 &rt5645_mono_adc_l1_mux),
1317 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1318 &rt5645_mono_adc_r1_mux),
1319 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1320 &rt5645_mono_adc_r2_mux),
1321 /* ADC Mixer */
1322
1323 SND_SOC_DAPM_SUPPLY_S("adc stereo1 filter", 1, RT5645_PWR_DIG2,
1324 RT5645_PWR_ADC_S1F_BIT, 0, NULL, 0),
1325 SND_SOC_DAPM_SUPPLY_S("adc stereo2 filter", 1, RT5645_PWR_DIG2,
1326 RT5645_PWR_ADC_S2F_BIT, 0, NULL, 0),
1327 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXL", SND_SOC_NOPM, 0, 0,
1328 rt5645_sto1_adc_l_mix, ARRAY_SIZE(rt5645_sto1_adc_l_mix),
1329 NULL, 0),
1330 SND_SOC_DAPM_MIXER_E("Sto1 ADC MIXR", SND_SOC_NOPM, 0, 0,
1331 rt5645_sto1_adc_r_mix, ARRAY_SIZE(rt5645_sto1_adc_r_mix),
1332 NULL, 0),
1333 SND_SOC_DAPM_SUPPLY_S("adc mono left filter", 1, RT5645_PWR_DIG2,
1334 RT5645_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1335 SND_SOC_DAPM_MIXER_E("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1336 rt5645_mono_adc_l_mix, ARRAY_SIZE(rt5645_mono_adc_l_mix),
1337 NULL, 0),
1338 SND_SOC_DAPM_SUPPLY_S("adc mono right filter", 1, RT5645_PWR_DIG2,
1339 RT5645_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1340 SND_SOC_DAPM_MIXER_E("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1341 rt5645_mono_adc_r_mix, ARRAY_SIZE(rt5645_mono_adc_r_mix),
1342 NULL, 0),
1343
1344 /* ADC PGA */
1345 SND_SOC_DAPM_PGA("Stereo1 ADC MIXL", SND_SOC_NOPM, 0, 0, NULL, 0),
1346 SND_SOC_DAPM_PGA("Stereo1 ADC MIXR", SND_SOC_NOPM, 0, 0, NULL, 0),
1347 SND_SOC_DAPM_PGA("Sto2 ADC LR MIX", SND_SOC_NOPM, 0, 0, NULL, 0),
1348 SND_SOC_DAPM_PGA("VAD_ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1349 SND_SOC_DAPM_PGA("IF_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1350 SND_SOC_DAPM_PGA("IF_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1351 SND_SOC_DAPM_PGA("IF1_ADC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1352 SND_SOC_DAPM_PGA("IF1_ADC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1353 SND_SOC_DAPM_PGA("IF1_ADC3", SND_SOC_NOPM, 0, 0, NULL, 0),
1354 SND_SOC_DAPM_PGA("IF1_ADC4", SND_SOC_NOPM, 0, 0, NULL, 0),
1355
1356 /* IF1 2 Mux */
1357 SND_SOC_DAPM_MUX("IF1 ADC Mux", SND_SOC_NOPM,
1358 0, 0, &rt5645_if1_adc_in_mux),
1359 SND_SOC_DAPM_MUX("IF2 ADC Mux", SND_SOC_NOPM,
1360 0, 0, &rt5645_if2_adc_in_mux),
1361
1362 /* Digital Interface */
1363 SND_SOC_DAPM_SUPPLY("I2S1", RT5645_PWR_DIG1,
1364 RT5645_PWR_I2S1_BIT, 0, NULL, 0),
1365 SND_SOC_DAPM_PGA("IF1 DAC1", SND_SOC_NOPM, 0, 0, NULL, 0),
1366 SND_SOC_DAPM_PGA("IF1 DAC2", SND_SOC_NOPM, 0, 0, NULL, 0),
1367 SND_SOC_DAPM_PGA("IF1 DAC1 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1368 SND_SOC_DAPM_PGA("IF1 DAC1 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1369 SND_SOC_DAPM_PGA("IF1 DAC2 L", SND_SOC_NOPM, 0, 0, NULL, 0),
1370 SND_SOC_DAPM_PGA("IF1 DAC2 R", SND_SOC_NOPM, 0, 0, NULL, 0),
1371 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1372 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1373 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1374 SND_SOC_DAPM_SUPPLY("I2S2", RT5645_PWR_DIG1,
1375 RT5645_PWR_I2S2_BIT, 0, NULL, 0),
1376 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1377 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1378 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1379 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1380
1381 /* Digital Interface Select */
1382 SND_SOC_DAPM_MUX("VAD ADC Mux", SND_SOC_NOPM,
1383 0, 0, &rt5645_vad_adc_mux),
1384
1385 /* Audio Interface */
1386 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1387 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1388 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1389 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1390
1391 /* Output Side */
1392 /* DAC mixer before sound effect */
1393 SND_SOC_DAPM_MIXER("DAC1 MIXL", SND_SOC_NOPM, 0, 0,
1394 rt5645_dac_l_mix, ARRAY_SIZE(rt5645_dac_l_mix)),
1395 SND_SOC_DAPM_MIXER("DAC1 MIXR", SND_SOC_NOPM, 0, 0,
1396 rt5645_dac_r_mix, ARRAY_SIZE(rt5645_dac_r_mix)),
1397
1398 /* DAC2 channel Mux */
1399 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_l2_mux),
1400 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac_r2_mux),
1401 SND_SOC_DAPM_PGA("DAC L2 Volume", RT5645_PWR_DIG1,
1402 RT5645_PWR_DAC_L2_BIT, 0, NULL, 0),
1403 SND_SOC_DAPM_PGA("DAC R2 Volume", RT5645_PWR_DIG1,
1404 RT5645_PWR_DAC_R2_BIT, 0, NULL, 0),
1405
1406 SND_SOC_DAPM_MUX("DAC1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1l_mux),
1407 SND_SOC_DAPM_MUX("DAC1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_dac1r_mux),
1408
1409 /* DAC Mixer */
1410 SND_SOC_DAPM_SUPPLY_S("dac stereo1 filter", 1, RT5645_PWR_DIG2,
1411 RT5645_PWR_DAC_S1F_BIT, 0, NULL, 0),
1412 SND_SOC_DAPM_SUPPLY_S("dac mono left filter", 1, RT5645_PWR_DIG2,
1413 RT5645_PWR_DAC_MF_L_BIT, 0, NULL, 0),
1414 SND_SOC_DAPM_SUPPLY_S("dac mono right filter", 1, RT5645_PWR_DIG2,
1415 RT5645_PWR_DAC_MF_R_BIT, 0, NULL, 0),
1416 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1417 rt5645_sto_dac_l_mix, ARRAY_SIZE(rt5645_sto_dac_l_mix)),
1418 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1419 rt5645_sto_dac_r_mix, ARRAY_SIZE(rt5645_sto_dac_r_mix)),
1420 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1421 rt5645_mono_dac_l_mix, ARRAY_SIZE(rt5645_mono_dac_l_mix)),
1422 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1423 rt5645_mono_dac_r_mix, ARRAY_SIZE(rt5645_mono_dac_r_mix)),
1424 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1425 rt5645_dig_l_mix, ARRAY_SIZE(rt5645_dig_l_mix)),
1426 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1427 rt5645_dig_r_mix, ARRAY_SIZE(rt5645_dig_r_mix)),
1428
1429 /* DACs */
1430 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L1_BIT,
1431 0),
1432 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_L2_BIT,
1433 0),
1434 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R1_BIT,
1435 0),
1436 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5645_PWR_DIG1, RT5645_PWR_DAC_R2_BIT,
1437 0),
1438 /* OUT Mixer */
1439 SND_SOC_DAPM_MIXER("SPK MIXL", RT5645_PWR_MIXER, RT5645_PWR_SM_L_BIT,
1440 0, rt5645_spk_l_mix, ARRAY_SIZE(rt5645_spk_l_mix)),
1441 SND_SOC_DAPM_MIXER("SPK MIXR", RT5645_PWR_MIXER, RT5645_PWR_SM_R_BIT,
1442 0, rt5645_spk_r_mix, ARRAY_SIZE(rt5645_spk_r_mix)),
1443 SND_SOC_DAPM_MIXER("OUT MIXL", RT5645_PWR_MIXER, RT5645_PWR_OM_L_BIT,
1444 0, rt5645_out_l_mix, ARRAY_SIZE(rt5645_out_l_mix)),
1445 SND_SOC_DAPM_MIXER("OUT MIXR", RT5645_PWR_MIXER, RT5645_PWR_OM_R_BIT,
1446 0, rt5645_out_r_mix, ARRAY_SIZE(rt5645_out_r_mix)),
1447 /* Ouput Volume */
1448 SND_SOC_DAPM_SWITCH("SPKVOL L", RT5645_PWR_VOL, RT5645_PWR_SV_L_BIT, 0,
1449 &spk_l_vol_control),
1450 SND_SOC_DAPM_SWITCH("SPKVOL R", RT5645_PWR_VOL, RT5645_PWR_SV_R_BIT, 0,
1451 &spk_r_vol_control),
1452 SND_SOC_DAPM_MIXER("HPOVOL MIXL", RT5645_PWR_VOL, RT5645_PWR_HV_L_BIT,
1453 0, rt5645_hpvoll_mix, ARRAY_SIZE(rt5645_hpvoll_mix)),
1454 SND_SOC_DAPM_MIXER("HPOVOL MIXR", RT5645_PWR_VOL, RT5645_PWR_HV_R_BIT,
1455 0, rt5645_hpvolr_mix, ARRAY_SIZE(rt5645_hpvolr_mix)),
1456 SND_SOC_DAPM_SUPPLY("HPOVOL MIXL Power", RT5645_PWR_MIXER,
1457 RT5645_PWR_HM_L_BIT, 0, NULL, 0),
1458 SND_SOC_DAPM_SUPPLY("HPOVOL MIXR Power", RT5645_PWR_MIXER,
1459 RT5645_PWR_HM_R_BIT, 0, NULL, 0),
1460 SND_SOC_DAPM_PGA("DAC 1", SND_SOC_NOPM, 0, 0, NULL, 0),
1461 SND_SOC_DAPM_PGA("DAC 2", SND_SOC_NOPM, 0, 0, NULL, 0),
1462 SND_SOC_DAPM_PGA("HPOVOL", SND_SOC_NOPM, 0, 0, NULL, 0),
1463 SND_SOC_DAPM_SWITCH("HPOVOL L", SND_SOC_NOPM, 0, 0, &hp_l_vol_control),
1464 SND_SOC_DAPM_SWITCH("HPOVOL R", SND_SOC_NOPM, 0, 0, &hp_r_vol_control),
1465
1466 /* HPO/LOUT/Mono Mixer */
1467 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_l_mix,
1468 ARRAY_SIZE(rt5645_spo_l_mix)),
1469 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0, 0, rt5645_spo_r_mix,
1470 ARRAY_SIZE(rt5645_spo_r_mix)),
1471 SND_SOC_DAPM_MIXER("HPO MIX", SND_SOC_NOPM, 0, 0, rt5645_hpo_mix,
1472 ARRAY_SIZE(rt5645_hpo_mix)),
1473 SND_SOC_DAPM_MIXER("LOUT MIX", SND_SOC_NOPM, 0, 0, rt5645_lout_mix,
1474 ARRAY_SIZE(rt5645_lout_mix)),
1475
1476 SND_SOC_DAPM_PGA_S("HP amp", 1, SND_SOC_NOPM, 0, 0, rt5645_hp_event,
1477 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1478 SND_SOC_DAPM_PGA_S("LOUT amp", 1, SND_SOC_NOPM, 0, 0, rt5645_lout_event,
1479 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1480 SND_SOC_DAPM_PGA_S("SPK amp", 2, SND_SOC_NOPM, 0, 0, rt5645_spk_event,
1481 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1482
1483 /* PDM */
1484 SND_SOC_DAPM_SUPPLY("PDM1 Power", RT5645_PWR_DIG2, RT5645_PWR_PDM1_BIT,
1485 0, NULL, 0),
1486 SND_SOC_DAPM_MUX("PDM1 L Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_l_mux),
1487 SND_SOC_DAPM_MUX("PDM1 R Mux", SND_SOC_NOPM, 0, 0, &rt5645_pdm1_r_mux),
1488
1489 SND_SOC_DAPM_SWITCH("PDM1 L", SND_SOC_NOPM, 0, 0, &pdm1_l_vol_control),
1490 SND_SOC_DAPM_SWITCH("PDM1 R", SND_SOC_NOPM, 0, 0, &pdm1_r_vol_control),
1491
1492 /* Output Lines */
1493 SND_SOC_DAPM_OUTPUT("HPOL"),
1494 SND_SOC_DAPM_OUTPUT("HPOR"),
1495 SND_SOC_DAPM_OUTPUT("LOUTL"),
1496 SND_SOC_DAPM_OUTPUT("LOUTR"),
1497 SND_SOC_DAPM_OUTPUT("PDM1L"),
1498 SND_SOC_DAPM_OUTPUT("PDM1R"),
1499 SND_SOC_DAPM_OUTPUT("SPOL"),
1500 SND_SOC_DAPM_OUTPUT("SPOR"),
1501 };
1502
1503 static const struct snd_soc_dapm_route rt5645_dapm_routes[] = {
1504 { "IN1P", NULL, "LDO2" },
1505 { "IN2P", NULL, "LDO2" },
1506
1507 { "DMIC1", NULL, "DMIC L1" },
1508 { "DMIC1", NULL, "DMIC R1" },
1509 { "DMIC2", NULL, "DMIC L2" },
1510 { "DMIC2", NULL, "DMIC R2" },
1511
1512 { "BST1", NULL, "IN1P" },
1513 { "BST1", NULL, "IN1N" },
1514 { "BST1", NULL, "JD Power" },
1515 { "BST1", NULL, "Mic Det Power" },
1516 { "BST2", NULL, "IN2P" },
1517 { "BST2", NULL, "IN2N" },
1518
1519 { "INL VOL", NULL, "IN2P" },
1520 { "INR VOL", NULL, "IN2N" },
1521
1522 { "RECMIXL", "HPOL Switch", "HPOL" },
1523 { "RECMIXL", "INL Switch", "INL VOL" },
1524 { "RECMIXL", "BST2 Switch", "BST2" },
1525 { "RECMIXL", "BST1 Switch", "BST1" },
1526 { "RECMIXL", "OUT MIXL Switch", "OUT MIXL" },
1527
1528 { "RECMIXR", "HPOR Switch", "HPOR" },
1529 { "RECMIXR", "INR Switch", "INR VOL" },
1530 { "RECMIXR", "BST2 Switch", "BST2" },
1531 { "RECMIXR", "BST1 Switch", "BST1" },
1532 { "RECMIXR", "OUT MIXR Switch", "OUT MIXR" },
1533
1534 { "ADC L", NULL, "RECMIXL" },
1535 { "ADC L", NULL, "ADC L power" },
1536 { "ADC R", NULL, "RECMIXR" },
1537 { "ADC R", NULL, "ADC R power" },
1538
1539 {"DMIC L1", NULL, "DMIC CLK"},
1540 {"DMIC L1", NULL, "DMIC1 Power"},
1541 {"DMIC R1", NULL, "DMIC CLK"},
1542 {"DMIC R1", NULL, "DMIC1 Power"},
1543 {"DMIC L2", NULL, "DMIC CLK"},
1544 {"DMIC L2", NULL, "DMIC2 Power"},
1545 {"DMIC R2", NULL, "DMIC CLK"},
1546 {"DMIC R2", NULL, "DMIC2 Power"},
1547
1548 { "Stereo1 DMIC Mux", "DMIC1", "DMIC1" },
1549 { "Stereo1 DMIC Mux", "DMIC2", "DMIC2" },
1550
1551 { "Mono DMIC L Mux", "DMIC1", "DMIC L1" },
1552 { "Mono DMIC L Mux", "DMIC2", "DMIC L2" },
1553
1554 { "Mono DMIC R Mux", "DMIC1", "DMIC R1" },
1555 { "Mono DMIC R Mux", "DMIC2", "DMIC R2" },
1556
1557 { "Stereo1 ADC L2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1558 { "Stereo1 ADC L2 Mux", "DAC MIX", "DAC MIXL" },
1559 { "Stereo1 ADC L1 Mux", "ADC", "ADC L" },
1560 { "Stereo1 ADC L1 Mux", "DAC MIX", "DAC MIXL" },
1561
1562 { "Stereo1 ADC R1 Mux", "ADC", "ADC R" },
1563 { "Stereo1 ADC R1 Mux", "DAC MIX", "DAC MIXR" },
1564 { "Stereo1 ADC R2 Mux", "DMIC", "Stereo1 DMIC Mux" },
1565 { "Stereo1 ADC R2 Mux", "DAC MIX", "DAC MIXR" },
1566
1567 { "Mono ADC L2 Mux", "DMIC", "Mono DMIC L Mux" },
1568 { "Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1569 { "Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL" },
1570 { "Mono ADC L1 Mux", "ADC", "ADC L" },
1571
1572 { "Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1573 { "Mono ADC R1 Mux", "ADC", "ADC R" },
1574 { "Mono ADC R2 Mux", "DMIC", "Mono DMIC R Mux" },
1575 { "Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR" },
1576
1577 { "Sto1 ADC MIXL", "ADC1 Switch", "Stereo1 ADC L1 Mux" },
1578 { "Sto1 ADC MIXL", "ADC2 Switch", "Stereo1 ADC L2 Mux" },
1579 { "Sto1 ADC MIXR", "ADC1 Switch", "Stereo1 ADC R1 Mux" },
1580 { "Sto1 ADC MIXR", "ADC2 Switch", "Stereo1 ADC R2 Mux" },
1581
1582 { "Stereo1 ADC MIXL", NULL, "Sto1 ADC MIXL" },
1583 { "Stereo1 ADC MIXL", NULL, "adc stereo1 filter" },
1584 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1585
1586 { "Stereo1 ADC MIXR", NULL, "Sto1 ADC MIXR" },
1587 { "Stereo1 ADC MIXR", NULL, "adc stereo1 filter" },
1588 { "adc stereo1 filter", NULL, "PLL1", is_sys_clk_from_pll },
1589
1590 { "Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux" },
1591 { "Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux" },
1592 { "Mono ADC MIXL", NULL, "adc mono left filter" },
1593 { "adc mono left filter", NULL, "PLL1", is_sys_clk_from_pll },
1594
1595 { "Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux" },
1596 { "Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux" },
1597 { "Mono ADC MIXR", NULL, "adc mono right filter" },
1598 { "adc mono right filter", NULL, "PLL1", is_sys_clk_from_pll },
1599
1600 { "VAD ADC Mux", "Sto1 ADC L", "Stereo1 ADC MIXL" },
1601 { "VAD ADC Mux", "Mono ADC L", "Mono ADC MIXL" },
1602 { "VAD ADC Mux", "Mono ADC R", "Mono ADC MIXR" },
1603
1604 { "IF_ADC1", NULL, "Stereo1 ADC MIXL" },
1605 { "IF_ADC1", NULL, "Stereo1 ADC MIXR" },
1606 { "IF_ADC2", NULL, "Mono ADC MIXL" },
1607 { "IF_ADC2", NULL, "Mono ADC MIXR" },
1608 { "VAD_ADC", NULL, "VAD ADC Mux" },
1609
1610 { "IF1 ADC Mux", "IF_ADC1", "IF_ADC1" },
1611 { "IF1 ADC Mux", "IF_ADC2", "IF_ADC2" },
1612 { "IF1 ADC Mux", "VAD_ADC", "VAD_ADC" },
1613
1614 { "IF2 ADC Mux", "IF_ADC1", "IF_ADC1" },
1615 { "IF2 ADC Mux", "IF_ADC2", "IF_ADC2" },
1616 { "IF2 ADC Mux", "VAD_ADC", "VAD_ADC" },
1617
1618 { "IF1 ADC", NULL, "I2S1" },
1619 { "IF1 ADC", NULL, "IF1 ADC Mux" },
1620 { "IF2 ADC", NULL, "I2S2" },
1621 { "IF2 ADC", NULL, "IF2 ADC Mux" },
1622
1623 { "AIF1TX", NULL, "IF1 ADC" },
1624 { "AIF1TX", NULL, "IF2 ADC" },
1625 { "AIF2TX", NULL, "IF2 ADC" },
1626
1627 { "IF1 DAC1", NULL, "AIF1RX" },
1628 { "IF1 DAC2", NULL, "AIF1RX" },
1629 { "IF2 DAC", NULL, "AIF2RX" },
1630
1631 { "IF1 DAC1", NULL, "I2S1" },
1632 { "IF1 DAC2", NULL, "I2S1" },
1633 { "IF2 DAC", NULL, "I2S2" },
1634
1635 { "IF1 DAC2 L", NULL, "IF1 DAC2" },
1636 { "IF1 DAC2 R", NULL, "IF1 DAC2" },
1637 { "IF1 DAC1 L", NULL, "IF1 DAC1" },
1638 { "IF1 DAC1 R", NULL, "IF1 DAC1" },
1639 { "IF2 DAC L", NULL, "IF2 DAC" },
1640 { "IF2 DAC R", NULL, "IF2 DAC" },
1641
1642 { "DAC1 L Mux", "IF1 DAC", "IF1 DAC1 L" },
1643 { "DAC1 L Mux", "IF2 DAC", "IF2 DAC L" },
1644
1645 { "DAC1 R Mux", "IF1 DAC", "IF1 DAC1 R" },
1646 { "DAC1 R Mux", "IF2 DAC", "IF2 DAC R" },
1647
1648 { "DAC1 MIXL", "Stereo ADC Switch", "Stereo1 ADC MIXL" },
1649 { "DAC1 MIXL", "DAC1 Switch", "DAC1 L Mux" },
1650 { "DAC1 MIXL", NULL, "dac stereo1 filter" },
1651 { "DAC1 MIXR", "Stereo ADC Switch", "Stereo1 ADC MIXR" },
1652 { "DAC1 MIXR", "DAC1 Switch", "DAC1 R Mux" },
1653 { "DAC1 MIXR", NULL, "dac stereo1 filter" },
1654
1655 { "DAC L2 Mux", "IF1 DAC", "IF1 DAC2 L" },
1656 { "DAC L2 Mux", "IF2 DAC", "IF2 DAC L" },
1657 { "DAC L2 Mux", "Mono ADC", "Mono ADC MIXL" },
1658 { "DAC L2 Mux", "VAD_ADC", "VAD_ADC" },
1659 { "DAC L2 Volume", NULL, "DAC L2 Mux" },
1660 { "DAC L2 Volume", NULL, "dac mono left filter" },
1661
1662 { "DAC R2 Mux", "IF1 DAC", "IF1 DAC2 R" },
1663 { "DAC R2 Mux", "IF2 DAC", "IF2 DAC R" },
1664 { "DAC R2 Mux", "Mono ADC", "Mono ADC MIXR" },
1665 { "DAC R2 Mux", "Haptic", "Haptic Generator" },
1666 { "DAC R2 Volume", NULL, "DAC R2 Mux" },
1667 { "DAC R2 Volume", NULL, "dac mono right filter" },
1668
1669 { "Stereo DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1670 { "Stereo DAC MIXL", "DAC R1 Switch", "DAC1 MIXR" },
1671 { "Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1672 { "Stereo DAC MIXL", NULL, "dac stereo1 filter" },
1673 { "Stereo DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1674 { "Stereo DAC MIXR", "DAC L1 Switch", "DAC1 MIXL" },
1675 { "Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1676 { "Stereo DAC MIXR", NULL, "dac stereo1 filter" },
1677
1678 { "Mono DAC MIXL", "DAC L1 Switch", "DAC1 MIXL" },
1679 { "Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1680 { "Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1681 { "Mono DAC MIXL", NULL, "dac mono left filter" },
1682 { "Mono DAC MIXR", "DAC R1 Switch", "DAC1 MIXR" },
1683 { "Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1684 { "Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1685 { "Mono DAC MIXR", NULL, "dac mono right filter" },
1686
1687 { "DAC MIXL", "Sto DAC Mix L Switch", "Stereo DAC MIXL" },
1688 { "DAC MIXL", "DAC L2 Switch", "DAC L2 Volume" },
1689 { "DAC MIXL", "DAC R2 Switch", "DAC R2 Volume" },
1690 { "DAC MIXR", "Sto DAC Mix R Switch", "Stereo DAC MIXR" },
1691 { "DAC MIXR", "DAC R2 Switch", "DAC R2 Volume" },
1692 { "DAC MIXR", "DAC L2 Switch", "DAC L2 Volume" },
1693
1694 { "DAC L1", NULL, "Stereo DAC MIXL" },
1695 { "DAC L1", NULL, "PLL1", is_sys_clk_from_pll },
1696 { "DAC R1", NULL, "Stereo DAC MIXR" },
1697 { "DAC R1", NULL, "PLL1", is_sys_clk_from_pll },
1698 { "DAC L2", NULL, "Mono DAC MIXL" },
1699 { "DAC L2", NULL, "PLL1", is_sys_clk_from_pll },
1700 { "DAC R2", NULL, "Mono DAC MIXR" },
1701 { "DAC R2", NULL, "PLL1", is_sys_clk_from_pll },
1702
1703 { "SPK MIXL", "BST1 Switch", "BST1" },
1704 { "SPK MIXL", "INL Switch", "INL VOL" },
1705 { "SPK MIXL", "DAC L1 Switch", "DAC L1" },
1706 { "SPK MIXL", "DAC L2 Switch", "DAC L2" },
1707 { "SPK MIXR", "BST2 Switch", "BST2" },
1708 { "SPK MIXR", "INR Switch", "INR VOL" },
1709 { "SPK MIXR", "DAC R1 Switch", "DAC R1" },
1710 { "SPK MIXR", "DAC R2 Switch", "DAC R2" },
1711
1712 { "OUT MIXL", "BST1 Switch", "BST1" },
1713 { "OUT MIXL", "INL Switch", "INL VOL" },
1714 { "OUT MIXL", "DAC L2 Switch", "DAC L2" },
1715 { "OUT MIXL", "DAC L1 Switch", "DAC L1" },
1716
1717 { "OUT MIXR", "BST2 Switch", "BST2" },
1718 { "OUT MIXR", "INR Switch", "INR VOL" },
1719 { "OUT MIXR", "DAC R2 Switch", "DAC R2" },
1720 { "OUT MIXR", "DAC R1 Switch", "DAC R1" },
1721
1722 { "HPOVOL MIXL", "DAC1 Switch", "DAC L1" },
1723 { "HPOVOL MIXL", "DAC2 Switch", "DAC L2" },
1724 { "HPOVOL MIXL", "INL Switch", "INL VOL" },
1725 { "HPOVOL MIXL", "BST1 Switch", "BST1" },
1726 { "HPOVOL MIXL", NULL, "HPOVOL MIXL Power" },
1727 { "HPOVOL MIXR", "DAC1 Switch", "DAC R1" },
1728 { "HPOVOL MIXR", "DAC2 Switch", "DAC R2" },
1729 { "HPOVOL MIXR", "INR Switch", "INR VOL" },
1730 { "HPOVOL MIXR", "BST2 Switch", "BST2" },
1731 { "HPOVOL MIXR", NULL, "HPOVOL MIXR Power" },
1732
1733 { "DAC 2", NULL, "DAC L2" },
1734 { "DAC 2", NULL, "DAC R2" },
1735 { "DAC 1", NULL, "DAC L1" },
1736 { "DAC 1", NULL, "DAC R1" },
1737 { "HPOVOL L", "Switch", "HPOVOL MIXL" },
1738 { "HPOVOL R", "Switch", "HPOVOL MIXR" },
1739 { "HPOVOL", NULL, "HPOVOL L" },
1740 { "HPOVOL", NULL, "HPOVOL R" },
1741 { "HPO MIX", "DAC1 Switch", "DAC 1" },
1742 { "HPO MIX", "HPVOL Switch", "HPOVOL" },
1743
1744 { "SPKVOL L", "Switch", "SPK MIXL" },
1745 { "SPKVOL R", "Switch", "SPK MIXR" },
1746
1747 { "SPOL MIX", "DAC R1 Switch", "DAC R1" },
1748 { "SPOL MIX", "DAC L1 Switch", "DAC L1" },
1749 { "SPOL MIX", "SPKVOL R Switch", "SPKVOL R" },
1750 { "SPOL MIX", "SPKVOL L Switch", "SPKVOL L" },
1751 { "SPOR MIX", "DAC R1 Switch", "DAC R1" },
1752 { "SPOR MIX", "SPKVOL R Switch", "SPKVOL R" },
1753
1754 { "LOUT MIX", "DAC L1 Switch", "DAC L1" },
1755 { "LOUT MIX", "DAC R1 Switch", "DAC R1" },
1756 { "LOUT MIX", "OUTMIX L Switch", "OUT MIXL" },
1757 { "LOUT MIX", "OUTMIX R Switch", "OUT MIXR" },
1758
1759 { "PDM1 L Mux", "Stereo DAC", "Stereo DAC MIXL" },
1760 { "PDM1 L Mux", "Mono DAC", "Mono DAC MIXL" },
1761 { "PDM1 L Mux", NULL, "PDM1 Power" },
1762 { "PDM1 R Mux", "Stereo DAC", "Stereo DAC MIXR" },
1763 { "PDM1 R Mux", "Mono DAC", "Mono DAC MIXR" },
1764 { "PDM1 R Mux", NULL, "PDM1 Power" },
1765
1766 { "HP amp", NULL, "HPO MIX" },
1767 { "HP amp", NULL, "JD Power" },
1768 { "HP amp", NULL, "Mic Det Power" },
1769 { "HP amp", NULL, "LDO2" },
1770 { "HPOL", NULL, "HP amp" },
1771 { "HPOR", NULL, "HP amp" },
1772
1773 { "LOUT amp", NULL, "LOUT MIX" },
1774 { "LOUTL", NULL, "LOUT amp" },
1775 { "LOUTR", NULL, "LOUT amp" },
1776
1777 { "PDM1 L", "Switch", "PDM1 L Mux" },
1778 { "PDM1 R", "Switch", "PDM1 R Mux" },
1779
1780 { "PDM1L", NULL, "PDM1 L" },
1781 { "PDM1R", NULL, "PDM1 R" },
1782
1783 { "SPK amp", NULL, "SPOL MIX" },
1784 { "SPK amp", NULL, "SPOR MIX" },
1785 { "SPOL", NULL, "SPK amp" },
1786 { "SPOR", NULL, "SPK amp" },
1787 };
1788
1789 static int get_clk_info(int sclk, int rate)
1790 {
1791 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1792
1793 if (sclk <= 0 || rate <= 0)
1794 return -EINVAL;
1795
1796 rate = rate << 8;
1797 for (i = 0; i < ARRAY_SIZE(pd); i++)
1798 if (sclk == rate * pd[i])
1799 return i;
1800
1801 return -EINVAL;
1802 }
1803
1804 static int rt5645_hw_params(struct snd_pcm_substream *substream,
1805 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1806 {
1807 struct snd_soc_codec *codec = dai->codec;
1808 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1809 unsigned int val_len = 0, val_clk, mask_clk;
1810 int pre_div, bclk_ms, frame_size;
1811
1812 rt5645->lrck[dai->id] = params_rate(params);
1813 pre_div = get_clk_info(rt5645->sysclk, rt5645->lrck[dai->id]);
1814 if (pre_div < 0) {
1815 dev_err(codec->dev, "Unsupported clock setting\n");
1816 return -EINVAL;
1817 }
1818 frame_size = snd_soc_params_to_frame_size(params);
1819 if (frame_size < 0) {
1820 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1821 return -EINVAL;
1822 }
1823 bclk_ms = frame_size > 32;
1824 rt5645->bclk[dai->id] = rt5645->lrck[dai->id] * (32 << bclk_ms);
1825
1826 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1827 rt5645->bclk[dai->id], rt5645->lrck[dai->id]);
1828 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1829 bclk_ms, pre_div, dai->id);
1830
1831 switch (params_width(params)) {
1832 case 16:
1833 break;
1834 case 20:
1835 val_len |= RT5645_I2S_DL_20;
1836 break;
1837 case 24:
1838 val_len |= RT5645_I2S_DL_24;
1839 break;
1840 case 8:
1841 val_len |= RT5645_I2S_DL_8;
1842 break;
1843 default:
1844 return -EINVAL;
1845 }
1846
1847 switch (dai->id) {
1848 case RT5645_AIF1:
1849 mask_clk = RT5645_I2S_BCLK_MS1_MASK | RT5645_I2S_PD1_MASK;
1850 val_clk = bclk_ms << RT5645_I2S_BCLK_MS1_SFT |
1851 pre_div << RT5645_I2S_PD1_SFT;
1852 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1853 RT5645_I2S_DL_MASK, val_len);
1854 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1855 break;
1856 case RT5645_AIF2:
1857 mask_clk = RT5645_I2S_BCLK_MS2_MASK | RT5645_I2S_PD2_MASK;
1858 val_clk = bclk_ms << RT5645_I2S_BCLK_MS2_SFT |
1859 pre_div << RT5645_I2S_PD2_SFT;
1860 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1861 RT5645_I2S_DL_MASK, val_len);
1862 snd_soc_update_bits(codec, RT5645_ADDA_CLK1, mask_clk, val_clk);
1863 break;
1864 default:
1865 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1866 return -EINVAL;
1867 }
1868
1869 return 0;
1870 }
1871
1872 static int rt5645_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1873 {
1874 struct snd_soc_codec *codec = dai->codec;
1875 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1876 unsigned int reg_val = 0;
1877
1878 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1879 case SND_SOC_DAIFMT_CBM_CFM:
1880 rt5645->master[dai->id] = 1;
1881 break;
1882 case SND_SOC_DAIFMT_CBS_CFS:
1883 reg_val |= RT5645_I2S_MS_S;
1884 rt5645->master[dai->id] = 0;
1885 break;
1886 default:
1887 return -EINVAL;
1888 }
1889
1890 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1891 case SND_SOC_DAIFMT_NB_NF:
1892 break;
1893 case SND_SOC_DAIFMT_IB_NF:
1894 reg_val |= RT5645_I2S_BP_INV;
1895 break;
1896 default:
1897 return -EINVAL;
1898 }
1899
1900 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1901 case SND_SOC_DAIFMT_I2S:
1902 break;
1903 case SND_SOC_DAIFMT_LEFT_J:
1904 reg_val |= RT5645_I2S_DF_LEFT;
1905 break;
1906 case SND_SOC_DAIFMT_DSP_A:
1907 reg_val |= RT5645_I2S_DF_PCM_A;
1908 break;
1909 case SND_SOC_DAIFMT_DSP_B:
1910 reg_val |= RT5645_I2S_DF_PCM_B;
1911 break;
1912 default:
1913 return -EINVAL;
1914 }
1915 switch (dai->id) {
1916 case RT5645_AIF1:
1917 snd_soc_update_bits(codec, RT5645_I2S1_SDP,
1918 RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1919 RT5645_I2S_DF_MASK, reg_val);
1920 break;
1921 case RT5645_AIF2:
1922 snd_soc_update_bits(codec, RT5645_I2S2_SDP,
1923 RT5645_I2S_MS_MASK | RT5645_I2S_BP_MASK |
1924 RT5645_I2S_DF_MASK, reg_val);
1925 break;
1926 default:
1927 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
1928 return -EINVAL;
1929 }
1930 return 0;
1931 }
1932
1933 static int rt5645_set_dai_sysclk(struct snd_soc_dai *dai,
1934 int clk_id, unsigned int freq, int dir)
1935 {
1936 struct snd_soc_codec *codec = dai->codec;
1937 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
1938 unsigned int reg_val = 0;
1939
1940 if (freq == rt5645->sysclk && clk_id == rt5645->sysclk_src)
1941 return 0;
1942
1943 switch (clk_id) {
1944 case RT5645_SCLK_S_MCLK:
1945 reg_val |= RT5645_SCLK_SRC_MCLK;
1946 break;
1947 case RT5645_SCLK_S_PLL1:
1948 reg_val |= RT5645_SCLK_SRC_PLL1;
1949 break;
1950 case RT5645_SCLK_S_RCCLK:
1951 reg_val |= RT5645_SCLK_SRC_RCCLK;
1952 break;
1953 default:
1954 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1955 return -EINVAL;
1956 }
1957 snd_soc_update_bits(codec, RT5645_GLB_CLK,
1958 RT5645_SCLK_SRC_MASK, reg_val);
1959 rt5645->sysclk = freq;
1960 rt5645->sysclk_src = clk_id;
1961
1962 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1963
1964 return 0;
1965 }
1966
1967 /**
1968 * rt5645_pll_calc - Calcualte PLL M/N/K code.
1969 * @freq_in: external clock provided to codec.
1970 * @freq_out: target clock which codec works on.
1971 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1972 *
1973 * Calcualte M/N/K code to configure PLL for codec. And K is assigned to 2
1974 * which make calculation more efficiently.
1975 *
1976 * Returns 0 for success or negative error code.
1977 */
1978 static int rt5645_pll_calc(const unsigned int freq_in,
1979 const unsigned int freq_out, struct rt5645_pll_code *pll_code)
1980 {
1981 int max_n = RT5645_PLL_N_MAX, max_m = RT5645_PLL_M_MAX;
1982 int k, n = 0, m = 0, red, n_t, m_t, pll_out, in_t, out_t;
1983 int red_t = abs(freq_out - freq_in);
1984 bool bypass = false;
1985
1986 if (RT5645_PLL_INP_MAX < freq_in || RT5645_PLL_INP_MIN > freq_in)
1987 return -EINVAL;
1988
1989 k = 100000000 / freq_out - 2;
1990 if (k > RT5645_PLL_K_MAX)
1991 k = RT5645_PLL_K_MAX;
1992 for (n_t = 0; n_t <= max_n; n_t++) {
1993 in_t = freq_in / (k + 2);
1994 pll_out = freq_out / (n_t + 2);
1995 if (in_t < 0)
1996 continue;
1997 if (in_t == pll_out) {
1998 bypass = true;
1999 n = n_t;
2000 goto code_find;
2001 }
2002 red = abs(in_t - pll_out);
2003 if (red < red_t) {
2004 bypass = true;
2005 n = n_t;
2006 m = m_t;
2007 if (red == 0)
2008 goto code_find;
2009 red_t = red;
2010 }
2011 for (m_t = 0; m_t <= max_m; m_t++) {
2012 out_t = in_t / (m_t + 2);
2013 red = abs(out_t - pll_out);
2014 if (red < red_t) {
2015 bypass = false;
2016 n = n_t;
2017 m = m_t;
2018 if (red == 0)
2019 goto code_find;
2020 red_t = red;
2021 }
2022 }
2023 }
2024 pr_debug("Only get approximation about PLL\n");
2025
2026 code_find:
2027
2028 pll_code->m_bp = bypass;
2029 pll_code->m_code = m;
2030 pll_code->n_code = n;
2031 pll_code->k_code = k;
2032 return 0;
2033 }
2034
2035 static int rt5645_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
2036 unsigned int freq_in, unsigned int freq_out)
2037 {
2038 struct snd_soc_codec *codec = dai->codec;
2039 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2040 struct rt5645_pll_code pll_code;
2041 int ret;
2042
2043 if (source == rt5645->pll_src && freq_in == rt5645->pll_in &&
2044 freq_out == rt5645->pll_out)
2045 return 0;
2046
2047 if (!freq_in || !freq_out) {
2048 dev_dbg(codec->dev, "PLL disabled\n");
2049
2050 rt5645->pll_in = 0;
2051 rt5645->pll_out = 0;
2052 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2053 RT5645_SCLK_SRC_MASK, RT5645_SCLK_SRC_MCLK);
2054 return 0;
2055 }
2056
2057 switch (source) {
2058 case RT5645_PLL1_S_MCLK:
2059 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2060 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_MCLK);
2061 break;
2062 case RT5645_PLL1_S_BCLK1:
2063 case RT5645_PLL1_S_BCLK2:
2064 switch (dai->id) {
2065 case RT5645_AIF1:
2066 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2067 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK1);
2068 break;
2069 case RT5645_AIF2:
2070 snd_soc_update_bits(codec, RT5645_GLB_CLK,
2071 RT5645_PLL1_SRC_MASK, RT5645_PLL1_SRC_BCLK2);
2072 break;
2073 default:
2074 dev_err(codec->dev, "Invalid dai->id: %d\n", dai->id);
2075 return -EINVAL;
2076 }
2077 break;
2078 default:
2079 dev_err(codec->dev, "Unknown PLL source %d\n", source);
2080 return -EINVAL;
2081 }
2082
2083 ret = rt5645_pll_calc(freq_in, freq_out, &pll_code);
2084 if (ret < 0) {
2085 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
2086 return ret;
2087 }
2088
2089 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=%d\n",
2090 pll_code.m_bp, (pll_code.m_bp ? 0 : pll_code.m_code),
2091 pll_code.n_code, pll_code.k_code);
2092
2093 snd_soc_write(codec, RT5645_PLL_CTRL1,
2094 pll_code.n_code << RT5645_PLL_N_SFT | pll_code.k_code);
2095 snd_soc_write(codec, RT5645_PLL_CTRL2,
2096 (pll_code.m_bp ? 0 : pll_code.m_code) << RT5645_PLL_M_SFT |
2097 pll_code.m_bp << RT5645_PLL_M_BP_SFT);
2098
2099 rt5645->pll_in = freq_in;
2100 rt5645->pll_out = freq_out;
2101 rt5645->pll_src = source;
2102
2103 return 0;
2104 }
2105
2106 static int rt5645_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
2107 unsigned int rx_mask, int slots, int slot_width)
2108 {
2109 struct snd_soc_codec *codec = dai->codec;
2110 unsigned int val = 0;
2111
2112 if (rx_mask || tx_mask)
2113 val |= (1 << 14);
2114
2115 switch (slots) {
2116 case 4:
2117 val |= (1 << 12);
2118 break;
2119 case 6:
2120 val |= (2 << 12);
2121 break;
2122 case 8:
2123 val |= (3 << 12);
2124 break;
2125 case 2:
2126 default:
2127 break;
2128 }
2129
2130 switch (slot_width) {
2131 case 20:
2132 val |= (1 << 10);
2133 break;
2134 case 24:
2135 val |= (2 << 10);
2136 break;
2137 case 32:
2138 val |= (3 << 10);
2139 break;
2140 case 16:
2141 default:
2142 break;
2143 }
2144
2145 snd_soc_update_bits(codec, RT5645_TDM_CTRL_1, 0x7c00, val);
2146
2147 return 0;
2148 }
2149
2150 static int rt5645_set_bias_level(struct snd_soc_codec *codec,
2151 enum snd_soc_bias_level level)
2152 {
2153 switch (level) {
2154 case SND_SOC_BIAS_STANDBY:
2155 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
2156 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2157 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2158 RT5645_PWR_BG | RT5645_PWR_VREF2,
2159 RT5645_PWR_VREF1 | RT5645_PWR_MB |
2160 RT5645_PWR_BG | RT5645_PWR_VREF2);
2161 mdelay(10);
2162 snd_soc_update_bits(codec, RT5645_PWR_ANLG1,
2163 RT5645_PWR_FV1 | RT5645_PWR_FV2,
2164 RT5645_PWR_FV1 | RT5645_PWR_FV2);
2165 snd_soc_update_bits(codec, RT5645_GEN_CTRL1,
2166 RT5645_DIG_GATE_CTRL, RT5645_DIG_GATE_CTRL);
2167 }
2168 break;
2169
2170 case SND_SOC_BIAS_OFF:
2171 snd_soc_write(codec, RT5645_DEPOP_M2, 0x1100);
2172 snd_soc_write(codec, RT5645_GEN_CTRL1, 0x0128);
2173 snd_soc_write(codec, RT5645_PWR_DIG1, 0x0000);
2174 snd_soc_write(codec, RT5645_PWR_DIG2, 0x0000);
2175 snd_soc_write(codec, RT5645_PWR_VOL, 0x0000);
2176 snd_soc_write(codec, RT5645_PWR_MIXER, 0x0000);
2177 snd_soc_write(codec, RT5645_PWR_ANLG1, 0x0000);
2178 snd_soc_write(codec, RT5645_PWR_ANLG2, 0x0000);
2179 break;
2180
2181 default:
2182 break;
2183 }
2184 codec->dapm.bias_level = level;
2185
2186 return 0;
2187 }
2188
2189 static int rt5645_probe(struct snd_soc_codec *codec)
2190 {
2191 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2192
2193 rt5645->codec = codec;
2194
2195 rt5645_set_bias_level(codec, SND_SOC_BIAS_OFF);
2196
2197 snd_soc_update_bits(codec, RT5645_CHARGE_PUMP, 0x0300, 0x0200);
2198
2199 return 0;
2200 }
2201
2202 static int rt5645_remove(struct snd_soc_codec *codec)
2203 {
2204 rt5645_reset(codec);
2205 return 0;
2206 }
2207
2208 #ifdef CONFIG_PM
2209 static int rt5645_suspend(struct snd_soc_codec *codec)
2210 {
2211 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2212
2213 regcache_cache_only(rt5645->regmap, true);
2214 regcache_mark_dirty(rt5645->regmap);
2215
2216 return 0;
2217 }
2218
2219 static int rt5645_resume(struct snd_soc_codec *codec)
2220 {
2221 struct rt5645_priv *rt5645 = snd_soc_codec_get_drvdata(codec);
2222
2223 regcache_cache_only(rt5645->regmap, false);
2224 regcache_sync(rt5645->regmap);
2225
2226 return 0;
2227 }
2228 #else
2229 #define rt5645_suspend NULL
2230 #define rt5645_resume NULL
2231 #endif
2232
2233 #define RT5645_STEREO_RATES SNDRV_PCM_RATE_8000_96000
2234 #define RT5645_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
2235 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
2236
2237 static struct snd_soc_dai_ops rt5645_aif_dai_ops = {
2238 .hw_params = rt5645_hw_params,
2239 .set_fmt = rt5645_set_dai_fmt,
2240 .set_sysclk = rt5645_set_dai_sysclk,
2241 .set_tdm_slot = rt5645_set_tdm_slot,
2242 .set_pll = rt5645_set_dai_pll,
2243 };
2244
2245 static struct snd_soc_dai_driver rt5645_dai[] = {
2246 {
2247 .name = "rt5645-aif1",
2248 .id = RT5645_AIF1,
2249 .playback = {
2250 .stream_name = "AIF1 Playback",
2251 .channels_min = 1,
2252 .channels_max = 2,
2253 .rates = RT5645_STEREO_RATES,
2254 .formats = RT5645_FORMATS,
2255 },
2256 .capture = {
2257 .stream_name = "AIF1 Capture",
2258 .channels_min = 1,
2259 .channels_max = 2,
2260 .rates = RT5645_STEREO_RATES,
2261 .formats = RT5645_FORMATS,
2262 },
2263 .ops = &rt5645_aif_dai_ops,
2264 },
2265 {
2266 .name = "rt5645-aif2",
2267 .id = RT5645_AIF2,
2268 .playback = {
2269 .stream_name = "AIF2 Playback",
2270 .channels_min = 1,
2271 .channels_max = 2,
2272 .rates = RT5645_STEREO_RATES,
2273 .formats = RT5645_FORMATS,
2274 },
2275 .capture = {
2276 .stream_name = "AIF2 Capture",
2277 .channels_min = 1,
2278 .channels_max = 2,
2279 .rates = RT5645_STEREO_RATES,
2280 .formats = RT5645_FORMATS,
2281 },
2282 .ops = &rt5645_aif_dai_ops,
2283 },
2284 };
2285
2286 static struct snd_soc_codec_driver soc_codec_dev_rt5645 = {
2287 .probe = rt5645_probe,
2288 .remove = rt5645_remove,
2289 .suspend = rt5645_suspend,
2290 .resume = rt5645_resume,
2291 .set_bias_level = rt5645_set_bias_level,
2292 .idle_bias_off = true,
2293 .controls = rt5645_snd_controls,
2294 .num_controls = ARRAY_SIZE(rt5645_snd_controls),
2295 .dapm_widgets = rt5645_dapm_widgets,
2296 .num_dapm_widgets = ARRAY_SIZE(rt5645_dapm_widgets),
2297 .dapm_routes = rt5645_dapm_routes,
2298 .num_dapm_routes = ARRAY_SIZE(rt5645_dapm_routes),
2299 };
2300
2301 static const struct regmap_config rt5645_regmap = {
2302 .reg_bits = 8,
2303 .val_bits = 16,
2304
2305 .max_register = RT5645_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5645_ranges) *
2306 RT5645_PR_SPACING),
2307 .volatile_reg = rt5645_volatile_register,
2308 .readable_reg = rt5645_readable_register,
2309
2310 .cache_type = REGCACHE_RBTREE,
2311 .reg_defaults = rt5645_reg,
2312 .num_reg_defaults = ARRAY_SIZE(rt5645_reg),
2313 .ranges = rt5645_ranges,
2314 .num_ranges = ARRAY_SIZE(rt5645_ranges),
2315 };
2316
2317 static const struct i2c_device_id rt5645_i2c_id[] = {
2318 { "rt5645", 0 },
2319 { }
2320 };
2321 MODULE_DEVICE_TABLE(i2c, rt5645_i2c_id);
2322
2323 static int rt5645_i2c_probe(struct i2c_client *i2c,
2324 const struct i2c_device_id *id)
2325 {
2326 struct rt5645_platform_data *pdata = dev_get_platdata(&i2c->dev);
2327 struct rt5645_priv *rt5645;
2328 int ret;
2329 unsigned int val;
2330
2331 rt5645 = devm_kzalloc(&i2c->dev, sizeof(struct rt5645_priv),
2332 GFP_KERNEL);
2333 if (rt5645 == NULL)
2334 return -ENOMEM;
2335
2336 i2c_set_clientdata(i2c, rt5645);
2337
2338 if (pdata)
2339 rt5645->pdata = *pdata;
2340
2341 rt5645->regmap = devm_regmap_init_i2c(i2c, &rt5645_regmap);
2342 if (IS_ERR(rt5645->regmap)) {
2343 ret = PTR_ERR(rt5645->regmap);
2344 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2345 ret);
2346 return ret;
2347 }
2348
2349 regmap_read(rt5645->regmap, RT5645_VENDOR_ID2, &val);
2350 if (val != RT5645_DEVICE_ID) {
2351 dev_err(&i2c->dev,
2352 "Device with ID register %x is not rt5645\n", val);
2353 return -ENODEV;
2354 }
2355
2356 regmap_write(rt5645->regmap, RT5645_RESET, 0);
2357
2358 ret = regmap_register_patch(rt5645->regmap, init_list,
2359 ARRAY_SIZE(init_list));
2360 if (ret != 0)
2361 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2362
2363 if (rt5645->pdata.in2_diff)
2364 regmap_update_bits(rt5645->regmap, RT5645_IN2_CTRL,
2365 RT5645_IN_DF2, RT5645_IN_DF2);
2366
2367 if (rt5645->pdata.dmic_en) {
2368 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2369 RT5645_GP2_PIN_MASK, RT5645_GP2_PIN_DMIC1_SCL);
2370
2371 switch (rt5645->pdata.dmic1_data_pin) {
2372 case RT5645_DMIC_DATA_IN2N:
2373 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2374 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_IN2N);
2375 break;
2376
2377 case RT5645_DMIC_DATA_GPIO5:
2378 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2379 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO5);
2380 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2381 RT5645_GP5_PIN_MASK, RT5645_GP5_PIN_DMIC1_SDA);
2382 break;
2383
2384 case RT5645_DMIC_DATA_GPIO11:
2385 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2386 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_1_DP_GPIO11);
2387 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2388 RT5645_GP11_PIN_MASK,
2389 RT5645_GP11_PIN_DMIC1_SDA);
2390 break;
2391
2392 default:
2393 break;
2394 }
2395
2396 switch (rt5645->pdata.dmic2_data_pin) {
2397 case RT5645_DMIC_DATA_IN2P:
2398 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2399 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_IN2P);
2400 break;
2401
2402 case RT5645_DMIC_DATA_GPIO6:
2403 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2404 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO6);
2405 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2406 RT5645_GP6_PIN_MASK, RT5645_GP6_PIN_DMIC2_SDA);
2407 break;
2408
2409 case RT5645_DMIC_DATA_GPIO10:
2410 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2411 RT5645_DMIC_2_DP_MASK, RT5645_DMIC_2_DP_GPIO10);
2412 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2413 RT5645_GP10_PIN_MASK,
2414 RT5645_GP10_PIN_DMIC2_SDA);
2415 break;
2416
2417 case RT5645_DMIC_DATA_GPIO12:
2418 regmap_update_bits(rt5645->regmap, RT5645_DMIC_CTRL1,
2419 RT5645_DMIC_1_DP_MASK, RT5645_DMIC_2_DP_GPIO12);
2420 regmap_update_bits(rt5645->regmap, RT5645_GPIO_CTRL1,
2421 RT5645_GP12_PIN_MASK,
2422 RT5645_GP12_PIN_DMIC2_SDA);
2423 break;
2424
2425 default:
2426 break;
2427 }
2428
2429 }
2430
2431 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5645,
2432 rt5645_dai, ARRAY_SIZE(rt5645_dai));
2433 if (ret < 0)
2434 goto err;
2435
2436 return 0;
2437 err:
2438 return ret;
2439 }
2440
2441 static int rt5645_i2c_remove(struct i2c_client *i2c)
2442 {
2443 snd_soc_unregister_codec(&i2c->dev);
2444
2445 return 0;
2446 }
2447
2448 static struct i2c_driver rt5645_i2c_driver = {
2449 .driver = {
2450 .name = "rt5645",
2451 .owner = THIS_MODULE,
2452 },
2453 .probe = rt5645_i2c_probe,
2454 .remove = rt5645_i2c_remove,
2455 .id_table = rt5645_i2c_id,
2456 };
2457 module_i2c_driver(rt5645_i2c_driver);
2458
2459 MODULE_DESCRIPTION("ASoC RT5645 driver");
2460 MODULE_AUTHOR("Bard Liao <bardliao@realtek.com>");
2461 MODULE_LICENSE("GPL v2");
Linux kernel - Deliverables
This page took 0.081188 seconds and 5 git commands to generate.