2 * SSM4567 amplifier audio driver
4 * Copyright 2014 Google Chromium project.
5 * Author: Anatol Pomozov <anatol@chromium.org>
7 * Based on code copyright/by:
8 * Copyright 2013 Analog Devices Inc.
10 * Licensed under the GPL-2.
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/i2c.h>
16 #include <linux/regmap.h>
17 #include <linux/slab.h>
18 #include <sound/core.h>
19 #include <sound/pcm.h>
20 #include <sound/pcm_params.h>
21 #include <sound/soc.h>
22 #include <sound/initval.h>
23 #include <sound/tlv.h>
25 #define SSM4567_REG_POWER_CTRL 0x00
26 #define SSM4567_REG_AMP_SNS_CTRL 0x01
27 #define SSM4567_REG_DAC_CTRL 0x02
28 #define SSM4567_REG_DAC_VOLUME 0x03
29 #define SSM4567_REG_SAI_CTRL_1 0x04
30 #define SSM4567_REG_SAI_CTRL_2 0x05
31 #define SSM4567_REG_SAI_PLACEMENT_1 0x06
32 #define SSM4567_REG_SAI_PLACEMENT_2 0x07
33 #define SSM4567_REG_SAI_PLACEMENT_3 0x08
34 #define SSM4567_REG_SAI_PLACEMENT_4 0x09
35 #define SSM4567_REG_SAI_PLACEMENT_5 0x0a
36 #define SSM4567_REG_SAI_PLACEMENT_6 0x0b
37 #define SSM4567_REG_BATTERY_V_OUT 0x0c
38 #define SSM4567_REG_LIMITER_CTRL_1 0x0d
39 #define SSM4567_REG_LIMITER_CTRL_2 0x0e
40 #define SSM4567_REG_LIMITER_CTRL_3 0x0f
41 #define SSM4567_REG_STATUS_1 0x10
42 #define SSM4567_REG_STATUS_2 0x11
43 #define SSM4567_REG_FAULT_CTRL 0x12
44 #define SSM4567_REG_PDM_CTRL 0x13
45 #define SSM4567_REG_MCLK_RATIO 0x14
46 #define SSM4567_REG_BOOST_CTRL_1 0x15
47 #define SSM4567_REG_BOOST_CTRL_2 0x16
48 #define SSM4567_REG_SOFT_RESET 0xff
51 #define SSM4567_POWER_APWDN_EN BIT(7)
52 #define SSM4567_POWER_BSNS_PWDN BIT(6)
53 #define SSM4567_POWER_VSNS_PWDN BIT(5)
54 #define SSM4567_POWER_ISNS_PWDN BIT(4)
55 #define SSM4567_POWER_BOOST_PWDN BIT(3)
56 #define SSM4567_POWER_AMP_PWDN BIT(2)
57 #define SSM4567_POWER_VBAT_ONLY BIT(1)
58 #define SSM4567_POWER_SPWDN BIT(0)
61 #define SSM4567_DAC_HV BIT(7)
62 #define SSM4567_DAC_MUTE BIT(6)
63 #define SSM4567_DAC_HPF BIT(5)
64 #define SSM4567_DAC_LPM BIT(4)
65 #define SSM4567_DAC_FS_MASK 0x7
66 #define SSM4567_DAC_FS_8000_12000 0x0
67 #define SSM4567_DAC_FS_16000_24000 0x1
68 #define SSM4567_DAC_FS_32000_48000 0x2
69 #define SSM4567_DAC_FS_64000_96000 0x3
70 #define SSM4567_DAC_FS_128000_192000 0x4
73 struct regmap
*regmap
;
76 static const struct reg_default ssm4567_reg_defaults
[] = {
77 { SSM4567_REG_POWER_CTRL
, 0x81 },
78 { SSM4567_REG_AMP_SNS_CTRL
, 0x09 },
79 { SSM4567_REG_DAC_CTRL
, 0x32 },
80 { SSM4567_REG_DAC_VOLUME
, 0x40 },
81 { SSM4567_REG_SAI_CTRL_1
, 0x00 },
82 { SSM4567_REG_SAI_CTRL_2
, 0x08 },
83 { SSM4567_REG_SAI_PLACEMENT_1
, 0x01 },
84 { SSM4567_REG_SAI_PLACEMENT_2
, 0x20 },
85 { SSM4567_REG_SAI_PLACEMENT_3
, 0x32 },
86 { SSM4567_REG_SAI_PLACEMENT_4
, 0x07 },
87 { SSM4567_REG_SAI_PLACEMENT_5
, 0x07 },
88 { SSM4567_REG_SAI_PLACEMENT_6
, 0x07 },
89 { SSM4567_REG_BATTERY_V_OUT
, 0x00 },
90 { SSM4567_REG_LIMITER_CTRL_1
, 0xa4 },
91 { SSM4567_REG_LIMITER_CTRL_2
, 0x73 },
92 { SSM4567_REG_LIMITER_CTRL_3
, 0x00 },
93 { SSM4567_REG_STATUS_1
, 0x00 },
94 { SSM4567_REG_STATUS_2
, 0x00 },
95 { SSM4567_REG_FAULT_CTRL
, 0x30 },
96 { SSM4567_REG_PDM_CTRL
, 0x40 },
97 { SSM4567_REG_MCLK_RATIO
, 0x11 },
98 { SSM4567_REG_BOOST_CTRL_1
, 0x03 },
99 { SSM4567_REG_BOOST_CTRL_2
, 0x00 },
100 { SSM4567_REG_SOFT_RESET
, 0x00 },
104 static bool ssm4567_readable_reg(struct device
*dev
, unsigned int reg
)
107 case SSM4567_REG_POWER_CTRL
... SSM4567_REG_BOOST_CTRL_2
:
115 static bool ssm4567_writeable_reg(struct device
*dev
, unsigned int reg
)
118 case SSM4567_REG_POWER_CTRL
... SSM4567_REG_SAI_PLACEMENT_6
:
119 case SSM4567_REG_LIMITER_CTRL_1
... SSM4567_REG_LIMITER_CTRL_3
:
120 case SSM4567_REG_FAULT_CTRL
... SSM4567_REG_BOOST_CTRL_2
:
121 /* The datasheet states that soft reset register is read-only,
122 * but logically it is write-only. */
123 case SSM4567_REG_SOFT_RESET
:
130 static bool ssm4567_volatile_reg(struct device
*dev
, unsigned int reg
)
133 case SSM4567_REG_BATTERY_V_OUT
:
134 case SSM4567_REG_STATUS_1
... SSM4567_REG_STATUS_2
:
135 case SSM4567_REG_SOFT_RESET
:
142 static const DECLARE_TLV_DB_MINMAX_MUTE(ssm4567_vol_tlv
, -7125, 2400);
144 static const struct snd_kcontrol_new ssm4567_snd_controls
[] = {
145 SOC_SINGLE_TLV("Master Playback Volume", SSM4567_REG_DAC_VOLUME
, 0,
146 0xff, 1, ssm4567_vol_tlv
),
147 SOC_SINGLE("DAC Low Power Mode Switch", SSM4567_REG_DAC_CTRL
, 4, 1, 0),
148 SOC_SINGLE("DAC High Pass Filter Switch", SSM4567_REG_DAC_CTRL
,
152 static const struct snd_soc_dapm_widget ssm4567_dapm_widgets
[] = {
153 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", SSM4567_REG_POWER_CTRL
, 2, 1),
155 SND_SOC_DAPM_OUTPUT("OUT"),
158 static const struct snd_soc_dapm_route ssm4567_routes
[] = {
159 { "OUT", NULL
, "DAC" },
162 static int ssm4567_hw_params(struct snd_pcm_substream
*substream
,
163 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
165 struct snd_soc_codec
*codec
= dai
->codec
;
166 struct ssm4567
*ssm4567
= snd_soc_codec_get_drvdata(codec
);
167 unsigned int rate
= params_rate(params
);
170 if (rate
>= 8000 && rate
<= 12000)
171 dacfs
= SSM4567_DAC_FS_8000_12000
;
172 else if (rate
>= 16000 && rate
<= 24000)
173 dacfs
= SSM4567_DAC_FS_16000_24000
;
174 else if (rate
>= 32000 && rate
<= 48000)
175 dacfs
= SSM4567_DAC_FS_32000_48000
;
176 else if (rate
>= 64000 && rate
<= 96000)
177 dacfs
= SSM4567_DAC_FS_64000_96000
;
178 else if (rate
>= 128000 && rate
<= 192000)
179 dacfs
= SSM4567_DAC_FS_128000_192000
;
183 return regmap_update_bits(ssm4567
->regmap
, SSM4567_REG_DAC_CTRL
,
184 SSM4567_DAC_FS_MASK
, dacfs
);
187 static int ssm4567_mute(struct snd_soc_dai
*dai
, int mute
)
189 struct ssm4567
*ssm4567
= snd_soc_codec_get_drvdata(dai
->codec
);
192 val
= mute
? SSM4567_DAC_MUTE
: 0;
193 return regmap_update_bits(ssm4567
->regmap
, SSM4567_REG_DAC_CTRL
,
194 SSM4567_DAC_MUTE
, val
);
197 static int ssm4567_set_power(struct ssm4567
*ssm4567
, bool enable
)
202 ret
= regmap_update_bits(ssm4567
->regmap
,
203 SSM4567_REG_POWER_CTRL
,
204 SSM4567_POWER_SPWDN
, SSM4567_POWER_SPWDN
);
205 regcache_mark_dirty(ssm4567
->regmap
);
208 regcache_cache_only(ssm4567
->regmap
, !enable
);
211 ret
= regmap_update_bits(ssm4567
->regmap
,
212 SSM4567_REG_POWER_CTRL
,
213 SSM4567_POWER_SPWDN
, 0x00);
214 regcache_sync(ssm4567
->regmap
);
220 static int ssm4567_set_bias_level(struct snd_soc_codec
*codec
,
221 enum snd_soc_bias_level level
)
223 struct ssm4567
*ssm4567
= snd_soc_codec_get_drvdata(codec
);
227 case SND_SOC_BIAS_ON
:
229 case SND_SOC_BIAS_PREPARE
:
231 case SND_SOC_BIAS_STANDBY
:
232 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_OFF
)
233 ret
= ssm4567_set_power(ssm4567
, true);
235 case SND_SOC_BIAS_OFF
:
236 ret
= ssm4567_set_power(ssm4567
, false);
243 codec
->dapm
.bias_level
= level
;
248 static const struct snd_soc_dai_ops ssm4567_dai_ops
= {
249 .hw_params
= ssm4567_hw_params
,
250 .digital_mute
= ssm4567_mute
,
253 static struct snd_soc_dai_driver ssm4567_dai
= {
254 .name
= "ssm4567-hifi",
256 .stream_name
= "Playback",
259 .rates
= SNDRV_PCM_RATE_8000_192000
,
260 .formats
= SNDRV_PCM_FMTBIT_S16_LE
| SNDRV_PCM_FMTBIT_S24_LE
|
261 SNDRV_PCM_FMTBIT_S32
,
263 .ops
= &ssm4567_dai_ops
,
266 static struct snd_soc_codec_driver ssm4567_codec_driver
= {
267 .set_bias_level
= ssm4567_set_bias_level
,
268 .idle_bias_off
= true,
270 .controls
= ssm4567_snd_controls
,
271 .num_controls
= ARRAY_SIZE(ssm4567_snd_controls
),
272 .dapm_widgets
= ssm4567_dapm_widgets
,
273 .num_dapm_widgets
= ARRAY_SIZE(ssm4567_dapm_widgets
),
274 .dapm_routes
= ssm4567_routes
,
275 .num_dapm_routes
= ARRAY_SIZE(ssm4567_routes
),
278 static const struct regmap_config ssm4567_regmap_config
= {
282 .max_register
= SSM4567_REG_SOFT_RESET
,
283 .readable_reg
= ssm4567_readable_reg
,
284 .writeable_reg
= ssm4567_writeable_reg
,
285 .volatile_reg
= ssm4567_volatile_reg
,
287 .cache_type
= REGCACHE_RBTREE
,
288 .reg_defaults
= ssm4567_reg_defaults
,
289 .num_reg_defaults
= ARRAY_SIZE(ssm4567_reg_defaults
),
292 static int ssm4567_i2c_probe(struct i2c_client
*i2c
,
293 const struct i2c_device_id
*id
)
295 struct ssm4567
*ssm4567
;
298 ssm4567
= devm_kzalloc(&i2c
->dev
, sizeof(*ssm4567
), GFP_KERNEL
);
302 i2c_set_clientdata(i2c
, ssm4567
);
304 ssm4567
->regmap
= devm_regmap_init_i2c(i2c
, &ssm4567_regmap_config
);
305 if (IS_ERR(ssm4567
->regmap
))
306 return PTR_ERR(ssm4567
->regmap
);
308 ret
= regmap_write(ssm4567
->regmap
, SSM4567_REG_SOFT_RESET
, 0x00);
312 ret
= ssm4567_set_power(ssm4567
, false);
316 return snd_soc_register_codec(&i2c
->dev
, &ssm4567_codec_driver
,
320 static int ssm4567_i2c_remove(struct i2c_client
*client
)
322 snd_soc_unregister_codec(&client
->dev
);
326 static const struct i2c_device_id ssm4567_i2c_ids
[] = {
330 MODULE_DEVICE_TABLE(i2c
, ssm4567_i2c_ids
);
332 static struct i2c_driver ssm4567_driver
= {
335 .owner
= THIS_MODULE
,
337 .probe
= ssm4567_i2c_probe
,
338 .remove
= ssm4567_i2c_remove
,
339 .id_table
= ssm4567_i2c_ids
,
341 module_i2c_driver(ssm4567_driver
);
343 MODULE_DESCRIPTION("ASoC SSM4567 driver");
344 MODULE_AUTHOR("Anatol Pomozov <anatol@chromium.org>");
345 MODULE_LICENSE("GPL");