2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl4030.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
44 0x00, /* this register not used */
45 0x91, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
120 /* codec private data */
121 struct twl4030_priv
{
122 unsigned int bypass_state
;
123 unsigned int codec_powered
;
124 unsigned int codec_muted
;
128 * read twl4030 register cache
130 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
133 u8
*cache
= codec
->reg_cache
;
135 if (reg
>= TWL4030_CACHEREGNUM
)
142 * write twl4030 register cache
144 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
147 u8
*cache
= codec
->reg_cache
;
149 if (reg
>= TWL4030_CACHEREGNUM
)
155 * write to the twl4030 register space
157 static int twl4030_write(struct snd_soc_codec
*codec
,
158 unsigned int reg
, unsigned int value
)
160 twl4030_write_reg_cache(codec
, reg
, value
);
161 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
, value
, reg
);
164 static void twl4030_codec_enable(struct snd_soc_codec
*codec
, int enable
)
166 struct twl4030_priv
*twl4030
= codec
->private_data
;
169 if (enable
== twl4030
->codec_powered
)
172 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
174 mode
|= TWL4030_CODECPDZ
;
176 mode
&= ~TWL4030_CODECPDZ
;
178 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
179 twl4030
->codec_powered
= enable
;
181 /* REVISIT: this delay is present in TI sample drivers */
182 /* but there seems to be no TRM requirement for it */
186 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
190 /* clear CODECPDZ prior to setting register defaults */
191 twl4030_codec_enable(codec
, 0);
193 /* set all audio section registers to reasonable defaults */
194 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
195 twl4030_write(codec
, i
, twl4030_reg
[i
]);
199 static void twl4030_codec_mute(struct snd_soc_codec
*codec
, int mute
)
201 struct twl4030_priv
*twl4030
= codec
->private_data
;
204 if (mute
== twl4030
->codec_muted
)
208 /* Bypass the reg_cache and mute the volumes
209 * Headset mute is done in it's own event handler
210 * Things to mute: Earpiece, PreDrivL/R, CarkitL/R
212 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_EAR_CTL
);
213 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
214 reg_val
& (~TWL4030_EAR_GAIN
),
215 TWL4030_REG_EAR_CTL
);
217 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_PREDL_CTL
);
218 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
219 reg_val
& (~TWL4030_PREDL_GAIN
),
220 TWL4030_REG_PREDL_CTL
);
221 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_PREDR_CTL
);
222 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
223 reg_val
& (~TWL4030_PREDR_GAIN
),
224 TWL4030_REG_PREDL_CTL
);
226 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_PRECKL_CTL
);
227 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
228 reg_val
& (~TWL4030_PRECKL_GAIN
),
229 TWL4030_REG_PRECKL_CTL
);
230 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_PRECKR_CTL
);
231 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
232 reg_val
& (~TWL4030_PRECKL_GAIN
),
233 TWL4030_REG_PRECKR_CTL
);
236 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
);
237 reg_val
&= ~TWL4030_APLL_EN
;
238 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, reg_val
);
240 /* Restore the volumes
241 * Headset mute is done in it's own event handler
242 * Things to restore: Earpiece, PreDrivL/R, CarkitL/R
244 twl4030_write(codec
, TWL4030_REG_EAR_CTL
,
245 twl4030_read_reg_cache(codec
, TWL4030_REG_EAR_CTL
));
247 twl4030_write(codec
, TWL4030_REG_PREDL_CTL
,
248 twl4030_read_reg_cache(codec
, TWL4030_REG_PREDL_CTL
));
249 twl4030_write(codec
, TWL4030_REG_PREDR_CTL
,
250 twl4030_read_reg_cache(codec
, TWL4030_REG_PREDR_CTL
));
252 twl4030_write(codec
, TWL4030_REG_PRECKL_CTL
,
253 twl4030_read_reg_cache(codec
, TWL4030_REG_PRECKL_CTL
));
254 twl4030_write(codec
, TWL4030_REG_PRECKR_CTL
,
255 twl4030_read_reg_cache(codec
, TWL4030_REG_PRECKR_CTL
));
258 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
);
259 reg_val
|= TWL4030_APLL_EN
;
260 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, reg_val
);
263 twl4030
->codec_muted
= mute
;
266 static void twl4030_power_up(struct snd_soc_codec
*codec
)
268 struct twl4030_priv
*twl4030
= codec
->private_data
;
269 u8 anamicl
, regmisc1
, byte
;
272 if (twl4030
->codec_powered
)
275 /* set CODECPDZ to turn on codec */
276 twl4030_codec_enable(codec
, 1);
278 /* initiate offset cancellation */
279 anamicl
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
280 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
281 anamicl
| TWL4030_CNCL_OFFSET_START
);
283 /* wait for offset cancellation to complete */
285 /* this takes a little while, so don't slam i2c */
287 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
288 TWL4030_REG_ANAMICL
);
289 } while ((i
++ < 100) &&
290 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
291 TWL4030_CNCL_OFFSET_START
));
293 /* Make sure that the reg_cache has the same value as the HW */
294 twl4030_write_reg_cache(codec
, TWL4030_REG_ANAMICL
, byte
);
296 /* anti-pop when changing analog gain */
297 regmisc1
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
298 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
299 regmisc1
| TWL4030_SMOOTH_ANAVOL_EN
);
301 /* toggle CODECPDZ as per TRM */
302 twl4030_codec_enable(codec
, 0);
303 twl4030_codec_enable(codec
, 1);
307 * Unconditional power down
309 static void twl4030_power_down(struct snd_soc_codec
*codec
)
312 twl4030_codec_enable(codec
, 0);
316 static const char *twl4030_earpiece_texts
[] =
317 {"Off", "DACL1", "DACL2", "DACR1"};
319 static const unsigned int twl4030_earpiece_values
[] =
320 {0x0, 0x1, 0x2, 0x4};
322 static const struct soc_enum twl4030_earpiece_enum
=
323 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_EAR_CTL
, 1, 0x7,
324 ARRAY_SIZE(twl4030_earpiece_texts
),
325 twl4030_earpiece_texts
,
326 twl4030_earpiece_values
);
328 static const struct snd_kcontrol_new twl4030_dapm_earpiece_control
=
329 SOC_DAPM_VALUE_ENUM("Route", twl4030_earpiece_enum
);
332 static const char *twl4030_predrivel_texts
[] =
333 {"Off", "DACL1", "DACL2", "DACR2"};
335 static const unsigned int twl4030_predrivel_values
[] =
336 {0x0, 0x1, 0x2, 0x4};
338 static const struct soc_enum twl4030_predrivel_enum
=
339 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDL_CTL
, 1, 0x7,
340 ARRAY_SIZE(twl4030_predrivel_texts
),
341 twl4030_predrivel_texts
,
342 twl4030_predrivel_values
);
344 static const struct snd_kcontrol_new twl4030_dapm_predrivel_control
=
345 SOC_DAPM_VALUE_ENUM("Route", twl4030_predrivel_enum
);
348 static const char *twl4030_predriver_texts
[] =
349 {"Off", "DACR1", "DACR2", "DACL2"};
351 static const unsigned int twl4030_predriver_values
[] =
352 {0x0, 0x1, 0x2, 0x4};
354 static const struct soc_enum twl4030_predriver_enum
=
355 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDR_CTL
, 1, 0x7,
356 ARRAY_SIZE(twl4030_predriver_texts
),
357 twl4030_predriver_texts
,
358 twl4030_predriver_values
);
360 static const struct snd_kcontrol_new twl4030_dapm_predriver_control
=
361 SOC_DAPM_VALUE_ENUM("Route", twl4030_predriver_enum
);
364 static const char *twl4030_hsol_texts
[] =
365 {"Off", "DACL1", "DACL2"};
367 static const struct soc_enum twl4030_hsol_enum
=
368 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL
, 1,
369 ARRAY_SIZE(twl4030_hsol_texts
),
372 static const struct snd_kcontrol_new twl4030_dapm_hsol_control
=
373 SOC_DAPM_ENUM("Route", twl4030_hsol_enum
);
376 static const char *twl4030_hsor_texts
[] =
377 {"Off", "DACR1", "DACR2"};
379 static const struct soc_enum twl4030_hsor_enum
=
380 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL
, 4,
381 ARRAY_SIZE(twl4030_hsor_texts
),
384 static const struct snd_kcontrol_new twl4030_dapm_hsor_control
=
385 SOC_DAPM_ENUM("Route", twl4030_hsor_enum
);
388 static const char *twl4030_carkitl_texts
[] =
389 {"Off", "DACL1", "DACL2"};
391 static const struct soc_enum twl4030_carkitl_enum
=
392 SOC_ENUM_SINGLE(TWL4030_REG_PRECKL_CTL
, 1,
393 ARRAY_SIZE(twl4030_carkitl_texts
),
394 twl4030_carkitl_texts
);
396 static const struct snd_kcontrol_new twl4030_dapm_carkitl_control
=
397 SOC_DAPM_ENUM("Route", twl4030_carkitl_enum
);
400 static const char *twl4030_carkitr_texts
[] =
401 {"Off", "DACR1", "DACR2"};
403 static const struct soc_enum twl4030_carkitr_enum
=
404 SOC_ENUM_SINGLE(TWL4030_REG_PRECKR_CTL
, 1,
405 ARRAY_SIZE(twl4030_carkitr_texts
),
406 twl4030_carkitr_texts
);
408 static const struct snd_kcontrol_new twl4030_dapm_carkitr_control
=
409 SOC_DAPM_ENUM("Route", twl4030_carkitr_enum
);
412 static const char *twl4030_handsfreel_texts
[] =
413 {"Voice", "DACL1", "DACL2", "DACR2"};
415 static const struct soc_enum twl4030_handsfreel_enum
=
416 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
417 ARRAY_SIZE(twl4030_handsfreel_texts
),
418 twl4030_handsfreel_texts
);
420 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
421 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
423 /* Handsfree Right */
424 static const char *twl4030_handsfreer_texts
[] =
425 {"Voice", "DACR1", "DACR2", "DACL2"};
427 static const struct soc_enum twl4030_handsfreer_enum
=
428 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
429 ARRAY_SIZE(twl4030_handsfreer_texts
),
430 twl4030_handsfreer_texts
);
432 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
433 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
435 /* Left analog microphone selection */
436 static const char *twl4030_analoglmic_texts
[] =
437 {"Off", "Main mic", "Headset mic", "AUXL", "Carkit mic"};
439 static const unsigned int twl4030_analoglmic_values
[] =
440 {0x0, 0x1, 0x2, 0x4, 0x8};
442 static const struct soc_enum twl4030_analoglmic_enum
=
443 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICL
, 0, 0xf,
444 ARRAY_SIZE(twl4030_analoglmic_texts
),
445 twl4030_analoglmic_texts
,
446 twl4030_analoglmic_values
);
448 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_control
=
449 SOC_DAPM_VALUE_ENUM("Route", twl4030_analoglmic_enum
);
451 /* Right analog microphone selection */
452 static const char *twl4030_analogrmic_texts
[] =
453 {"Off", "Sub mic", "AUXR"};
455 static const unsigned int twl4030_analogrmic_values
[] =
458 static const struct soc_enum twl4030_analogrmic_enum
=
459 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICR
, 0, 0x5,
460 ARRAY_SIZE(twl4030_analogrmic_texts
),
461 twl4030_analogrmic_texts
,
462 twl4030_analogrmic_values
);
464 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_control
=
465 SOC_DAPM_VALUE_ENUM("Route", twl4030_analogrmic_enum
);
467 /* TX1 L/R Analog/Digital microphone selection */
468 static const char *twl4030_micpathtx1_texts
[] =
469 {"Analog", "Digimic0"};
471 static const struct soc_enum twl4030_micpathtx1_enum
=
472 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
473 ARRAY_SIZE(twl4030_micpathtx1_texts
),
474 twl4030_micpathtx1_texts
);
476 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
477 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
479 /* TX2 L/R Analog/Digital microphone selection */
480 static const char *twl4030_micpathtx2_texts
[] =
481 {"Analog", "Digimic1"};
483 static const struct soc_enum twl4030_micpathtx2_enum
=
484 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
485 ARRAY_SIZE(twl4030_micpathtx2_texts
),
486 twl4030_micpathtx2_texts
);
488 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
489 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
491 /* Analog bypass for AudioR1 */
492 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control
=
493 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL
, 2, 1, 0);
495 /* Analog bypass for AudioL1 */
496 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control
=
497 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL
, 2, 1, 0);
499 /* Analog bypass for AudioR2 */
500 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control
=
501 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL
, 2, 1, 0);
503 /* Analog bypass for AudioL2 */
504 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control
=
505 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL
, 2, 1, 0);
507 static int micpath_event(struct snd_soc_dapm_widget
*w
,
508 struct snd_kcontrol
*kcontrol
, int event
)
510 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
511 unsigned char adcmicsel
, micbias_ctl
;
513 adcmicsel
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_ADCMICSEL
);
514 micbias_ctl
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MICBIAS_CTL
);
515 /* Prepare the bits for the given TX path:
516 * shift_l == 0: TX1 microphone path
517 * shift_l == 2: TX2 microphone path */
519 /* TX2 microphone path */
520 if (adcmicsel
& TWL4030_TX2IN_SEL
)
521 micbias_ctl
|= TWL4030_MICBIAS2_CTL
; /* digimic */
523 micbias_ctl
&= ~TWL4030_MICBIAS2_CTL
;
525 /* TX1 microphone path */
526 if (adcmicsel
& TWL4030_TX1IN_SEL
)
527 micbias_ctl
|= TWL4030_MICBIAS1_CTL
; /* digimic */
529 micbias_ctl
&= ~TWL4030_MICBIAS1_CTL
;
532 twl4030_write(w
->codec
, TWL4030_REG_MICBIAS_CTL
, micbias_ctl
);
537 static int handsfree_event(struct snd_soc_dapm_widget
*w
,
538 struct snd_kcontrol
*kcontrol
, int event
)
540 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
541 unsigned char hs_ctl
;
543 hs_ctl
= twl4030_read_reg_cache(w
->codec
, e
->reg
);
545 if (hs_ctl
& TWL4030_HF_CTL_REF_EN
) {
546 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
547 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
548 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
549 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
550 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
551 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
553 hs_ctl
&= ~(TWL4030_HF_CTL_RAMP_EN
| TWL4030_HF_CTL_LOOP_EN
554 | TWL4030_HF_CTL_HB_EN
);
555 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
561 static int headsetl_event(struct snd_soc_dapm_widget
*w
,
562 struct snd_kcontrol
*kcontrol
, int event
)
564 unsigned char hs_gain
, hs_pop
;
566 /* Save the current volume */
567 hs_gain
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_HS_GAIN_SET
);
570 case SND_SOC_DAPM_POST_PMU
:
571 /* Do the anti-pop/bias ramp enable according to the TRM */
572 hs_pop
= TWL4030_RAMP_DELAY_645MS
;
573 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
574 hs_pop
|= TWL4030_VMID_EN
;
575 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
576 /* Is this needed? Can we just use whatever gain here? */
577 twl4030_write(w
->codec
, TWL4030_REG_HS_GAIN_SET
,
578 (hs_gain
& (~0x0f)) | 0x0a);
579 hs_pop
|= TWL4030_RAMP_EN
;
580 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
582 /* Restore the original volume */
583 twl4030_write(w
->codec
, TWL4030_REG_HS_GAIN_SET
, hs_gain
);
585 case SND_SOC_DAPM_POST_PMD
:
586 /* Do the anti-pop/bias ramp disable according to the TRM */
587 hs_pop
= twl4030_read_reg_cache(w
->codec
,
588 TWL4030_REG_HS_POPN_SET
);
589 hs_pop
&= ~TWL4030_RAMP_EN
;
590 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
591 /* Bypass the reg_cache to mute the headset */
592 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
594 TWL4030_REG_HS_GAIN_SET
);
595 hs_pop
&= ~TWL4030_VMID_EN
;
596 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
602 static int bypass_event(struct snd_soc_dapm_widget
*w
,
603 struct snd_kcontrol
*kcontrol
, int event
)
605 struct soc_mixer_control
*m
=
606 (struct soc_mixer_control
*)w
->kcontrols
->private_value
;
607 struct twl4030_priv
*twl4030
= w
->codec
->private_data
;
610 reg
= twl4030_read_reg_cache(w
->codec
, m
->reg
);
611 if (reg
& (1 << m
->shift
))
612 twl4030
->bypass_state
|=
613 (1 << (m
->reg
- TWL4030_REG_ARXL1_APGA_CTL
));
615 twl4030
->bypass_state
&=
616 ~(1 << (m
->reg
- TWL4030_REG_ARXL1_APGA_CTL
));
618 if (w
->codec
->bias_level
== SND_SOC_BIAS_STANDBY
) {
619 if (twl4030
->bypass_state
)
620 twl4030_codec_mute(w
->codec
, 0);
622 twl4030_codec_mute(w
->codec
, 1);
628 * Some of the gain controls in TWL (mostly those which are associated with
629 * the outputs) are implemented in an interesting way:
630 * 0x0 : Power down (mute)
634 * Inverting not going to help with these.
635 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
637 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
638 xinvert, tlv_array) \
639 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
640 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
641 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
642 .tlv.p = (tlv_array), \
643 .info = snd_soc_info_volsw, \
644 .get = snd_soc_get_volsw_twl4030, \
645 .put = snd_soc_put_volsw_twl4030, \
646 .private_value = (unsigned long)&(struct soc_mixer_control) \
647 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
648 .max = xmax, .invert = xinvert} }
649 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
650 xinvert, tlv_array) \
651 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
652 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
653 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
654 .tlv.p = (tlv_array), \
655 .info = snd_soc_info_volsw_2r, \
656 .get = snd_soc_get_volsw_r2_twl4030,\
657 .put = snd_soc_put_volsw_r2_twl4030, \
658 .private_value = (unsigned long)&(struct soc_mixer_control) \
659 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
660 .rshift = xshift, .max = xmax, .invert = xinvert} }
661 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
662 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
665 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
666 struct snd_ctl_elem_value
*ucontrol
)
668 struct soc_mixer_control
*mc
=
669 (struct soc_mixer_control
*)kcontrol
->private_value
;
670 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
671 unsigned int reg
= mc
->reg
;
672 unsigned int shift
= mc
->shift
;
673 unsigned int rshift
= mc
->rshift
;
675 int mask
= (1 << fls(max
)) - 1;
677 ucontrol
->value
.integer
.value
[0] =
678 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
679 if (ucontrol
->value
.integer
.value
[0])
680 ucontrol
->value
.integer
.value
[0] =
681 max
+ 1 - ucontrol
->value
.integer
.value
[0];
683 if (shift
!= rshift
) {
684 ucontrol
->value
.integer
.value
[1] =
685 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
686 if (ucontrol
->value
.integer
.value
[1])
687 ucontrol
->value
.integer
.value
[1] =
688 max
+ 1 - ucontrol
->value
.integer
.value
[1];
694 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
695 struct snd_ctl_elem_value
*ucontrol
)
697 struct soc_mixer_control
*mc
=
698 (struct soc_mixer_control
*)kcontrol
->private_value
;
699 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
700 unsigned int reg
= mc
->reg
;
701 unsigned int shift
= mc
->shift
;
702 unsigned int rshift
= mc
->rshift
;
704 int mask
= (1 << fls(max
)) - 1;
705 unsigned short val
, val2
, val_mask
;
707 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
709 val_mask
= mask
<< shift
;
713 if (shift
!= rshift
) {
714 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
715 val_mask
|= mask
<< rshift
;
717 val2
= max
+ 1 - val2
;
718 val
|= val2
<< rshift
;
720 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
723 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
724 struct snd_ctl_elem_value
*ucontrol
)
726 struct soc_mixer_control
*mc
=
727 (struct soc_mixer_control
*)kcontrol
->private_value
;
728 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
729 unsigned int reg
= mc
->reg
;
730 unsigned int reg2
= mc
->rreg
;
731 unsigned int shift
= mc
->shift
;
733 int mask
= (1<<fls(max
))-1;
735 ucontrol
->value
.integer
.value
[0] =
736 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
737 ucontrol
->value
.integer
.value
[1] =
738 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
740 if (ucontrol
->value
.integer
.value
[0])
741 ucontrol
->value
.integer
.value
[0] =
742 max
+ 1 - ucontrol
->value
.integer
.value
[0];
743 if (ucontrol
->value
.integer
.value
[1])
744 ucontrol
->value
.integer
.value
[1] =
745 max
+ 1 - ucontrol
->value
.integer
.value
[1];
750 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
751 struct snd_ctl_elem_value
*ucontrol
)
753 struct soc_mixer_control
*mc
=
754 (struct soc_mixer_control
*)kcontrol
->private_value
;
755 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
756 unsigned int reg
= mc
->reg
;
757 unsigned int reg2
= mc
->rreg
;
758 unsigned int shift
= mc
->shift
;
760 int mask
= (1 << fls(max
)) - 1;
762 unsigned short val
, val2
, val_mask
;
764 val_mask
= mask
<< shift
;
765 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
766 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
771 val2
= max
+ 1 - val2
;
774 val2
= val2
<< shift
;
776 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
780 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
785 * FGAIN volume control:
786 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
788 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
791 * CGAIN volume control:
792 * 0 dB to 12 dB in 6 dB steps
793 * value 2 and 3 means 12 dB
795 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
798 * Analog playback gain
799 * -24 dB to 12 dB in 2 dB steps
801 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
804 * Gain controls tied to outputs
805 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
807 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
810 * Capture gain after the ADCs
811 * from 0 dB to 31 dB in 1 dB steps
813 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
816 * Gain control for input amplifiers
817 * 0 dB to 30 dB in 6 dB steps
819 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
821 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
822 /* Common playback gain controls */
823 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
824 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
825 0, 0x3f, 0, digital_fine_tlv
),
826 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
827 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
828 0, 0x3f, 0, digital_fine_tlv
),
830 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
831 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
832 6, 0x2, 0, digital_coarse_tlv
),
833 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
834 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
835 6, 0x2, 0, digital_coarse_tlv
),
837 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
838 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
839 3, 0x12, 1, analog_tlv
),
840 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
841 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
842 3, 0x12, 1, analog_tlv
),
843 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
844 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
846 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
847 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
850 /* Separate output gain controls */
851 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
852 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
853 4, 3, 0, output_tvl
),
855 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
856 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
858 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
859 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
860 4, 3, 0, output_tvl
),
862 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
863 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_tvl
),
865 /* Common capture gain controls */
866 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
867 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
868 0, 0x1f, 0, digital_capture_tlv
),
869 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
870 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
871 0, 0x1f, 0, digital_capture_tlv
),
873 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
874 0, 3, 5, 0, input_gain_tlv
),
877 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
878 /* Left channel inputs */
879 SND_SOC_DAPM_INPUT("MAINMIC"),
880 SND_SOC_DAPM_INPUT("HSMIC"),
881 SND_SOC_DAPM_INPUT("AUXL"),
882 SND_SOC_DAPM_INPUT("CARKITMIC"),
883 /* Right channel inputs */
884 SND_SOC_DAPM_INPUT("SUBMIC"),
885 SND_SOC_DAPM_INPUT("AUXR"),
886 /* Digital microphones (Stereo) */
887 SND_SOC_DAPM_INPUT("DIGIMIC0"),
888 SND_SOC_DAPM_INPUT("DIGIMIC1"),
891 SND_SOC_DAPM_OUTPUT("OUTL"),
892 SND_SOC_DAPM_OUTPUT("OUTR"),
893 SND_SOC_DAPM_OUTPUT("EARPIECE"),
894 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
895 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
896 SND_SOC_DAPM_OUTPUT("HSOL"),
897 SND_SOC_DAPM_OUTPUT("HSOR"),
898 SND_SOC_DAPM_OUTPUT("CARKITL"),
899 SND_SOC_DAPM_OUTPUT("CARKITR"),
900 SND_SOC_DAPM_OUTPUT("HFL"),
901 SND_SOC_DAPM_OUTPUT("HFR"),
904 SND_SOC_DAPM_DAC("DAC Right1", "Right Front Playback",
906 SND_SOC_DAPM_DAC("DAC Left1", "Left Front Playback",
908 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear Playback",
910 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear Playback",
914 SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL
,
916 SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL
,
918 SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL
,
920 SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL
,
923 /* Analog bypasses */
924 SND_SOC_DAPM_SWITCH_E("Right1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
925 &twl4030_dapm_abypassr1_control
, bypass_event
,
926 SND_SOC_DAPM_POST_REG
),
927 SND_SOC_DAPM_SWITCH_E("Left1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
928 &twl4030_dapm_abypassl1_control
,
929 bypass_event
, SND_SOC_DAPM_POST_REG
),
930 SND_SOC_DAPM_SWITCH_E("Right2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
931 &twl4030_dapm_abypassr2_control
,
932 bypass_event
, SND_SOC_DAPM_POST_REG
),
933 SND_SOC_DAPM_SWITCH_E("Left2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
934 &twl4030_dapm_abypassl2_control
,
935 bypass_event
, SND_SOC_DAPM_POST_REG
),
937 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", TWL4030_REG_AVDAC_CTL
,
939 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", TWL4030_REG_AVDAC_CTL
,
941 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", TWL4030_REG_AVDAC_CTL
,
943 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", TWL4030_REG_AVDAC_CTL
,
946 /* Output MUX controls */
948 SND_SOC_DAPM_VALUE_MUX("Earpiece Mux", SND_SOC_NOPM
, 0, 0,
949 &twl4030_dapm_earpiece_control
),
951 SND_SOC_DAPM_VALUE_MUX("PredriveL Mux", SND_SOC_NOPM
, 0, 0,
952 &twl4030_dapm_predrivel_control
),
953 SND_SOC_DAPM_VALUE_MUX("PredriveR Mux", SND_SOC_NOPM
, 0, 0,
954 &twl4030_dapm_predriver_control
),
956 SND_SOC_DAPM_MUX_E("HeadsetL Mux", SND_SOC_NOPM
, 0, 0,
957 &twl4030_dapm_hsol_control
, headsetl_event
,
958 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
959 SND_SOC_DAPM_MUX("HeadsetR Mux", SND_SOC_NOPM
, 0, 0,
960 &twl4030_dapm_hsor_control
),
962 SND_SOC_DAPM_MUX("CarkitL Mux", SND_SOC_NOPM
, 0, 0,
963 &twl4030_dapm_carkitl_control
),
964 SND_SOC_DAPM_MUX("CarkitR Mux", SND_SOC_NOPM
, 0, 0,
965 &twl4030_dapm_carkitr_control
),
967 SND_SOC_DAPM_MUX_E("HandsfreeL Mux", TWL4030_REG_HFL_CTL
, 5, 0,
968 &twl4030_dapm_handsfreel_control
, handsfree_event
,
969 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
970 SND_SOC_DAPM_MUX_E("HandsfreeR Mux", TWL4030_REG_HFR_CTL
, 5, 0,
971 &twl4030_dapm_handsfreer_control
, handsfree_event
,
972 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
974 /* Introducing four virtual ADC, since TWL4030 have four channel for
976 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
978 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
980 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
982 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
985 /* Analog/Digital mic path selection.
986 TX1 Left/Right: either analog Left/Right or Digimic0
987 TX2 Left/Right: either analog Left/Right or Digimic1 */
988 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
989 &twl4030_dapm_micpathtx1_control
, micpath_event
,
990 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
991 SND_SOC_DAPM_POST_REG
),
992 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
993 &twl4030_dapm_micpathtx2_control
, micpath_event
,
994 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
995 SND_SOC_DAPM_POST_REG
),
997 /* Analog input muxes with switch for the capture amplifiers */
998 SND_SOC_DAPM_VALUE_MUX("Analog Left Capture Route",
999 TWL4030_REG_ANAMICL
, 4, 0, &twl4030_dapm_analoglmic_control
),
1000 SND_SOC_DAPM_VALUE_MUX("Analog Right Capture Route",
1001 TWL4030_REG_ANAMICR
, 4, 0, &twl4030_dapm_analogrmic_control
),
1003 SND_SOC_DAPM_PGA("ADC Physical Left",
1004 TWL4030_REG_AVADC_CTL
, 3, 0, NULL
, 0),
1005 SND_SOC_DAPM_PGA("ADC Physical Right",
1006 TWL4030_REG_AVADC_CTL
, 1, 0, NULL
, 0),
1008 SND_SOC_DAPM_PGA("Digimic0 Enable",
1009 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0),
1010 SND_SOC_DAPM_PGA("Digimic1 Enable",
1011 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0),
1013 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
1014 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
1015 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
1019 static const struct snd_soc_dapm_route intercon
[] = {
1020 {"Analog L1 Playback Mixer", NULL
, "DAC Left1"},
1021 {"Analog R1 Playback Mixer", NULL
, "DAC Right1"},
1022 {"Analog L2 Playback Mixer", NULL
, "DAC Left2"},
1023 {"Analog R2 Playback Mixer", NULL
, "DAC Right2"},
1025 {"ARXL1_APGA", NULL
, "Analog L1 Playback Mixer"},
1026 {"ARXR1_APGA", NULL
, "Analog R1 Playback Mixer"},
1027 {"ARXL2_APGA", NULL
, "Analog L2 Playback Mixer"},
1028 {"ARXR2_APGA", NULL
, "Analog R2 Playback Mixer"},
1030 /* Internal playback routings */
1032 {"Earpiece Mux", "DACL1", "ARXL1_APGA"},
1033 {"Earpiece Mux", "DACL2", "ARXL2_APGA"},
1034 {"Earpiece Mux", "DACR1", "ARXR1_APGA"},
1036 {"PredriveL Mux", "DACL1", "ARXL1_APGA"},
1037 {"PredriveL Mux", "DACL2", "ARXL2_APGA"},
1038 {"PredriveL Mux", "DACR2", "ARXR2_APGA"},
1040 {"PredriveR Mux", "DACR1", "ARXR1_APGA"},
1041 {"PredriveR Mux", "DACR2", "ARXR2_APGA"},
1042 {"PredriveR Mux", "DACL2", "ARXL2_APGA"},
1044 {"HeadsetL Mux", "DACL1", "ARXL1_APGA"},
1045 {"HeadsetL Mux", "DACL2", "ARXL2_APGA"},
1047 {"HeadsetR Mux", "DACR1", "ARXR1_APGA"},
1048 {"HeadsetR Mux", "DACR2", "ARXR2_APGA"},
1050 {"CarkitL Mux", "DACL1", "ARXL1_APGA"},
1051 {"CarkitL Mux", "DACL2", "ARXL2_APGA"},
1053 {"CarkitR Mux", "DACR1", "ARXR1_APGA"},
1054 {"CarkitR Mux", "DACR2", "ARXR2_APGA"},
1056 {"HandsfreeL Mux", "DACL1", "ARXL1_APGA"},
1057 {"HandsfreeL Mux", "DACL2", "ARXL2_APGA"},
1058 {"HandsfreeL Mux", "DACR2", "ARXR2_APGA"},
1060 {"HandsfreeR Mux", "DACR1", "ARXR1_APGA"},
1061 {"HandsfreeR Mux", "DACR2", "ARXR2_APGA"},
1062 {"HandsfreeR Mux", "DACL2", "ARXL2_APGA"},
1065 {"OUTL", NULL
, "ARXL2_APGA"},
1066 {"OUTR", NULL
, "ARXR2_APGA"},
1067 {"EARPIECE", NULL
, "Earpiece Mux"},
1068 {"PREDRIVEL", NULL
, "PredriveL Mux"},
1069 {"PREDRIVER", NULL
, "PredriveR Mux"},
1070 {"HSOL", NULL
, "HeadsetL Mux"},
1071 {"HSOR", NULL
, "HeadsetR Mux"},
1072 {"CARKITL", NULL
, "CarkitL Mux"},
1073 {"CARKITR", NULL
, "CarkitR Mux"},
1074 {"HFL", NULL
, "HandsfreeL Mux"},
1075 {"HFR", NULL
, "HandsfreeR Mux"},
1078 {"Analog Left Capture Route", "Main mic", "MAINMIC"},
1079 {"Analog Left Capture Route", "Headset mic", "HSMIC"},
1080 {"Analog Left Capture Route", "AUXL", "AUXL"},
1081 {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"},
1083 {"Analog Right Capture Route", "Sub mic", "SUBMIC"},
1084 {"Analog Right Capture Route", "AUXR", "AUXR"},
1086 {"ADC Physical Left", NULL
, "Analog Left Capture Route"},
1087 {"ADC Physical Right", NULL
, "Analog Right Capture Route"},
1089 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
1090 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
1092 /* TX1 Left capture path */
1093 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1094 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1095 /* TX1 Right capture path */
1096 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1097 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1098 /* TX2 Left capture path */
1099 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1100 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1101 /* TX2 Right capture path */
1102 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1103 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1105 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
1106 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
1107 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
1108 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
1110 /* Analog bypass routes */
1111 {"Right1 Analog Loopback", "Switch", "Analog Right Capture Route"},
1112 {"Left1 Analog Loopback", "Switch", "Analog Left Capture Route"},
1113 {"Right2 Analog Loopback", "Switch", "Analog Right Capture Route"},
1114 {"Left2 Analog Loopback", "Switch", "Analog Left Capture Route"},
1116 {"Analog R1 Playback Mixer", NULL
, "Right1 Analog Loopback"},
1117 {"Analog L1 Playback Mixer", NULL
, "Left1 Analog Loopback"},
1118 {"Analog R2 Playback Mixer", NULL
, "Right2 Analog Loopback"},
1119 {"Analog L2 Playback Mixer", NULL
, "Left2 Analog Loopback"},
1123 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
1125 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
1126 ARRAY_SIZE(twl4030_dapm_widgets
));
1128 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
1130 snd_soc_dapm_new_widgets(codec
);
1134 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
1135 enum snd_soc_bias_level level
)
1137 struct twl4030_priv
*twl4030
= codec
->private_data
;
1140 case SND_SOC_BIAS_ON
:
1141 twl4030_codec_mute(codec
, 0);
1143 case SND_SOC_BIAS_PREPARE
:
1144 twl4030_power_up(codec
);
1145 if (twl4030
->bypass_state
)
1146 twl4030_codec_mute(codec
, 0);
1148 twl4030_codec_mute(codec
, 1);
1150 case SND_SOC_BIAS_STANDBY
:
1151 twl4030_power_up(codec
);
1152 if (twl4030
->bypass_state
)
1153 twl4030_codec_mute(codec
, 0);
1155 twl4030_codec_mute(codec
, 1);
1157 case SND_SOC_BIAS_OFF
:
1158 twl4030_power_down(codec
);
1161 codec
->bias_level
= level
;
1166 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
1167 struct snd_pcm_hw_params
*params
,
1168 struct snd_soc_dai
*dai
)
1170 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1171 struct snd_soc_device
*socdev
= rtd
->socdev
;
1172 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1173 u8 mode
, old_mode
, format
, old_format
;
1176 old_mode
= twl4030_read_reg_cache(codec
,
1177 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
1178 mode
= old_mode
& ~TWL4030_APLL_RATE
;
1180 switch (params_rate(params
)) {
1182 mode
|= TWL4030_APLL_RATE_8000
;
1185 mode
|= TWL4030_APLL_RATE_11025
;
1188 mode
|= TWL4030_APLL_RATE_12000
;
1191 mode
|= TWL4030_APLL_RATE_16000
;
1194 mode
|= TWL4030_APLL_RATE_22050
;
1197 mode
|= TWL4030_APLL_RATE_24000
;
1200 mode
|= TWL4030_APLL_RATE_32000
;
1203 mode
|= TWL4030_APLL_RATE_44100
;
1206 mode
|= TWL4030_APLL_RATE_48000
;
1209 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1210 params_rate(params
));
1214 if (mode
!= old_mode
) {
1215 /* change rate and set CODECPDZ */
1216 twl4030_codec_enable(codec
, 0);
1217 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1218 twl4030_codec_enable(codec
, 1);
1222 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1223 format
= old_format
;
1224 format
&= ~TWL4030_DATA_WIDTH
;
1225 switch (params_format(params
)) {
1226 case SNDRV_PCM_FORMAT_S16_LE
:
1227 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1229 case SNDRV_PCM_FORMAT_S24_LE
:
1230 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1233 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1234 params_format(params
));
1238 if (format
!= old_format
) {
1240 /* clear CODECPDZ before changing format (codec requirement) */
1241 twl4030_codec_enable(codec
, 0);
1244 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1246 /* set CODECPDZ afterwards */
1247 twl4030_codec_enable(codec
, 1);
1252 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1253 int clk_id
, unsigned int freq
, int dir
)
1255 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1260 infreq
= TWL4030_APLL_INFREQ_19200KHZ
;
1263 infreq
= TWL4030_APLL_INFREQ_26000KHZ
;
1266 infreq
= TWL4030_APLL_INFREQ_38400KHZ
;
1269 printk(KERN_ERR
"TWL4030 set sysclk: unknown rate %d\n",
1274 infreq
|= TWL4030_APLL_EN
;
1275 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, infreq
);
1280 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1283 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1284 u8 old_format
, format
;
1287 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1288 format
= old_format
;
1290 /* set master/slave audio interface */
1291 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1292 case SND_SOC_DAIFMT_CBM_CFM
:
1293 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1294 format
&= ~(TWL4030_CLK256FS_EN
);
1296 case SND_SOC_DAIFMT_CBS_CFS
:
1297 format
|= TWL4030_AIF_SLAVE_EN
;
1298 format
|= TWL4030_CLK256FS_EN
;
1304 /* interface format */
1305 format
&= ~TWL4030_AIF_FORMAT
;
1306 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1307 case SND_SOC_DAIFMT_I2S
:
1308 format
|= TWL4030_AIF_FORMAT_CODEC
;
1314 if (format
!= old_format
) {
1316 /* clear CODECPDZ before changing format (codec requirement) */
1317 twl4030_codec_enable(codec
, 0);
1320 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1322 /* set CODECPDZ afterwards */
1323 twl4030_codec_enable(codec
, 1);
1329 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
1330 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
1332 struct snd_soc_dai twl4030_dai
= {
1335 .stream_name
= "Playback",
1338 .rates
= TWL4030_RATES
,
1339 .formats
= TWL4030_FORMATS
,},
1341 .stream_name
= "Capture",
1344 .rates
= TWL4030_RATES
,
1345 .formats
= TWL4030_FORMATS
,},
1347 .hw_params
= twl4030_hw_params
,
1348 .set_sysclk
= twl4030_set_dai_sysclk
,
1349 .set_fmt
= twl4030_set_dai_fmt
,
1352 EXPORT_SYMBOL_GPL(twl4030_dai
);
1354 static int twl4030_suspend(struct platform_device
*pdev
, pm_message_t state
)
1356 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1357 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1359 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1364 static int twl4030_resume(struct platform_device
*pdev
)
1366 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1367 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1369 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1370 twl4030_set_bias_level(codec
, codec
->suspend_bias_level
);
1375 * initialize the driver
1376 * register the mixer and dsp interfaces with the kernel
1379 static int twl4030_init(struct snd_soc_device
*socdev
)
1381 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1384 printk(KERN_INFO
"TWL4030 Audio Codec init \n");
1386 codec
->name
= "twl4030";
1387 codec
->owner
= THIS_MODULE
;
1388 codec
->read
= twl4030_read_reg_cache
;
1389 codec
->write
= twl4030_write
;
1390 codec
->set_bias_level
= twl4030_set_bias_level
;
1391 codec
->dai
= &twl4030_dai
;
1393 codec
->reg_cache_size
= sizeof(twl4030_reg
);
1394 codec
->reg_cache
= kmemdup(twl4030_reg
, sizeof(twl4030_reg
),
1396 if (codec
->reg_cache
== NULL
)
1400 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1402 printk(KERN_ERR
"twl4030: failed to create pcms\n");
1406 twl4030_init_chip(codec
);
1408 /* power on device */
1409 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1411 snd_soc_add_controls(codec
, twl4030_snd_controls
,
1412 ARRAY_SIZE(twl4030_snd_controls
));
1413 twl4030_add_widgets(codec
);
1415 ret
= snd_soc_init_card(socdev
);
1417 printk(KERN_ERR
"twl4030: failed to register card\n");
1424 snd_soc_free_pcms(socdev
);
1425 snd_soc_dapm_free(socdev
);
1427 kfree(codec
->reg_cache
);
1431 static struct snd_soc_device
*twl4030_socdev
;
1433 static int twl4030_probe(struct platform_device
*pdev
)
1435 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1436 struct snd_soc_codec
*codec
;
1437 struct twl4030_priv
*twl4030
;
1439 codec
= kzalloc(sizeof(struct snd_soc_codec
), GFP_KERNEL
);
1443 twl4030
= kzalloc(sizeof(struct twl4030_priv
), GFP_KERNEL
);
1444 if (twl4030
== NULL
) {
1449 codec
->private_data
= twl4030
;
1450 socdev
->card
->codec
= codec
;
1451 mutex_init(&codec
->mutex
);
1452 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1453 INIT_LIST_HEAD(&codec
->dapm_paths
);
1455 twl4030_socdev
= socdev
;
1456 twl4030_init(socdev
);
1461 static int twl4030_remove(struct platform_device
*pdev
)
1463 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1464 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1466 printk(KERN_INFO
"TWL4030 Audio Codec remove\n");
1467 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1468 snd_soc_free_pcms(socdev
);
1469 snd_soc_dapm_free(socdev
);
1470 kfree(codec
->private_data
);
1476 struct snd_soc_codec_device soc_codec_dev_twl4030
= {
1477 .probe
= twl4030_probe
,
1478 .remove
= twl4030_remove
,
1479 .suspend
= twl4030_suspend
,
1480 .resume
= twl4030_resume
,
1482 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030
);
1484 static int __init
twl4030_modinit(void)
1486 return snd_soc_register_dai(&twl4030_dai
);
1488 module_init(twl4030_modinit
);
1490 static void __exit
twl4030_exit(void)
1492 snd_soc_unregister_dai(&twl4030_dai
);
1494 module_exit(twl4030_exit
);
1496 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
1497 MODULE_AUTHOR("Steve Sakoman");
1498 MODULE_LICENSE("GPL");