2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl4030.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
44 0x00, /* this register not used */
45 0x91, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
120 /* codec private data */
121 struct twl4030_priv
{
122 unsigned int bypass_state
;
123 unsigned int codec_powered
;
124 unsigned int codec_muted
;
126 struct snd_pcm_substream
*master_substream
;
127 struct snd_pcm_substream
*slave_substream
;
129 unsigned int configured
;
131 unsigned int sample_bits
;
132 unsigned int channels
;
136 * read twl4030 register cache
138 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
141 u8
*cache
= codec
->reg_cache
;
143 if (reg
>= TWL4030_CACHEREGNUM
)
150 * write twl4030 register cache
152 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
155 u8
*cache
= codec
->reg_cache
;
157 if (reg
>= TWL4030_CACHEREGNUM
)
163 * write to the twl4030 register space
165 static int twl4030_write(struct snd_soc_codec
*codec
,
166 unsigned int reg
, unsigned int value
)
168 twl4030_write_reg_cache(codec
, reg
, value
);
169 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
, value
, reg
);
172 static void twl4030_codec_enable(struct snd_soc_codec
*codec
, int enable
)
174 struct twl4030_priv
*twl4030
= codec
->private_data
;
177 if (enable
== twl4030
->codec_powered
)
180 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
182 mode
|= TWL4030_CODECPDZ
;
184 mode
&= ~TWL4030_CODECPDZ
;
186 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
187 twl4030
->codec_powered
= enable
;
189 /* REVISIT: this delay is present in TI sample drivers */
190 /* but there seems to be no TRM requirement for it */
194 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
198 /* clear CODECPDZ prior to setting register defaults */
199 twl4030_codec_enable(codec
, 0);
201 /* set all audio section registers to reasonable defaults */
202 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
203 twl4030_write(codec
, i
, twl4030_reg
[i
]);
207 static void twl4030_codec_mute(struct snd_soc_codec
*codec
, int mute
)
209 struct twl4030_priv
*twl4030
= codec
->private_data
;
212 if (mute
== twl4030
->codec_muted
)
216 /* Bypass the reg_cache and mute the volumes
217 * Headset mute is done in it's own event handler
218 * Things to mute: Earpiece, PreDrivL/R, CarkitL/R
220 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_EAR_CTL
);
221 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
222 reg_val
& (~TWL4030_EAR_GAIN
),
223 TWL4030_REG_EAR_CTL
);
225 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_PREDL_CTL
);
226 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
227 reg_val
& (~TWL4030_PREDL_GAIN
),
228 TWL4030_REG_PREDL_CTL
);
229 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_PREDR_CTL
);
230 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
231 reg_val
& (~TWL4030_PREDR_GAIN
),
232 TWL4030_REG_PREDL_CTL
);
234 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_PRECKL_CTL
);
235 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
236 reg_val
& (~TWL4030_PRECKL_GAIN
),
237 TWL4030_REG_PRECKL_CTL
);
238 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_PRECKR_CTL
);
239 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
240 reg_val
& (~TWL4030_PRECKL_GAIN
),
241 TWL4030_REG_PRECKR_CTL
);
244 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
);
245 reg_val
&= ~TWL4030_APLL_EN
;
246 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, reg_val
);
248 /* Restore the volumes
249 * Headset mute is done in it's own event handler
250 * Things to restore: Earpiece, PreDrivL/R, CarkitL/R
252 twl4030_write(codec
, TWL4030_REG_EAR_CTL
,
253 twl4030_read_reg_cache(codec
, TWL4030_REG_EAR_CTL
));
255 twl4030_write(codec
, TWL4030_REG_PREDL_CTL
,
256 twl4030_read_reg_cache(codec
, TWL4030_REG_PREDL_CTL
));
257 twl4030_write(codec
, TWL4030_REG_PREDR_CTL
,
258 twl4030_read_reg_cache(codec
, TWL4030_REG_PREDR_CTL
));
260 twl4030_write(codec
, TWL4030_REG_PRECKL_CTL
,
261 twl4030_read_reg_cache(codec
, TWL4030_REG_PRECKL_CTL
));
262 twl4030_write(codec
, TWL4030_REG_PRECKR_CTL
,
263 twl4030_read_reg_cache(codec
, TWL4030_REG_PRECKR_CTL
));
266 reg_val
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
);
267 reg_val
|= TWL4030_APLL_EN
;
268 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, reg_val
);
271 twl4030
->codec_muted
= mute
;
274 static void twl4030_power_up(struct snd_soc_codec
*codec
)
276 struct twl4030_priv
*twl4030
= codec
->private_data
;
277 u8 anamicl
, regmisc1
, byte
;
280 if (twl4030
->codec_powered
)
283 /* set CODECPDZ to turn on codec */
284 twl4030_codec_enable(codec
, 1);
286 /* initiate offset cancellation */
287 anamicl
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
288 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
289 anamicl
| TWL4030_CNCL_OFFSET_START
);
291 /* wait for offset cancellation to complete */
293 /* this takes a little while, so don't slam i2c */
295 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
296 TWL4030_REG_ANAMICL
);
297 } while ((i
++ < 100) &&
298 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
299 TWL4030_CNCL_OFFSET_START
));
301 /* Make sure that the reg_cache has the same value as the HW */
302 twl4030_write_reg_cache(codec
, TWL4030_REG_ANAMICL
, byte
);
304 /* anti-pop when changing analog gain */
305 regmisc1
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
306 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
307 regmisc1
| TWL4030_SMOOTH_ANAVOL_EN
);
309 /* toggle CODECPDZ as per TRM */
310 twl4030_codec_enable(codec
, 0);
311 twl4030_codec_enable(codec
, 1);
315 * Unconditional power down
317 static void twl4030_power_down(struct snd_soc_codec
*codec
)
320 twl4030_codec_enable(codec
, 0);
324 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls
[] = {
325 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL
, 0, 1, 0),
326 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL
, 1, 1, 0),
327 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL
, 2, 1, 0),
328 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL
, 3, 1, 0),
332 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls
[] = {
333 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL
, 0, 1, 0),
334 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL
, 1, 1, 0),
335 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL
, 2, 1, 0),
336 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL
, 3, 1, 0),
340 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls
[] = {
341 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL
, 0, 1, 0),
342 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL
, 1, 1, 0),
343 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL
, 2, 1, 0),
344 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL
, 3, 1, 0),
348 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls
[] = {
349 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 0, 1, 0),
350 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL
, 1, 1, 0),
351 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL
, 2, 1, 0),
355 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls
[] = {
356 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 3, 1, 0),
357 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL
, 4, 1, 0),
358 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL
, 5, 1, 0),
362 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls
[] = {
363 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL
, 0, 1, 0),
364 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL
, 1, 1, 0),
365 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL
, 2, 1, 0),
369 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls
[] = {
370 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL
, 0, 1, 0),
371 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL
, 1, 1, 0),
372 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL
, 2, 1, 0),
376 static const char *twl4030_handsfreel_texts
[] =
377 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
379 static const struct soc_enum twl4030_handsfreel_enum
=
380 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
381 ARRAY_SIZE(twl4030_handsfreel_texts
),
382 twl4030_handsfreel_texts
);
384 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
385 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
387 /* Handsfree Right */
388 static const char *twl4030_handsfreer_texts
[] =
389 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
391 static const struct soc_enum twl4030_handsfreer_enum
=
392 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
393 ARRAY_SIZE(twl4030_handsfreer_texts
),
394 twl4030_handsfreer_texts
);
396 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
397 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
399 /* Left analog microphone selection */
400 static const char *twl4030_analoglmic_texts
[] =
401 {"Off", "Main mic", "Headset mic", "AUXL", "Carkit mic"};
403 static const unsigned int twl4030_analoglmic_values
[] =
404 {0x0, 0x1, 0x2, 0x4, 0x8};
406 static const struct soc_enum twl4030_analoglmic_enum
=
407 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICL
, 0, 0xf,
408 ARRAY_SIZE(twl4030_analoglmic_texts
),
409 twl4030_analoglmic_texts
,
410 twl4030_analoglmic_values
);
412 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_control
=
413 SOC_DAPM_VALUE_ENUM("Route", twl4030_analoglmic_enum
);
415 /* Right analog microphone selection */
416 static const char *twl4030_analogrmic_texts
[] =
417 {"Off", "Sub mic", "AUXR"};
419 static const unsigned int twl4030_analogrmic_values
[] =
422 static const struct soc_enum twl4030_analogrmic_enum
=
423 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICR
, 0, 0x5,
424 ARRAY_SIZE(twl4030_analogrmic_texts
),
425 twl4030_analogrmic_texts
,
426 twl4030_analogrmic_values
);
428 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_control
=
429 SOC_DAPM_VALUE_ENUM("Route", twl4030_analogrmic_enum
);
431 /* TX1 L/R Analog/Digital microphone selection */
432 static const char *twl4030_micpathtx1_texts
[] =
433 {"Analog", "Digimic0"};
435 static const struct soc_enum twl4030_micpathtx1_enum
=
436 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
437 ARRAY_SIZE(twl4030_micpathtx1_texts
),
438 twl4030_micpathtx1_texts
);
440 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
441 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
443 /* TX2 L/R Analog/Digital microphone selection */
444 static const char *twl4030_micpathtx2_texts
[] =
445 {"Analog", "Digimic1"};
447 static const struct soc_enum twl4030_micpathtx2_enum
=
448 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
449 ARRAY_SIZE(twl4030_micpathtx2_texts
),
450 twl4030_micpathtx2_texts
);
452 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
453 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
455 /* Analog bypass for AudioR1 */
456 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control
=
457 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL
, 2, 1, 0);
459 /* Analog bypass for AudioL1 */
460 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control
=
461 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL
, 2, 1, 0);
463 /* Analog bypass for AudioR2 */
464 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control
=
465 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL
, 2, 1, 0);
467 /* Analog bypass for AudioL2 */
468 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control
=
469 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL
, 2, 1, 0);
471 /* Analog bypass for Voice */
472 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control
=
473 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL
, 2, 1, 0);
475 /* Digital bypass gain, 0 mutes the bypass */
476 static const unsigned int twl4030_dapm_dbypass_tlv
[] = {
477 TLV_DB_RANGE_HEAD(2),
478 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
479 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
482 /* Digital bypass left (TX1L -> RX2L) */
483 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control
=
484 SOC_DAPM_SINGLE_TLV("Volume",
485 TWL4030_REG_ATX2ARXPGA
, 3, 7, 0,
486 twl4030_dapm_dbypass_tlv
);
488 /* Digital bypass right (TX1R -> RX2R) */
489 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control
=
490 SOC_DAPM_SINGLE_TLV("Volume",
491 TWL4030_REG_ATX2ARXPGA
, 0, 7, 0,
492 twl4030_dapm_dbypass_tlv
);
494 static int micpath_event(struct snd_soc_dapm_widget
*w
,
495 struct snd_kcontrol
*kcontrol
, int event
)
497 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
498 unsigned char adcmicsel
, micbias_ctl
;
500 adcmicsel
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_ADCMICSEL
);
501 micbias_ctl
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MICBIAS_CTL
);
502 /* Prepare the bits for the given TX path:
503 * shift_l == 0: TX1 microphone path
504 * shift_l == 2: TX2 microphone path */
506 /* TX2 microphone path */
507 if (adcmicsel
& TWL4030_TX2IN_SEL
)
508 micbias_ctl
|= TWL4030_MICBIAS2_CTL
; /* digimic */
510 micbias_ctl
&= ~TWL4030_MICBIAS2_CTL
;
512 /* TX1 microphone path */
513 if (adcmicsel
& TWL4030_TX1IN_SEL
)
514 micbias_ctl
|= TWL4030_MICBIAS1_CTL
; /* digimic */
516 micbias_ctl
&= ~TWL4030_MICBIAS1_CTL
;
519 twl4030_write(w
->codec
, TWL4030_REG_MICBIAS_CTL
, micbias_ctl
);
524 static int handsfree_event(struct snd_soc_dapm_widget
*w
,
525 struct snd_kcontrol
*kcontrol
, int event
)
527 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
528 unsigned char hs_ctl
;
530 hs_ctl
= twl4030_read_reg_cache(w
->codec
, e
->reg
);
532 if (hs_ctl
& TWL4030_HF_CTL_REF_EN
) {
533 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
534 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
535 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
536 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
537 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
538 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
540 hs_ctl
&= ~(TWL4030_HF_CTL_RAMP_EN
| TWL4030_HF_CTL_LOOP_EN
541 | TWL4030_HF_CTL_HB_EN
);
542 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
548 static int headsetl_event(struct snd_soc_dapm_widget
*w
,
549 struct snd_kcontrol
*kcontrol
, int event
)
551 unsigned char hs_gain
, hs_pop
;
553 /* Save the current volume */
554 hs_gain
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_HS_GAIN_SET
);
555 hs_pop
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_HS_POPN_SET
);
558 case SND_SOC_DAPM_POST_PMU
:
559 /* Do the anti-pop/bias ramp enable according to the TRM */
560 hs_pop
|= TWL4030_VMID_EN
;
561 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
562 /* Is this needed? Can we just use whatever gain here? */
563 twl4030_write(w
->codec
, TWL4030_REG_HS_GAIN_SET
,
564 (hs_gain
& (~0x0f)) | 0x0a);
565 hs_pop
|= TWL4030_RAMP_EN
;
566 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
568 /* Restore the original volume */
569 twl4030_write(w
->codec
, TWL4030_REG_HS_GAIN_SET
, hs_gain
);
571 case SND_SOC_DAPM_POST_PMD
:
572 /* Do the anti-pop/bias ramp disable according to the TRM */
573 hs_pop
&= ~TWL4030_RAMP_EN
;
574 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
575 /* Bypass the reg_cache to mute the headset */
576 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
578 TWL4030_REG_HS_GAIN_SET
);
579 hs_pop
&= ~TWL4030_VMID_EN
;
580 twl4030_write(w
->codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
586 static int bypass_event(struct snd_soc_dapm_widget
*w
,
587 struct snd_kcontrol
*kcontrol
, int event
)
589 struct soc_mixer_control
*m
=
590 (struct soc_mixer_control
*)w
->kcontrols
->private_value
;
591 struct twl4030_priv
*twl4030
= w
->codec
->private_data
;
592 unsigned char reg
, misc
;
594 reg
= twl4030_read_reg_cache(w
->codec
, m
->reg
);
596 if (m
->reg
<= TWL4030_REG_ARXR2_APGA_CTL
) {
598 if (reg
& (1 << m
->shift
))
599 twl4030
->bypass_state
|=
600 (1 << (m
->reg
- TWL4030_REG_ARXL1_APGA_CTL
));
602 twl4030
->bypass_state
&=
603 ~(1 << (m
->reg
- TWL4030_REG_ARXL1_APGA_CTL
));
604 } else if (m
->reg
== TWL4030_REG_VDL_APGA_CTL
) {
605 /* Analog voice bypass */
606 if (reg
& (1 << m
->shift
))
607 twl4030
->bypass_state
|= (1 << 4);
609 twl4030
->bypass_state
&= ~(1 << 4);
612 if (reg
& (0x7 << m
->shift
))
613 twl4030
->bypass_state
|= (1 << (m
->shift
? 6 : 5));
615 twl4030
->bypass_state
&= ~(1 << (m
->shift
? 6 : 5));
618 /* Enable master analog loopback mode if any analog switch is enabled*/
619 misc
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MISC_SET_1
);
620 if (twl4030
->bypass_state
& 0x1F)
621 misc
|= TWL4030_FMLOOP_EN
;
623 misc
&= ~TWL4030_FMLOOP_EN
;
624 twl4030_write(w
->codec
, TWL4030_REG_MISC_SET_1
, misc
);
626 if (w
->codec
->bias_level
== SND_SOC_BIAS_STANDBY
) {
627 if (twl4030
->bypass_state
)
628 twl4030_codec_mute(w
->codec
, 0);
630 twl4030_codec_mute(w
->codec
, 1);
636 * Some of the gain controls in TWL (mostly those which are associated with
637 * the outputs) are implemented in an interesting way:
638 * 0x0 : Power down (mute)
642 * Inverting not going to help with these.
643 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
645 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
646 xinvert, tlv_array) \
647 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
648 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
649 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
650 .tlv.p = (tlv_array), \
651 .info = snd_soc_info_volsw, \
652 .get = snd_soc_get_volsw_twl4030, \
653 .put = snd_soc_put_volsw_twl4030, \
654 .private_value = (unsigned long)&(struct soc_mixer_control) \
655 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
656 .max = xmax, .invert = xinvert} }
657 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
658 xinvert, tlv_array) \
659 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
660 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
661 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
662 .tlv.p = (tlv_array), \
663 .info = snd_soc_info_volsw_2r, \
664 .get = snd_soc_get_volsw_r2_twl4030,\
665 .put = snd_soc_put_volsw_r2_twl4030, \
666 .private_value = (unsigned long)&(struct soc_mixer_control) \
667 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
668 .rshift = xshift, .max = xmax, .invert = xinvert} }
669 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
670 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
673 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
674 struct snd_ctl_elem_value
*ucontrol
)
676 struct soc_mixer_control
*mc
=
677 (struct soc_mixer_control
*)kcontrol
->private_value
;
678 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
679 unsigned int reg
= mc
->reg
;
680 unsigned int shift
= mc
->shift
;
681 unsigned int rshift
= mc
->rshift
;
683 int mask
= (1 << fls(max
)) - 1;
685 ucontrol
->value
.integer
.value
[0] =
686 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
687 if (ucontrol
->value
.integer
.value
[0])
688 ucontrol
->value
.integer
.value
[0] =
689 max
+ 1 - ucontrol
->value
.integer
.value
[0];
691 if (shift
!= rshift
) {
692 ucontrol
->value
.integer
.value
[1] =
693 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
694 if (ucontrol
->value
.integer
.value
[1])
695 ucontrol
->value
.integer
.value
[1] =
696 max
+ 1 - ucontrol
->value
.integer
.value
[1];
702 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
703 struct snd_ctl_elem_value
*ucontrol
)
705 struct soc_mixer_control
*mc
=
706 (struct soc_mixer_control
*)kcontrol
->private_value
;
707 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
708 unsigned int reg
= mc
->reg
;
709 unsigned int shift
= mc
->shift
;
710 unsigned int rshift
= mc
->rshift
;
712 int mask
= (1 << fls(max
)) - 1;
713 unsigned short val
, val2
, val_mask
;
715 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
717 val_mask
= mask
<< shift
;
721 if (shift
!= rshift
) {
722 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
723 val_mask
|= mask
<< rshift
;
725 val2
= max
+ 1 - val2
;
726 val
|= val2
<< rshift
;
728 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
731 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
732 struct snd_ctl_elem_value
*ucontrol
)
734 struct soc_mixer_control
*mc
=
735 (struct soc_mixer_control
*)kcontrol
->private_value
;
736 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
737 unsigned int reg
= mc
->reg
;
738 unsigned int reg2
= mc
->rreg
;
739 unsigned int shift
= mc
->shift
;
741 int mask
= (1<<fls(max
))-1;
743 ucontrol
->value
.integer
.value
[0] =
744 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
745 ucontrol
->value
.integer
.value
[1] =
746 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
748 if (ucontrol
->value
.integer
.value
[0])
749 ucontrol
->value
.integer
.value
[0] =
750 max
+ 1 - ucontrol
->value
.integer
.value
[0];
751 if (ucontrol
->value
.integer
.value
[1])
752 ucontrol
->value
.integer
.value
[1] =
753 max
+ 1 - ucontrol
->value
.integer
.value
[1];
758 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
759 struct snd_ctl_elem_value
*ucontrol
)
761 struct soc_mixer_control
*mc
=
762 (struct soc_mixer_control
*)kcontrol
->private_value
;
763 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
764 unsigned int reg
= mc
->reg
;
765 unsigned int reg2
= mc
->rreg
;
766 unsigned int shift
= mc
->shift
;
768 int mask
= (1 << fls(max
)) - 1;
770 unsigned short val
, val2
, val_mask
;
772 val_mask
= mask
<< shift
;
773 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
774 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
779 val2
= max
+ 1 - val2
;
782 val2
= val2
<< shift
;
784 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
788 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
793 * FGAIN volume control:
794 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
796 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
799 * CGAIN volume control:
800 * 0 dB to 12 dB in 6 dB steps
801 * value 2 and 3 means 12 dB
803 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
806 * Voice Downlink GAIN volume control:
807 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
809 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv
, -3700, 100, 1);
812 * Analog playback gain
813 * -24 dB to 12 dB in 2 dB steps
815 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
818 * Gain controls tied to outputs
819 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
821 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
824 * Gain control for earpiece amplifier
825 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
827 static DECLARE_TLV_DB_SCALE(output_ear_tvl
, -600, 600, 1);
830 * Capture gain after the ADCs
831 * from 0 dB to 31 dB in 1 dB steps
833 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
836 * Gain control for input amplifiers
837 * 0 dB to 30 dB in 6 dB steps
839 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
841 static const char *twl4030_rampdelay_texts
[] = {
842 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
843 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
847 static const struct soc_enum twl4030_rampdelay_enum
=
848 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET
, 2,
849 ARRAY_SIZE(twl4030_rampdelay_texts
),
850 twl4030_rampdelay_texts
);
852 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
853 /* Common playback gain controls */
854 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
855 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
856 0, 0x3f, 0, digital_fine_tlv
),
857 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
858 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
859 0, 0x3f, 0, digital_fine_tlv
),
861 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
862 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
863 6, 0x2, 0, digital_coarse_tlv
),
864 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
865 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
866 6, 0x2, 0, digital_coarse_tlv
),
868 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
869 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
870 3, 0x12, 1, analog_tlv
),
871 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
872 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
873 3, 0x12, 1, analog_tlv
),
874 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
875 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
877 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
878 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
881 /* Common voice downlink gain controls */
882 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
883 TWL4030_REG_VRXPGA
, 0, 0x31, 0, digital_voice_downlink_tlv
),
885 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
886 TWL4030_REG_VDL_APGA_CTL
, 3, 0x12, 1, analog_tlv
),
888 SOC_SINGLE("DAC Voice Analog Downlink Switch",
889 TWL4030_REG_VDL_APGA_CTL
, 1, 1, 0),
891 /* Separate output gain controls */
892 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
893 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
894 4, 3, 0, output_tvl
),
896 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
897 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
899 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
900 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
901 4, 3, 0, output_tvl
),
903 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
904 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_ear_tvl
),
906 /* Common capture gain controls */
907 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
908 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
909 0, 0x1f, 0, digital_capture_tlv
),
910 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
911 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
912 0, 0x1f, 0, digital_capture_tlv
),
914 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
915 0, 3, 5, 0, input_gain_tlv
),
917 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum
),
920 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
921 /* Left channel inputs */
922 SND_SOC_DAPM_INPUT("MAINMIC"),
923 SND_SOC_DAPM_INPUT("HSMIC"),
924 SND_SOC_DAPM_INPUT("AUXL"),
925 SND_SOC_DAPM_INPUT("CARKITMIC"),
926 /* Right channel inputs */
927 SND_SOC_DAPM_INPUT("SUBMIC"),
928 SND_SOC_DAPM_INPUT("AUXR"),
929 /* Digital microphones (Stereo) */
930 SND_SOC_DAPM_INPUT("DIGIMIC0"),
931 SND_SOC_DAPM_INPUT("DIGIMIC1"),
934 SND_SOC_DAPM_OUTPUT("OUTL"),
935 SND_SOC_DAPM_OUTPUT("OUTR"),
936 SND_SOC_DAPM_OUTPUT("EARPIECE"),
937 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
938 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
939 SND_SOC_DAPM_OUTPUT("HSOL"),
940 SND_SOC_DAPM_OUTPUT("HSOR"),
941 SND_SOC_DAPM_OUTPUT("CARKITL"),
942 SND_SOC_DAPM_OUTPUT("CARKITR"),
943 SND_SOC_DAPM_OUTPUT("HFL"),
944 SND_SOC_DAPM_OUTPUT("HFR"),
947 SND_SOC_DAPM_DAC("DAC Right1", "Right Front Playback",
949 SND_SOC_DAPM_DAC("DAC Left1", "Left Front Playback",
951 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear Playback",
953 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear Playback",
955 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
959 SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL
,
961 SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL
,
963 SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL
,
965 SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL
,
967 SND_SOC_DAPM_PGA("VDL_APGA", TWL4030_REG_VDL_APGA_CTL
,
970 /* Analog bypasses */
971 SND_SOC_DAPM_SWITCH_E("Right1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
972 &twl4030_dapm_abypassr1_control
, bypass_event
,
973 SND_SOC_DAPM_POST_REG
),
974 SND_SOC_DAPM_SWITCH_E("Left1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
975 &twl4030_dapm_abypassl1_control
,
976 bypass_event
, SND_SOC_DAPM_POST_REG
),
977 SND_SOC_DAPM_SWITCH_E("Right2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
978 &twl4030_dapm_abypassr2_control
,
979 bypass_event
, SND_SOC_DAPM_POST_REG
),
980 SND_SOC_DAPM_SWITCH_E("Left2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
981 &twl4030_dapm_abypassl2_control
,
982 bypass_event
, SND_SOC_DAPM_POST_REG
),
983 SND_SOC_DAPM_SWITCH_E("Voice Analog Loopback", SND_SOC_NOPM
, 0, 0,
984 &twl4030_dapm_abypassv_control
,
985 bypass_event
, SND_SOC_DAPM_POST_REG
),
987 /* Digital bypasses */
988 SND_SOC_DAPM_SWITCH_E("Left Digital Loopback", SND_SOC_NOPM
, 0, 0,
989 &twl4030_dapm_dbypassl_control
, bypass_event
,
990 SND_SOC_DAPM_POST_REG
),
991 SND_SOC_DAPM_SWITCH_E("Right Digital Loopback", SND_SOC_NOPM
, 0, 0,
992 &twl4030_dapm_dbypassr_control
, bypass_event
,
993 SND_SOC_DAPM_POST_REG
),
995 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer", TWL4030_REG_AVDAC_CTL
,
997 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer", TWL4030_REG_AVDAC_CTL
,
999 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer", TWL4030_REG_AVDAC_CTL
,
1001 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer", TWL4030_REG_AVDAC_CTL
,
1003 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer", TWL4030_REG_AVDAC_CTL
,
1006 /* Output MIXER controls */
1008 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM
, 0, 0,
1009 &twl4030_dapm_earpiece_controls
[0],
1010 ARRAY_SIZE(twl4030_dapm_earpiece_controls
)),
1012 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM
, 0, 0,
1013 &twl4030_dapm_predrivel_controls
[0],
1014 ARRAY_SIZE(twl4030_dapm_predrivel_controls
)),
1015 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM
, 0, 0,
1016 &twl4030_dapm_predriver_controls
[0],
1017 ARRAY_SIZE(twl4030_dapm_predriver_controls
)),
1019 SND_SOC_DAPM_MIXER_E("HeadsetL Mixer", SND_SOC_NOPM
, 0, 0,
1020 &twl4030_dapm_hsol_controls
[0],
1021 ARRAY_SIZE(twl4030_dapm_hsol_controls
), headsetl_event
,
1022 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1023 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM
, 0, 0,
1024 &twl4030_dapm_hsor_controls
[0],
1025 ARRAY_SIZE(twl4030_dapm_hsor_controls
)),
1027 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM
, 0, 0,
1028 &twl4030_dapm_carkitl_controls
[0],
1029 ARRAY_SIZE(twl4030_dapm_carkitl_controls
)),
1030 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM
, 0, 0,
1031 &twl4030_dapm_carkitr_controls
[0],
1032 ARRAY_SIZE(twl4030_dapm_carkitr_controls
)),
1034 /* Output MUX controls */
1036 SND_SOC_DAPM_MUX_E("HandsfreeL Mux", TWL4030_REG_HFL_CTL
, 5, 0,
1037 &twl4030_dapm_handsfreel_control
, handsfree_event
,
1038 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1039 SND_SOC_DAPM_MUX_E("HandsfreeR Mux", TWL4030_REG_HFR_CTL
, 5, 0,
1040 &twl4030_dapm_handsfreer_control
, handsfree_event
,
1041 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1043 /* Introducing four virtual ADC, since TWL4030 have four channel for
1045 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1046 SND_SOC_NOPM
, 0, 0),
1047 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1048 SND_SOC_NOPM
, 0, 0),
1049 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1050 SND_SOC_NOPM
, 0, 0),
1051 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1052 SND_SOC_NOPM
, 0, 0),
1054 /* Analog/Digital mic path selection.
1055 TX1 Left/Right: either analog Left/Right or Digimic0
1056 TX2 Left/Right: either analog Left/Right or Digimic1 */
1057 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
1058 &twl4030_dapm_micpathtx1_control
, micpath_event
,
1059 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
1060 SND_SOC_DAPM_POST_REG
),
1061 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
1062 &twl4030_dapm_micpathtx2_control
, micpath_event
,
1063 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
1064 SND_SOC_DAPM_POST_REG
),
1066 /* Analog input muxes with switch for the capture amplifiers */
1067 SND_SOC_DAPM_VALUE_MUX("Analog Left Capture Route",
1068 TWL4030_REG_ANAMICL
, 4, 0, &twl4030_dapm_analoglmic_control
),
1069 SND_SOC_DAPM_VALUE_MUX("Analog Right Capture Route",
1070 TWL4030_REG_ANAMICR
, 4, 0, &twl4030_dapm_analogrmic_control
),
1072 SND_SOC_DAPM_PGA("ADC Physical Left",
1073 TWL4030_REG_AVADC_CTL
, 3, 0, NULL
, 0),
1074 SND_SOC_DAPM_PGA("ADC Physical Right",
1075 TWL4030_REG_AVADC_CTL
, 1, 0, NULL
, 0),
1077 SND_SOC_DAPM_PGA("Digimic0 Enable",
1078 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0),
1079 SND_SOC_DAPM_PGA("Digimic1 Enable",
1080 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0),
1082 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
1083 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
1084 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
1088 static const struct snd_soc_dapm_route intercon
[] = {
1089 {"Analog L1 Playback Mixer", NULL
, "DAC Left1"},
1090 {"Analog R1 Playback Mixer", NULL
, "DAC Right1"},
1091 {"Analog L2 Playback Mixer", NULL
, "DAC Left2"},
1092 {"Analog R2 Playback Mixer", NULL
, "DAC Right2"},
1093 {"Analog Voice Playback Mixer", NULL
, "DAC Voice"},
1095 {"ARXL1_APGA", NULL
, "Analog L1 Playback Mixer"},
1096 {"ARXR1_APGA", NULL
, "Analog R1 Playback Mixer"},
1097 {"ARXL2_APGA", NULL
, "Analog L2 Playback Mixer"},
1098 {"ARXR2_APGA", NULL
, "Analog R2 Playback Mixer"},
1099 {"VDL_APGA", NULL
, "Analog Voice Playback Mixer"},
1101 /* Internal playback routings */
1103 {"Earpiece Mixer", "Voice", "VDL_APGA"},
1104 {"Earpiece Mixer", "AudioL1", "ARXL1_APGA"},
1105 {"Earpiece Mixer", "AudioL2", "ARXL2_APGA"},
1106 {"Earpiece Mixer", "AudioR1", "ARXR1_APGA"},
1108 {"PredriveL Mixer", "Voice", "VDL_APGA"},
1109 {"PredriveL Mixer", "AudioL1", "ARXL1_APGA"},
1110 {"PredriveL Mixer", "AudioL2", "ARXL2_APGA"},
1111 {"PredriveL Mixer", "AudioR2", "ARXR2_APGA"},
1113 {"PredriveR Mixer", "Voice", "VDL_APGA"},
1114 {"PredriveR Mixer", "AudioR1", "ARXR1_APGA"},
1115 {"PredriveR Mixer", "AudioR2", "ARXR2_APGA"},
1116 {"PredriveR Mixer", "AudioL2", "ARXL2_APGA"},
1118 {"HeadsetL Mixer", "Voice", "VDL_APGA"},
1119 {"HeadsetL Mixer", "AudioL1", "ARXL1_APGA"},
1120 {"HeadsetL Mixer", "AudioL2", "ARXL2_APGA"},
1122 {"HeadsetR Mixer", "Voice", "VDL_APGA"},
1123 {"HeadsetR Mixer", "AudioR1", "ARXR1_APGA"},
1124 {"HeadsetR Mixer", "AudioR2", "ARXR2_APGA"},
1126 {"CarkitL Mixer", "Voice", "VDL_APGA"},
1127 {"CarkitL Mixer", "AudioL1", "ARXL1_APGA"},
1128 {"CarkitL Mixer", "AudioL2", "ARXL2_APGA"},
1130 {"CarkitR Mixer", "Voice", "VDL_APGA"},
1131 {"CarkitR Mixer", "AudioR1", "ARXR1_APGA"},
1132 {"CarkitR Mixer", "AudioR2", "ARXR2_APGA"},
1134 {"HandsfreeL Mux", "Voice", "VDL_APGA"},
1135 {"HandsfreeL Mux", "AudioL1", "ARXL1_APGA"},
1136 {"HandsfreeL Mux", "AudioL2", "ARXL2_APGA"},
1137 {"HandsfreeL Mux", "AudioR2", "ARXR2_APGA"},
1139 {"HandsfreeR Mux", "Voice", "VDL_APGA"},
1140 {"HandsfreeR Mux", "AudioR1", "ARXR1_APGA"},
1141 {"HandsfreeR Mux", "AudioR2", "ARXR2_APGA"},
1142 {"HandsfreeR Mux", "AudioL2", "ARXL2_APGA"},
1145 {"OUTL", NULL
, "ARXL2_APGA"},
1146 {"OUTR", NULL
, "ARXR2_APGA"},
1147 {"EARPIECE", NULL
, "Earpiece Mixer"},
1148 {"PREDRIVEL", NULL
, "PredriveL Mixer"},
1149 {"PREDRIVER", NULL
, "PredriveR Mixer"},
1150 {"HSOL", NULL
, "HeadsetL Mixer"},
1151 {"HSOR", NULL
, "HeadsetR Mixer"},
1152 {"CARKITL", NULL
, "CarkitL Mixer"},
1153 {"CARKITR", NULL
, "CarkitR Mixer"},
1154 {"HFL", NULL
, "HandsfreeL Mux"},
1155 {"HFR", NULL
, "HandsfreeR Mux"},
1158 {"Analog Left Capture Route", "Main mic", "MAINMIC"},
1159 {"Analog Left Capture Route", "Headset mic", "HSMIC"},
1160 {"Analog Left Capture Route", "AUXL", "AUXL"},
1161 {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"},
1163 {"Analog Right Capture Route", "Sub mic", "SUBMIC"},
1164 {"Analog Right Capture Route", "AUXR", "AUXR"},
1166 {"ADC Physical Left", NULL
, "Analog Left Capture Route"},
1167 {"ADC Physical Right", NULL
, "Analog Right Capture Route"},
1169 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
1170 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
1172 /* TX1 Left capture path */
1173 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1174 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1175 /* TX1 Right capture path */
1176 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1177 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1178 /* TX2 Left capture path */
1179 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1180 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1181 /* TX2 Right capture path */
1182 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1183 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1185 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
1186 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
1187 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
1188 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
1190 /* Analog bypass routes */
1191 {"Right1 Analog Loopback", "Switch", "Analog Right Capture Route"},
1192 {"Left1 Analog Loopback", "Switch", "Analog Left Capture Route"},
1193 {"Right2 Analog Loopback", "Switch", "Analog Right Capture Route"},
1194 {"Left2 Analog Loopback", "Switch", "Analog Left Capture Route"},
1195 {"Voice Analog Loopback", "Switch", "Analog Left Capture Route"},
1197 {"Analog R1 Playback Mixer", NULL
, "Right1 Analog Loopback"},
1198 {"Analog L1 Playback Mixer", NULL
, "Left1 Analog Loopback"},
1199 {"Analog R2 Playback Mixer", NULL
, "Right2 Analog Loopback"},
1200 {"Analog L2 Playback Mixer", NULL
, "Left2 Analog Loopback"},
1201 {"Analog Voice Playback Mixer", NULL
, "Voice Analog Loopback"},
1203 /* Digital bypass routes */
1204 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1205 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1207 {"Analog R2 Playback Mixer", NULL
, "Right Digital Loopback"},
1208 {"Analog L2 Playback Mixer", NULL
, "Left Digital Loopback"},
1212 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
1214 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
1215 ARRAY_SIZE(twl4030_dapm_widgets
));
1217 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
1219 snd_soc_dapm_new_widgets(codec
);
1223 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
1224 enum snd_soc_bias_level level
)
1226 struct twl4030_priv
*twl4030
= codec
->private_data
;
1229 case SND_SOC_BIAS_ON
:
1230 twl4030_codec_mute(codec
, 0);
1232 case SND_SOC_BIAS_PREPARE
:
1233 twl4030_power_up(codec
);
1234 if (twl4030
->bypass_state
)
1235 twl4030_codec_mute(codec
, 0);
1237 twl4030_codec_mute(codec
, 1);
1239 case SND_SOC_BIAS_STANDBY
:
1240 twl4030_power_up(codec
);
1241 if (twl4030
->bypass_state
)
1242 twl4030_codec_mute(codec
, 0);
1244 twl4030_codec_mute(codec
, 1);
1246 case SND_SOC_BIAS_OFF
:
1247 twl4030_power_down(codec
);
1250 codec
->bias_level
= level
;
1255 static void twl4030_constraints(struct twl4030_priv
*twl4030
,
1256 struct snd_pcm_substream
*mst_substream
)
1258 struct snd_pcm_substream
*slv_substream
;
1260 /* Pick the stream, which need to be constrained */
1261 if (mst_substream
== twl4030
->master_substream
)
1262 slv_substream
= twl4030
->slave_substream
;
1263 else if (mst_substream
== twl4030
->slave_substream
)
1264 slv_substream
= twl4030
->master_substream
;
1265 else /* This should not happen.. */
1268 /* Set the constraints according to the already configured stream */
1269 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1270 SNDRV_PCM_HW_PARAM_RATE
,
1274 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1275 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
,
1276 twl4030
->sample_bits
,
1277 twl4030
->sample_bits
);
1279 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1280 SNDRV_PCM_HW_PARAM_CHANNELS
,
1285 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1286 * capture has to be enabled/disabled. */
1287 static void twl4030_tdm_enable(struct snd_soc_codec
*codec
, int direction
,
1292 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1294 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1295 mask
= TWL4030_ARXL1_VRX_EN
| TWL4030_ARXR1_EN
;
1297 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1304 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1307 static int twl4030_startup(struct snd_pcm_substream
*substream
,
1308 struct snd_soc_dai
*dai
)
1310 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1311 struct snd_soc_device
*socdev
= rtd
->socdev
;
1312 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1313 struct twl4030_priv
*twl4030
= codec
->private_data
;
1315 if (twl4030
->master_substream
) {
1316 twl4030
->slave_substream
= substream
;
1317 /* The DAI has one configuration for playback and capture, so
1318 * if the DAI has been already configured then constrain this
1319 * substream to match it. */
1320 if (twl4030
->configured
)
1321 twl4030_constraints(twl4030
, twl4030
->master_substream
);
1323 if (!(twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
) &
1324 TWL4030_OPTION_1
)) {
1325 /* In option2 4 channel is not supported, set the
1326 * constraint for the first stream for channels, the
1327 * second stream will 'inherit' this cosntraint */
1328 snd_pcm_hw_constraint_minmax(substream
->runtime
,
1329 SNDRV_PCM_HW_PARAM_CHANNELS
,
1332 twl4030
->master_substream
= substream
;
1338 static void twl4030_shutdown(struct snd_pcm_substream
*substream
,
1339 struct snd_soc_dai
*dai
)
1341 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1342 struct snd_soc_device
*socdev
= rtd
->socdev
;
1343 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1344 struct twl4030_priv
*twl4030
= codec
->private_data
;
1346 if (twl4030
->master_substream
== substream
)
1347 twl4030
->master_substream
= twl4030
->slave_substream
;
1349 twl4030
->slave_substream
= NULL
;
1351 /* If all streams are closed, or the remaining stream has not yet
1352 * been configured than set the DAI as not configured. */
1353 if (!twl4030
->master_substream
)
1354 twl4030
->configured
= 0;
1355 else if (!twl4030
->master_substream
->runtime
->channels
)
1356 twl4030
->configured
= 0;
1358 /* If the closing substream had 4 channel, do the necessary cleanup */
1359 if (substream
->runtime
->channels
== 4)
1360 twl4030_tdm_enable(codec
, substream
->stream
, 0);
1363 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
1364 struct snd_pcm_hw_params
*params
,
1365 struct snd_soc_dai
*dai
)
1367 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1368 struct snd_soc_device
*socdev
= rtd
->socdev
;
1369 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1370 struct twl4030_priv
*twl4030
= codec
->private_data
;
1371 u8 mode
, old_mode
, format
, old_format
;
1373 /* If the substream has 4 channel, do the necessary setup */
1374 if (params_channels(params
) == 4) {
1375 /* Safety check: are we in the correct operating mode? */
1376 if ((twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
) &
1378 twl4030_tdm_enable(codec
, substream
->stream
, 1);
1383 if (twl4030
->configured
)
1384 /* Ignoring hw_params for already configured DAI */
1388 old_mode
= twl4030_read_reg_cache(codec
,
1389 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
1390 mode
= old_mode
& ~TWL4030_APLL_RATE
;
1392 switch (params_rate(params
)) {
1394 mode
|= TWL4030_APLL_RATE_8000
;
1397 mode
|= TWL4030_APLL_RATE_11025
;
1400 mode
|= TWL4030_APLL_RATE_12000
;
1403 mode
|= TWL4030_APLL_RATE_16000
;
1406 mode
|= TWL4030_APLL_RATE_22050
;
1409 mode
|= TWL4030_APLL_RATE_24000
;
1412 mode
|= TWL4030_APLL_RATE_32000
;
1415 mode
|= TWL4030_APLL_RATE_44100
;
1418 mode
|= TWL4030_APLL_RATE_48000
;
1421 mode
|= TWL4030_APLL_RATE_96000
;
1424 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1425 params_rate(params
));
1429 if (mode
!= old_mode
) {
1430 /* change rate and set CODECPDZ */
1431 twl4030_codec_enable(codec
, 0);
1432 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1433 twl4030_codec_enable(codec
, 1);
1437 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1438 format
= old_format
;
1439 format
&= ~TWL4030_DATA_WIDTH
;
1440 switch (params_format(params
)) {
1441 case SNDRV_PCM_FORMAT_S16_LE
:
1442 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1444 case SNDRV_PCM_FORMAT_S24_LE
:
1445 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1448 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1449 params_format(params
));
1453 if (format
!= old_format
) {
1455 /* clear CODECPDZ before changing format (codec requirement) */
1456 twl4030_codec_enable(codec
, 0);
1459 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1461 /* set CODECPDZ afterwards */
1462 twl4030_codec_enable(codec
, 1);
1465 /* Store the important parameters for the DAI configuration and set
1466 * the DAI as configured */
1467 twl4030
->configured
= 1;
1468 twl4030
->rate
= params_rate(params
);
1469 twl4030
->sample_bits
= hw_param_interval(params
,
1470 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
)->min
;
1471 twl4030
->channels
= params_channels(params
);
1473 /* If both playback and capture streams are open, and one of them
1474 * is setting the hw parameters right now (since we are here), set
1475 * constraints to the other stream to match the current one. */
1476 if (twl4030
->slave_substream
)
1477 twl4030_constraints(twl4030
, substream
);
1482 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1483 int clk_id
, unsigned int freq
, int dir
)
1485 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1490 infreq
= TWL4030_APLL_INFREQ_19200KHZ
;
1493 infreq
= TWL4030_APLL_INFREQ_26000KHZ
;
1496 infreq
= TWL4030_APLL_INFREQ_38400KHZ
;
1499 printk(KERN_ERR
"TWL4030 set sysclk: unknown rate %d\n",
1504 infreq
|= TWL4030_APLL_EN
;
1505 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, infreq
);
1510 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1513 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1514 u8 old_format
, format
;
1517 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1518 format
= old_format
;
1520 /* set master/slave audio interface */
1521 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1522 case SND_SOC_DAIFMT_CBM_CFM
:
1523 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1524 format
&= ~(TWL4030_CLK256FS_EN
);
1526 case SND_SOC_DAIFMT_CBS_CFS
:
1527 format
|= TWL4030_AIF_SLAVE_EN
;
1528 format
|= TWL4030_CLK256FS_EN
;
1534 /* interface format */
1535 format
&= ~TWL4030_AIF_FORMAT
;
1536 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1537 case SND_SOC_DAIFMT_I2S
:
1538 format
|= TWL4030_AIF_FORMAT_CODEC
;
1540 case SND_SOC_DAIFMT_DSP_A
:
1541 format
|= TWL4030_AIF_FORMAT_TDM
;
1547 if (format
!= old_format
) {
1549 /* clear CODECPDZ before changing format (codec requirement) */
1550 twl4030_codec_enable(codec
, 0);
1553 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1555 /* set CODECPDZ afterwards */
1556 twl4030_codec_enable(codec
, 1);
1562 static int twl4030_voice_startup(struct snd_pcm_substream
*substream
,
1563 struct snd_soc_dai
*dai
)
1565 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1566 struct snd_soc_device
*socdev
= rtd
->socdev
;
1567 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1571 /* If the system master clock is not 26MHz, the voice PCM interface is
1574 infreq
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
)
1575 & TWL4030_APLL_INFREQ
;
1577 if (infreq
!= TWL4030_APLL_INFREQ_26000KHZ
) {
1578 printk(KERN_ERR
"TWL4030 voice startup: "
1579 "MCLK is not 26MHz, call set_sysclk() on init\n");
1583 /* If the codec mode is not option2, the voice PCM interface is not
1586 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
1589 if (mode
!= TWL4030_OPTION_2
) {
1590 printk(KERN_ERR
"TWL4030 voice startup: "
1591 "the codec mode is not option2\n");
1598 static int twl4030_voice_hw_params(struct snd_pcm_substream
*substream
,
1599 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
1601 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1602 struct snd_soc_device
*socdev
= rtd
->socdev
;
1603 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1607 old_mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
1608 & ~(TWL4030_CODECPDZ
);
1611 switch (params_rate(params
)) {
1613 mode
&= ~(TWL4030_SEL_16K
);
1616 mode
|= TWL4030_SEL_16K
;
1619 printk(KERN_ERR
"TWL4030 voice hw params: unknown rate %d\n",
1620 params_rate(params
));
1624 if (mode
!= old_mode
) {
1625 /* change rate and set CODECPDZ */
1626 twl4030_codec_enable(codec
, 0);
1627 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1628 twl4030_codec_enable(codec
, 1);
1634 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1635 int clk_id
, unsigned int freq
, int dir
)
1637 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1642 infreq
= TWL4030_APLL_INFREQ_26000KHZ
;
1645 printk(KERN_ERR
"TWL4030 voice set sysclk: unknown rate %d\n",
1650 infreq
|= TWL4030_APLL_EN
;
1651 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, infreq
);
1656 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1659 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1660 u8 old_format
, format
;
1663 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
1664 format
= old_format
;
1666 /* set master/slave audio interface */
1667 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1668 case SND_SOC_DAIFMT_CBS_CFM
:
1669 format
&= ~(TWL4030_VIF_SLAVE_EN
);
1671 case SND_SOC_DAIFMT_CBS_CFS
:
1672 format
|= TWL4030_VIF_SLAVE_EN
;
1678 /* clock inversion */
1679 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1680 case SND_SOC_DAIFMT_IB_NF
:
1681 format
&= ~(TWL4030_VIF_FORMAT
);
1683 case SND_SOC_DAIFMT_NB_IF
:
1684 format
|= TWL4030_VIF_FORMAT
;
1690 if (format
!= old_format
) {
1691 /* change format and set CODECPDZ */
1692 twl4030_codec_enable(codec
, 0);
1693 twl4030_write(codec
, TWL4030_REG_VOICE_IF
, format
);
1694 twl4030_codec_enable(codec
, 1);
1700 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
1701 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
1703 static struct snd_soc_dai_ops twl4030_dai_ops
= {
1704 .startup
= twl4030_startup
,
1705 .shutdown
= twl4030_shutdown
,
1706 .hw_params
= twl4030_hw_params
,
1707 .set_sysclk
= twl4030_set_dai_sysclk
,
1708 .set_fmt
= twl4030_set_dai_fmt
,
1711 static struct snd_soc_dai_ops twl4030_dai_voice_ops
= {
1712 .startup
= twl4030_voice_startup
,
1713 .hw_params
= twl4030_voice_hw_params
,
1714 .set_sysclk
= twl4030_voice_set_dai_sysclk
,
1715 .set_fmt
= twl4030_voice_set_dai_fmt
,
1718 struct snd_soc_dai twl4030_dai
[] = {
1722 .stream_name
= "Playback",
1725 .rates
= TWL4030_RATES
| SNDRV_PCM_RATE_96000
,
1726 .formats
= TWL4030_FORMATS
,},
1728 .stream_name
= "Capture",
1731 .rates
= TWL4030_RATES
,
1732 .formats
= TWL4030_FORMATS
,},
1733 .ops
= &twl4030_dai_ops
,
1736 .name
= "twl4030 Voice",
1738 .stream_name
= "Playback",
1741 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
1742 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
1744 .stream_name
= "Capture",
1747 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
1748 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
1749 .ops
= &twl4030_dai_voice_ops
,
1752 EXPORT_SYMBOL_GPL(twl4030_dai
);
1754 static int twl4030_suspend(struct platform_device
*pdev
, pm_message_t state
)
1756 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1757 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1759 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1764 static int twl4030_resume(struct platform_device
*pdev
)
1766 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1767 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1769 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1770 twl4030_set_bias_level(codec
, codec
->suspend_bias_level
);
1775 * initialize the driver
1776 * register the mixer and dsp interfaces with the kernel
1779 static int twl4030_init(struct snd_soc_device
*socdev
)
1781 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1784 printk(KERN_INFO
"TWL4030 Audio Codec init \n");
1786 codec
->name
= "twl4030";
1787 codec
->owner
= THIS_MODULE
;
1788 codec
->read
= twl4030_read_reg_cache
;
1789 codec
->write
= twl4030_write
;
1790 codec
->set_bias_level
= twl4030_set_bias_level
;
1791 codec
->dai
= twl4030_dai
;
1792 codec
->num_dai
= ARRAY_SIZE(twl4030_dai
),
1793 codec
->reg_cache_size
= sizeof(twl4030_reg
);
1794 codec
->reg_cache
= kmemdup(twl4030_reg
, sizeof(twl4030_reg
),
1796 if (codec
->reg_cache
== NULL
)
1800 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1802 printk(KERN_ERR
"twl4030: failed to create pcms\n");
1806 twl4030_init_chip(codec
);
1808 /* power on device */
1809 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1811 snd_soc_add_controls(codec
, twl4030_snd_controls
,
1812 ARRAY_SIZE(twl4030_snd_controls
));
1813 twl4030_add_widgets(codec
);
1815 ret
= snd_soc_init_card(socdev
);
1817 printk(KERN_ERR
"twl4030: failed to register card\n");
1824 snd_soc_free_pcms(socdev
);
1825 snd_soc_dapm_free(socdev
);
1827 kfree(codec
->reg_cache
);
1831 static struct snd_soc_device
*twl4030_socdev
;
1833 static int twl4030_probe(struct platform_device
*pdev
)
1835 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1836 struct snd_soc_codec
*codec
;
1837 struct twl4030_priv
*twl4030
;
1839 codec
= kzalloc(sizeof(struct snd_soc_codec
), GFP_KERNEL
);
1843 twl4030
= kzalloc(sizeof(struct twl4030_priv
), GFP_KERNEL
);
1844 if (twl4030
== NULL
) {
1849 codec
->private_data
= twl4030
;
1850 socdev
->card
->codec
= codec
;
1851 mutex_init(&codec
->mutex
);
1852 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1853 INIT_LIST_HEAD(&codec
->dapm_paths
);
1855 twl4030_socdev
= socdev
;
1856 twl4030_init(socdev
);
1861 static int twl4030_remove(struct platform_device
*pdev
)
1863 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1864 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1866 printk(KERN_INFO
"TWL4030 Audio Codec remove\n");
1867 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1868 snd_soc_free_pcms(socdev
);
1869 snd_soc_dapm_free(socdev
);
1870 kfree(codec
->private_data
);
1876 struct snd_soc_codec_device soc_codec_dev_twl4030
= {
1877 .probe
= twl4030_probe
,
1878 .remove
= twl4030_remove
,
1879 .suspend
= twl4030_suspend
,
1880 .resume
= twl4030_resume
,
1882 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030
);
1884 static int __init
twl4030_modinit(void)
1886 return snd_soc_register_dais(&twl4030_dai
[0], ARRAY_SIZE(twl4030_dai
));
1888 module_init(twl4030_modinit
);
1890 static void __exit
twl4030_exit(void)
1892 snd_soc_unregister_dais(&twl4030_dai
[0], ARRAY_SIZE(twl4030_dai
));
1894 module_exit(twl4030_exit
);
1896 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
1897 MODULE_AUTHOR("Steve Sakoman");
1898 MODULE_LICENSE("GPL");