2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl4030.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
44 0x00, /* this register not used */
45 0x93, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
121 * read twl4030 register cache
123 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
126 u8
*cache
= codec
->reg_cache
;
132 * write twl4030 register cache
134 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
137 u8
*cache
= codec
->reg_cache
;
139 if (reg
>= TWL4030_CACHEREGNUM
)
145 * write to the twl4030 register space
147 static int twl4030_write(struct snd_soc_codec
*codec
,
148 unsigned int reg
, unsigned int value
)
150 twl4030_write_reg_cache(codec
, reg
, value
);
151 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
, value
, reg
);
154 static void twl4030_clear_codecpdz(struct snd_soc_codec
*codec
)
158 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
159 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
,
160 mode
& ~TWL4030_CODECPDZ
);
162 /* REVISIT: this delay is present in TI sample drivers */
163 /* but there seems to be no TRM requirement for it */
167 static void twl4030_set_codecpdz(struct snd_soc_codec
*codec
)
171 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
172 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
,
173 mode
| TWL4030_CODECPDZ
);
175 /* REVISIT: this delay is present in TI sample drivers */
176 /* but there seems to be no TRM requirement for it */
180 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
184 /* clear CODECPDZ prior to setting register defaults */
185 twl4030_clear_codecpdz(codec
);
187 /* set all audio section registers to reasonable defaults */
188 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
189 twl4030_write(codec
, i
, twl4030_reg
[i
]);
194 static const char *twl4030_earpiece_texts
[] =
195 {"Off", "DACL1", "DACL2", "DACR1"};
197 static const unsigned int twl4030_earpiece_values
[] =
198 {0x0, 0x1, 0x2, 0x4};
200 static const struct soc_value_enum twl4030_earpiece_enum
=
201 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_EAR_CTL
, 1, 0x7,
202 ARRAY_SIZE(twl4030_earpiece_texts
),
203 twl4030_earpiece_texts
,
204 twl4030_earpiece_values
);
206 static const struct snd_kcontrol_new twl4030_dapm_earpiece_control
=
207 SOC_DAPM_VALUE_ENUM("Route", twl4030_earpiece_enum
);
210 static const char *twl4030_predrivel_texts
[] =
211 {"Off", "DACL1", "DACL2", "DACR2"};
213 static const unsigned int twl4030_predrivel_values
[] =
214 {0x0, 0x1, 0x2, 0x4};
216 static const struct soc_value_enum twl4030_predrivel_enum
=
217 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDL_CTL
, 1, 0x7,
218 ARRAY_SIZE(twl4030_predrivel_texts
),
219 twl4030_predrivel_texts
,
220 twl4030_predrivel_values
);
222 static const struct snd_kcontrol_new twl4030_dapm_predrivel_control
=
223 SOC_DAPM_VALUE_ENUM("Route", twl4030_predrivel_enum
);
226 static const char *twl4030_predriver_texts
[] =
227 {"Off", "DACR1", "DACR2", "DACL2"};
229 static const unsigned int twl4030_predriver_values
[] =
230 {0x0, 0x1, 0x2, 0x4};
232 static const struct soc_value_enum twl4030_predriver_enum
=
233 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDR_CTL
, 1, 0x7,
234 ARRAY_SIZE(twl4030_predriver_texts
),
235 twl4030_predriver_texts
,
236 twl4030_predriver_values
);
238 static const struct snd_kcontrol_new twl4030_dapm_predriver_control
=
239 SOC_DAPM_VALUE_ENUM("Route", twl4030_predriver_enum
);
242 static const char *twl4030_hsol_texts
[] =
243 {"Off", "DACL1", "DACL2"};
245 static const struct soc_enum twl4030_hsol_enum
=
246 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL
, 1,
247 ARRAY_SIZE(twl4030_hsol_texts
),
250 static const struct snd_kcontrol_new twl4030_dapm_hsol_control
=
251 SOC_DAPM_ENUM("Route", twl4030_hsol_enum
);
254 static const char *twl4030_hsor_texts
[] =
255 {"Off", "DACR1", "DACR2"};
257 static const struct soc_enum twl4030_hsor_enum
=
258 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL
, 4,
259 ARRAY_SIZE(twl4030_hsor_texts
),
262 static const struct snd_kcontrol_new twl4030_dapm_hsor_control
=
263 SOC_DAPM_ENUM("Route", twl4030_hsor_enum
);
266 static const char *twl4030_carkitl_texts
[] =
267 {"Off", "DACL1", "DACL2"};
269 static const struct soc_enum twl4030_carkitl_enum
=
270 SOC_ENUM_SINGLE(TWL4030_REG_PRECKL_CTL
, 1,
271 ARRAY_SIZE(twl4030_carkitl_texts
),
272 twl4030_carkitl_texts
);
274 static const struct snd_kcontrol_new twl4030_dapm_carkitl_control
=
275 SOC_DAPM_ENUM("Route", twl4030_carkitl_enum
);
278 static const char *twl4030_carkitr_texts
[] =
279 {"Off", "DACR1", "DACR2"};
281 static const struct soc_enum twl4030_carkitr_enum
=
282 SOC_ENUM_SINGLE(TWL4030_REG_PRECKR_CTL
, 1,
283 ARRAY_SIZE(twl4030_carkitr_texts
),
284 twl4030_carkitr_texts
);
286 static const struct snd_kcontrol_new twl4030_dapm_carkitr_control
=
287 SOC_DAPM_ENUM("Route", twl4030_carkitr_enum
);
290 static const char *twl4030_handsfreel_texts
[] =
291 {"Voice", "DACL1", "DACL2", "DACR2"};
293 static const struct soc_enum twl4030_handsfreel_enum
=
294 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
295 ARRAY_SIZE(twl4030_handsfreel_texts
),
296 twl4030_handsfreel_texts
);
298 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
299 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
301 /* Handsfree Right */
302 static const char *twl4030_handsfreer_texts
[] =
303 {"Voice", "DACR1", "DACR2", "DACL2"};
305 static const struct soc_enum twl4030_handsfreer_enum
=
306 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
307 ARRAY_SIZE(twl4030_handsfreer_texts
),
308 twl4030_handsfreer_texts
);
310 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
311 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
313 /* Left analog microphone selection */
314 static const char *twl4030_analoglmic_texts
[] =
315 {"Off", "Main mic", "Headset mic", "AUXL", "Carkit mic"};
317 static const unsigned int twl4030_analoglmic_values
[] =
318 {0x0, 0x1, 0x2, 0x4, 0x8};
320 static const struct soc_value_enum twl4030_analoglmic_enum
=
321 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICL
, 0, 0xf,
322 ARRAY_SIZE(twl4030_analoglmic_texts
),
323 twl4030_analoglmic_texts
,
324 twl4030_analoglmic_values
);
326 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_control
=
327 SOC_DAPM_VALUE_ENUM("Route", twl4030_analoglmic_enum
);
329 /* Right analog microphone selection */
330 static const char *twl4030_analogrmic_texts
[] =
331 {"Off", "Sub mic", "AUXR"};
333 static const unsigned int twl4030_analogrmic_values
[] =
336 static const struct soc_value_enum twl4030_analogrmic_enum
=
337 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICR
, 0, 0x5,
338 ARRAY_SIZE(twl4030_analogrmic_texts
),
339 twl4030_analogrmic_texts
,
340 twl4030_analogrmic_values
);
342 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_control
=
343 SOC_DAPM_VALUE_ENUM("Route", twl4030_analogrmic_enum
);
345 /* TX1 L/R Analog/Digital microphone selection */
346 static const char *twl4030_micpathtx1_texts
[] =
347 {"Analog", "Digimic0"};
349 static const struct soc_enum twl4030_micpathtx1_enum
=
350 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
351 ARRAY_SIZE(twl4030_micpathtx1_texts
),
352 twl4030_micpathtx1_texts
);
354 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
355 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
357 /* TX2 L/R Analog/Digital microphone selection */
358 static const char *twl4030_micpathtx2_texts
[] =
359 {"Analog", "Digimic1"};
361 static const struct soc_enum twl4030_micpathtx2_enum
=
362 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
363 ARRAY_SIZE(twl4030_micpathtx2_texts
),
364 twl4030_micpathtx2_texts
);
366 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
367 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
369 static int micpath_event(struct snd_soc_dapm_widget
*w
,
370 struct snd_kcontrol
*kcontrol
, int event
)
372 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
373 unsigned char adcmicsel
, micbias_ctl
;
375 adcmicsel
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_ADCMICSEL
);
376 micbias_ctl
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MICBIAS_CTL
);
377 /* Prepare the bits for the given TX path:
378 * shift_l == 0: TX1 microphone path
379 * shift_l == 2: TX2 microphone path */
381 /* TX2 microphone path */
382 if (adcmicsel
& TWL4030_TX2IN_SEL
)
383 micbias_ctl
|= TWL4030_MICBIAS2_CTL
; /* digimic */
385 micbias_ctl
&= ~TWL4030_MICBIAS2_CTL
;
387 /* TX1 microphone path */
388 if (adcmicsel
& TWL4030_TX1IN_SEL
)
389 micbias_ctl
|= TWL4030_MICBIAS1_CTL
; /* digimic */
391 micbias_ctl
&= ~TWL4030_MICBIAS1_CTL
;
394 twl4030_write(w
->codec
, TWL4030_REG_MICBIAS_CTL
, micbias_ctl
);
399 static int handsfree_event(struct snd_soc_dapm_widget
*w
,
400 struct snd_kcontrol
*kcontrol
, int event
)
402 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
403 unsigned char hs_ctl
;
405 hs_ctl
= twl4030_read_reg_cache(w
->codec
, e
->reg
);
407 if (hs_ctl
& TWL4030_HF_CTL_REF_EN
) {
408 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
409 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
410 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
411 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
412 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
413 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
415 hs_ctl
&= ~(TWL4030_HF_CTL_RAMP_EN
| TWL4030_HF_CTL_LOOP_EN
416 | TWL4030_HF_CTL_HB_EN
);
417 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
424 * Some of the gain controls in TWL (mostly those which are associated with
425 * the outputs) are implemented in an interesting way:
426 * 0x0 : Power down (mute)
430 * Inverting not going to help with these.
431 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
433 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
434 xinvert, tlv_array) \
435 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
436 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
437 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
438 .tlv.p = (tlv_array), \
439 .info = snd_soc_info_volsw, \
440 .get = snd_soc_get_volsw_twl4030, \
441 .put = snd_soc_put_volsw_twl4030, \
442 .private_value = (unsigned long)&(struct soc_mixer_control) \
443 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
444 .max = xmax, .invert = xinvert} }
445 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
446 xinvert, tlv_array) \
447 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
448 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
449 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
450 .tlv.p = (tlv_array), \
451 .info = snd_soc_info_volsw_2r, \
452 .get = snd_soc_get_volsw_r2_twl4030,\
453 .put = snd_soc_put_volsw_r2_twl4030, \
454 .private_value = (unsigned long)&(struct soc_mixer_control) \
455 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
456 .rshift = xshift, .max = xmax, .invert = xinvert} }
457 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
458 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
461 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
462 struct snd_ctl_elem_value
*ucontrol
)
464 struct soc_mixer_control
*mc
=
465 (struct soc_mixer_control
*)kcontrol
->private_value
;
466 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
467 unsigned int reg
= mc
->reg
;
468 unsigned int shift
= mc
->shift
;
469 unsigned int rshift
= mc
->rshift
;
471 int mask
= (1 << fls(max
)) - 1;
473 ucontrol
->value
.integer
.value
[0] =
474 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
475 if (ucontrol
->value
.integer
.value
[0])
476 ucontrol
->value
.integer
.value
[0] =
477 max
+ 1 - ucontrol
->value
.integer
.value
[0];
479 if (shift
!= rshift
) {
480 ucontrol
->value
.integer
.value
[1] =
481 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
482 if (ucontrol
->value
.integer
.value
[1])
483 ucontrol
->value
.integer
.value
[1] =
484 max
+ 1 - ucontrol
->value
.integer
.value
[1];
490 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
491 struct snd_ctl_elem_value
*ucontrol
)
493 struct soc_mixer_control
*mc
=
494 (struct soc_mixer_control
*)kcontrol
->private_value
;
495 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
496 unsigned int reg
= mc
->reg
;
497 unsigned int shift
= mc
->shift
;
498 unsigned int rshift
= mc
->rshift
;
500 int mask
= (1 << fls(max
)) - 1;
501 unsigned short val
, val2
, val_mask
;
503 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
505 val_mask
= mask
<< shift
;
509 if (shift
!= rshift
) {
510 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
511 val_mask
|= mask
<< rshift
;
513 val2
= max
+ 1 - val2
;
514 val
|= val2
<< rshift
;
516 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
519 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
520 struct snd_ctl_elem_value
*ucontrol
)
522 struct soc_mixer_control
*mc
=
523 (struct soc_mixer_control
*)kcontrol
->private_value
;
524 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
525 unsigned int reg
= mc
->reg
;
526 unsigned int reg2
= mc
->rreg
;
527 unsigned int shift
= mc
->shift
;
529 int mask
= (1<<fls(max
))-1;
531 ucontrol
->value
.integer
.value
[0] =
532 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
533 ucontrol
->value
.integer
.value
[1] =
534 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
536 if (ucontrol
->value
.integer
.value
[0])
537 ucontrol
->value
.integer
.value
[0] =
538 max
+ 1 - ucontrol
->value
.integer
.value
[0];
539 if (ucontrol
->value
.integer
.value
[1])
540 ucontrol
->value
.integer
.value
[1] =
541 max
+ 1 - ucontrol
->value
.integer
.value
[1];
546 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
547 struct snd_ctl_elem_value
*ucontrol
)
549 struct soc_mixer_control
*mc
=
550 (struct soc_mixer_control
*)kcontrol
->private_value
;
551 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
552 unsigned int reg
= mc
->reg
;
553 unsigned int reg2
= mc
->rreg
;
554 unsigned int shift
= mc
->shift
;
556 int mask
= (1 << fls(max
)) - 1;
558 unsigned short val
, val2
, val_mask
;
560 val_mask
= mask
<< shift
;
561 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
562 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
567 val2
= max
+ 1 - val2
;
570 val2
= val2
<< shift
;
572 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
576 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
581 * FGAIN volume control:
582 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
584 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
587 * CGAIN volume control:
588 * 0 dB to 12 dB in 6 dB steps
589 * value 2 and 3 means 12 dB
591 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
594 * Analog playback gain
595 * -24 dB to 12 dB in 2 dB steps
597 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
600 * Gain controls tied to outputs
601 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
603 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
606 * Capture gain after the ADCs
607 * from 0 dB to 31 dB in 1 dB steps
609 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
612 * Gain control for input amplifiers
613 * 0 dB to 30 dB in 6 dB steps
615 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
617 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
618 /* Common playback gain controls */
619 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
620 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
621 0, 0x3f, 0, digital_fine_tlv
),
622 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
623 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
624 0, 0x3f, 0, digital_fine_tlv
),
626 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
627 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
628 6, 0x2, 0, digital_coarse_tlv
),
629 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
630 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
631 6, 0x2, 0, digital_coarse_tlv
),
633 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
634 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
635 3, 0x12, 1, analog_tlv
),
636 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
637 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
638 3, 0x12, 1, analog_tlv
),
639 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
640 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
642 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
643 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
646 /* Separate output gain controls */
647 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
648 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
649 4, 3, 0, output_tvl
),
651 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
652 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
654 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
655 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
656 4, 3, 0, output_tvl
),
658 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
659 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_tvl
),
661 /* Common capture gain controls */
662 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
663 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
664 0, 0x1f, 0, digital_capture_tlv
),
665 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
666 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
667 0, 0x1f, 0, digital_capture_tlv
),
669 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
670 0, 3, 5, 0, input_gain_tlv
),
673 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
674 /* Left channel inputs */
675 SND_SOC_DAPM_INPUT("MAINMIC"),
676 SND_SOC_DAPM_INPUT("HSMIC"),
677 SND_SOC_DAPM_INPUT("AUXL"),
678 SND_SOC_DAPM_INPUT("CARKITMIC"),
679 /* Right channel inputs */
680 SND_SOC_DAPM_INPUT("SUBMIC"),
681 SND_SOC_DAPM_INPUT("AUXR"),
682 /* Digital microphones (Stereo) */
683 SND_SOC_DAPM_INPUT("DIGIMIC0"),
684 SND_SOC_DAPM_INPUT("DIGIMIC1"),
687 SND_SOC_DAPM_OUTPUT("OUTL"),
688 SND_SOC_DAPM_OUTPUT("OUTR"),
689 SND_SOC_DAPM_OUTPUT("EARPIECE"),
690 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
691 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
692 SND_SOC_DAPM_OUTPUT("HSOL"),
693 SND_SOC_DAPM_OUTPUT("HSOR"),
694 SND_SOC_DAPM_OUTPUT("CARKITL"),
695 SND_SOC_DAPM_OUTPUT("CARKITR"),
696 SND_SOC_DAPM_OUTPUT("HFL"),
697 SND_SOC_DAPM_OUTPUT("HFR"),
700 SND_SOC_DAPM_DAC("DAC Right1", "Right Front Playback",
701 TWL4030_REG_AVDAC_CTL
, 0, 0),
702 SND_SOC_DAPM_DAC("DAC Left1", "Left Front Playback",
703 TWL4030_REG_AVDAC_CTL
, 1, 0),
704 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear Playback",
705 TWL4030_REG_AVDAC_CTL
, 2, 0),
706 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear Playback",
707 TWL4030_REG_AVDAC_CTL
, 3, 0),
710 SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL
,
712 SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL
,
714 SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL
,
716 SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL
,
719 /* Output MUX controls */
721 SND_SOC_DAPM_VALUE_MUX("Earpiece Mux", SND_SOC_NOPM
, 0, 0,
722 &twl4030_dapm_earpiece_control
),
724 SND_SOC_DAPM_VALUE_MUX("PredriveL Mux", SND_SOC_NOPM
, 0, 0,
725 &twl4030_dapm_predrivel_control
),
726 SND_SOC_DAPM_VALUE_MUX("PredriveR Mux", SND_SOC_NOPM
, 0, 0,
727 &twl4030_dapm_predriver_control
),
729 SND_SOC_DAPM_MUX("HeadsetL Mux", SND_SOC_NOPM
, 0, 0,
730 &twl4030_dapm_hsol_control
),
731 SND_SOC_DAPM_MUX("HeadsetR Mux", SND_SOC_NOPM
, 0, 0,
732 &twl4030_dapm_hsor_control
),
734 SND_SOC_DAPM_MUX("CarkitL Mux", SND_SOC_NOPM
, 0, 0,
735 &twl4030_dapm_carkitl_control
),
736 SND_SOC_DAPM_MUX("CarkitR Mux", SND_SOC_NOPM
, 0, 0,
737 &twl4030_dapm_carkitr_control
),
739 SND_SOC_DAPM_MUX_E("HandsfreeL Mux", TWL4030_REG_HFL_CTL
, 5, 0,
740 &twl4030_dapm_handsfreel_control
, handsfree_event
,
741 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
742 SND_SOC_DAPM_MUX_E("HandsfreeR Mux", TWL4030_REG_HFR_CTL
, 5, 0,
743 &twl4030_dapm_handsfreer_control
, handsfree_event
,
744 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
746 /* Introducing four virtual ADC, since TWL4030 have four channel for
748 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
750 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
752 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
754 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
757 /* Analog/Digital mic path selection.
758 TX1 Left/Right: either analog Left/Right or Digimic0
759 TX2 Left/Right: either analog Left/Right or Digimic1 */
760 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
761 &twl4030_dapm_micpathtx1_control
, micpath_event
,
762 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
763 SND_SOC_DAPM_POST_REG
),
764 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
765 &twl4030_dapm_micpathtx2_control
, micpath_event
,
766 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
767 SND_SOC_DAPM_POST_REG
),
769 /* Analog input muxes with power switch for the physical ADCL/R */
770 SND_SOC_DAPM_VALUE_MUX("Analog Left Capture Route",
771 TWL4030_REG_AVADC_CTL
, 3, 0, &twl4030_dapm_analoglmic_control
),
772 SND_SOC_DAPM_VALUE_MUX("Analog Right Capture Route",
773 TWL4030_REG_AVADC_CTL
, 1, 0, &twl4030_dapm_analogrmic_control
),
775 SND_SOC_DAPM_PGA("Analog Left Amplifier",
776 TWL4030_REG_ANAMICL
, 4, 0, NULL
, 0),
777 SND_SOC_DAPM_PGA("Analog Right Amplifier",
778 TWL4030_REG_ANAMICR
, 4, 0, NULL
, 0),
780 SND_SOC_DAPM_PGA("Digimic0 Enable",
781 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0),
782 SND_SOC_DAPM_PGA("Digimic1 Enable",
783 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0),
785 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
786 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
787 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
790 static const struct snd_soc_dapm_route intercon
[] = {
791 {"ARXL1_APGA", NULL
, "DAC Left1"},
792 {"ARXR1_APGA", NULL
, "DAC Right1"},
793 {"ARXL2_APGA", NULL
, "DAC Left2"},
794 {"ARXR2_APGA", NULL
, "DAC Right2"},
796 /* Internal playback routings */
798 {"Earpiece Mux", "DACL1", "ARXL1_APGA"},
799 {"Earpiece Mux", "DACL2", "ARXL2_APGA"},
800 {"Earpiece Mux", "DACR1", "ARXR1_APGA"},
802 {"PredriveL Mux", "DACL1", "ARXL1_APGA"},
803 {"PredriveL Mux", "DACL2", "ARXL2_APGA"},
804 {"PredriveL Mux", "DACR2", "ARXR2_APGA"},
806 {"PredriveR Mux", "DACR1", "ARXR1_APGA"},
807 {"PredriveR Mux", "DACR2", "ARXR2_APGA"},
808 {"PredriveR Mux", "DACL2", "ARXL2_APGA"},
810 {"HeadsetL Mux", "DACL1", "ARXL1_APGA"},
811 {"HeadsetL Mux", "DACL2", "ARXL2_APGA"},
813 {"HeadsetR Mux", "DACR1", "ARXR1_APGA"},
814 {"HeadsetR Mux", "DACR2", "ARXR2_APGA"},
816 {"CarkitL Mux", "DACL1", "ARXL1_APGA"},
817 {"CarkitL Mux", "DACL2", "ARXL2_APGA"},
819 {"CarkitR Mux", "DACR1", "ARXR1_APGA"},
820 {"CarkitR Mux", "DACR2", "ARXR2_APGA"},
822 {"HandsfreeL Mux", "DACL1", "ARXL1_APGA"},
823 {"HandsfreeL Mux", "DACL2", "ARXL2_APGA"},
824 {"HandsfreeL Mux", "DACR2", "ARXR2_APGA"},
826 {"HandsfreeR Mux", "DACR1", "ARXR1_APGA"},
827 {"HandsfreeR Mux", "DACR2", "ARXR2_APGA"},
828 {"HandsfreeR Mux", "DACL2", "ARXL2_APGA"},
831 {"OUTL", NULL
, "ARXL2_APGA"},
832 {"OUTR", NULL
, "ARXR2_APGA"},
833 {"EARPIECE", NULL
, "Earpiece Mux"},
834 {"PREDRIVEL", NULL
, "PredriveL Mux"},
835 {"PREDRIVER", NULL
, "PredriveR Mux"},
836 {"HSOL", NULL
, "HeadsetL Mux"},
837 {"HSOR", NULL
, "HeadsetR Mux"},
838 {"CARKITL", NULL
, "CarkitL Mux"},
839 {"CARKITR", NULL
, "CarkitR Mux"},
840 {"HFL", NULL
, "HandsfreeL Mux"},
841 {"HFR", NULL
, "HandsfreeR Mux"},
844 {"Analog Left Capture Route", "Main mic", "MAINMIC"},
845 {"Analog Left Capture Route", "Headset mic", "HSMIC"},
846 {"Analog Left Capture Route", "AUXL", "AUXL"},
847 {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"},
849 {"Analog Right Capture Route", "Sub mic", "SUBMIC"},
850 {"Analog Right Capture Route", "AUXR", "AUXR"},
852 {"Analog Left Amplifier", NULL
, "Analog Left Capture Route"},
853 {"Analog Right Amplifier", NULL
, "Analog Right Capture Route"},
855 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
856 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
858 /* TX1 Left capture path */
859 {"TX1 Capture Route", "Analog", "Analog Left Amplifier"},
860 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
861 /* TX1 Right capture path */
862 {"TX1 Capture Route", "Analog", "Analog Right Amplifier"},
863 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
864 /* TX2 Left capture path */
865 {"TX2 Capture Route", "Analog", "Analog Left Amplifier"},
866 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
867 /* TX2 Right capture path */
868 {"TX2 Capture Route", "Analog", "Analog Right Amplifier"},
869 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
871 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
872 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
873 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
874 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
878 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
880 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
881 ARRAY_SIZE(twl4030_dapm_widgets
));
883 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
885 snd_soc_dapm_new_widgets(codec
);
889 static void twl4030_power_up(struct snd_soc_codec
*codec
)
891 u8 anamicl
, regmisc1
, byte
, popn
;
894 /* set CODECPDZ to turn on codec */
895 twl4030_set_codecpdz(codec
);
897 /* initiate offset cancellation */
898 anamicl
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
899 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
900 anamicl
| TWL4030_CNCL_OFFSET_START
);
903 /* wait for offset cancellation to complete */
905 /* this takes a little while, so don't slam i2c */
907 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
908 TWL4030_REG_ANAMICL
);
909 } while ((i
++ < 100) &&
910 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
911 TWL4030_CNCL_OFFSET_START
));
913 /* anti-pop when changing analog gain */
914 regmisc1
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
915 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
916 regmisc1
| TWL4030_SMOOTH_ANAVOL_EN
);
918 /* toggle CODECPDZ as per TRM */
919 twl4030_clear_codecpdz(codec
);
920 twl4030_set_codecpdz(codec
);
922 /* program anti-pop with bias ramp delay */
923 popn
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
924 popn
&= TWL4030_RAMP_DELAY
;
925 popn
|= TWL4030_RAMP_DELAY_645MS
;
926 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
927 popn
|= TWL4030_VMID_EN
;
928 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
930 /* enable anti-pop ramp */
931 popn
|= TWL4030_RAMP_EN
;
932 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
935 static void twl4030_power_down(struct snd_soc_codec
*codec
)
939 /* disable anti-pop ramp */
940 popn
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
941 popn
&= ~TWL4030_RAMP_EN
;
942 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
944 /* disable bias out */
945 popn
&= ~TWL4030_VMID_EN
;
946 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
949 twl4030_clear_codecpdz(codec
);
952 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
953 enum snd_soc_bias_level level
)
956 case SND_SOC_BIAS_ON
:
957 twl4030_power_up(codec
);
959 case SND_SOC_BIAS_PREPARE
:
960 /* TODO: develop a twl4030_prepare function */
962 case SND_SOC_BIAS_STANDBY
:
963 /* TODO: develop a twl4030_standby function */
964 twl4030_power_down(codec
);
966 case SND_SOC_BIAS_OFF
:
967 twl4030_power_down(codec
);
970 codec
->bias_level
= level
;
975 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
976 struct snd_pcm_hw_params
*params
,
977 struct snd_soc_dai
*dai
)
979 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
980 struct snd_soc_device
*socdev
= rtd
->socdev
;
981 struct snd_soc_codec
*codec
= socdev
->codec
;
982 u8 mode
, old_mode
, format
, old_format
;
986 old_mode
= twl4030_read_reg_cache(codec
,
987 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
988 mode
= old_mode
& ~TWL4030_APLL_RATE
;
990 switch (params_rate(params
)) {
992 mode
|= TWL4030_APLL_RATE_8000
;
995 mode
|= TWL4030_APLL_RATE_11025
;
998 mode
|= TWL4030_APLL_RATE_12000
;
1001 mode
|= TWL4030_APLL_RATE_16000
;
1004 mode
|= TWL4030_APLL_RATE_22050
;
1007 mode
|= TWL4030_APLL_RATE_24000
;
1010 mode
|= TWL4030_APLL_RATE_32000
;
1013 mode
|= TWL4030_APLL_RATE_44100
;
1016 mode
|= TWL4030_APLL_RATE_48000
;
1019 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1020 params_rate(params
));
1024 if (mode
!= old_mode
) {
1025 /* change rate and set CODECPDZ */
1026 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1027 twl4030_set_codecpdz(codec
);
1031 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1032 format
= old_format
;
1033 format
&= ~TWL4030_DATA_WIDTH
;
1034 switch (params_format(params
)) {
1035 case SNDRV_PCM_FORMAT_S16_LE
:
1036 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1038 case SNDRV_PCM_FORMAT_S24_LE
:
1039 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1042 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1043 params_format(params
));
1047 if (format
!= old_format
) {
1049 /* clear CODECPDZ before changing format (codec requirement) */
1050 twl4030_clear_codecpdz(codec
);
1053 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1055 /* set CODECPDZ afterwards */
1056 twl4030_set_codecpdz(codec
);
1061 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1062 int clk_id
, unsigned int freq
, int dir
)
1064 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1069 infreq
= TWL4030_APLL_INFREQ_19200KHZ
;
1072 infreq
= TWL4030_APLL_INFREQ_26000KHZ
;
1075 infreq
= TWL4030_APLL_INFREQ_38400KHZ
;
1078 printk(KERN_ERR
"TWL4030 set sysclk: unknown rate %d\n",
1083 infreq
|= TWL4030_APLL_EN
;
1084 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, infreq
);
1089 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1092 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1093 u8 old_format
, format
;
1096 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1097 format
= old_format
;
1099 /* set master/slave audio interface */
1100 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1101 case SND_SOC_DAIFMT_CBM_CFM
:
1102 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1103 format
&= ~(TWL4030_CLK256FS_EN
);
1105 case SND_SOC_DAIFMT_CBS_CFS
:
1106 format
|= TWL4030_AIF_SLAVE_EN
;
1107 format
|= TWL4030_CLK256FS_EN
;
1113 /* interface format */
1114 format
&= ~TWL4030_AIF_FORMAT
;
1115 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1116 case SND_SOC_DAIFMT_I2S
:
1117 format
|= TWL4030_AIF_FORMAT_CODEC
;
1123 if (format
!= old_format
) {
1125 /* clear CODECPDZ before changing format (codec requirement) */
1126 twl4030_clear_codecpdz(codec
);
1129 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1131 /* set CODECPDZ afterwards */
1132 twl4030_set_codecpdz(codec
);
1138 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
1139 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
1141 struct snd_soc_dai twl4030_dai
= {
1144 .stream_name
= "Playback",
1147 .rates
= TWL4030_RATES
,
1148 .formats
= TWL4030_FORMATS
,},
1150 .stream_name
= "Capture",
1153 .rates
= TWL4030_RATES
,
1154 .formats
= TWL4030_FORMATS
,},
1156 .hw_params
= twl4030_hw_params
,
1157 .set_sysclk
= twl4030_set_dai_sysclk
,
1158 .set_fmt
= twl4030_set_dai_fmt
,
1161 EXPORT_SYMBOL_GPL(twl4030_dai
);
1163 static int twl4030_suspend(struct platform_device
*pdev
, pm_message_t state
)
1165 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1166 struct snd_soc_codec
*codec
= socdev
->codec
;
1168 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1173 static int twl4030_resume(struct platform_device
*pdev
)
1175 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1176 struct snd_soc_codec
*codec
= socdev
->codec
;
1178 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1179 twl4030_set_bias_level(codec
, codec
->suspend_bias_level
);
1184 * initialize the driver
1185 * register the mixer and dsp interfaces with the kernel
1188 static int twl4030_init(struct snd_soc_device
*socdev
)
1190 struct snd_soc_codec
*codec
= socdev
->codec
;
1193 printk(KERN_INFO
"TWL4030 Audio Codec init \n");
1195 codec
->name
= "twl4030";
1196 codec
->owner
= THIS_MODULE
;
1197 codec
->read
= twl4030_read_reg_cache
;
1198 codec
->write
= twl4030_write
;
1199 codec
->set_bias_level
= twl4030_set_bias_level
;
1200 codec
->dai
= &twl4030_dai
;
1202 codec
->reg_cache_size
= sizeof(twl4030_reg
);
1203 codec
->reg_cache
= kmemdup(twl4030_reg
, sizeof(twl4030_reg
),
1205 if (codec
->reg_cache
== NULL
)
1209 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1211 printk(KERN_ERR
"twl4030: failed to create pcms\n");
1215 twl4030_init_chip(codec
);
1217 /* power on device */
1218 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1220 snd_soc_add_controls(codec
, twl4030_snd_controls
,
1221 ARRAY_SIZE(twl4030_snd_controls
));
1222 twl4030_add_widgets(codec
);
1224 ret
= snd_soc_init_card(socdev
);
1226 printk(KERN_ERR
"twl4030: failed to register card\n");
1233 snd_soc_free_pcms(socdev
);
1234 snd_soc_dapm_free(socdev
);
1236 kfree(codec
->reg_cache
);
1240 static struct snd_soc_device
*twl4030_socdev
;
1242 static int twl4030_probe(struct platform_device
*pdev
)
1244 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1245 struct snd_soc_codec
*codec
;
1247 codec
= kzalloc(sizeof(struct snd_soc_codec
), GFP_KERNEL
);
1251 socdev
->codec
= codec
;
1252 mutex_init(&codec
->mutex
);
1253 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1254 INIT_LIST_HEAD(&codec
->dapm_paths
);
1256 twl4030_socdev
= socdev
;
1257 twl4030_init(socdev
);
1262 static int twl4030_remove(struct platform_device
*pdev
)
1264 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1265 struct snd_soc_codec
*codec
= socdev
->codec
;
1267 printk(KERN_INFO
"TWL4030 Audio Codec remove\n");
1273 struct snd_soc_codec_device soc_codec_dev_twl4030
= {
1274 .probe
= twl4030_probe
,
1275 .remove
= twl4030_remove
,
1276 .suspend
= twl4030_suspend
,
1277 .resume
= twl4030_resume
,
1279 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030
);
1281 static int __init
twl4030_modinit(void)
1283 return snd_soc_register_dai(&twl4030_dai
);
1285 module_init(twl4030_modinit
);
1287 static void __exit
twl4030_exit(void)
1289 snd_soc_unregister_dai(&twl4030_dai
);
1291 module_exit(twl4030_exit
);
1293 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
1294 MODULE_AUTHOR("Steve Sakoman");
1295 MODULE_LICENSE("GPL");