2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl4030.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
44 0x00, /* this register not used */
45 0x93, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
121 * read twl4030 register cache
123 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
126 u8
*cache
= codec
->reg_cache
;
128 if (reg
>= TWL4030_CACHEREGNUM
)
135 * write twl4030 register cache
137 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
140 u8
*cache
= codec
->reg_cache
;
142 if (reg
>= TWL4030_CACHEREGNUM
)
148 * write to the twl4030 register space
150 static int twl4030_write(struct snd_soc_codec
*codec
,
151 unsigned int reg
, unsigned int value
)
153 twl4030_write_reg_cache(codec
, reg
, value
);
154 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
, value
, reg
);
157 static void twl4030_clear_codecpdz(struct snd_soc_codec
*codec
)
161 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
162 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
,
163 mode
& ~TWL4030_CODECPDZ
);
165 /* REVISIT: this delay is present in TI sample drivers */
166 /* but there seems to be no TRM requirement for it */
170 static void twl4030_set_codecpdz(struct snd_soc_codec
*codec
)
174 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
175 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
,
176 mode
| TWL4030_CODECPDZ
);
178 /* REVISIT: this delay is present in TI sample drivers */
179 /* but there seems to be no TRM requirement for it */
183 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
187 /* clear CODECPDZ prior to setting register defaults */
188 twl4030_clear_codecpdz(codec
);
190 /* set all audio section registers to reasonable defaults */
191 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
192 twl4030_write(codec
, i
, twl4030_reg
[i
]);
197 static const char *twl4030_earpiece_texts
[] =
198 {"Off", "DACL1", "DACL2", "DACR1"};
200 static const unsigned int twl4030_earpiece_values
[] =
201 {0x0, 0x1, 0x2, 0x4};
203 static const struct soc_enum twl4030_earpiece_enum
=
204 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_EAR_CTL
, 1, 0x7,
205 ARRAY_SIZE(twl4030_earpiece_texts
),
206 twl4030_earpiece_texts
,
207 twl4030_earpiece_values
);
209 static const struct snd_kcontrol_new twl4030_dapm_earpiece_control
=
210 SOC_DAPM_VALUE_ENUM("Route", twl4030_earpiece_enum
);
213 static const char *twl4030_predrivel_texts
[] =
214 {"Off", "DACL1", "DACL2", "DACR2"};
216 static const unsigned int twl4030_predrivel_values
[] =
217 {0x0, 0x1, 0x2, 0x4};
219 static const struct soc_enum twl4030_predrivel_enum
=
220 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDL_CTL
, 1, 0x7,
221 ARRAY_SIZE(twl4030_predrivel_texts
),
222 twl4030_predrivel_texts
,
223 twl4030_predrivel_values
);
225 static const struct snd_kcontrol_new twl4030_dapm_predrivel_control
=
226 SOC_DAPM_VALUE_ENUM("Route", twl4030_predrivel_enum
);
229 static const char *twl4030_predriver_texts
[] =
230 {"Off", "DACR1", "DACR2", "DACL2"};
232 static const unsigned int twl4030_predriver_values
[] =
233 {0x0, 0x1, 0x2, 0x4};
235 static const struct soc_enum twl4030_predriver_enum
=
236 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDR_CTL
, 1, 0x7,
237 ARRAY_SIZE(twl4030_predriver_texts
),
238 twl4030_predriver_texts
,
239 twl4030_predriver_values
);
241 static const struct snd_kcontrol_new twl4030_dapm_predriver_control
=
242 SOC_DAPM_VALUE_ENUM("Route", twl4030_predriver_enum
);
245 static const char *twl4030_hsol_texts
[] =
246 {"Off", "DACL1", "DACL2"};
248 static const struct soc_enum twl4030_hsol_enum
=
249 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL
, 1,
250 ARRAY_SIZE(twl4030_hsol_texts
),
253 static const struct snd_kcontrol_new twl4030_dapm_hsol_control
=
254 SOC_DAPM_ENUM("Route", twl4030_hsol_enum
);
257 static const char *twl4030_hsor_texts
[] =
258 {"Off", "DACR1", "DACR2"};
260 static const struct soc_enum twl4030_hsor_enum
=
261 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL
, 4,
262 ARRAY_SIZE(twl4030_hsor_texts
),
265 static const struct snd_kcontrol_new twl4030_dapm_hsor_control
=
266 SOC_DAPM_ENUM("Route", twl4030_hsor_enum
);
269 static const char *twl4030_carkitl_texts
[] =
270 {"Off", "DACL1", "DACL2"};
272 static const struct soc_enum twl4030_carkitl_enum
=
273 SOC_ENUM_SINGLE(TWL4030_REG_PRECKL_CTL
, 1,
274 ARRAY_SIZE(twl4030_carkitl_texts
),
275 twl4030_carkitl_texts
);
277 static const struct snd_kcontrol_new twl4030_dapm_carkitl_control
=
278 SOC_DAPM_ENUM("Route", twl4030_carkitl_enum
);
281 static const char *twl4030_carkitr_texts
[] =
282 {"Off", "DACR1", "DACR2"};
284 static const struct soc_enum twl4030_carkitr_enum
=
285 SOC_ENUM_SINGLE(TWL4030_REG_PRECKR_CTL
, 1,
286 ARRAY_SIZE(twl4030_carkitr_texts
),
287 twl4030_carkitr_texts
);
289 static const struct snd_kcontrol_new twl4030_dapm_carkitr_control
=
290 SOC_DAPM_ENUM("Route", twl4030_carkitr_enum
);
293 static const char *twl4030_handsfreel_texts
[] =
294 {"Voice", "DACL1", "DACL2", "DACR2"};
296 static const struct soc_enum twl4030_handsfreel_enum
=
297 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
298 ARRAY_SIZE(twl4030_handsfreel_texts
),
299 twl4030_handsfreel_texts
);
301 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
302 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
304 /* Handsfree Right */
305 static const char *twl4030_handsfreer_texts
[] =
306 {"Voice", "DACR1", "DACR2", "DACL2"};
308 static const struct soc_enum twl4030_handsfreer_enum
=
309 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
310 ARRAY_SIZE(twl4030_handsfreer_texts
),
311 twl4030_handsfreer_texts
);
313 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
314 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
316 /* Left analog microphone selection */
317 static const char *twl4030_analoglmic_texts
[] =
318 {"Off", "Main mic", "Headset mic", "AUXL", "Carkit mic"};
320 static const unsigned int twl4030_analoglmic_values
[] =
321 {0x0, 0x1, 0x2, 0x4, 0x8};
323 static const struct soc_enum twl4030_analoglmic_enum
=
324 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICL
, 0, 0xf,
325 ARRAY_SIZE(twl4030_analoglmic_texts
),
326 twl4030_analoglmic_texts
,
327 twl4030_analoglmic_values
);
329 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_control
=
330 SOC_DAPM_VALUE_ENUM("Route", twl4030_analoglmic_enum
);
332 /* Right analog microphone selection */
333 static const char *twl4030_analogrmic_texts
[] =
334 {"Off", "Sub mic", "AUXR"};
336 static const unsigned int twl4030_analogrmic_values
[] =
339 static const struct soc_enum twl4030_analogrmic_enum
=
340 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICR
, 0, 0x5,
341 ARRAY_SIZE(twl4030_analogrmic_texts
),
342 twl4030_analogrmic_texts
,
343 twl4030_analogrmic_values
);
345 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_control
=
346 SOC_DAPM_VALUE_ENUM("Route", twl4030_analogrmic_enum
);
348 /* TX1 L/R Analog/Digital microphone selection */
349 static const char *twl4030_micpathtx1_texts
[] =
350 {"Analog", "Digimic0"};
352 static const struct soc_enum twl4030_micpathtx1_enum
=
353 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
354 ARRAY_SIZE(twl4030_micpathtx1_texts
),
355 twl4030_micpathtx1_texts
);
357 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
358 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
360 /* TX2 L/R Analog/Digital microphone selection */
361 static const char *twl4030_micpathtx2_texts
[] =
362 {"Analog", "Digimic1"};
364 static const struct soc_enum twl4030_micpathtx2_enum
=
365 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
366 ARRAY_SIZE(twl4030_micpathtx2_texts
),
367 twl4030_micpathtx2_texts
);
369 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
370 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
372 static int micpath_event(struct snd_soc_dapm_widget
*w
,
373 struct snd_kcontrol
*kcontrol
, int event
)
375 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
376 unsigned char adcmicsel
, micbias_ctl
;
378 adcmicsel
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_ADCMICSEL
);
379 micbias_ctl
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MICBIAS_CTL
);
380 /* Prepare the bits for the given TX path:
381 * shift_l == 0: TX1 microphone path
382 * shift_l == 2: TX2 microphone path */
384 /* TX2 microphone path */
385 if (adcmicsel
& TWL4030_TX2IN_SEL
)
386 micbias_ctl
|= TWL4030_MICBIAS2_CTL
; /* digimic */
388 micbias_ctl
&= ~TWL4030_MICBIAS2_CTL
;
390 /* TX1 microphone path */
391 if (adcmicsel
& TWL4030_TX1IN_SEL
)
392 micbias_ctl
|= TWL4030_MICBIAS1_CTL
; /* digimic */
394 micbias_ctl
&= ~TWL4030_MICBIAS1_CTL
;
397 twl4030_write(w
->codec
, TWL4030_REG_MICBIAS_CTL
, micbias_ctl
);
402 static int handsfree_event(struct snd_soc_dapm_widget
*w
,
403 struct snd_kcontrol
*kcontrol
, int event
)
405 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
406 unsigned char hs_ctl
;
408 hs_ctl
= twl4030_read_reg_cache(w
->codec
, e
->reg
);
410 if (hs_ctl
& TWL4030_HF_CTL_REF_EN
) {
411 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
412 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
413 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
414 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
415 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
416 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
418 hs_ctl
&= ~(TWL4030_HF_CTL_RAMP_EN
| TWL4030_HF_CTL_LOOP_EN
419 | TWL4030_HF_CTL_HB_EN
);
420 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
427 * Some of the gain controls in TWL (mostly those which are associated with
428 * the outputs) are implemented in an interesting way:
429 * 0x0 : Power down (mute)
433 * Inverting not going to help with these.
434 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
436 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
437 xinvert, tlv_array) \
438 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
439 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
440 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
441 .tlv.p = (tlv_array), \
442 .info = snd_soc_info_volsw, \
443 .get = snd_soc_get_volsw_twl4030, \
444 .put = snd_soc_put_volsw_twl4030, \
445 .private_value = (unsigned long)&(struct soc_mixer_control) \
446 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
447 .max = xmax, .invert = xinvert} }
448 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
449 xinvert, tlv_array) \
450 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
451 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
452 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
453 .tlv.p = (tlv_array), \
454 .info = snd_soc_info_volsw_2r, \
455 .get = snd_soc_get_volsw_r2_twl4030,\
456 .put = snd_soc_put_volsw_r2_twl4030, \
457 .private_value = (unsigned long)&(struct soc_mixer_control) \
458 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
459 .rshift = xshift, .max = xmax, .invert = xinvert} }
460 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
461 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
464 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
465 struct snd_ctl_elem_value
*ucontrol
)
467 struct soc_mixer_control
*mc
=
468 (struct soc_mixer_control
*)kcontrol
->private_value
;
469 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
470 unsigned int reg
= mc
->reg
;
471 unsigned int shift
= mc
->shift
;
472 unsigned int rshift
= mc
->rshift
;
474 int mask
= (1 << fls(max
)) - 1;
476 ucontrol
->value
.integer
.value
[0] =
477 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
478 if (ucontrol
->value
.integer
.value
[0])
479 ucontrol
->value
.integer
.value
[0] =
480 max
+ 1 - ucontrol
->value
.integer
.value
[0];
482 if (shift
!= rshift
) {
483 ucontrol
->value
.integer
.value
[1] =
484 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
485 if (ucontrol
->value
.integer
.value
[1])
486 ucontrol
->value
.integer
.value
[1] =
487 max
+ 1 - ucontrol
->value
.integer
.value
[1];
493 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
494 struct snd_ctl_elem_value
*ucontrol
)
496 struct soc_mixer_control
*mc
=
497 (struct soc_mixer_control
*)kcontrol
->private_value
;
498 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
499 unsigned int reg
= mc
->reg
;
500 unsigned int shift
= mc
->shift
;
501 unsigned int rshift
= mc
->rshift
;
503 int mask
= (1 << fls(max
)) - 1;
504 unsigned short val
, val2
, val_mask
;
506 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
508 val_mask
= mask
<< shift
;
512 if (shift
!= rshift
) {
513 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
514 val_mask
|= mask
<< rshift
;
516 val2
= max
+ 1 - val2
;
517 val
|= val2
<< rshift
;
519 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
522 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
523 struct snd_ctl_elem_value
*ucontrol
)
525 struct soc_mixer_control
*mc
=
526 (struct soc_mixer_control
*)kcontrol
->private_value
;
527 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
528 unsigned int reg
= mc
->reg
;
529 unsigned int reg2
= mc
->rreg
;
530 unsigned int shift
= mc
->shift
;
532 int mask
= (1<<fls(max
))-1;
534 ucontrol
->value
.integer
.value
[0] =
535 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
536 ucontrol
->value
.integer
.value
[1] =
537 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
539 if (ucontrol
->value
.integer
.value
[0])
540 ucontrol
->value
.integer
.value
[0] =
541 max
+ 1 - ucontrol
->value
.integer
.value
[0];
542 if (ucontrol
->value
.integer
.value
[1])
543 ucontrol
->value
.integer
.value
[1] =
544 max
+ 1 - ucontrol
->value
.integer
.value
[1];
549 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
550 struct snd_ctl_elem_value
*ucontrol
)
552 struct soc_mixer_control
*mc
=
553 (struct soc_mixer_control
*)kcontrol
->private_value
;
554 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
555 unsigned int reg
= mc
->reg
;
556 unsigned int reg2
= mc
->rreg
;
557 unsigned int shift
= mc
->shift
;
559 int mask
= (1 << fls(max
)) - 1;
561 unsigned short val
, val2
, val_mask
;
563 val_mask
= mask
<< shift
;
564 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
565 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
570 val2
= max
+ 1 - val2
;
573 val2
= val2
<< shift
;
575 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
579 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
584 * FGAIN volume control:
585 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
587 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
590 * CGAIN volume control:
591 * 0 dB to 12 dB in 6 dB steps
592 * value 2 and 3 means 12 dB
594 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
597 * Analog playback gain
598 * -24 dB to 12 dB in 2 dB steps
600 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
603 * Gain controls tied to outputs
604 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
606 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
609 * Capture gain after the ADCs
610 * from 0 dB to 31 dB in 1 dB steps
612 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
615 * Gain control for input amplifiers
616 * 0 dB to 30 dB in 6 dB steps
618 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
620 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
621 /* Common playback gain controls */
622 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
623 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
624 0, 0x3f, 0, digital_fine_tlv
),
625 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
626 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
627 0, 0x3f, 0, digital_fine_tlv
),
629 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
630 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
631 6, 0x2, 0, digital_coarse_tlv
),
632 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
633 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
634 6, 0x2, 0, digital_coarse_tlv
),
636 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
637 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
638 3, 0x12, 1, analog_tlv
),
639 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
640 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
641 3, 0x12, 1, analog_tlv
),
642 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
643 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
645 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
646 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
649 /* Separate output gain controls */
650 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
651 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
652 4, 3, 0, output_tvl
),
654 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
655 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
657 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
658 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
659 4, 3, 0, output_tvl
),
661 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
662 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_tvl
),
664 /* Common capture gain controls */
665 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
666 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
667 0, 0x1f, 0, digital_capture_tlv
),
668 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
669 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
670 0, 0x1f, 0, digital_capture_tlv
),
672 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
673 0, 3, 5, 0, input_gain_tlv
),
676 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
677 /* Left channel inputs */
678 SND_SOC_DAPM_INPUT("MAINMIC"),
679 SND_SOC_DAPM_INPUT("HSMIC"),
680 SND_SOC_DAPM_INPUT("AUXL"),
681 SND_SOC_DAPM_INPUT("CARKITMIC"),
682 /* Right channel inputs */
683 SND_SOC_DAPM_INPUT("SUBMIC"),
684 SND_SOC_DAPM_INPUT("AUXR"),
685 /* Digital microphones (Stereo) */
686 SND_SOC_DAPM_INPUT("DIGIMIC0"),
687 SND_SOC_DAPM_INPUT("DIGIMIC1"),
690 SND_SOC_DAPM_OUTPUT("OUTL"),
691 SND_SOC_DAPM_OUTPUT("OUTR"),
692 SND_SOC_DAPM_OUTPUT("EARPIECE"),
693 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
694 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
695 SND_SOC_DAPM_OUTPUT("HSOL"),
696 SND_SOC_DAPM_OUTPUT("HSOR"),
697 SND_SOC_DAPM_OUTPUT("CARKITL"),
698 SND_SOC_DAPM_OUTPUT("CARKITR"),
699 SND_SOC_DAPM_OUTPUT("HFL"),
700 SND_SOC_DAPM_OUTPUT("HFR"),
703 SND_SOC_DAPM_DAC("DAC Right1", "Right Front Playback",
704 TWL4030_REG_AVDAC_CTL
, 0, 0),
705 SND_SOC_DAPM_DAC("DAC Left1", "Left Front Playback",
706 TWL4030_REG_AVDAC_CTL
, 1, 0),
707 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear Playback",
708 TWL4030_REG_AVDAC_CTL
, 2, 0),
709 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear Playback",
710 TWL4030_REG_AVDAC_CTL
, 3, 0),
713 SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL
,
715 SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL
,
717 SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL
,
719 SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL
,
722 /* Output MUX controls */
724 SND_SOC_DAPM_VALUE_MUX("Earpiece Mux", SND_SOC_NOPM
, 0, 0,
725 &twl4030_dapm_earpiece_control
),
727 SND_SOC_DAPM_VALUE_MUX("PredriveL Mux", SND_SOC_NOPM
, 0, 0,
728 &twl4030_dapm_predrivel_control
),
729 SND_SOC_DAPM_VALUE_MUX("PredriveR Mux", SND_SOC_NOPM
, 0, 0,
730 &twl4030_dapm_predriver_control
),
732 SND_SOC_DAPM_MUX("HeadsetL Mux", SND_SOC_NOPM
, 0, 0,
733 &twl4030_dapm_hsol_control
),
734 SND_SOC_DAPM_MUX("HeadsetR Mux", SND_SOC_NOPM
, 0, 0,
735 &twl4030_dapm_hsor_control
),
737 SND_SOC_DAPM_MUX("CarkitL Mux", SND_SOC_NOPM
, 0, 0,
738 &twl4030_dapm_carkitl_control
),
739 SND_SOC_DAPM_MUX("CarkitR Mux", SND_SOC_NOPM
, 0, 0,
740 &twl4030_dapm_carkitr_control
),
742 SND_SOC_DAPM_MUX_E("HandsfreeL Mux", TWL4030_REG_HFL_CTL
, 5, 0,
743 &twl4030_dapm_handsfreel_control
, handsfree_event
,
744 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
745 SND_SOC_DAPM_MUX_E("HandsfreeR Mux", TWL4030_REG_HFR_CTL
, 5, 0,
746 &twl4030_dapm_handsfreer_control
, handsfree_event
,
747 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
749 /* Introducing four virtual ADC, since TWL4030 have four channel for
751 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
753 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
755 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
757 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
760 /* Analog/Digital mic path selection.
761 TX1 Left/Right: either analog Left/Right or Digimic0
762 TX2 Left/Right: either analog Left/Right or Digimic1 */
763 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
764 &twl4030_dapm_micpathtx1_control
, micpath_event
,
765 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
766 SND_SOC_DAPM_POST_REG
),
767 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
768 &twl4030_dapm_micpathtx2_control
, micpath_event
,
769 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
770 SND_SOC_DAPM_POST_REG
),
772 /* Analog input muxes with power switch for the physical ADCL/R */
773 SND_SOC_DAPM_VALUE_MUX("Analog Left Capture Route",
774 TWL4030_REG_AVADC_CTL
, 3, 0, &twl4030_dapm_analoglmic_control
),
775 SND_SOC_DAPM_VALUE_MUX("Analog Right Capture Route",
776 TWL4030_REG_AVADC_CTL
, 1, 0, &twl4030_dapm_analogrmic_control
),
778 SND_SOC_DAPM_PGA("Analog Left Amplifier",
779 TWL4030_REG_ANAMICL
, 4, 0, NULL
, 0),
780 SND_SOC_DAPM_PGA("Analog Right Amplifier",
781 TWL4030_REG_ANAMICR
, 4, 0, NULL
, 0),
783 SND_SOC_DAPM_PGA("Digimic0 Enable",
784 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0),
785 SND_SOC_DAPM_PGA("Digimic1 Enable",
786 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0),
788 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
789 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
790 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
793 static const struct snd_soc_dapm_route intercon
[] = {
794 {"ARXL1_APGA", NULL
, "DAC Left1"},
795 {"ARXR1_APGA", NULL
, "DAC Right1"},
796 {"ARXL2_APGA", NULL
, "DAC Left2"},
797 {"ARXR2_APGA", NULL
, "DAC Right2"},
799 /* Internal playback routings */
801 {"Earpiece Mux", "DACL1", "ARXL1_APGA"},
802 {"Earpiece Mux", "DACL2", "ARXL2_APGA"},
803 {"Earpiece Mux", "DACR1", "ARXR1_APGA"},
805 {"PredriveL Mux", "DACL1", "ARXL1_APGA"},
806 {"PredriveL Mux", "DACL2", "ARXL2_APGA"},
807 {"PredriveL Mux", "DACR2", "ARXR2_APGA"},
809 {"PredriveR Mux", "DACR1", "ARXR1_APGA"},
810 {"PredriveR Mux", "DACR2", "ARXR2_APGA"},
811 {"PredriveR Mux", "DACL2", "ARXL2_APGA"},
813 {"HeadsetL Mux", "DACL1", "ARXL1_APGA"},
814 {"HeadsetL Mux", "DACL2", "ARXL2_APGA"},
816 {"HeadsetR Mux", "DACR1", "ARXR1_APGA"},
817 {"HeadsetR Mux", "DACR2", "ARXR2_APGA"},
819 {"CarkitL Mux", "DACL1", "ARXL1_APGA"},
820 {"CarkitL Mux", "DACL2", "ARXL2_APGA"},
822 {"CarkitR Mux", "DACR1", "ARXR1_APGA"},
823 {"CarkitR Mux", "DACR2", "ARXR2_APGA"},
825 {"HandsfreeL Mux", "DACL1", "ARXL1_APGA"},
826 {"HandsfreeL Mux", "DACL2", "ARXL2_APGA"},
827 {"HandsfreeL Mux", "DACR2", "ARXR2_APGA"},
829 {"HandsfreeR Mux", "DACR1", "ARXR1_APGA"},
830 {"HandsfreeR Mux", "DACR2", "ARXR2_APGA"},
831 {"HandsfreeR Mux", "DACL2", "ARXL2_APGA"},
834 {"OUTL", NULL
, "ARXL2_APGA"},
835 {"OUTR", NULL
, "ARXR2_APGA"},
836 {"EARPIECE", NULL
, "Earpiece Mux"},
837 {"PREDRIVEL", NULL
, "PredriveL Mux"},
838 {"PREDRIVER", NULL
, "PredriveR Mux"},
839 {"HSOL", NULL
, "HeadsetL Mux"},
840 {"HSOR", NULL
, "HeadsetR Mux"},
841 {"CARKITL", NULL
, "CarkitL Mux"},
842 {"CARKITR", NULL
, "CarkitR Mux"},
843 {"HFL", NULL
, "HandsfreeL Mux"},
844 {"HFR", NULL
, "HandsfreeR Mux"},
847 {"Analog Left Capture Route", "Main mic", "MAINMIC"},
848 {"Analog Left Capture Route", "Headset mic", "HSMIC"},
849 {"Analog Left Capture Route", "AUXL", "AUXL"},
850 {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"},
852 {"Analog Right Capture Route", "Sub mic", "SUBMIC"},
853 {"Analog Right Capture Route", "AUXR", "AUXR"},
855 {"Analog Left Amplifier", NULL
, "Analog Left Capture Route"},
856 {"Analog Right Amplifier", NULL
, "Analog Right Capture Route"},
858 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
859 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
861 /* TX1 Left capture path */
862 {"TX1 Capture Route", "Analog", "Analog Left Amplifier"},
863 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
864 /* TX1 Right capture path */
865 {"TX1 Capture Route", "Analog", "Analog Right Amplifier"},
866 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
867 /* TX2 Left capture path */
868 {"TX2 Capture Route", "Analog", "Analog Left Amplifier"},
869 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
870 /* TX2 Right capture path */
871 {"TX2 Capture Route", "Analog", "Analog Right Amplifier"},
872 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
874 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
875 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
876 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
877 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
881 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
883 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
884 ARRAY_SIZE(twl4030_dapm_widgets
));
886 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
888 snd_soc_dapm_new_widgets(codec
);
892 static void twl4030_power_up(struct snd_soc_codec
*codec
)
894 u8 anamicl
, regmisc1
, byte
, popn
;
897 /* set CODECPDZ to turn on codec */
898 twl4030_set_codecpdz(codec
);
900 /* initiate offset cancellation */
901 anamicl
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
902 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
903 anamicl
| TWL4030_CNCL_OFFSET_START
);
906 /* wait for offset cancellation to complete */
908 /* this takes a little while, so don't slam i2c */
910 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
911 TWL4030_REG_ANAMICL
);
912 } while ((i
++ < 100) &&
913 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
914 TWL4030_CNCL_OFFSET_START
));
916 /* anti-pop when changing analog gain */
917 regmisc1
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
918 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
919 regmisc1
| TWL4030_SMOOTH_ANAVOL_EN
);
921 /* toggle CODECPDZ as per TRM */
922 twl4030_clear_codecpdz(codec
);
923 twl4030_set_codecpdz(codec
);
925 /* program anti-pop with bias ramp delay */
926 popn
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
927 popn
&= TWL4030_RAMP_DELAY
;
928 popn
|= TWL4030_RAMP_DELAY_645MS
;
929 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
930 popn
|= TWL4030_VMID_EN
;
931 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
933 /* enable anti-pop ramp */
934 popn
|= TWL4030_RAMP_EN
;
935 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
938 static void twl4030_power_down(struct snd_soc_codec
*codec
)
942 /* disable anti-pop ramp */
943 popn
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
944 popn
&= ~TWL4030_RAMP_EN
;
945 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
947 /* disable bias out */
948 popn
&= ~TWL4030_VMID_EN
;
949 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
952 twl4030_clear_codecpdz(codec
);
955 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
956 enum snd_soc_bias_level level
)
959 case SND_SOC_BIAS_ON
:
960 twl4030_power_up(codec
);
962 case SND_SOC_BIAS_PREPARE
:
963 /* TODO: develop a twl4030_prepare function */
965 case SND_SOC_BIAS_STANDBY
:
966 /* TODO: develop a twl4030_standby function */
967 twl4030_power_down(codec
);
969 case SND_SOC_BIAS_OFF
:
970 twl4030_power_down(codec
);
973 codec
->bias_level
= level
;
978 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
979 struct snd_pcm_hw_params
*params
,
980 struct snd_soc_dai
*dai
)
982 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
983 struct snd_soc_device
*socdev
= rtd
->socdev
;
984 struct snd_soc_codec
*codec
= socdev
->codec
;
985 u8 mode
, old_mode
, format
, old_format
;
989 old_mode
= twl4030_read_reg_cache(codec
,
990 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
991 mode
= old_mode
& ~TWL4030_APLL_RATE
;
993 switch (params_rate(params
)) {
995 mode
|= TWL4030_APLL_RATE_8000
;
998 mode
|= TWL4030_APLL_RATE_11025
;
1001 mode
|= TWL4030_APLL_RATE_12000
;
1004 mode
|= TWL4030_APLL_RATE_16000
;
1007 mode
|= TWL4030_APLL_RATE_22050
;
1010 mode
|= TWL4030_APLL_RATE_24000
;
1013 mode
|= TWL4030_APLL_RATE_32000
;
1016 mode
|= TWL4030_APLL_RATE_44100
;
1019 mode
|= TWL4030_APLL_RATE_48000
;
1022 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1023 params_rate(params
));
1027 if (mode
!= old_mode
) {
1028 /* change rate and set CODECPDZ */
1029 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1030 twl4030_set_codecpdz(codec
);
1034 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1035 format
= old_format
;
1036 format
&= ~TWL4030_DATA_WIDTH
;
1037 switch (params_format(params
)) {
1038 case SNDRV_PCM_FORMAT_S16_LE
:
1039 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1041 case SNDRV_PCM_FORMAT_S24_LE
:
1042 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1045 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1046 params_format(params
));
1050 if (format
!= old_format
) {
1052 /* clear CODECPDZ before changing format (codec requirement) */
1053 twl4030_clear_codecpdz(codec
);
1056 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1058 /* set CODECPDZ afterwards */
1059 twl4030_set_codecpdz(codec
);
1064 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1065 int clk_id
, unsigned int freq
, int dir
)
1067 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1072 infreq
= TWL4030_APLL_INFREQ_19200KHZ
;
1075 infreq
= TWL4030_APLL_INFREQ_26000KHZ
;
1078 infreq
= TWL4030_APLL_INFREQ_38400KHZ
;
1081 printk(KERN_ERR
"TWL4030 set sysclk: unknown rate %d\n",
1086 infreq
|= TWL4030_APLL_EN
;
1087 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, infreq
);
1092 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1095 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1096 u8 old_format
, format
;
1099 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1100 format
= old_format
;
1102 /* set master/slave audio interface */
1103 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1104 case SND_SOC_DAIFMT_CBM_CFM
:
1105 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1106 format
&= ~(TWL4030_CLK256FS_EN
);
1108 case SND_SOC_DAIFMT_CBS_CFS
:
1109 format
|= TWL4030_AIF_SLAVE_EN
;
1110 format
|= TWL4030_CLK256FS_EN
;
1116 /* interface format */
1117 format
&= ~TWL4030_AIF_FORMAT
;
1118 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1119 case SND_SOC_DAIFMT_I2S
:
1120 format
|= TWL4030_AIF_FORMAT_CODEC
;
1126 if (format
!= old_format
) {
1128 /* clear CODECPDZ before changing format (codec requirement) */
1129 twl4030_clear_codecpdz(codec
);
1132 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1134 /* set CODECPDZ afterwards */
1135 twl4030_set_codecpdz(codec
);
1141 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
1142 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
1144 struct snd_soc_dai twl4030_dai
= {
1147 .stream_name
= "Playback",
1150 .rates
= TWL4030_RATES
,
1151 .formats
= TWL4030_FORMATS
,},
1153 .stream_name
= "Capture",
1156 .rates
= TWL4030_RATES
,
1157 .formats
= TWL4030_FORMATS
,},
1159 .hw_params
= twl4030_hw_params
,
1160 .set_sysclk
= twl4030_set_dai_sysclk
,
1161 .set_fmt
= twl4030_set_dai_fmt
,
1164 EXPORT_SYMBOL_GPL(twl4030_dai
);
1166 static int twl4030_suspend(struct platform_device
*pdev
, pm_message_t state
)
1168 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1169 struct snd_soc_codec
*codec
= socdev
->codec
;
1171 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1176 static int twl4030_resume(struct platform_device
*pdev
)
1178 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1179 struct snd_soc_codec
*codec
= socdev
->codec
;
1181 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1182 twl4030_set_bias_level(codec
, codec
->suspend_bias_level
);
1187 * initialize the driver
1188 * register the mixer and dsp interfaces with the kernel
1191 static int twl4030_init(struct snd_soc_device
*socdev
)
1193 struct snd_soc_codec
*codec
= socdev
->codec
;
1196 printk(KERN_INFO
"TWL4030 Audio Codec init \n");
1198 codec
->name
= "twl4030";
1199 codec
->owner
= THIS_MODULE
;
1200 codec
->read
= twl4030_read_reg_cache
;
1201 codec
->write
= twl4030_write
;
1202 codec
->set_bias_level
= twl4030_set_bias_level
;
1203 codec
->dai
= &twl4030_dai
;
1205 codec
->reg_cache_size
= sizeof(twl4030_reg
);
1206 codec
->reg_cache
= kmemdup(twl4030_reg
, sizeof(twl4030_reg
),
1208 if (codec
->reg_cache
== NULL
)
1212 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1214 printk(KERN_ERR
"twl4030: failed to create pcms\n");
1218 twl4030_init_chip(codec
);
1220 /* power on device */
1221 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1223 snd_soc_add_controls(codec
, twl4030_snd_controls
,
1224 ARRAY_SIZE(twl4030_snd_controls
));
1225 twl4030_add_widgets(codec
);
1227 ret
= snd_soc_init_card(socdev
);
1229 printk(KERN_ERR
"twl4030: failed to register card\n");
1236 snd_soc_free_pcms(socdev
);
1237 snd_soc_dapm_free(socdev
);
1239 kfree(codec
->reg_cache
);
1243 static struct snd_soc_device
*twl4030_socdev
;
1245 static int twl4030_probe(struct platform_device
*pdev
)
1247 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1248 struct snd_soc_codec
*codec
;
1250 codec
= kzalloc(sizeof(struct snd_soc_codec
), GFP_KERNEL
);
1254 socdev
->codec
= codec
;
1255 mutex_init(&codec
->mutex
);
1256 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1257 INIT_LIST_HEAD(&codec
->dapm_paths
);
1259 twl4030_socdev
= socdev
;
1260 twl4030_init(socdev
);
1265 static int twl4030_remove(struct platform_device
*pdev
)
1267 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1268 struct snd_soc_codec
*codec
= socdev
->codec
;
1270 printk(KERN_INFO
"TWL4030 Audio Codec remove\n");
1271 snd_soc_free_pcms(socdev
);
1272 snd_soc_dapm_free(socdev
);
1278 struct snd_soc_codec_device soc_codec_dev_twl4030
= {
1279 .probe
= twl4030_probe
,
1280 .remove
= twl4030_remove
,
1281 .suspend
= twl4030_suspend
,
1282 .resume
= twl4030_resume
,
1284 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030
);
1286 static int __init
twl4030_modinit(void)
1288 return snd_soc_register_dai(&twl4030_dai
);
1290 module_init(twl4030_modinit
);
1292 static void __exit
twl4030_exit(void)
1294 snd_soc_unregister_dai(&twl4030_dai
);
1296 module_exit(twl4030_exit
);
1298 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
1299 MODULE_AUTHOR("Steve Sakoman");
1300 MODULE_LICENSE("GPL");