2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl4030.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
44 0x00, /* this register not used */
45 0x91, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
118 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
121 /* codec private data */
122 struct twl4030_priv
{
123 struct snd_soc_codec codec
;
125 unsigned int bypass_state
;
126 unsigned int codec_powered
;
127 unsigned int codec_muted
;
129 struct snd_pcm_substream
*master_substream
;
130 struct snd_pcm_substream
*slave_substream
;
132 unsigned int configured
;
134 unsigned int sample_bits
;
135 unsigned int channels
;
139 /* Headset output state handling */
140 unsigned int hsl_enabled
;
141 unsigned int hsr_enabled
;
145 * read twl4030 register cache
147 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
150 u8
*cache
= codec
->reg_cache
;
152 if (reg
>= TWL4030_CACHEREGNUM
)
159 * write twl4030 register cache
161 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
164 u8
*cache
= codec
->reg_cache
;
166 if (reg
>= TWL4030_CACHEREGNUM
)
172 * write to the twl4030 register space
174 static int twl4030_write(struct snd_soc_codec
*codec
,
175 unsigned int reg
, unsigned int value
)
177 twl4030_write_reg_cache(codec
, reg
, value
);
178 if (likely(reg
< TWL4030_REG_SW_SHADOW
))
179 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
, value
,
185 static void twl4030_codec_enable(struct snd_soc_codec
*codec
, int enable
)
187 struct twl4030_priv
*twl4030
= codec
->private_data
;
190 if (enable
== twl4030
->codec_powered
)
194 mode
= twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER
);
196 mode
= twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER
);
199 twl4030_write_reg_cache(codec
, TWL4030_REG_CODEC_MODE
, mode
);
200 twl4030
->codec_powered
= enable
;
203 /* REVISIT: this delay is present in TI sample drivers */
204 /* but there seems to be no TRM requirement for it */
208 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
210 u8
*cache
= codec
->reg_cache
;
213 /* clear CODECPDZ prior to setting register defaults */
214 twl4030_codec_enable(codec
, 0);
216 /* set all audio section registers to reasonable defaults */
217 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
218 twl4030_write(codec
, i
, cache
[i
]);
222 static void twl4030_codec_mute(struct snd_soc_codec
*codec
, int mute
)
224 struct twl4030_priv
*twl4030
= codec
->private_data
;
227 if (mute
== twl4030
->codec_muted
)
232 status
= twl4030_codec_disable_resource(TWL4030_CODEC_RES_APLL
);
235 status
= twl4030_codec_enable_resource(TWL4030_CODEC_RES_APLL
);
238 twl4030_write_reg_cache(codec
, TWL4030_REG_APLL_CTL
, status
);
240 twl4030
->codec_muted
= mute
;
243 static void twl4030_power_up(struct snd_soc_codec
*codec
)
245 struct twl4030_priv
*twl4030
= codec
->private_data
;
246 u8 anamicl
, regmisc1
, byte
;
249 if (twl4030
->codec_powered
)
252 /* set CODECPDZ to turn on codec */
253 twl4030_codec_enable(codec
, 1);
255 /* initiate offset cancellation */
256 anamicl
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
257 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
258 anamicl
| TWL4030_CNCL_OFFSET_START
);
260 /* wait for offset cancellation to complete */
262 /* this takes a little while, so don't slam i2c */
264 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
265 TWL4030_REG_ANAMICL
);
266 } while ((i
++ < 100) &&
267 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
268 TWL4030_CNCL_OFFSET_START
));
270 /* Make sure that the reg_cache has the same value as the HW */
271 twl4030_write_reg_cache(codec
, TWL4030_REG_ANAMICL
, byte
);
273 /* anti-pop when changing analog gain */
274 regmisc1
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
275 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
276 regmisc1
| TWL4030_SMOOTH_ANAVOL_EN
);
278 /* toggle CODECPDZ as per TRM */
279 twl4030_codec_enable(codec
, 0);
280 twl4030_codec_enable(codec
, 1);
284 * Unconditional power down
286 static void twl4030_power_down(struct snd_soc_codec
*codec
)
289 twl4030_codec_enable(codec
, 0);
293 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls
[] = {
294 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL
, 0, 1, 0),
295 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL
, 1, 1, 0),
296 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL
, 2, 1, 0),
297 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL
, 3, 1, 0),
301 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls
[] = {
302 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL
, 0, 1, 0),
303 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL
, 1, 1, 0),
304 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL
, 2, 1, 0),
305 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL
, 3, 1, 0),
309 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls
[] = {
310 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL
, 0, 1, 0),
311 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL
, 1, 1, 0),
312 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL
, 2, 1, 0),
313 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL
, 3, 1, 0),
317 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls
[] = {
318 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 0, 1, 0),
319 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL
, 1, 1, 0),
320 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL
, 2, 1, 0),
324 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls
[] = {
325 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 3, 1, 0),
326 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL
, 4, 1, 0),
327 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL
, 5, 1, 0),
331 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls
[] = {
332 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL
, 0, 1, 0),
333 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL
, 1, 1, 0),
334 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL
, 2, 1, 0),
338 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls
[] = {
339 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL
, 0, 1, 0),
340 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL
, 1, 1, 0),
341 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL
, 2, 1, 0),
345 static const char *twl4030_handsfreel_texts
[] =
346 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
348 static const struct soc_enum twl4030_handsfreel_enum
=
349 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
350 ARRAY_SIZE(twl4030_handsfreel_texts
),
351 twl4030_handsfreel_texts
);
353 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
354 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
356 /* Handsfree Left virtual mute */
357 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control
=
358 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW
, 0, 1, 0);
360 /* Handsfree Right */
361 static const char *twl4030_handsfreer_texts
[] =
362 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
364 static const struct soc_enum twl4030_handsfreer_enum
=
365 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
366 ARRAY_SIZE(twl4030_handsfreer_texts
),
367 twl4030_handsfreer_texts
);
369 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
370 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
372 /* Handsfree Right virtual mute */
373 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control
=
374 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW
, 1, 1, 0);
377 /* Vibra audio path selection */
378 static const char *twl4030_vibra_texts
[] =
379 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
381 static const struct soc_enum twl4030_vibra_enum
=
382 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 2,
383 ARRAY_SIZE(twl4030_vibra_texts
),
384 twl4030_vibra_texts
);
386 static const struct snd_kcontrol_new twl4030_dapm_vibra_control
=
387 SOC_DAPM_ENUM("Route", twl4030_vibra_enum
);
389 /* Vibra path selection: local vibrator (PWM) or audio driven */
390 static const char *twl4030_vibrapath_texts
[] =
391 {"Local vibrator", "Audio"};
393 static const struct soc_enum twl4030_vibrapath_enum
=
394 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 4,
395 ARRAY_SIZE(twl4030_vibrapath_texts
),
396 twl4030_vibrapath_texts
);
398 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control
=
399 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum
);
401 /* Left analog microphone selection */
402 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls
[] = {
403 SOC_DAPM_SINGLE("Main Mic Capture Switch",
404 TWL4030_REG_ANAMICL
, 0, 1, 0),
405 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
406 TWL4030_REG_ANAMICL
, 1, 1, 0),
407 SOC_DAPM_SINGLE("AUXL Capture Switch",
408 TWL4030_REG_ANAMICL
, 2, 1, 0),
409 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
410 TWL4030_REG_ANAMICL
, 3, 1, 0),
413 /* Right analog microphone selection */
414 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls
[] = {
415 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR
, 0, 1, 0),
416 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR
, 2, 1, 0),
419 /* TX1 L/R Analog/Digital microphone selection */
420 static const char *twl4030_micpathtx1_texts
[] =
421 {"Analog", "Digimic0"};
423 static const struct soc_enum twl4030_micpathtx1_enum
=
424 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
425 ARRAY_SIZE(twl4030_micpathtx1_texts
),
426 twl4030_micpathtx1_texts
);
428 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
429 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
431 /* TX2 L/R Analog/Digital microphone selection */
432 static const char *twl4030_micpathtx2_texts
[] =
433 {"Analog", "Digimic1"};
435 static const struct soc_enum twl4030_micpathtx2_enum
=
436 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
437 ARRAY_SIZE(twl4030_micpathtx2_texts
),
438 twl4030_micpathtx2_texts
);
440 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
441 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
443 /* Analog bypass for AudioR1 */
444 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control
=
445 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL
, 2, 1, 0);
447 /* Analog bypass for AudioL1 */
448 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control
=
449 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL
, 2, 1, 0);
451 /* Analog bypass for AudioR2 */
452 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control
=
453 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL
, 2, 1, 0);
455 /* Analog bypass for AudioL2 */
456 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control
=
457 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL
, 2, 1, 0);
459 /* Analog bypass for Voice */
460 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control
=
461 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL
, 2, 1, 0);
463 /* Digital bypass gain, 0 mutes the bypass */
464 static const unsigned int twl4030_dapm_dbypass_tlv
[] = {
465 TLV_DB_RANGE_HEAD(2),
466 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
467 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
470 /* Digital bypass left (TX1L -> RX2L) */
471 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control
=
472 SOC_DAPM_SINGLE_TLV("Volume",
473 TWL4030_REG_ATX2ARXPGA
, 3, 7, 0,
474 twl4030_dapm_dbypass_tlv
);
476 /* Digital bypass right (TX1R -> RX2R) */
477 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control
=
478 SOC_DAPM_SINGLE_TLV("Volume",
479 TWL4030_REG_ATX2ARXPGA
, 0, 7, 0,
480 twl4030_dapm_dbypass_tlv
);
483 * Voice Sidetone GAIN volume control:
484 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
486 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv
, -5100, 100, 1);
488 /* Digital bypass voice: sidetone (VUL -> VDL)*/
489 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control
=
490 SOC_DAPM_SINGLE_TLV("Volume",
491 TWL4030_REG_VSTPGA
, 0, 0x29, 0,
492 twl4030_dapm_dbypassv_tlv
);
494 static int micpath_event(struct snd_soc_dapm_widget
*w
,
495 struct snd_kcontrol
*kcontrol
, int event
)
497 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
498 unsigned char adcmicsel
, micbias_ctl
;
500 adcmicsel
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_ADCMICSEL
);
501 micbias_ctl
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MICBIAS_CTL
);
502 /* Prepare the bits for the given TX path:
503 * shift_l == 0: TX1 microphone path
504 * shift_l == 2: TX2 microphone path */
506 /* TX2 microphone path */
507 if (adcmicsel
& TWL4030_TX2IN_SEL
)
508 micbias_ctl
|= TWL4030_MICBIAS2_CTL
; /* digimic */
510 micbias_ctl
&= ~TWL4030_MICBIAS2_CTL
;
512 /* TX1 microphone path */
513 if (adcmicsel
& TWL4030_TX1IN_SEL
)
514 micbias_ctl
|= TWL4030_MICBIAS1_CTL
; /* digimic */
516 micbias_ctl
&= ~TWL4030_MICBIAS1_CTL
;
519 twl4030_write(w
->codec
, TWL4030_REG_MICBIAS_CTL
, micbias_ctl
);
525 * Output PGA builder:
526 * Handle the muting and unmuting of the given output (turning off the
527 * amplifier associated with the output pin)
528 * On mute bypass the reg_cache and mute the volume
529 * On unmute: restore the register content
530 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
532 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
533 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
534 struct snd_kcontrol *kcontrol, int event) \
539 case SND_SOC_DAPM_POST_PMU: \
540 twl4030_write(w->codec, reg, \
541 twl4030_read_reg_cache(w->codec, reg)); \
543 case SND_SOC_DAPM_POST_PMD: \
544 reg_val = twl4030_read_reg_cache(w->codec, reg); \
545 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
553 TWL4030_OUTPUT_PGA(earpiece
, TWL4030_REG_EAR_CTL
, TWL4030_EAR_GAIN
);
554 TWL4030_OUTPUT_PGA(predrivel
, TWL4030_REG_PREDL_CTL
, TWL4030_PREDL_GAIN
);
555 TWL4030_OUTPUT_PGA(predriver
, TWL4030_REG_PREDR_CTL
, TWL4030_PREDR_GAIN
);
556 TWL4030_OUTPUT_PGA(carkitl
, TWL4030_REG_PRECKL_CTL
, TWL4030_PRECKL_GAIN
);
557 TWL4030_OUTPUT_PGA(carkitr
, TWL4030_REG_PRECKR_CTL
, TWL4030_PRECKR_GAIN
);
559 static void handsfree_ramp(struct snd_soc_codec
*codec
, int reg
, int ramp
)
561 unsigned char hs_ctl
;
563 hs_ctl
= twl4030_read_reg_cache(codec
, reg
);
567 hs_ctl
|= TWL4030_HF_CTL_REF_EN
;
568 twl4030_write(codec
, reg
, hs_ctl
);
570 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
571 twl4030_write(codec
, reg
, hs_ctl
);
573 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
574 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
575 twl4030_write(codec
, reg
, hs_ctl
);
578 hs_ctl
&= ~TWL4030_HF_CTL_LOOP_EN
;
579 hs_ctl
&= ~TWL4030_HF_CTL_HB_EN
;
580 twl4030_write(codec
, reg
, hs_ctl
);
581 hs_ctl
&= ~TWL4030_HF_CTL_RAMP_EN
;
582 twl4030_write(codec
, reg
, hs_ctl
);
584 hs_ctl
&= ~TWL4030_HF_CTL_REF_EN
;
585 twl4030_write(codec
, reg
, hs_ctl
);
589 static int handsfreelpga_event(struct snd_soc_dapm_widget
*w
,
590 struct snd_kcontrol
*kcontrol
, int event
)
593 case SND_SOC_DAPM_POST_PMU
:
594 handsfree_ramp(w
->codec
, TWL4030_REG_HFL_CTL
, 1);
596 case SND_SOC_DAPM_POST_PMD
:
597 handsfree_ramp(w
->codec
, TWL4030_REG_HFL_CTL
, 0);
603 static int handsfreerpga_event(struct snd_soc_dapm_widget
*w
,
604 struct snd_kcontrol
*kcontrol
, int event
)
607 case SND_SOC_DAPM_POST_PMU
:
608 handsfree_ramp(w
->codec
, TWL4030_REG_HFR_CTL
, 1);
610 case SND_SOC_DAPM_POST_PMD
:
611 handsfree_ramp(w
->codec
, TWL4030_REG_HFR_CTL
, 0);
617 static void headset_ramp(struct snd_soc_codec
*codec
, int ramp
)
619 struct snd_soc_device
*socdev
= codec
->socdev
;
620 struct twl4030_setup_data
*setup
= socdev
->codec_data
;
622 unsigned char hs_gain
, hs_pop
;
623 struct twl4030_priv
*twl4030
= codec
->private_data
;
624 /* Base values for ramp delay calculation: 2^19 - 2^26 */
625 unsigned int ramp_base
[] = {524288, 1048576, 2097152, 4194304,
626 8388608, 16777216, 33554432, 67108864};
628 hs_gain
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_GAIN_SET
);
629 hs_pop
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
631 /* Enable external mute control, this dramatically reduces
633 if (setup
&& setup
->hs_extmute
) {
634 if (setup
->set_hs_extmute
) {
635 setup
->set_hs_extmute(1);
637 hs_pop
|= TWL4030_EXTMUTE
;
638 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
643 /* Headset ramp-up according to the TRM */
644 hs_pop
|= TWL4030_VMID_EN
;
645 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
646 twl4030_write(codec
, TWL4030_REG_HS_GAIN_SET
, hs_gain
);
647 hs_pop
|= TWL4030_RAMP_EN
;
648 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
649 /* Wait ramp delay time + 1, so the VMID can settle */
650 mdelay((ramp_base
[(hs_pop
& TWL4030_RAMP_DELAY
) >> 2] /
651 twl4030
->sysclk
) + 1);
653 /* Headset ramp-down _not_ according to
654 * the TRM, but in a way that it is working */
655 hs_pop
&= ~TWL4030_RAMP_EN
;
656 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
657 /* Wait ramp delay time + 1, so the VMID can settle */
658 mdelay((ramp_base
[(hs_pop
& TWL4030_RAMP_DELAY
) >> 2] /
659 twl4030
->sysclk
) + 1);
660 /* Bypass the reg_cache to mute the headset */
661 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
663 TWL4030_REG_HS_GAIN_SET
);
665 hs_pop
&= ~TWL4030_VMID_EN
;
666 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
669 /* Disable external mute */
670 if (setup
&& setup
->hs_extmute
) {
671 if (setup
->set_hs_extmute
) {
672 setup
->set_hs_extmute(0);
674 hs_pop
&= ~TWL4030_EXTMUTE
;
675 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
680 static int headsetlpga_event(struct snd_soc_dapm_widget
*w
,
681 struct snd_kcontrol
*kcontrol
, int event
)
683 struct twl4030_priv
*twl4030
= w
->codec
->private_data
;
686 case SND_SOC_DAPM_POST_PMU
:
687 /* Do the ramp-up only once */
688 if (!twl4030
->hsr_enabled
)
689 headset_ramp(w
->codec
, 1);
691 twl4030
->hsl_enabled
= 1;
693 case SND_SOC_DAPM_POST_PMD
:
694 /* Do the ramp-down only if both headsetL/R is disabled */
695 if (!twl4030
->hsr_enabled
)
696 headset_ramp(w
->codec
, 0);
698 twl4030
->hsl_enabled
= 0;
704 static int headsetrpga_event(struct snd_soc_dapm_widget
*w
,
705 struct snd_kcontrol
*kcontrol
, int event
)
707 struct twl4030_priv
*twl4030
= w
->codec
->private_data
;
710 case SND_SOC_DAPM_POST_PMU
:
711 /* Do the ramp-up only once */
712 if (!twl4030
->hsl_enabled
)
713 headset_ramp(w
->codec
, 1);
715 twl4030
->hsr_enabled
= 1;
717 case SND_SOC_DAPM_POST_PMD
:
718 /* Do the ramp-down only if both headsetL/R is disabled */
719 if (!twl4030
->hsl_enabled
)
720 headset_ramp(w
->codec
, 0);
722 twl4030
->hsr_enabled
= 0;
728 static int bypass_event(struct snd_soc_dapm_widget
*w
,
729 struct snd_kcontrol
*kcontrol
, int event
)
731 struct soc_mixer_control
*m
=
732 (struct soc_mixer_control
*)w
->kcontrols
->private_value
;
733 struct twl4030_priv
*twl4030
= w
->codec
->private_data
;
734 unsigned char reg
, misc
;
736 reg
= twl4030_read_reg_cache(w
->codec
, m
->reg
);
739 * bypass_state[0:3] - analog HiFi bypass
740 * bypass_state[4] - analog voice bypass
741 * bypass_state[5] - digital voice bypass
742 * bypass_state[6:7] - digital HiFi bypass
744 if (m
->reg
== TWL4030_REG_VSTPGA
) {
745 /* Voice digital bypass */
747 twl4030
->bypass_state
|= (1 << 5);
749 twl4030
->bypass_state
&= ~(1 << 5);
750 } else if (m
->reg
<= TWL4030_REG_ARXR2_APGA_CTL
) {
752 if (reg
& (1 << m
->shift
))
753 twl4030
->bypass_state
|=
754 (1 << (m
->reg
- TWL4030_REG_ARXL1_APGA_CTL
));
756 twl4030
->bypass_state
&=
757 ~(1 << (m
->reg
- TWL4030_REG_ARXL1_APGA_CTL
));
758 } else if (m
->reg
== TWL4030_REG_VDL_APGA_CTL
) {
759 /* Analog voice bypass */
760 if (reg
& (1 << m
->shift
))
761 twl4030
->bypass_state
|= (1 << 4);
763 twl4030
->bypass_state
&= ~(1 << 4);
766 if (reg
& (0x7 << m
->shift
))
767 twl4030
->bypass_state
|= (1 << (m
->shift
? 7 : 6));
769 twl4030
->bypass_state
&= ~(1 << (m
->shift
? 7 : 6));
772 /* Enable master analog loopback mode if any analog switch is enabled*/
773 misc
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MISC_SET_1
);
774 if (twl4030
->bypass_state
& 0x1F)
775 misc
|= TWL4030_FMLOOP_EN
;
777 misc
&= ~TWL4030_FMLOOP_EN
;
778 twl4030_write(w
->codec
, TWL4030_REG_MISC_SET_1
, misc
);
780 if (w
->codec
->bias_level
== SND_SOC_BIAS_STANDBY
) {
781 if (twl4030
->bypass_state
)
782 twl4030_codec_mute(w
->codec
, 0);
784 twl4030_codec_mute(w
->codec
, 1);
790 * Some of the gain controls in TWL (mostly those which are associated with
791 * the outputs) are implemented in an interesting way:
792 * 0x0 : Power down (mute)
796 * Inverting not going to help with these.
797 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
799 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
800 xinvert, tlv_array) \
801 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
802 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
803 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
804 .tlv.p = (tlv_array), \
805 .info = snd_soc_info_volsw, \
806 .get = snd_soc_get_volsw_twl4030, \
807 .put = snd_soc_put_volsw_twl4030, \
808 .private_value = (unsigned long)&(struct soc_mixer_control) \
809 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
810 .max = xmax, .invert = xinvert} }
811 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
812 xinvert, tlv_array) \
813 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
814 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
815 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
816 .tlv.p = (tlv_array), \
817 .info = snd_soc_info_volsw_2r, \
818 .get = snd_soc_get_volsw_r2_twl4030,\
819 .put = snd_soc_put_volsw_r2_twl4030, \
820 .private_value = (unsigned long)&(struct soc_mixer_control) \
821 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
822 .rshift = xshift, .max = xmax, .invert = xinvert} }
823 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
824 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
827 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
828 struct snd_ctl_elem_value
*ucontrol
)
830 struct soc_mixer_control
*mc
=
831 (struct soc_mixer_control
*)kcontrol
->private_value
;
832 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
833 unsigned int reg
= mc
->reg
;
834 unsigned int shift
= mc
->shift
;
835 unsigned int rshift
= mc
->rshift
;
837 int mask
= (1 << fls(max
)) - 1;
839 ucontrol
->value
.integer
.value
[0] =
840 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
841 if (ucontrol
->value
.integer
.value
[0])
842 ucontrol
->value
.integer
.value
[0] =
843 max
+ 1 - ucontrol
->value
.integer
.value
[0];
845 if (shift
!= rshift
) {
846 ucontrol
->value
.integer
.value
[1] =
847 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
848 if (ucontrol
->value
.integer
.value
[1])
849 ucontrol
->value
.integer
.value
[1] =
850 max
+ 1 - ucontrol
->value
.integer
.value
[1];
856 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
857 struct snd_ctl_elem_value
*ucontrol
)
859 struct soc_mixer_control
*mc
=
860 (struct soc_mixer_control
*)kcontrol
->private_value
;
861 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
862 unsigned int reg
= mc
->reg
;
863 unsigned int shift
= mc
->shift
;
864 unsigned int rshift
= mc
->rshift
;
866 int mask
= (1 << fls(max
)) - 1;
867 unsigned short val
, val2
, val_mask
;
869 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
871 val_mask
= mask
<< shift
;
875 if (shift
!= rshift
) {
876 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
877 val_mask
|= mask
<< rshift
;
879 val2
= max
+ 1 - val2
;
880 val
|= val2
<< rshift
;
882 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
885 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
886 struct snd_ctl_elem_value
*ucontrol
)
888 struct soc_mixer_control
*mc
=
889 (struct soc_mixer_control
*)kcontrol
->private_value
;
890 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
891 unsigned int reg
= mc
->reg
;
892 unsigned int reg2
= mc
->rreg
;
893 unsigned int shift
= mc
->shift
;
895 int mask
= (1<<fls(max
))-1;
897 ucontrol
->value
.integer
.value
[0] =
898 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
899 ucontrol
->value
.integer
.value
[1] =
900 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
902 if (ucontrol
->value
.integer
.value
[0])
903 ucontrol
->value
.integer
.value
[0] =
904 max
+ 1 - ucontrol
->value
.integer
.value
[0];
905 if (ucontrol
->value
.integer
.value
[1])
906 ucontrol
->value
.integer
.value
[1] =
907 max
+ 1 - ucontrol
->value
.integer
.value
[1];
912 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
913 struct snd_ctl_elem_value
*ucontrol
)
915 struct soc_mixer_control
*mc
=
916 (struct soc_mixer_control
*)kcontrol
->private_value
;
917 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
918 unsigned int reg
= mc
->reg
;
919 unsigned int reg2
= mc
->rreg
;
920 unsigned int shift
= mc
->shift
;
922 int mask
= (1 << fls(max
)) - 1;
924 unsigned short val
, val2
, val_mask
;
926 val_mask
= mask
<< shift
;
927 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
928 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
933 val2
= max
+ 1 - val2
;
936 val2
= val2
<< shift
;
938 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
942 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
946 /* Codec operation modes */
947 static const char *twl4030_op_modes_texts
[] = {
948 "Option 2 (voice/audio)", "Option 1 (audio)"
951 static const struct soc_enum twl4030_op_modes_enum
=
952 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE
, 0,
953 ARRAY_SIZE(twl4030_op_modes_texts
),
954 twl4030_op_modes_texts
);
956 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol
*kcontrol
,
957 struct snd_ctl_elem_value
*ucontrol
)
959 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
960 struct twl4030_priv
*twl4030
= codec
->private_data
;
961 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
963 unsigned short mask
, bitmask
;
965 if (twl4030
->configured
) {
966 printk(KERN_ERR
"twl4030 operation mode cannot be "
967 "changed on-the-fly\n");
971 for (bitmask
= 1; bitmask
< e
->max
; bitmask
<<= 1)
973 if (ucontrol
->value
.enumerated
.item
[0] > e
->max
- 1)
976 val
= ucontrol
->value
.enumerated
.item
[0] << e
->shift_l
;
977 mask
= (bitmask
- 1) << e
->shift_l
;
978 if (e
->shift_l
!= e
->shift_r
) {
979 if (ucontrol
->value
.enumerated
.item
[1] > e
->max
- 1)
981 val
|= ucontrol
->value
.enumerated
.item
[1] << e
->shift_r
;
982 mask
|= (bitmask
- 1) << e
->shift_r
;
985 return snd_soc_update_bits(codec
, e
->reg
, mask
, val
);
989 * FGAIN volume control:
990 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
992 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
995 * CGAIN volume control:
996 * 0 dB to 12 dB in 6 dB steps
997 * value 2 and 3 means 12 dB
999 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
1002 * Voice Downlink GAIN volume control:
1003 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
1005 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv
, -3700, 100, 1);
1008 * Analog playback gain
1009 * -24 dB to 12 dB in 2 dB steps
1011 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
1014 * Gain controls tied to outputs
1015 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
1017 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
1020 * Gain control for earpiece amplifier
1021 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1023 static DECLARE_TLV_DB_SCALE(output_ear_tvl
, -600, 600, 1);
1026 * Capture gain after the ADCs
1027 * from 0 dB to 31 dB in 1 dB steps
1029 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
1032 * Gain control for input amplifiers
1033 * 0 dB to 30 dB in 6 dB steps
1035 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
1037 /* AVADC clock priority */
1038 static const char *twl4030_avadc_clk_priority_texts
[] = {
1039 "Voice high priority", "HiFi high priority"
1042 static const struct soc_enum twl4030_avadc_clk_priority_enum
=
1043 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL
, 2,
1044 ARRAY_SIZE(twl4030_avadc_clk_priority_texts
),
1045 twl4030_avadc_clk_priority_texts
);
1047 static const char *twl4030_rampdelay_texts
[] = {
1048 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1049 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1053 static const struct soc_enum twl4030_rampdelay_enum
=
1054 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET
, 2,
1055 ARRAY_SIZE(twl4030_rampdelay_texts
),
1056 twl4030_rampdelay_texts
);
1058 /* Vibra H-bridge direction mode */
1059 static const char *twl4030_vibradirmode_texts
[] = {
1060 "Vibra H-bridge direction", "Audio data MSB",
1063 static const struct soc_enum twl4030_vibradirmode_enum
=
1064 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 5,
1065 ARRAY_SIZE(twl4030_vibradirmode_texts
),
1066 twl4030_vibradirmode_texts
);
1068 /* Vibra H-bridge direction */
1069 static const char *twl4030_vibradir_texts
[] = {
1070 "Positive polarity", "Negative polarity",
1073 static const struct soc_enum twl4030_vibradir_enum
=
1074 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 1,
1075 ARRAY_SIZE(twl4030_vibradir_texts
),
1076 twl4030_vibradir_texts
);
1078 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
1079 /* Codec operation mode control */
1080 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum
,
1081 snd_soc_get_enum_double
,
1082 snd_soc_put_twl4030_opmode_enum_double
),
1084 /* Common playback gain controls */
1085 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1086 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
1087 0, 0x3f, 0, digital_fine_tlv
),
1088 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1089 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
1090 0, 0x3f, 0, digital_fine_tlv
),
1092 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1093 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
1094 6, 0x2, 0, digital_coarse_tlv
),
1095 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1096 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
1097 6, 0x2, 0, digital_coarse_tlv
),
1099 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1100 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
1101 3, 0x12, 1, analog_tlv
),
1102 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1103 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
1104 3, 0x12, 1, analog_tlv
),
1105 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1106 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
1108 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1109 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
1112 /* Common voice downlink gain controls */
1113 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1114 TWL4030_REG_VRXPGA
, 0, 0x31, 0, digital_voice_downlink_tlv
),
1116 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1117 TWL4030_REG_VDL_APGA_CTL
, 3, 0x12, 1, analog_tlv
),
1119 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1120 TWL4030_REG_VDL_APGA_CTL
, 1, 1, 0),
1122 /* Separate output gain controls */
1123 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1124 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
1125 4, 3, 0, output_tvl
),
1127 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1128 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
1130 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1131 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
1132 4, 3, 0, output_tvl
),
1134 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
1135 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_ear_tvl
),
1137 /* Common capture gain controls */
1138 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1139 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
1140 0, 0x1f, 0, digital_capture_tlv
),
1141 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1142 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
1143 0, 0x1f, 0, digital_capture_tlv
),
1145 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
1146 0, 3, 5, 0, input_gain_tlv
),
1148 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum
),
1150 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum
),
1152 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum
),
1153 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum
),
1156 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
1157 /* Left channel inputs */
1158 SND_SOC_DAPM_INPUT("MAINMIC"),
1159 SND_SOC_DAPM_INPUT("HSMIC"),
1160 SND_SOC_DAPM_INPUT("AUXL"),
1161 SND_SOC_DAPM_INPUT("CARKITMIC"),
1162 /* Right channel inputs */
1163 SND_SOC_DAPM_INPUT("SUBMIC"),
1164 SND_SOC_DAPM_INPUT("AUXR"),
1165 /* Digital microphones (Stereo) */
1166 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1167 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1170 SND_SOC_DAPM_OUTPUT("OUTL"),
1171 SND_SOC_DAPM_OUTPUT("OUTR"),
1172 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1173 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1174 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1175 SND_SOC_DAPM_OUTPUT("HSOL"),
1176 SND_SOC_DAPM_OUTPUT("HSOR"),
1177 SND_SOC_DAPM_OUTPUT("CARKITL"),
1178 SND_SOC_DAPM_OUTPUT("CARKITR"),
1179 SND_SOC_DAPM_OUTPUT("HFL"),
1180 SND_SOC_DAPM_OUTPUT("HFR"),
1181 SND_SOC_DAPM_OUTPUT("VIBRA"),
1184 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1185 SND_SOC_NOPM
, 0, 0),
1186 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1187 SND_SOC_NOPM
, 0, 0),
1188 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1189 SND_SOC_NOPM
, 0, 0),
1190 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1191 SND_SOC_NOPM
, 0, 0),
1192 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1193 SND_SOC_NOPM
, 0, 0),
1195 /* Analog bypasses */
1196 SND_SOC_DAPM_SWITCH_E("Right1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1197 &twl4030_dapm_abypassr1_control
, bypass_event
,
1198 SND_SOC_DAPM_POST_REG
),
1199 SND_SOC_DAPM_SWITCH_E("Left1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1200 &twl4030_dapm_abypassl1_control
,
1201 bypass_event
, SND_SOC_DAPM_POST_REG
),
1202 SND_SOC_DAPM_SWITCH_E("Right2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1203 &twl4030_dapm_abypassr2_control
,
1204 bypass_event
, SND_SOC_DAPM_POST_REG
),
1205 SND_SOC_DAPM_SWITCH_E("Left2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1206 &twl4030_dapm_abypassl2_control
,
1207 bypass_event
, SND_SOC_DAPM_POST_REG
),
1208 SND_SOC_DAPM_SWITCH_E("Voice Analog Loopback", SND_SOC_NOPM
, 0, 0,
1209 &twl4030_dapm_abypassv_control
,
1210 bypass_event
, SND_SOC_DAPM_POST_REG
),
1212 /* Digital bypasses */
1213 SND_SOC_DAPM_SWITCH_E("Left Digital Loopback", SND_SOC_NOPM
, 0, 0,
1214 &twl4030_dapm_dbypassl_control
, bypass_event
,
1215 SND_SOC_DAPM_POST_REG
),
1216 SND_SOC_DAPM_SWITCH_E("Right Digital Loopback", SND_SOC_NOPM
, 0, 0,
1217 &twl4030_dapm_dbypassr_control
, bypass_event
,
1218 SND_SOC_DAPM_POST_REG
),
1219 SND_SOC_DAPM_SWITCH_E("Voice Digital Loopback", SND_SOC_NOPM
, 0, 0,
1220 &twl4030_dapm_dbypassv_control
, bypass_event
,
1221 SND_SOC_DAPM_POST_REG
),
1223 /* Digital mixers, power control for the physical DACs */
1224 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1225 TWL4030_REG_AVDAC_CTL
, 0, 0, NULL
, 0),
1226 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1227 TWL4030_REG_AVDAC_CTL
, 1, 0, NULL
, 0),
1228 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1229 TWL4030_REG_AVDAC_CTL
, 2, 0, NULL
, 0),
1230 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1231 TWL4030_REG_AVDAC_CTL
, 3, 0, NULL
, 0),
1232 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1233 TWL4030_REG_AVDAC_CTL
, 4, 0, NULL
, 0),
1235 /* Analog mixers, power control for the physical PGAs */
1236 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1237 TWL4030_REG_ARXR1_APGA_CTL
, 0, 0, NULL
, 0),
1238 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1239 TWL4030_REG_ARXL1_APGA_CTL
, 0, 0, NULL
, 0),
1240 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1241 TWL4030_REG_ARXR2_APGA_CTL
, 0, 0, NULL
, 0),
1242 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1243 TWL4030_REG_ARXL2_APGA_CTL
, 0, 0, NULL
, 0),
1244 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1245 TWL4030_REG_VDL_APGA_CTL
, 0, 0, NULL
, 0),
1247 /* Output MIXER controls */
1249 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM
, 0, 0,
1250 &twl4030_dapm_earpiece_controls
[0],
1251 ARRAY_SIZE(twl4030_dapm_earpiece_controls
)),
1252 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM
,
1253 0, 0, NULL
, 0, earpiecepga_event
,
1254 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1256 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM
, 0, 0,
1257 &twl4030_dapm_predrivel_controls
[0],
1258 ARRAY_SIZE(twl4030_dapm_predrivel_controls
)),
1259 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM
,
1260 0, 0, NULL
, 0, predrivelpga_event
,
1261 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1262 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM
, 0, 0,
1263 &twl4030_dapm_predriver_controls
[0],
1264 ARRAY_SIZE(twl4030_dapm_predriver_controls
)),
1265 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM
,
1266 0, 0, NULL
, 0, predriverpga_event
,
1267 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1269 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM
, 0, 0,
1270 &twl4030_dapm_hsol_controls
[0],
1271 ARRAY_SIZE(twl4030_dapm_hsol_controls
)),
1272 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM
,
1273 0, 0, NULL
, 0, headsetlpga_event
,
1274 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1275 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM
, 0, 0,
1276 &twl4030_dapm_hsor_controls
[0],
1277 ARRAY_SIZE(twl4030_dapm_hsor_controls
)),
1278 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM
,
1279 0, 0, NULL
, 0, headsetrpga_event
,
1280 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1282 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM
, 0, 0,
1283 &twl4030_dapm_carkitl_controls
[0],
1284 ARRAY_SIZE(twl4030_dapm_carkitl_controls
)),
1285 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM
,
1286 0, 0, NULL
, 0, carkitlpga_event
,
1287 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1288 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM
, 0, 0,
1289 &twl4030_dapm_carkitr_controls
[0],
1290 ARRAY_SIZE(twl4030_dapm_carkitr_controls
)),
1291 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM
,
1292 0, 0, NULL
, 0, carkitrpga_event
,
1293 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1295 /* Output MUX controls */
1297 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM
, 0, 0,
1298 &twl4030_dapm_handsfreel_control
),
1299 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM
, 0, 0,
1300 &twl4030_dapm_handsfreelmute_control
),
1301 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM
,
1302 0, 0, NULL
, 0, handsfreelpga_event
,
1303 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1304 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM
, 5, 0,
1305 &twl4030_dapm_handsfreer_control
),
1306 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM
, 0, 0,
1307 &twl4030_dapm_handsfreermute_control
),
1308 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM
,
1309 0, 0, NULL
, 0, handsfreerpga_event
,
1310 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1312 SND_SOC_DAPM_MUX("Vibra Mux", TWL4030_REG_VIBRA_CTL
, 0, 0,
1313 &twl4030_dapm_vibra_control
),
1314 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM
, 0, 0,
1315 &twl4030_dapm_vibrapath_control
),
1317 /* Introducing four virtual ADC, since TWL4030 have four channel for
1319 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1320 SND_SOC_NOPM
, 0, 0),
1321 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1322 SND_SOC_NOPM
, 0, 0),
1323 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1324 SND_SOC_NOPM
, 0, 0),
1325 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1326 SND_SOC_NOPM
, 0, 0),
1328 /* Analog/Digital mic path selection.
1329 TX1 Left/Right: either analog Left/Right or Digimic0
1330 TX2 Left/Right: either analog Left/Right or Digimic1 */
1331 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
1332 &twl4030_dapm_micpathtx1_control
, micpath_event
,
1333 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
1334 SND_SOC_DAPM_POST_REG
),
1335 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
1336 &twl4030_dapm_micpathtx2_control
, micpath_event
,
1337 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
1338 SND_SOC_DAPM_POST_REG
),
1340 /* Analog input mixers for the capture amplifiers */
1341 SND_SOC_DAPM_MIXER("Analog Left",
1342 TWL4030_REG_ANAMICL
, 4, 0,
1343 &twl4030_dapm_analoglmic_controls
[0],
1344 ARRAY_SIZE(twl4030_dapm_analoglmic_controls
)),
1345 SND_SOC_DAPM_MIXER("Analog Right",
1346 TWL4030_REG_ANAMICR
, 4, 0,
1347 &twl4030_dapm_analogrmic_controls
[0],
1348 ARRAY_SIZE(twl4030_dapm_analogrmic_controls
)),
1350 SND_SOC_DAPM_PGA("ADC Physical Left",
1351 TWL4030_REG_AVADC_CTL
, 3, 0, NULL
, 0),
1352 SND_SOC_DAPM_PGA("ADC Physical Right",
1353 TWL4030_REG_AVADC_CTL
, 1, 0, NULL
, 0),
1355 SND_SOC_DAPM_PGA("Digimic0 Enable",
1356 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0),
1357 SND_SOC_DAPM_PGA("Digimic1 Enable",
1358 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0),
1360 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
1361 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
1362 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
1366 static const struct snd_soc_dapm_route intercon
[] = {
1367 {"Digital L1 Playback Mixer", NULL
, "DAC Left1"},
1368 {"Digital R1 Playback Mixer", NULL
, "DAC Right1"},
1369 {"Digital L2 Playback Mixer", NULL
, "DAC Left2"},
1370 {"Digital R2 Playback Mixer", NULL
, "DAC Right2"},
1371 {"Digital Voice Playback Mixer", NULL
, "DAC Voice"},
1373 {"Analog L1 Playback Mixer", NULL
, "Digital L1 Playback Mixer"},
1374 {"Analog R1 Playback Mixer", NULL
, "Digital R1 Playback Mixer"},
1375 {"Analog L2 Playback Mixer", NULL
, "Digital L2 Playback Mixer"},
1376 {"Analog R2 Playback Mixer", NULL
, "Digital R2 Playback Mixer"},
1377 {"Analog Voice Playback Mixer", NULL
, "Digital Voice Playback Mixer"},
1379 /* Internal playback routings */
1381 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1382 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1383 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1384 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1385 {"Earpiece PGA", NULL
, "Earpiece Mixer"},
1387 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1388 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1389 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1390 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1391 {"PredriveL PGA", NULL
, "PredriveL Mixer"},
1393 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1394 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1395 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1396 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1397 {"PredriveR PGA", NULL
, "PredriveR Mixer"},
1399 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1400 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1401 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1402 {"HeadsetL PGA", NULL
, "HeadsetL Mixer"},
1404 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1405 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1406 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1407 {"HeadsetR PGA", NULL
, "HeadsetR Mixer"},
1409 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1410 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1411 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1412 {"CarkitL PGA", NULL
, "CarkitL Mixer"},
1414 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1415 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1416 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1417 {"CarkitR PGA", NULL
, "CarkitR Mixer"},
1419 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1420 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1421 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1422 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1423 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1424 {"HandsfreeL PGA", NULL
, "HandsfreeL"},
1426 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1427 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1428 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1429 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1430 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1431 {"HandsfreeR PGA", NULL
, "HandsfreeR"},
1433 {"Vibra Mux", "AudioL1", "DAC Left1"},
1434 {"Vibra Mux", "AudioR1", "DAC Right1"},
1435 {"Vibra Mux", "AudioL2", "DAC Left2"},
1436 {"Vibra Mux", "AudioR2", "DAC Right2"},
1439 {"OUTL", NULL
, "Analog L2 Playback Mixer"},
1440 {"OUTR", NULL
, "Analog R2 Playback Mixer"},
1441 {"EARPIECE", NULL
, "Earpiece PGA"},
1442 {"PREDRIVEL", NULL
, "PredriveL PGA"},
1443 {"PREDRIVER", NULL
, "PredriveR PGA"},
1444 {"HSOL", NULL
, "HeadsetL PGA"},
1445 {"HSOR", NULL
, "HeadsetR PGA"},
1446 {"CARKITL", NULL
, "CarkitL PGA"},
1447 {"CARKITR", NULL
, "CarkitR PGA"},
1448 {"HFL", NULL
, "HandsfreeL PGA"},
1449 {"HFR", NULL
, "HandsfreeR PGA"},
1450 {"Vibra Route", "Audio", "Vibra Mux"},
1451 {"VIBRA", NULL
, "Vibra Route"},
1454 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1455 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1456 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1457 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1459 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1460 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1462 {"ADC Physical Left", NULL
, "Analog Left"},
1463 {"ADC Physical Right", NULL
, "Analog Right"},
1465 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
1466 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
1468 /* TX1 Left capture path */
1469 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1470 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1471 /* TX1 Right capture path */
1472 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1473 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1474 /* TX2 Left capture path */
1475 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1476 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1477 /* TX2 Right capture path */
1478 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1479 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1481 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
1482 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
1483 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
1484 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
1486 /* Analog bypass routes */
1487 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1488 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1489 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1490 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1491 {"Voice Analog Loopback", "Switch", "Analog Left"},
1493 {"Analog R1 Playback Mixer", NULL
, "Right1 Analog Loopback"},
1494 {"Analog L1 Playback Mixer", NULL
, "Left1 Analog Loopback"},
1495 {"Analog R2 Playback Mixer", NULL
, "Right2 Analog Loopback"},
1496 {"Analog L2 Playback Mixer", NULL
, "Left2 Analog Loopback"},
1497 {"Analog Voice Playback Mixer", NULL
, "Voice Analog Loopback"},
1499 /* Digital bypass routes */
1500 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1501 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1502 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1504 {"Digital R2 Playback Mixer", NULL
, "Right Digital Loopback"},
1505 {"Digital L2 Playback Mixer", NULL
, "Left Digital Loopback"},
1506 {"Digital Voice Playback Mixer", NULL
, "Voice Digital Loopback"},
1510 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
1512 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
1513 ARRAY_SIZE(twl4030_dapm_widgets
));
1515 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
1517 snd_soc_dapm_new_widgets(codec
);
1521 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
1522 enum snd_soc_bias_level level
)
1524 struct twl4030_priv
*twl4030
= codec
->private_data
;
1527 case SND_SOC_BIAS_ON
:
1528 twl4030_codec_mute(codec
, 0);
1530 case SND_SOC_BIAS_PREPARE
:
1531 twl4030_power_up(codec
);
1532 if (twl4030
->bypass_state
)
1533 twl4030_codec_mute(codec
, 0);
1535 twl4030_codec_mute(codec
, 1);
1537 case SND_SOC_BIAS_STANDBY
:
1538 twl4030_power_up(codec
);
1539 if (twl4030
->bypass_state
)
1540 twl4030_codec_mute(codec
, 0);
1542 twl4030_codec_mute(codec
, 1);
1544 case SND_SOC_BIAS_OFF
:
1545 twl4030_power_down(codec
);
1548 codec
->bias_level
= level
;
1553 static void twl4030_constraints(struct twl4030_priv
*twl4030
,
1554 struct snd_pcm_substream
*mst_substream
)
1556 struct snd_pcm_substream
*slv_substream
;
1558 /* Pick the stream, which need to be constrained */
1559 if (mst_substream
== twl4030
->master_substream
)
1560 slv_substream
= twl4030
->slave_substream
;
1561 else if (mst_substream
== twl4030
->slave_substream
)
1562 slv_substream
= twl4030
->master_substream
;
1563 else /* This should not happen.. */
1566 /* Set the constraints according to the already configured stream */
1567 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1568 SNDRV_PCM_HW_PARAM_RATE
,
1572 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1573 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
,
1574 twl4030
->sample_bits
,
1575 twl4030
->sample_bits
);
1577 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1578 SNDRV_PCM_HW_PARAM_CHANNELS
,
1583 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1584 * capture has to be enabled/disabled. */
1585 static void twl4030_tdm_enable(struct snd_soc_codec
*codec
, int direction
,
1590 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1592 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1593 mask
= TWL4030_ARXL1_VRX_EN
| TWL4030_ARXR1_EN
;
1595 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1602 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1605 static int twl4030_startup(struct snd_pcm_substream
*substream
,
1606 struct snd_soc_dai
*dai
)
1608 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1609 struct snd_soc_device
*socdev
= rtd
->socdev
;
1610 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1611 struct twl4030_priv
*twl4030
= codec
->private_data
;
1613 if (twl4030
->master_substream
) {
1614 twl4030
->slave_substream
= substream
;
1615 /* The DAI has one configuration for playback and capture, so
1616 * if the DAI has been already configured then constrain this
1617 * substream to match it. */
1618 if (twl4030
->configured
)
1619 twl4030_constraints(twl4030
, twl4030
->master_substream
);
1621 if (!(twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
) &
1622 TWL4030_OPTION_1
)) {
1623 /* In option2 4 channel is not supported, set the
1624 * constraint for the first stream for channels, the
1625 * second stream will 'inherit' this cosntraint */
1626 snd_pcm_hw_constraint_minmax(substream
->runtime
,
1627 SNDRV_PCM_HW_PARAM_CHANNELS
,
1630 twl4030
->master_substream
= substream
;
1636 static void twl4030_shutdown(struct snd_pcm_substream
*substream
,
1637 struct snd_soc_dai
*dai
)
1639 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1640 struct snd_soc_device
*socdev
= rtd
->socdev
;
1641 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1642 struct twl4030_priv
*twl4030
= codec
->private_data
;
1644 if (twl4030
->master_substream
== substream
)
1645 twl4030
->master_substream
= twl4030
->slave_substream
;
1647 twl4030
->slave_substream
= NULL
;
1649 /* If all streams are closed, or the remaining stream has not yet
1650 * been configured than set the DAI as not configured. */
1651 if (!twl4030
->master_substream
)
1652 twl4030
->configured
= 0;
1653 else if (!twl4030
->master_substream
->runtime
->channels
)
1654 twl4030
->configured
= 0;
1656 /* If the closing substream had 4 channel, do the necessary cleanup */
1657 if (substream
->runtime
->channels
== 4)
1658 twl4030_tdm_enable(codec
, substream
->stream
, 0);
1661 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
1662 struct snd_pcm_hw_params
*params
,
1663 struct snd_soc_dai
*dai
)
1665 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1666 struct snd_soc_device
*socdev
= rtd
->socdev
;
1667 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1668 struct twl4030_priv
*twl4030
= codec
->private_data
;
1669 u8 mode
, old_mode
, format
, old_format
;
1671 /* If the substream has 4 channel, do the necessary setup */
1672 if (params_channels(params
) == 4) {
1673 format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1674 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
1676 /* Safety check: are we in the correct operating mode and
1677 * the interface is in TDM mode? */
1678 if ((mode
& TWL4030_OPTION_1
) &&
1679 ((format
& TWL4030_AIF_FORMAT
) == TWL4030_AIF_FORMAT_TDM
))
1680 twl4030_tdm_enable(codec
, substream
->stream
, 1);
1685 if (twl4030
->configured
)
1686 /* Ignoring hw_params for already configured DAI */
1690 old_mode
= twl4030_read_reg_cache(codec
,
1691 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
1692 mode
= old_mode
& ~TWL4030_APLL_RATE
;
1694 switch (params_rate(params
)) {
1696 mode
|= TWL4030_APLL_RATE_8000
;
1699 mode
|= TWL4030_APLL_RATE_11025
;
1702 mode
|= TWL4030_APLL_RATE_12000
;
1705 mode
|= TWL4030_APLL_RATE_16000
;
1708 mode
|= TWL4030_APLL_RATE_22050
;
1711 mode
|= TWL4030_APLL_RATE_24000
;
1714 mode
|= TWL4030_APLL_RATE_32000
;
1717 mode
|= TWL4030_APLL_RATE_44100
;
1720 mode
|= TWL4030_APLL_RATE_48000
;
1723 mode
|= TWL4030_APLL_RATE_96000
;
1726 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1727 params_rate(params
));
1731 if (mode
!= old_mode
) {
1732 /* change rate and set CODECPDZ */
1733 twl4030_codec_enable(codec
, 0);
1734 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1735 twl4030_codec_enable(codec
, 1);
1739 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1740 format
= old_format
;
1741 format
&= ~TWL4030_DATA_WIDTH
;
1742 switch (params_format(params
)) {
1743 case SNDRV_PCM_FORMAT_S16_LE
:
1744 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1746 case SNDRV_PCM_FORMAT_S24_LE
:
1747 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1750 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1751 params_format(params
));
1755 if (format
!= old_format
) {
1757 /* clear CODECPDZ before changing format (codec requirement) */
1758 twl4030_codec_enable(codec
, 0);
1761 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1763 /* set CODECPDZ afterwards */
1764 twl4030_codec_enable(codec
, 1);
1767 /* Store the important parameters for the DAI configuration and set
1768 * the DAI as configured */
1769 twl4030
->configured
= 1;
1770 twl4030
->rate
= params_rate(params
);
1771 twl4030
->sample_bits
= hw_param_interval(params
,
1772 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
)->min
;
1773 twl4030
->channels
= params_channels(params
);
1775 /* If both playback and capture streams are open, and one of them
1776 * is setting the hw parameters right now (since we are here), set
1777 * constraints to the other stream to match the current one. */
1778 if (twl4030
->slave_substream
)
1779 twl4030_constraints(twl4030
, substream
);
1784 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1785 int clk_id
, unsigned int freq
, int dir
)
1787 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1788 struct twl4030_priv
*twl4030
= codec
->private_data
;
1791 apll_ctrl
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
);
1792 apll_ctrl
&= ~TWL4030_APLL_INFREQ
;
1795 apll_ctrl
|= TWL4030_APLL_INFREQ_19200KHZ
;
1796 twl4030
->sysclk
= 19200;
1799 apll_ctrl
|= TWL4030_APLL_INFREQ_26000KHZ
;
1800 twl4030
->sysclk
= 26000;
1803 apll_ctrl
|= TWL4030_APLL_INFREQ_38400KHZ
;
1804 twl4030
->sysclk
= 38400;
1807 printk(KERN_ERR
"TWL4030 set sysclk: unknown rate %d\n",
1812 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, apll_ctrl
);
1817 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1820 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1821 u8 old_format
, format
;
1824 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1825 format
= old_format
;
1827 /* set master/slave audio interface */
1828 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1829 case SND_SOC_DAIFMT_CBM_CFM
:
1830 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1831 format
&= ~(TWL4030_CLK256FS_EN
);
1833 case SND_SOC_DAIFMT_CBS_CFS
:
1834 format
|= TWL4030_AIF_SLAVE_EN
;
1835 format
|= TWL4030_CLK256FS_EN
;
1841 /* interface format */
1842 format
&= ~TWL4030_AIF_FORMAT
;
1843 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1844 case SND_SOC_DAIFMT_I2S
:
1845 format
|= TWL4030_AIF_FORMAT_CODEC
;
1847 case SND_SOC_DAIFMT_DSP_A
:
1848 format
|= TWL4030_AIF_FORMAT_TDM
;
1854 if (format
!= old_format
) {
1856 /* clear CODECPDZ before changing format (codec requirement) */
1857 twl4030_codec_enable(codec
, 0);
1860 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1862 /* set CODECPDZ afterwards */
1863 twl4030_codec_enable(codec
, 1);
1869 static int twl4030_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
1871 struct snd_soc_codec
*codec
= dai
->codec
;
1872 u8 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1875 reg
|= TWL4030_AIF_TRI_EN
;
1877 reg
&= ~TWL4030_AIF_TRI_EN
;
1879 return twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, reg
);
1882 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1883 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1884 static void twl4030_voice_enable(struct snd_soc_codec
*codec
, int direction
,
1889 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1891 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1892 mask
= TWL4030_ARXL1_VRX_EN
;
1894 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1901 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1904 static int twl4030_voice_startup(struct snd_pcm_substream
*substream
,
1905 struct snd_soc_dai
*dai
)
1907 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1908 struct snd_soc_device
*socdev
= rtd
->socdev
;
1909 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1913 /* If the system master clock is not 26MHz, the voice PCM interface is
1916 infreq
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
)
1917 & TWL4030_APLL_INFREQ
;
1919 if (infreq
!= TWL4030_APLL_INFREQ_26000KHZ
) {
1920 printk(KERN_ERR
"TWL4030 voice startup: "
1921 "MCLK is not 26MHz, call set_sysclk() on init\n");
1925 /* If the codec mode is not option2, the voice PCM interface is not
1928 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
1931 if (mode
!= TWL4030_OPTION_2
) {
1932 printk(KERN_ERR
"TWL4030 voice startup: "
1933 "the codec mode is not option2\n");
1940 static void twl4030_voice_shutdown(struct snd_pcm_substream
*substream
,
1941 struct snd_soc_dai
*dai
)
1943 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1944 struct snd_soc_device
*socdev
= rtd
->socdev
;
1945 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1947 /* Enable voice digital filters */
1948 twl4030_voice_enable(codec
, substream
->stream
, 0);
1951 static int twl4030_voice_hw_params(struct snd_pcm_substream
*substream
,
1952 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
1954 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1955 struct snd_soc_device
*socdev
= rtd
->socdev
;
1956 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1959 /* Enable voice digital filters */
1960 twl4030_voice_enable(codec
, substream
->stream
, 1);
1963 old_mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
1964 & ~(TWL4030_CODECPDZ
);
1967 switch (params_rate(params
)) {
1969 mode
&= ~(TWL4030_SEL_16K
);
1972 mode
|= TWL4030_SEL_16K
;
1975 printk(KERN_ERR
"TWL4030 voice hw params: unknown rate %d\n",
1976 params_rate(params
));
1980 if (mode
!= old_mode
) {
1981 /* change rate and set CODECPDZ */
1982 twl4030_codec_enable(codec
, 0);
1983 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1984 twl4030_codec_enable(codec
, 1);
1990 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1991 int clk_id
, unsigned int freq
, int dir
)
1993 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1996 apll_ctrl
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
);
1997 apll_ctrl
&= ~TWL4030_APLL_INFREQ
;
2000 apll_ctrl
|= TWL4030_APLL_INFREQ_26000KHZ
;
2003 printk(KERN_ERR
"TWL4030 voice set sysclk: unknown rate %d\n",
2008 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, apll_ctrl
);
2013 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
2016 struct snd_soc_codec
*codec
= codec_dai
->codec
;
2017 u8 old_format
, format
;
2020 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
2021 format
= old_format
;
2023 /* set master/slave audio interface */
2024 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
2025 case SND_SOC_DAIFMT_CBM_CFM
:
2026 format
&= ~(TWL4030_VIF_SLAVE_EN
);
2028 case SND_SOC_DAIFMT_CBS_CFS
:
2029 format
|= TWL4030_VIF_SLAVE_EN
;
2035 /* clock inversion */
2036 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
2037 case SND_SOC_DAIFMT_IB_NF
:
2038 format
&= ~(TWL4030_VIF_FORMAT
);
2040 case SND_SOC_DAIFMT_NB_IF
:
2041 format
|= TWL4030_VIF_FORMAT
;
2047 if (format
!= old_format
) {
2048 /* change format and set CODECPDZ */
2049 twl4030_codec_enable(codec
, 0);
2050 twl4030_write(codec
, TWL4030_REG_VOICE_IF
, format
);
2051 twl4030_codec_enable(codec
, 1);
2057 static int twl4030_voice_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
2059 struct snd_soc_codec
*codec
= dai
->codec
;
2060 u8 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
2063 reg
|= TWL4030_VIF_TRI_EN
;
2065 reg
&= ~TWL4030_VIF_TRI_EN
;
2067 return twl4030_write(codec
, TWL4030_REG_VOICE_IF
, reg
);
2070 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2071 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2073 static struct snd_soc_dai_ops twl4030_dai_ops
= {
2074 .startup
= twl4030_startup
,
2075 .shutdown
= twl4030_shutdown
,
2076 .hw_params
= twl4030_hw_params
,
2077 .set_sysclk
= twl4030_set_dai_sysclk
,
2078 .set_fmt
= twl4030_set_dai_fmt
,
2079 .set_tristate
= twl4030_set_tristate
,
2082 static struct snd_soc_dai_ops twl4030_dai_voice_ops
= {
2083 .startup
= twl4030_voice_startup
,
2084 .shutdown
= twl4030_voice_shutdown
,
2085 .hw_params
= twl4030_voice_hw_params
,
2086 .set_sysclk
= twl4030_voice_set_dai_sysclk
,
2087 .set_fmt
= twl4030_voice_set_dai_fmt
,
2088 .set_tristate
= twl4030_voice_set_tristate
,
2091 struct snd_soc_dai twl4030_dai
[] = {
2095 .stream_name
= "HiFi Playback",
2098 .rates
= TWL4030_RATES
| SNDRV_PCM_RATE_96000
,
2099 .formats
= TWL4030_FORMATS
,},
2101 .stream_name
= "Capture",
2104 .rates
= TWL4030_RATES
,
2105 .formats
= TWL4030_FORMATS
,},
2106 .ops
= &twl4030_dai_ops
,
2109 .name
= "twl4030 Voice",
2111 .stream_name
= "Voice Playback",
2114 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
2115 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
2117 .stream_name
= "Capture",
2120 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
2121 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
2122 .ops
= &twl4030_dai_voice_ops
,
2125 EXPORT_SYMBOL_GPL(twl4030_dai
);
2127 static int twl4030_soc_suspend(struct platform_device
*pdev
, pm_message_t state
)
2129 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2130 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2132 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2137 static int twl4030_soc_resume(struct platform_device
*pdev
)
2139 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2140 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2142 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
2143 twl4030_set_bias_level(codec
, codec
->suspend_bias_level
);
2147 static struct snd_soc_codec
*twl4030_codec
;
2149 static int twl4030_soc_probe(struct platform_device
*pdev
)
2151 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2152 struct twl4030_setup_data
*setup
= socdev
->codec_data
;
2153 struct snd_soc_codec
*codec
;
2154 struct twl4030_priv
*twl4030
;
2157 BUG_ON(!twl4030_codec
);
2159 codec
= twl4030_codec
;
2160 twl4030
= codec
->private_data
;
2161 socdev
->card
->codec
= codec
;
2163 /* Configuration for headset ramp delay from setup data */
2165 unsigned char hs_pop
;
2168 twl4030
->sysclk
= setup
->sysclk
;
2170 twl4030
->sysclk
= 26000;
2172 hs_pop
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
2173 hs_pop
&= ~TWL4030_RAMP_DELAY
;
2174 hs_pop
|= (setup
->ramp_delay_value
<< 2);
2175 twl4030_write_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
2177 twl4030
->sysclk
= 26000;
2181 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
2183 dev_err(&pdev
->dev
, "failed to create pcms\n");
2187 snd_soc_add_controls(codec
, twl4030_snd_controls
,
2188 ARRAY_SIZE(twl4030_snd_controls
));
2189 twl4030_add_widgets(codec
);
2191 ret
= snd_soc_init_card(socdev
);
2193 dev_err(&pdev
->dev
, "failed to register card\n");
2200 snd_soc_free_pcms(socdev
);
2201 snd_soc_dapm_free(socdev
);
2206 static int twl4030_soc_remove(struct platform_device
*pdev
)
2208 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2209 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2211 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2212 snd_soc_free_pcms(socdev
);
2213 snd_soc_dapm_free(socdev
);
2214 kfree(codec
->private_data
);
2220 static int __devinit
twl4030_codec_probe(struct platform_device
*pdev
)
2222 struct twl4030_codec_audio_data
*pdata
= pdev
->dev
.platform_data
;
2223 struct snd_soc_codec
*codec
;
2224 struct twl4030_priv
*twl4030
;
2227 if (!pdata
|| !(pdata
->audio_mclk
== 19200000 ||
2228 pdata
->audio_mclk
== 26000000 ||
2229 pdata
->audio_mclk
== 38400000)) {
2230 dev_err(&pdev
->dev
, "Invalid platform_data\n");
2234 twl4030
= kzalloc(sizeof(struct twl4030_priv
), GFP_KERNEL
);
2235 if (twl4030
== NULL
) {
2236 dev_err(&pdev
->dev
, "Can not allocate memroy\n");
2240 codec
= &twl4030
->codec
;
2241 codec
->private_data
= twl4030
;
2242 codec
->dev
= &pdev
->dev
;
2243 twl4030_dai
[0].dev
= &pdev
->dev
;
2244 twl4030_dai
[1].dev
= &pdev
->dev
;
2246 mutex_init(&codec
->mutex
);
2247 INIT_LIST_HEAD(&codec
->dapm_widgets
);
2248 INIT_LIST_HEAD(&codec
->dapm_paths
);
2250 codec
->name
= "twl4030";
2251 codec
->owner
= THIS_MODULE
;
2252 codec
->read
= twl4030_read_reg_cache
;
2253 codec
->write
= twl4030_write
;
2254 codec
->set_bias_level
= twl4030_set_bias_level
;
2255 codec
->dai
= twl4030_dai
;
2256 codec
->num_dai
= ARRAY_SIZE(twl4030_dai
),
2257 codec
->reg_cache_size
= sizeof(twl4030_reg
);
2258 codec
->reg_cache
= kmemdup(twl4030_reg
, sizeof(twl4030_reg
),
2260 if (codec
->reg_cache
== NULL
) {
2265 platform_set_drvdata(pdev
, twl4030
);
2266 twl4030_codec
= codec
;
2268 /* Set the defaults, and power up the codec */
2269 twl4030_init_chip(codec
);
2270 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
2272 ret
= snd_soc_register_codec(codec
);
2274 dev_err(codec
->dev
, "Failed to register codec: %d\n", ret
);
2278 ret
= snd_soc_register_dais(&twl4030_dai
[0], ARRAY_SIZE(twl4030_dai
));
2280 dev_err(codec
->dev
, "Failed to register DAIs: %d\n", ret
);
2281 snd_soc_unregister_codec(codec
);
2288 twl4030_power_down(codec
);
2289 kfree(codec
->reg_cache
);
2295 static int __devexit
twl4030_codec_remove(struct platform_device
*pdev
)
2297 struct twl4030_priv
*twl4030
= platform_get_drvdata(pdev
);
2301 twl4030_codec
= NULL
;
2305 MODULE_ALIAS("platform:twl4030_codec_audio");
2307 static struct platform_driver twl4030_codec_driver
= {
2308 .probe
= twl4030_codec_probe
,
2309 .remove
= __devexit_p(twl4030_codec_remove
),
2311 .name
= "twl4030_codec_audio",
2312 .owner
= THIS_MODULE
,
2316 static int __init
twl4030_modinit(void)
2318 return platform_driver_register(&twl4030_codec_driver
);
2320 module_init(twl4030_modinit
);
2322 static void __exit
twl4030_exit(void)
2324 platform_driver_unregister(&twl4030_codec_driver
);
2326 module_exit(twl4030_exit
);
2328 struct snd_soc_codec_device soc_codec_dev_twl4030
= {
2329 .probe
= twl4030_soc_probe
,
2330 .remove
= twl4030_soc_remove
,
2331 .suspend
= twl4030_soc_suspend
,
2332 .resume
= twl4030_soc_resume
,
2334 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030
);
2336 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2337 MODULE_AUTHOR("Steve Sakoman");
2338 MODULE_LICENSE("GPL");