2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl4030.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
44 0x00, /* this register not used */
45 0x91, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
118 0x00, /* REG_SW_SHADOW (0x4A) - Shadow, non HW register */
121 /* codec private data */
122 struct twl4030_priv
{
123 struct snd_soc_codec codec
;
125 unsigned int codec_powered
;
126 unsigned int apll_enabled
;
128 struct snd_pcm_substream
*master_substream
;
129 struct snd_pcm_substream
*slave_substream
;
131 unsigned int configured
;
133 unsigned int sample_bits
;
134 unsigned int channels
;
138 /* Headset output state handling */
139 unsigned int hsl_enabled
;
140 unsigned int hsr_enabled
;
144 * read twl4030 register cache
146 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
149 u8
*cache
= codec
->reg_cache
;
151 if (reg
>= TWL4030_CACHEREGNUM
)
158 * write twl4030 register cache
160 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
163 u8
*cache
= codec
->reg_cache
;
165 if (reg
>= TWL4030_CACHEREGNUM
)
171 * write to the twl4030 register space
173 static int twl4030_write(struct snd_soc_codec
*codec
,
174 unsigned int reg
, unsigned int value
)
176 twl4030_write_reg_cache(codec
, reg
, value
);
177 if (likely(reg
< TWL4030_REG_SW_SHADOW
))
178 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
, value
,
184 static void twl4030_codec_enable(struct snd_soc_codec
*codec
, int enable
)
186 struct twl4030_priv
*twl4030
= codec
->private_data
;
189 if (enable
== twl4030
->codec_powered
)
193 mode
= twl4030_codec_enable_resource(TWL4030_CODEC_RES_POWER
);
195 mode
= twl4030_codec_disable_resource(TWL4030_CODEC_RES_POWER
);
198 twl4030_write_reg_cache(codec
, TWL4030_REG_CODEC_MODE
, mode
);
199 twl4030
->codec_powered
= enable
;
202 /* REVISIT: this delay is present in TI sample drivers */
203 /* but there seems to be no TRM requirement for it */
207 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
209 u8
*cache
= codec
->reg_cache
;
212 /* clear CODECPDZ prior to setting register defaults */
213 twl4030_codec_enable(codec
, 0);
215 /* set all audio section registers to reasonable defaults */
216 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
217 twl4030_write(codec
, i
, cache
[i
]);
221 static void twl4030_apll_enable(struct snd_soc_codec
*codec
, int enable
)
223 struct twl4030_priv
*twl4030
= codec
->private_data
;
226 if (enable
== twl4030
->apll_enabled
)
231 status
= twl4030_codec_enable_resource(TWL4030_CODEC_RES_APLL
);
234 status
= twl4030_codec_disable_resource(TWL4030_CODEC_RES_APLL
);
237 twl4030_write_reg_cache(codec
, TWL4030_REG_APLL_CTL
, status
);
239 twl4030
->apll_enabled
= enable
;
242 static void twl4030_power_up(struct snd_soc_codec
*codec
)
244 struct twl4030_priv
*twl4030
= codec
->private_data
;
245 u8 anamicl
, regmisc1
, byte
;
248 if (twl4030
->codec_powered
)
251 /* set CODECPDZ to turn on codec */
252 twl4030_codec_enable(codec
, 1);
254 /* initiate offset cancellation */
255 anamicl
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
256 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
257 anamicl
| TWL4030_CNCL_OFFSET_START
);
259 /* wait for offset cancellation to complete */
261 /* this takes a little while, so don't slam i2c */
263 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
264 TWL4030_REG_ANAMICL
);
265 } while ((i
++ < 100) &&
266 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
267 TWL4030_CNCL_OFFSET_START
));
269 /* Make sure that the reg_cache has the same value as the HW */
270 twl4030_write_reg_cache(codec
, TWL4030_REG_ANAMICL
, byte
);
272 /* anti-pop when changing analog gain */
273 regmisc1
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
274 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
275 regmisc1
| TWL4030_SMOOTH_ANAVOL_EN
);
277 /* toggle CODECPDZ as per TRM */
278 twl4030_codec_enable(codec
, 0);
279 twl4030_codec_enable(codec
, 1);
283 * Unconditional power down
285 static void twl4030_power_down(struct snd_soc_codec
*codec
)
288 twl4030_codec_enable(codec
, 0);
292 static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls
[] = {
293 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL
, 0, 1, 0),
294 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL
, 1, 1, 0),
295 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL
, 2, 1, 0),
296 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL
, 3, 1, 0),
300 static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls
[] = {
301 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL
, 0, 1, 0),
302 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL
, 1, 1, 0),
303 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL
, 2, 1, 0),
304 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL
, 3, 1, 0),
308 static const struct snd_kcontrol_new twl4030_dapm_predriver_controls
[] = {
309 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL
, 0, 1, 0),
310 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL
, 1, 1, 0),
311 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL
, 2, 1, 0),
312 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL
, 3, 1, 0),
316 static const struct snd_kcontrol_new twl4030_dapm_hsol_controls
[] = {
317 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 0, 1, 0),
318 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL
, 1, 1, 0),
319 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL
, 2, 1, 0),
323 static const struct snd_kcontrol_new twl4030_dapm_hsor_controls
[] = {
324 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL
, 3, 1, 0),
325 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL
, 4, 1, 0),
326 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL
, 5, 1, 0),
330 static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls
[] = {
331 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL
, 0, 1, 0),
332 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL
, 1, 1, 0),
333 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL
, 2, 1, 0),
337 static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls
[] = {
338 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL
, 0, 1, 0),
339 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL
, 1, 1, 0),
340 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL
, 2, 1, 0),
344 static const char *twl4030_handsfreel_texts
[] =
345 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
347 static const struct soc_enum twl4030_handsfreel_enum
=
348 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
349 ARRAY_SIZE(twl4030_handsfreel_texts
),
350 twl4030_handsfreel_texts
);
352 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
353 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
355 /* Handsfree Left virtual mute */
356 static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control
=
357 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW
, 0, 1, 0);
359 /* Handsfree Right */
360 static const char *twl4030_handsfreer_texts
[] =
361 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
363 static const struct soc_enum twl4030_handsfreer_enum
=
364 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
365 ARRAY_SIZE(twl4030_handsfreer_texts
),
366 twl4030_handsfreer_texts
);
368 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
369 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
371 /* Handsfree Right virtual mute */
372 static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control
=
373 SOC_DAPM_SINGLE("Switch", TWL4030_REG_SW_SHADOW
, 1, 1, 0);
376 /* Vibra audio path selection */
377 static const char *twl4030_vibra_texts
[] =
378 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
380 static const struct soc_enum twl4030_vibra_enum
=
381 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 2,
382 ARRAY_SIZE(twl4030_vibra_texts
),
383 twl4030_vibra_texts
);
385 static const struct snd_kcontrol_new twl4030_dapm_vibra_control
=
386 SOC_DAPM_ENUM("Route", twl4030_vibra_enum
);
388 /* Vibra path selection: local vibrator (PWM) or audio driven */
389 static const char *twl4030_vibrapath_texts
[] =
390 {"Local vibrator", "Audio"};
392 static const struct soc_enum twl4030_vibrapath_enum
=
393 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 4,
394 ARRAY_SIZE(twl4030_vibrapath_texts
),
395 twl4030_vibrapath_texts
);
397 static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control
=
398 SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum
);
400 /* Left analog microphone selection */
401 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls
[] = {
402 SOC_DAPM_SINGLE("Main Mic Capture Switch",
403 TWL4030_REG_ANAMICL
, 0, 1, 0),
404 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
405 TWL4030_REG_ANAMICL
, 1, 1, 0),
406 SOC_DAPM_SINGLE("AUXL Capture Switch",
407 TWL4030_REG_ANAMICL
, 2, 1, 0),
408 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
409 TWL4030_REG_ANAMICL
, 3, 1, 0),
412 /* Right analog microphone selection */
413 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls
[] = {
414 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR
, 0, 1, 0),
415 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR
, 2, 1, 0),
418 /* TX1 L/R Analog/Digital microphone selection */
419 static const char *twl4030_micpathtx1_texts
[] =
420 {"Analog", "Digimic0"};
422 static const struct soc_enum twl4030_micpathtx1_enum
=
423 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
424 ARRAY_SIZE(twl4030_micpathtx1_texts
),
425 twl4030_micpathtx1_texts
);
427 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
428 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
430 /* TX2 L/R Analog/Digital microphone selection */
431 static const char *twl4030_micpathtx2_texts
[] =
432 {"Analog", "Digimic1"};
434 static const struct soc_enum twl4030_micpathtx2_enum
=
435 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
436 ARRAY_SIZE(twl4030_micpathtx2_texts
),
437 twl4030_micpathtx2_texts
);
439 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
440 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
442 /* Analog bypass for AudioR1 */
443 static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control
=
444 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL
, 2, 1, 0);
446 /* Analog bypass for AudioL1 */
447 static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control
=
448 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL
, 2, 1, 0);
450 /* Analog bypass for AudioR2 */
451 static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control
=
452 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL
, 2, 1, 0);
454 /* Analog bypass for AudioL2 */
455 static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control
=
456 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL
, 2, 1, 0);
458 /* Analog bypass for Voice */
459 static const struct snd_kcontrol_new twl4030_dapm_abypassv_control
=
460 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL
, 2, 1, 0);
462 /* Digital bypass gain, 0 mutes the bypass */
463 static const unsigned int twl4030_dapm_dbypass_tlv
[] = {
464 TLV_DB_RANGE_HEAD(2),
465 0, 3, TLV_DB_SCALE_ITEM(-2400, 0, 1),
466 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
469 /* Digital bypass left (TX1L -> RX2L) */
470 static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control
=
471 SOC_DAPM_SINGLE_TLV("Volume",
472 TWL4030_REG_ATX2ARXPGA
, 3, 7, 0,
473 twl4030_dapm_dbypass_tlv
);
475 /* Digital bypass right (TX1R -> RX2R) */
476 static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control
=
477 SOC_DAPM_SINGLE_TLV("Volume",
478 TWL4030_REG_ATX2ARXPGA
, 0, 7, 0,
479 twl4030_dapm_dbypass_tlv
);
482 * Voice Sidetone GAIN volume control:
483 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
485 static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv
, -5100, 100, 1);
487 /* Digital bypass voice: sidetone (VUL -> VDL)*/
488 static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control
=
489 SOC_DAPM_SINGLE_TLV("Volume",
490 TWL4030_REG_VSTPGA
, 0, 0x29, 0,
491 twl4030_dapm_dbypassv_tlv
);
493 static int micpath_event(struct snd_soc_dapm_widget
*w
,
494 struct snd_kcontrol
*kcontrol
, int event
)
496 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
497 unsigned char adcmicsel
, micbias_ctl
;
499 adcmicsel
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_ADCMICSEL
);
500 micbias_ctl
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MICBIAS_CTL
);
501 /* Prepare the bits for the given TX path:
502 * shift_l == 0: TX1 microphone path
503 * shift_l == 2: TX2 microphone path */
505 /* TX2 microphone path */
506 if (adcmicsel
& TWL4030_TX2IN_SEL
)
507 micbias_ctl
|= TWL4030_MICBIAS2_CTL
; /* digimic */
509 micbias_ctl
&= ~TWL4030_MICBIAS2_CTL
;
511 /* TX1 microphone path */
512 if (adcmicsel
& TWL4030_TX1IN_SEL
)
513 micbias_ctl
|= TWL4030_MICBIAS1_CTL
; /* digimic */
515 micbias_ctl
&= ~TWL4030_MICBIAS1_CTL
;
518 twl4030_write(w
->codec
, TWL4030_REG_MICBIAS_CTL
, micbias_ctl
);
524 * Output PGA builder:
525 * Handle the muting and unmuting of the given output (turning off the
526 * amplifier associated with the output pin)
527 * On mute bypass the reg_cache and mute the volume
528 * On unmute: restore the register content
529 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
531 #define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
532 static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
533 struct snd_kcontrol *kcontrol, int event) \
538 case SND_SOC_DAPM_POST_PMU: \
539 twl4030_write(w->codec, reg, \
540 twl4030_read_reg_cache(w->codec, reg)); \
542 case SND_SOC_DAPM_POST_PMD: \
543 reg_val = twl4030_read_reg_cache(w->codec, reg); \
544 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, \
552 TWL4030_OUTPUT_PGA(earpiece
, TWL4030_REG_EAR_CTL
, TWL4030_EAR_GAIN
);
553 TWL4030_OUTPUT_PGA(predrivel
, TWL4030_REG_PREDL_CTL
, TWL4030_PREDL_GAIN
);
554 TWL4030_OUTPUT_PGA(predriver
, TWL4030_REG_PREDR_CTL
, TWL4030_PREDR_GAIN
);
555 TWL4030_OUTPUT_PGA(carkitl
, TWL4030_REG_PRECKL_CTL
, TWL4030_PRECKL_GAIN
);
556 TWL4030_OUTPUT_PGA(carkitr
, TWL4030_REG_PRECKR_CTL
, TWL4030_PRECKR_GAIN
);
558 static void handsfree_ramp(struct snd_soc_codec
*codec
, int reg
, int ramp
)
560 unsigned char hs_ctl
;
562 hs_ctl
= twl4030_read_reg_cache(codec
, reg
);
566 hs_ctl
|= TWL4030_HF_CTL_REF_EN
;
567 twl4030_write(codec
, reg
, hs_ctl
);
569 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
570 twl4030_write(codec
, reg
, hs_ctl
);
572 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
573 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
574 twl4030_write(codec
, reg
, hs_ctl
);
577 hs_ctl
&= ~TWL4030_HF_CTL_LOOP_EN
;
578 hs_ctl
&= ~TWL4030_HF_CTL_HB_EN
;
579 twl4030_write(codec
, reg
, hs_ctl
);
580 hs_ctl
&= ~TWL4030_HF_CTL_RAMP_EN
;
581 twl4030_write(codec
, reg
, hs_ctl
);
583 hs_ctl
&= ~TWL4030_HF_CTL_REF_EN
;
584 twl4030_write(codec
, reg
, hs_ctl
);
588 static int handsfreelpga_event(struct snd_soc_dapm_widget
*w
,
589 struct snd_kcontrol
*kcontrol
, int event
)
592 case SND_SOC_DAPM_POST_PMU
:
593 handsfree_ramp(w
->codec
, TWL4030_REG_HFL_CTL
, 1);
595 case SND_SOC_DAPM_POST_PMD
:
596 handsfree_ramp(w
->codec
, TWL4030_REG_HFL_CTL
, 0);
602 static int handsfreerpga_event(struct snd_soc_dapm_widget
*w
,
603 struct snd_kcontrol
*kcontrol
, int event
)
606 case SND_SOC_DAPM_POST_PMU
:
607 handsfree_ramp(w
->codec
, TWL4030_REG_HFR_CTL
, 1);
609 case SND_SOC_DAPM_POST_PMD
:
610 handsfree_ramp(w
->codec
, TWL4030_REG_HFR_CTL
, 0);
616 static void headset_ramp(struct snd_soc_codec
*codec
, int ramp
)
618 struct snd_soc_device
*socdev
= codec
->socdev
;
619 struct twl4030_setup_data
*setup
= socdev
->codec_data
;
621 unsigned char hs_gain
, hs_pop
;
622 struct twl4030_priv
*twl4030
= codec
->private_data
;
623 /* Base values for ramp delay calculation: 2^19 - 2^26 */
624 unsigned int ramp_base
[] = {524288, 1048576, 2097152, 4194304,
625 8388608, 16777216, 33554432, 67108864};
627 hs_gain
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_GAIN_SET
);
628 hs_pop
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
630 /* Enable external mute control, this dramatically reduces
632 if (setup
&& setup
->hs_extmute
) {
633 if (setup
->set_hs_extmute
) {
634 setup
->set_hs_extmute(1);
636 hs_pop
|= TWL4030_EXTMUTE
;
637 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
642 /* Headset ramp-up according to the TRM */
643 hs_pop
|= TWL4030_VMID_EN
;
644 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
645 twl4030_write(codec
, TWL4030_REG_HS_GAIN_SET
, hs_gain
);
646 hs_pop
|= TWL4030_RAMP_EN
;
647 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
648 /* Wait ramp delay time + 1, so the VMID can settle */
649 mdelay((ramp_base
[(hs_pop
& TWL4030_RAMP_DELAY
) >> 2] /
650 twl4030
->sysclk
) + 1);
652 /* Headset ramp-down _not_ according to
653 * the TRM, but in a way that it is working */
654 hs_pop
&= ~TWL4030_RAMP_EN
;
655 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
656 /* Wait ramp delay time + 1, so the VMID can settle */
657 mdelay((ramp_base
[(hs_pop
& TWL4030_RAMP_DELAY
) >> 2] /
658 twl4030
->sysclk
) + 1);
659 /* Bypass the reg_cache to mute the headset */
660 twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
,
662 TWL4030_REG_HS_GAIN_SET
);
664 hs_pop
&= ~TWL4030_VMID_EN
;
665 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
668 /* Disable external mute */
669 if (setup
&& setup
->hs_extmute
) {
670 if (setup
->set_hs_extmute
) {
671 setup
->set_hs_extmute(0);
673 hs_pop
&= ~TWL4030_EXTMUTE
;
674 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
679 static int headsetlpga_event(struct snd_soc_dapm_widget
*w
,
680 struct snd_kcontrol
*kcontrol
, int event
)
682 struct twl4030_priv
*twl4030
= w
->codec
->private_data
;
685 case SND_SOC_DAPM_POST_PMU
:
686 /* Do the ramp-up only once */
687 if (!twl4030
->hsr_enabled
)
688 headset_ramp(w
->codec
, 1);
690 twl4030
->hsl_enabled
= 1;
692 case SND_SOC_DAPM_POST_PMD
:
693 /* Do the ramp-down only if both headsetL/R is disabled */
694 if (!twl4030
->hsr_enabled
)
695 headset_ramp(w
->codec
, 0);
697 twl4030
->hsl_enabled
= 0;
703 static int headsetrpga_event(struct snd_soc_dapm_widget
*w
,
704 struct snd_kcontrol
*kcontrol
, int event
)
706 struct twl4030_priv
*twl4030
= w
->codec
->private_data
;
709 case SND_SOC_DAPM_POST_PMU
:
710 /* Do the ramp-up only once */
711 if (!twl4030
->hsl_enabled
)
712 headset_ramp(w
->codec
, 1);
714 twl4030
->hsr_enabled
= 1;
716 case SND_SOC_DAPM_POST_PMD
:
717 /* Do the ramp-down only if both headsetL/R is disabled */
718 if (!twl4030
->hsl_enabled
)
719 headset_ramp(w
->codec
, 0);
721 twl4030
->hsr_enabled
= 0;
728 * Some of the gain controls in TWL (mostly those which are associated with
729 * the outputs) are implemented in an interesting way:
730 * 0x0 : Power down (mute)
734 * Inverting not going to help with these.
735 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
737 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
738 xinvert, tlv_array) \
739 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
740 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
741 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
742 .tlv.p = (tlv_array), \
743 .info = snd_soc_info_volsw, \
744 .get = snd_soc_get_volsw_twl4030, \
745 .put = snd_soc_put_volsw_twl4030, \
746 .private_value = (unsigned long)&(struct soc_mixer_control) \
747 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
748 .max = xmax, .invert = xinvert} }
749 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
750 xinvert, tlv_array) \
751 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
752 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
753 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
754 .tlv.p = (tlv_array), \
755 .info = snd_soc_info_volsw_2r, \
756 .get = snd_soc_get_volsw_r2_twl4030,\
757 .put = snd_soc_put_volsw_r2_twl4030, \
758 .private_value = (unsigned long)&(struct soc_mixer_control) \
759 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
760 .rshift = xshift, .max = xmax, .invert = xinvert} }
761 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
762 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
765 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
766 struct snd_ctl_elem_value
*ucontrol
)
768 struct soc_mixer_control
*mc
=
769 (struct soc_mixer_control
*)kcontrol
->private_value
;
770 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
771 unsigned int reg
= mc
->reg
;
772 unsigned int shift
= mc
->shift
;
773 unsigned int rshift
= mc
->rshift
;
775 int mask
= (1 << fls(max
)) - 1;
777 ucontrol
->value
.integer
.value
[0] =
778 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
779 if (ucontrol
->value
.integer
.value
[0])
780 ucontrol
->value
.integer
.value
[0] =
781 max
+ 1 - ucontrol
->value
.integer
.value
[0];
783 if (shift
!= rshift
) {
784 ucontrol
->value
.integer
.value
[1] =
785 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
786 if (ucontrol
->value
.integer
.value
[1])
787 ucontrol
->value
.integer
.value
[1] =
788 max
+ 1 - ucontrol
->value
.integer
.value
[1];
794 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
795 struct snd_ctl_elem_value
*ucontrol
)
797 struct soc_mixer_control
*mc
=
798 (struct soc_mixer_control
*)kcontrol
->private_value
;
799 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
800 unsigned int reg
= mc
->reg
;
801 unsigned int shift
= mc
->shift
;
802 unsigned int rshift
= mc
->rshift
;
804 int mask
= (1 << fls(max
)) - 1;
805 unsigned short val
, val2
, val_mask
;
807 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
809 val_mask
= mask
<< shift
;
813 if (shift
!= rshift
) {
814 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
815 val_mask
|= mask
<< rshift
;
817 val2
= max
+ 1 - val2
;
818 val
|= val2
<< rshift
;
820 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
823 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
824 struct snd_ctl_elem_value
*ucontrol
)
826 struct soc_mixer_control
*mc
=
827 (struct soc_mixer_control
*)kcontrol
->private_value
;
828 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
829 unsigned int reg
= mc
->reg
;
830 unsigned int reg2
= mc
->rreg
;
831 unsigned int shift
= mc
->shift
;
833 int mask
= (1<<fls(max
))-1;
835 ucontrol
->value
.integer
.value
[0] =
836 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
837 ucontrol
->value
.integer
.value
[1] =
838 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
840 if (ucontrol
->value
.integer
.value
[0])
841 ucontrol
->value
.integer
.value
[0] =
842 max
+ 1 - ucontrol
->value
.integer
.value
[0];
843 if (ucontrol
->value
.integer
.value
[1])
844 ucontrol
->value
.integer
.value
[1] =
845 max
+ 1 - ucontrol
->value
.integer
.value
[1];
850 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
851 struct snd_ctl_elem_value
*ucontrol
)
853 struct soc_mixer_control
*mc
=
854 (struct soc_mixer_control
*)kcontrol
->private_value
;
855 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
856 unsigned int reg
= mc
->reg
;
857 unsigned int reg2
= mc
->rreg
;
858 unsigned int shift
= mc
->shift
;
860 int mask
= (1 << fls(max
)) - 1;
862 unsigned short val
, val2
, val_mask
;
864 val_mask
= mask
<< shift
;
865 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
866 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
871 val2
= max
+ 1 - val2
;
874 val2
= val2
<< shift
;
876 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
880 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
884 /* Codec operation modes */
885 static const char *twl4030_op_modes_texts
[] = {
886 "Option 2 (voice/audio)", "Option 1 (audio)"
889 static const struct soc_enum twl4030_op_modes_enum
=
890 SOC_ENUM_SINGLE(TWL4030_REG_CODEC_MODE
, 0,
891 ARRAY_SIZE(twl4030_op_modes_texts
),
892 twl4030_op_modes_texts
);
894 static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol
*kcontrol
,
895 struct snd_ctl_elem_value
*ucontrol
)
897 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
898 struct twl4030_priv
*twl4030
= codec
->private_data
;
899 struct soc_enum
*e
= (struct soc_enum
*)kcontrol
->private_value
;
901 unsigned short mask
, bitmask
;
903 if (twl4030
->configured
) {
904 printk(KERN_ERR
"twl4030 operation mode cannot be "
905 "changed on-the-fly\n");
909 for (bitmask
= 1; bitmask
< e
->max
; bitmask
<<= 1)
911 if (ucontrol
->value
.enumerated
.item
[0] > e
->max
- 1)
914 val
= ucontrol
->value
.enumerated
.item
[0] << e
->shift_l
;
915 mask
= (bitmask
- 1) << e
->shift_l
;
916 if (e
->shift_l
!= e
->shift_r
) {
917 if (ucontrol
->value
.enumerated
.item
[1] > e
->max
- 1)
919 val
|= ucontrol
->value
.enumerated
.item
[1] << e
->shift_r
;
920 mask
|= (bitmask
- 1) << e
->shift_r
;
923 return snd_soc_update_bits(codec
, e
->reg
, mask
, val
);
927 * FGAIN volume control:
928 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
930 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
933 * CGAIN volume control:
934 * 0 dB to 12 dB in 6 dB steps
935 * value 2 and 3 means 12 dB
937 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
940 * Voice Downlink GAIN volume control:
941 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
943 static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv
, -3700, 100, 1);
946 * Analog playback gain
947 * -24 dB to 12 dB in 2 dB steps
949 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
952 * Gain controls tied to outputs
953 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
955 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
958 * Gain control for earpiece amplifier
959 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
961 static DECLARE_TLV_DB_SCALE(output_ear_tvl
, -600, 600, 1);
964 * Capture gain after the ADCs
965 * from 0 dB to 31 dB in 1 dB steps
967 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
970 * Gain control for input amplifiers
971 * 0 dB to 30 dB in 6 dB steps
973 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
975 /* AVADC clock priority */
976 static const char *twl4030_avadc_clk_priority_texts
[] = {
977 "Voice high priority", "HiFi high priority"
980 static const struct soc_enum twl4030_avadc_clk_priority_enum
=
981 SOC_ENUM_SINGLE(TWL4030_REG_AVADC_CTL
, 2,
982 ARRAY_SIZE(twl4030_avadc_clk_priority_texts
),
983 twl4030_avadc_clk_priority_texts
);
985 static const char *twl4030_rampdelay_texts
[] = {
986 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
987 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
991 static const struct soc_enum twl4030_rampdelay_enum
=
992 SOC_ENUM_SINGLE(TWL4030_REG_HS_POPN_SET
, 2,
993 ARRAY_SIZE(twl4030_rampdelay_texts
),
994 twl4030_rampdelay_texts
);
996 /* Vibra H-bridge direction mode */
997 static const char *twl4030_vibradirmode_texts
[] = {
998 "Vibra H-bridge direction", "Audio data MSB",
1001 static const struct soc_enum twl4030_vibradirmode_enum
=
1002 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 5,
1003 ARRAY_SIZE(twl4030_vibradirmode_texts
),
1004 twl4030_vibradirmode_texts
);
1006 /* Vibra H-bridge direction */
1007 static const char *twl4030_vibradir_texts
[] = {
1008 "Positive polarity", "Negative polarity",
1011 static const struct soc_enum twl4030_vibradir_enum
=
1012 SOC_ENUM_SINGLE(TWL4030_REG_VIBRA_CTL
, 1,
1013 ARRAY_SIZE(twl4030_vibradir_texts
),
1014 twl4030_vibradir_texts
);
1016 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
1017 /* Codec operation mode control */
1018 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum
,
1019 snd_soc_get_enum_double
,
1020 snd_soc_put_twl4030_opmode_enum_double
),
1022 /* Common playback gain controls */
1023 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1024 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
1025 0, 0x3f, 0, digital_fine_tlv
),
1026 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1027 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
1028 0, 0x3f, 0, digital_fine_tlv
),
1030 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1031 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
1032 6, 0x2, 0, digital_coarse_tlv
),
1033 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1034 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
1035 6, 0x2, 0, digital_coarse_tlv
),
1037 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1038 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
1039 3, 0x12, 1, analog_tlv
),
1040 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1041 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
1042 3, 0x12, 1, analog_tlv
),
1043 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1044 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
1046 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1047 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
1050 /* Common voice downlink gain controls */
1051 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1052 TWL4030_REG_VRXPGA
, 0, 0x31, 0, digital_voice_downlink_tlv
),
1054 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1055 TWL4030_REG_VDL_APGA_CTL
, 3, 0x12, 1, analog_tlv
),
1057 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1058 TWL4030_REG_VDL_APGA_CTL
, 1, 1, 0),
1060 /* Separate output gain controls */
1061 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
1062 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
1063 4, 3, 0, output_tvl
),
1065 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
1066 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
1068 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
1069 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
1070 4, 3, 0, output_tvl
),
1072 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
1073 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_ear_tvl
),
1075 /* Common capture gain controls */
1076 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
1077 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
1078 0, 0x1f, 0, digital_capture_tlv
),
1079 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1080 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
1081 0, 0x1f, 0, digital_capture_tlv
),
1083 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
1084 0, 3, 5, 0, input_gain_tlv
),
1086 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum
),
1088 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum
),
1090 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum
),
1091 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum
),
1094 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
1095 /* Left channel inputs */
1096 SND_SOC_DAPM_INPUT("MAINMIC"),
1097 SND_SOC_DAPM_INPUT("HSMIC"),
1098 SND_SOC_DAPM_INPUT("AUXL"),
1099 SND_SOC_DAPM_INPUT("CARKITMIC"),
1100 /* Right channel inputs */
1101 SND_SOC_DAPM_INPUT("SUBMIC"),
1102 SND_SOC_DAPM_INPUT("AUXR"),
1103 /* Digital microphones (Stereo) */
1104 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1105 SND_SOC_DAPM_INPUT("DIGIMIC1"),
1108 SND_SOC_DAPM_OUTPUT("OUTL"),
1109 SND_SOC_DAPM_OUTPUT("OUTR"),
1110 SND_SOC_DAPM_OUTPUT("EARPIECE"),
1111 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1112 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
1113 SND_SOC_DAPM_OUTPUT("HSOL"),
1114 SND_SOC_DAPM_OUTPUT("HSOR"),
1115 SND_SOC_DAPM_OUTPUT("CARKITL"),
1116 SND_SOC_DAPM_OUTPUT("CARKITR"),
1117 SND_SOC_DAPM_OUTPUT("HFL"),
1118 SND_SOC_DAPM_OUTPUT("HFR"),
1119 SND_SOC_DAPM_OUTPUT("VIBRA"),
1122 SND_SOC_DAPM_DAC("DAC Right1", "Right Front HiFi Playback",
1123 SND_SOC_NOPM
, 0, 0),
1124 SND_SOC_DAPM_DAC("DAC Left1", "Left Front HiFi Playback",
1125 SND_SOC_NOPM
, 0, 0),
1126 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear HiFi Playback",
1127 SND_SOC_NOPM
, 0, 0),
1128 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear HiFi Playback",
1129 SND_SOC_NOPM
, 0, 0),
1130 SND_SOC_DAPM_DAC("DAC Voice", "Voice Playback",
1131 SND_SOC_NOPM
, 0, 0),
1133 /* Analog bypasses */
1134 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1135 &twl4030_dapm_abypassr1_control
),
1136 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1137 &twl4030_dapm_abypassl1_control
),
1138 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1139 &twl4030_dapm_abypassr2_control
),
1140 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM
, 0, 0,
1141 &twl4030_dapm_abypassl2_control
),
1142 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM
, 0, 0,
1143 &twl4030_dapm_abypassv_control
),
1145 /* Master analog loopback switch */
1146 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1
, 5, 0,
1149 /* Digital bypasses */
1150 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM
, 0, 0,
1151 &twl4030_dapm_dbypassl_control
),
1152 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM
, 0, 0,
1153 &twl4030_dapm_dbypassr_control
),
1154 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM
, 0, 0,
1155 &twl4030_dapm_dbypassv_control
),
1157 /* Digital mixers, power control for the physical DACs */
1158 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1159 TWL4030_REG_AVDAC_CTL
, 0, 0, NULL
, 0),
1160 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1161 TWL4030_REG_AVDAC_CTL
, 1, 0, NULL
, 0),
1162 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1163 TWL4030_REG_AVDAC_CTL
, 2, 0, NULL
, 0),
1164 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1165 TWL4030_REG_AVDAC_CTL
, 3, 0, NULL
, 0),
1166 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1167 TWL4030_REG_AVDAC_CTL
, 4, 0, NULL
, 0),
1169 /* Analog mixers, power control for the physical PGAs */
1170 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1171 TWL4030_REG_ARXR1_APGA_CTL
, 0, 0, NULL
, 0),
1172 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1173 TWL4030_REG_ARXL1_APGA_CTL
, 0, 0, NULL
, 0),
1174 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1175 TWL4030_REG_ARXR2_APGA_CTL
, 0, 0, NULL
, 0),
1176 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1177 TWL4030_REG_ARXL2_APGA_CTL
, 0, 0, NULL
, 0),
1178 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1179 TWL4030_REG_VDL_APGA_CTL
, 0, 0, NULL
, 0),
1181 /* Output MIXER controls */
1183 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM
, 0, 0,
1184 &twl4030_dapm_earpiece_controls
[0],
1185 ARRAY_SIZE(twl4030_dapm_earpiece_controls
)),
1186 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM
,
1187 0, 0, NULL
, 0, earpiecepga_event
,
1188 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1190 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM
, 0, 0,
1191 &twl4030_dapm_predrivel_controls
[0],
1192 ARRAY_SIZE(twl4030_dapm_predrivel_controls
)),
1193 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM
,
1194 0, 0, NULL
, 0, predrivelpga_event
,
1195 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1196 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM
, 0, 0,
1197 &twl4030_dapm_predriver_controls
[0],
1198 ARRAY_SIZE(twl4030_dapm_predriver_controls
)),
1199 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM
,
1200 0, 0, NULL
, 0, predriverpga_event
,
1201 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1203 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM
, 0, 0,
1204 &twl4030_dapm_hsol_controls
[0],
1205 ARRAY_SIZE(twl4030_dapm_hsol_controls
)),
1206 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM
,
1207 0, 0, NULL
, 0, headsetlpga_event
,
1208 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1209 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM
, 0, 0,
1210 &twl4030_dapm_hsor_controls
[0],
1211 ARRAY_SIZE(twl4030_dapm_hsor_controls
)),
1212 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM
,
1213 0, 0, NULL
, 0, headsetrpga_event
,
1214 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1216 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM
, 0, 0,
1217 &twl4030_dapm_carkitl_controls
[0],
1218 ARRAY_SIZE(twl4030_dapm_carkitl_controls
)),
1219 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM
,
1220 0, 0, NULL
, 0, carkitlpga_event
,
1221 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1222 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM
, 0, 0,
1223 &twl4030_dapm_carkitr_controls
[0],
1224 ARRAY_SIZE(twl4030_dapm_carkitr_controls
)),
1225 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM
,
1226 0, 0, NULL
, 0, carkitrpga_event
,
1227 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1229 /* Output MUX controls */
1231 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM
, 0, 0,
1232 &twl4030_dapm_handsfreel_control
),
1233 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM
, 0, 0,
1234 &twl4030_dapm_handsfreelmute_control
),
1235 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM
,
1236 0, 0, NULL
, 0, handsfreelpga_event
,
1237 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1238 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM
, 5, 0,
1239 &twl4030_dapm_handsfreer_control
),
1240 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM
, 0, 0,
1241 &twl4030_dapm_handsfreermute_control
),
1242 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM
,
1243 0, 0, NULL
, 0, handsfreerpga_event
,
1244 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
1246 SND_SOC_DAPM_MUX("Vibra Mux", TWL4030_REG_VIBRA_CTL
, 0, 0,
1247 &twl4030_dapm_vibra_control
),
1248 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM
, 0, 0,
1249 &twl4030_dapm_vibrapath_control
),
1251 /* Introducing four virtual ADC, since TWL4030 have four channel for
1253 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
1254 SND_SOC_NOPM
, 0, 0),
1255 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
1256 SND_SOC_NOPM
, 0, 0),
1257 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
1258 SND_SOC_NOPM
, 0, 0),
1259 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
1260 SND_SOC_NOPM
, 0, 0),
1262 /* Analog/Digital mic path selection.
1263 TX1 Left/Right: either analog Left/Right or Digimic0
1264 TX2 Left/Right: either analog Left/Right or Digimic1 */
1265 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
1266 &twl4030_dapm_micpathtx1_control
, micpath_event
,
1267 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
1268 SND_SOC_DAPM_POST_REG
),
1269 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
1270 &twl4030_dapm_micpathtx2_control
, micpath_event
,
1271 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
1272 SND_SOC_DAPM_POST_REG
),
1274 /* Analog input mixers for the capture amplifiers */
1275 SND_SOC_DAPM_MIXER("Analog Left",
1276 TWL4030_REG_ANAMICL
, 4, 0,
1277 &twl4030_dapm_analoglmic_controls
[0],
1278 ARRAY_SIZE(twl4030_dapm_analoglmic_controls
)),
1279 SND_SOC_DAPM_MIXER("Analog Right",
1280 TWL4030_REG_ANAMICR
, 4, 0,
1281 &twl4030_dapm_analogrmic_controls
[0],
1282 ARRAY_SIZE(twl4030_dapm_analogrmic_controls
)),
1284 SND_SOC_DAPM_PGA("ADC Physical Left",
1285 TWL4030_REG_AVADC_CTL
, 3, 0, NULL
, 0),
1286 SND_SOC_DAPM_PGA("ADC Physical Right",
1287 TWL4030_REG_AVADC_CTL
, 1, 0, NULL
, 0),
1289 SND_SOC_DAPM_PGA("Digimic0 Enable",
1290 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0),
1291 SND_SOC_DAPM_PGA("Digimic1 Enable",
1292 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0),
1294 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
1295 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
1296 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
1300 static const struct snd_soc_dapm_route intercon
[] = {
1301 {"Digital L1 Playback Mixer", NULL
, "DAC Left1"},
1302 {"Digital R1 Playback Mixer", NULL
, "DAC Right1"},
1303 {"Digital L2 Playback Mixer", NULL
, "DAC Left2"},
1304 {"Digital R2 Playback Mixer", NULL
, "DAC Right2"},
1305 {"Digital Voice Playback Mixer", NULL
, "DAC Voice"},
1307 {"Analog L1 Playback Mixer", NULL
, "Digital L1 Playback Mixer"},
1308 {"Analog R1 Playback Mixer", NULL
, "Digital R1 Playback Mixer"},
1309 {"Analog L2 Playback Mixer", NULL
, "Digital L2 Playback Mixer"},
1310 {"Analog R2 Playback Mixer", NULL
, "Digital R2 Playback Mixer"},
1311 {"Analog Voice Playback Mixer", NULL
, "Digital Voice Playback Mixer"},
1313 /* Internal playback routings */
1315 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1316 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1317 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1318 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1319 {"Earpiece PGA", NULL
, "Earpiece Mixer"},
1321 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1322 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1323 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1324 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1325 {"PredriveL PGA", NULL
, "PredriveL Mixer"},
1327 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1328 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1329 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1330 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1331 {"PredriveR PGA", NULL
, "PredriveR Mixer"},
1333 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1334 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1335 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1336 {"HeadsetL PGA", NULL
, "HeadsetL Mixer"},
1338 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1339 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1340 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1341 {"HeadsetR PGA", NULL
, "HeadsetR Mixer"},
1343 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1344 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1345 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1346 {"CarkitL PGA", NULL
, "CarkitL Mixer"},
1348 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1349 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1350 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1351 {"CarkitR PGA", NULL
, "CarkitR Mixer"},
1353 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1354 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1355 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1356 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
1357 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1358 {"HandsfreeL PGA", NULL
, "HandsfreeL"},
1360 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1361 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1362 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1363 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
1364 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1365 {"HandsfreeR PGA", NULL
, "HandsfreeR"},
1367 {"Vibra Mux", "AudioL1", "DAC Left1"},
1368 {"Vibra Mux", "AudioR1", "DAC Right1"},
1369 {"Vibra Mux", "AudioL2", "DAC Left2"},
1370 {"Vibra Mux", "AudioR2", "DAC Right2"},
1373 {"OUTL", NULL
, "Analog L2 Playback Mixer"},
1374 {"OUTR", NULL
, "Analog R2 Playback Mixer"},
1375 {"EARPIECE", NULL
, "Earpiece PGA"},
1376 {"PREDRIVEL", NULL
, "PredriveL PGA"},
1377 {"PREDRIVER", NULL
, "PredriveR PGA"},
1378 {"HSOL", NULL
, "HeadsetL PGA"},
1379 {"HSOR", NULL
, "HeadsetR PGA"},
1380 {"CARKITL", NULL
, "CarkitL PGA"},
1381 {"CARKITR", NULL
, "CarkitR PGA"},
1382 {"HFL", NULL
, "HandsfreeL PGA"},
1383 {"HFR", NULL
, "HandsfreeR PGA"},
1384 {"Vibra Route", "Audio", "Vibra Mux"},
1385 {"VIBRA", NULL
, "Vibra Route"},
1388 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1389 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1390 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1391 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
1393 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1394 {"Analog Right", "AUXR Capture Switch", "AUXR"},
1396 {"ADC Physical Left", NULL
, "Analog Left"},
1397 {"ADC Physical Right", NULL
, "Analog Right"},
1399 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
1400 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
1402 /* TX1 Left capture path */
1403 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
1404 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1405 /* TX1 Right capture path */
1406 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
1407 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1408 /* TX2 Left capture path */
1409 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
1410 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1411 /* TX2 Right capture path */
1412 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
1413 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1415 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
1416 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
1417 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
1418 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
1420 /* Analog bypass routes */
1421 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1422 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1423 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1424 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1425 {"Voice Analog Loopback", "Switch", "Analog Left"},
1427 /* Supply for the Analog loopbacks */
1428 {"Right1 Analog Loopback", NULL
, "FM Loop Enable"},
1429 {"Left1 Analog Loopback", NULL
, "FM Loop Enable"},
1430 {"Right2 Analog Loopback", NULL
, "FM Loop Enable"},
1431 {"Left2 Analog Loopback", NULL
, "FM Loop Enable"},
1432 {"Voice Analog Loopback", NULL
, "FM Loop Enable"},
1434 {"Analog R1 Playback Mixer", NULL
, "Right1 Analog Loopback"},
1435 {"Analog L1 Playback Mixer", NULL
, "Left1 Analog Loopback"},
1436 {"Analog R2 Playback Mixer", NULL
, "Right2 Analog Loopback"},
1437 {"Analog L2 Playback Mixer", NULL
, "Left2 Analog Loopback"},
1438 {"Analog Voice Playback Mixer", NULL
, "Voice Analog Loopback"},
1440 /* Digital bypass routes */
1441 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1442 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
1443 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
1445 {"Digital R2 Playback Mixer", NULL
, "Right Digital Loopback"},
1446 {"Digital L2 Playback Mixer", NULL
, "Left Digital Loopback"},
1447 {"Digital Voice Playback Mixer", NULL
, "Voice Digital Loopback"},
1451 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
1453 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
1454 ARRAY_SIZE(twl4030_dapm_widgets
));
1456 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
1458 snd_soc_dapm_new_widgets(codec
);
1462 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
1463 enum snd_soc_bias_level level
)
1466 case SND_SOC_BIAS_ON
:
1467 twl4030_apll_enable(codec
, 1);
1469 case SND_SOC_BIAS_PREPARE
:
1471 case SND_SOC_BIAS_STANDBY
:
1472 if (codec
->bias_level
== SND_SOC_BIAS_OFF
)
1473 twl4030_power_up(codec
);
1474 twl4030_apll_enable(codec
, 0);
1476 case SND_SOC_BIAS_OFF
:
1477 twl4030_power_down(codec
);
1480 codec
->bias_level
= level
;
1485 static void twl4030_constraints(struct twl4030_priv
*twl4030
,
1486 struct snd_pcm_substream
*mst_substream
)
1488 struct snd_pcm_substream
*slv_substream
;
1490 /* Pick the stream, which need to be constrained */
1491 if (mst_substream
== twl4030
->master_substream
)
1492 slv_substream
= twl4030
->slave_substream
;
1493 else if (mst_substream
== twl4030
->slave_substream
)
1494 slv_substream
= twl4030
->master_substream
;
1495 else /* This should not happen.. */
1498 /* Set the constraints according to the already configured stream */
1499 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1500 SNDRV_PCM_HW_PARAM_RATE
,
1504 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1505 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
,
1506 twl4030
->sample_bits
,
1507 twl4030
->sample_bits
);
1509 snd_pcm_hw_constraint_minmax(slv_substream
->runtime
,
1510 SNDRV_PCM_HW_PARAM_CHANNELS
,
1515 /* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1516 * capture has to be enabled/disabled. */
1517 static void twl4030_tdm_enable(struct snd_soc_codec
*codec
, int direction
,
1522 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1524 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1525 mask
= TWL4030_ARXL1_VRX_EN
| TWL4030_ARXR1_EN
;
1527 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1534 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1537 static int twl4030_startup(struct snd_pcm_substream
*substream
,
1538 struct snd_soc_dai
*dai
)
1540 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1541 struct snd_soc_device
*socdev
= rtd
->socdev
;
1542 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1543 struct twl4030_priv
*twl4030
= codec
->private_data
;
1545 if (twl4030
->master_substream
) {
1546 twl4030
->slave_substream
= substream
;
1547 /* The DAI has one configuration for playback and capture, so
1548 * if the DAI has been already configured then constrain this
1549 * substream to match it. */
1550 if (twl4030
->configured
)
1551 twl4030_constraints(twl4030
, twl4030
->master_substream
);
1553 if (!(twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
) &
1554 TWL4030_OPTION_1
)) {
1555 /* In option2 4 channel is not supported, set the
1556 * constraint for the first stream for channels, the
1557 * second stream will 'inherit' this cosntraint */
1558 snd_pcm_hw_constraint_minmax(substream
->runtime
,
1559 SNDRV_PCM_HW_PARAM_CHANNELS
,
1562 twl4030
->master_substream
= substream
;
1568 static void twl4030_shutdown(struct snd_pcm_substream
*substream
,
1569 struct snd_soc_dai
*dai
)
1571 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1572 struct snd_soc_device
*socdev
= rtd
->socdev
;
1573 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1574 struct twl4030_priv
*twl4030
= codec
->private_data
;
1576 if (twl4030
->master_substream
== substream
)
1577 twl4030
->master_substream
= twl4030
->slave_substream
;
1579 twl4030
->slave_substream
= NULL
;
1581 /* If all streams are closed, or the remaining stream has not yet
1582 * been configured than set the DAI as not configured. */
1583 if (!twl4030
->master_substream
)
1584 twl4030
->configured
= 0;
1585 else if (!twl4030
->master_substream
->runtime
->channels
)
1586 twl4030
->configured
= 0;
1588 /* If the closing substream had 4 channel, do the necessary cleanup */
1589 if (substream
->runtime
->channels
== 4)
1590 twl4030_tdm_enable(codec
, substream
->stream
, 0);
1593 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
1594 struct snd_pcm_hw_params
*params
,
1595 struct snd_soc_dai
*dai
)
1597 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1598 struct snd_soc_device
*socdev
= rtd
->socdev
;
1599 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1600 struct twl4030_priv
*twl4030
= codec
->private_data
;
1601 u8 mode
, old_mode
, format
, old_format
;
1603 /* If the substream has 4 channel, do the necessary setup */
1604 if (params_channels(params
) == 4) {
1605 format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1606 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
1608 /* Safety check: are we in the correct operating mode and
1609 * the interface is in TDM mode? */
1610 if ((mode
& TWL4030_OPTION_1
) &&
1611 ((format
& TWL4030_AIF_FORMAT
) == TWL4030_AIF_FORMAT_TDM
))
1612 twl4030_tdm_enable(codec
, substream
->stream
, 1);
1617 if (twl4030
->configured
)
1618 /* Ignoring hw_params for already configured DAI */
1622 old_mode
= twl4030_read_reg_cache(codec
,
1623 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
1624 mode
= old_mode
& ~TWL4030_APLL_RATE
;
1626 switch (params_rate(params
)) {
1628 mode
|= TWL4030_APLL_RATE_8000
;
1631 mode
|= TWL4030_APLL_RATE_11025
;
1634 mode
|= TWL4030_APLL_RATE_12000
;
1637 mode
|= TWL4030_APLL_RATE_16000
;
1640 mode
|= TWL4030_APLL_RATE_22050
;
1643 mode
|= TWL4030_APLL_RATE_24000
;
1646 mode
|= TWL4030_APLL_RATE_32000
;
1649 mode
|= TWL4030_APLL_RATE_44100
;
1652 mode
|= TWL4030_APLL_RATE_48000
;
1655 mode
|= TWL4030_APLL_RATE_96000
;
1658 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1659 params_rate(params
));
1663 if (mode
!= old_mode
) {
1664 /* change rate and set CODECPDZ */
1665 twl4030_codec_enable(codec
, 0);
1666 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1667 twl4030_codec_enable(codec
, 1);
1671 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1672 format
= old_format
;
1673 format
&= ~TWL4030_DATA_WIDTH
;
1674 switch (params_format(params
)) {
1675 case SNDRV_PCM_FORMAT_S16_LE
:
1676 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1678 case SNDRV_PCM_FORMAT_S24_LE
:
1679 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1682 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1683 params_format(params
));
1687 if (format
!= old_format
) {
1689 /* clear CODECPDZ before changing format (codec requirement) */
1690 twl4030_codec_enable(codec
, 0);
1693 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1695 /* set CODECPDZ afterwards */
1696 twl4030_codec_enable(codec
, 1);
1699 /* Store the important parameters for the DAI configuration and set
1700 * the DAI as configured */
1701 twl4030
->configured
= 1;
1702 twl4030
->rate
= params_rate(params
);
1703 twl4030
->sample_bits
= hw_param_interval(params
,
1704 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
)->min
;
1705 twl4030
->channels
= params_channels(params
);
1707 /* If both playback and capture streams are open, and one of them
1708 * is setting the hw parameters right now (since we are here), set
1709 * constraints to the other stream to match the current one. */
1710 if (twl4030
->slave_substream
)
1711 twl4030_constraints(twl4030
, substream
);
1716 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1717 int clk_id
, unsigned int freq
, int dir
)
1719 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1720 struct twl4030_priv
*twl4030
= codec
->private_data
;
1723 apll_ctrl
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
);
1724 apll_ctrl
&= ~TWL4030_APLL_INFREQ
;
1727 apll_ctrl
|= TWL4030_APLL_INFREQ_19200KHZ
;
1728 twl4030
->sysclk
= 19200;
1731 apll_ctrl
|= TWL4030_APLL_INFREQ_26000KHZ
;
1732 twl4030
->sysclk
= 26000;
1735 apll_ctrl
|= TWL4030_APLL_INFREQ_38400KHZ
;
1736 twl4030
->sysclk
= 38400;
1739 printk(KERN_ERR
"TWL4030 set sysclk: unknown rate %d\n",
1744 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, apll_ctrl
);
1749 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1752 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1753 u8 old_format
, format
;
1756 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1757 format
= old_format
;
1759 /* set master/slave audio interface */
1760 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1761 case SND_SOC_DAIFMT_CBM_CFM
:
1762 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1763 format
&= ~(TWL4030_CLK256FS_EN
);
1765 case SND_SOC_DAIFMT_CBS_CFS
:
1766 format
|= TWL4030_AIF_SLAVE_EN
;
1767 format
|= TWL4030_CLK256FS_EN
;
1773 /* interface format */
1774 format
&= ~TWL4030_AIF_FORMAT
;
1775 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1776 case SND_SOC_DAIFMT_I2S
:
1777 format
|= TWL4030_AIF_FORMAT_CODEC
;
1779 case SND_SOC_DAIFMT_DSP_A
:
1780 format
|= TWL4030_AIF_FORMAT_TDM
;
1786 if (format
!= old_format
) {
1788 /* clear CODECPDZ before changing format (codec requirement) */
1789 twl4030_codec_enable(codec
, 0);
1792 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1794 /* set CODECPDZ afterwards */
1795 twl4030_codec_enable(codec
, 1);
1801 static int twl4030_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
1803 struct snd_soc_codec
*codec
= dai
->codec
;
1804 u8 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1807 reg
|= TWL4030_AIF_TRI_EN
;
1809 reg
&= ~TWL4030_AIF_TRI_EN
;
1811 return twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, reg
);
1814 /* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1815 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1816 static void twl4030_voice_enable(struct snd_soc_codec
*codec
, int direction
,
1821 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_OPTION
);
1823 if (direction
== SNDRV_PCM_STREAM_PLAYBACK
)
1824 mask
= TWL4030_ARXL1_VRX_EN
;
1826 mask
= TWL4030_ATXL2_VTXL_EN
| TWL4030_ATXR2_VTXR_EN
;
1833 twl4030_write(codec
, TWL4030_REG_OPTION
, reg
);
1836 static int twl4030_voice_startup(struct snd_pcm_substream
*substream
,
1837 struct snd_soc_dai
*dai
)
1839 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1840 struct snd_soc_device
*socdev
= rtd
->socdev
;
1841 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1845 /* If the system master clock is not 26MHz, the voice PCM interface is
1848 infreq
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
)
1849 & TWL4030_APLL_INFREQ
;
1851 if (infreq
!= TWL4030_APLL_INFREQ_26000KHZ
) {
1852 printk(KERN_ERR
"TWL4030 voice startup: "
1853 "MCLK is not 26MHz, call set_sysclk() on init\n");
1857 /* If the codec mode is not option2, the voice PCM interface is not
1860 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
1863 if (mode
!= TWL4030_OPTION_2
) {
1864 printk(KERN_ERR
"TWL4030 voice startup: "
1865 "the codec mode is not option2\n");
1872 static void twl4030_voice_shutdown(struct snd_pcm_substream
*substream
,
1873 struct snd_soc_dai
*dai
)
1875 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1876 struct snd_soc_device
*socdev
= rtd
->socdev
;
1877 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1879 /* Enable voice digital filters */
1880 twl4030_voice_enable(codec
, substream
->stream
, 0);
1883 static int twl4030_voice_hw_params(struct snd_pcm_substream
*substream
,
1884 struct snd_pcm_hw_params
*params
, struct snd_soc_dai
*dai
)
1886 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1887 struct snd_soc_device
*socdev
= rtd
->socdev
;
1888 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1891 /* Enable voice digital filters */
1892 twl4030_voice_enable(codec
, substream
->stream
, 1);
1895 old_mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
)
1896 & ~(TWL4030_CODECPDZ
);
1899 switch (params_rate(params
)) {
1901 mode
&= ~(TWL4030_SEL_16K
);
1904 mode
|= TWL4030_SEL_16K
;
1907 printk(KERN_ERR
"TWL4030 voice hw params: unknown rate %d\n",
1908 params_rate(params
));
1912 if (mode
!= old_mode
) {
1913 /* change rate and set CODECPDZ */
1914 twl4030_codec_enable(codec
, 0);
1915 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1916 twl4030_codec_enable(codec
, 1);
1922 static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1923 int clk_id
, unsigned int freq
, int dir
)
1925 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1928 apll_ctrl
= twl4030_read_reg_cache(codec
, TWL4030_REG_APLL_CTL
);
1929 apll_ctrl
&= ~TWL4030_APLL_INFREQ
;
1932 apll_ctrl
|= TWL4030_APLL_INFREQ_26000KHZ
;
1935 printk(KERN_ERR
"TWL4030 voice set sysclk: unknown rate %d\n",
1940 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, apll_ctrl
);
1945 static int twl4030_voice_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1948 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1949 u8 old_format
, format
;
1952 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
1953 format
= old_format
;
1955 /* set master/slave audio interface */
1956 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1957 case SND_SOC_DAIFMT_CBM_CFM
:
1958 format
&= ~(TWL4030_VIF_SLAVE_EN
);
1960 case SND_SOC_DAIFMT_CBS_CFS
:
1961 format
|= TWL4030_VIF_SLAVE_EN
;
1967 /* clock inversion */
1968 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1969 case SND_SOC_DAIFMT_IB_NF
:
1970 format
&= ~(TWL4030_VIF_FORMAT
);
1972 case SND_SOC_DAIFMT_NB_IF
:
1973 format
|= TWL4030_VIF_FORMAT
;
1979 if (format
!= old_format
) {
1980 /* change format and set CODECPDZ */
1981 twl4030_codec_enable(codec
, 0);
1982 twl4030_write(codec
, TWL4030_REG_VOICE_IF
, format
);
1983 twl4030_codec_enable(codec
, 1);
1989 static int twl4030_voice_set_tristate(struct snd_soc_dai
*dai
, int tristate
)
1991 struct snd_soc_codec
*codec
= dai
->codec
;
1992 u8 reg
= twl4030_read_reg_cache(codec
, TWL4030_REG_VOICE_IF
);
1995 reg
|= TWL4030_VIF_TRI_EN
;
1997 reg
&= ~TWL4030_VIF_TRI_EN
;
1999 return twl4030_write(codec
, TWL4030_REG_VOICE_IF
, reg
);
2002 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
2003 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
2005 static struct snd_soc_dai_ops twl4030_dai_ops
= {
2006 .startup
= twl4030_startup
,
2007 .shutdown
= twl4030_shutdown
,
2008 .hw_params
= twl4030_hw_params
,
2009 .set_sysclk
= twl4030_set_dai_sysclk
,
2010 .set_fmt
= twl4030_set_dai_fmt
,
2011 .set_tristate
= twl4030_set_tristate
,
2014 static struct snd_soc_dai_ops twl4030_dai_voice_ops
= {
2015 .startup
= twl4030_voice_startup
,
2016 .shutdown
= twl4030_voice_shutdown
,
2017 .hw_params
= twl4030_voice_hw_params
,
2018 .set_sysclk
= twl4030_voice_set_dai_sysclk
,
2019 .set_fmt
= twl4030_voice_set_dai_fmt
,
2020 .set_tristate
= twl4030_voice_set_tristate
,
2023 struct snd_soc_dai twl4030_dai
[] = {
2027 .stream_name
= "HiFi Playback",
2030 .rates
= TWL4030_RATES
| SNDRV_PCM_RATE_96000
,
2031 .formats
= TWL4030_FORMATS
,},
2033 .stream_name
= "Capture",
2036 .rates
= TWL4030_RATES
,
2037 .formats
= TWL4030_FORMATS
,},
2038 .ops
= &twl4030_dai_ops
,
2041 .name
= "twl4030 Voice",
2043 .stream_name
= "Voice Playback",
2046 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
2047 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
2049 .stream_name
= "Capture",
2052 .rates
= SNDRV_PCM_RATE_8000
| SNDRV_PCM_RATE_16000
,
2053 .formats
= SNDRV_PCM_FMTBIT_S16_LE
,},
2054 .ops
= &twl4030_dai_voice_ops
,
2057 EXPORT_SYMBOL_GPL(twl4030_dai
);
2059 static int twl4030_soc_suspend(struct platform_device
*pdev
, pm_message_t state
)
2061 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2062 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2064 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2069 static int twl4030_soc_resume(struct platform_device
*pdev
)
2071 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2072 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2074 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
2075 twl4030_set_bias_level(codec
, codec
->suspend_bias_level
);
2079 static struct snd_soc_codec
*twl4030_codec
;
2081 static int twl4030_soc_probe(struct platform_device
*pdev
)
2083 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2084 struct twl4030_setup_data
*setup
= socdev
->codec_data
;
2085 struct snd_soc_codec
*codec
;
2086 struct twl4030_priv
*twl4030
;
2089 BUG_ON(!twl4030_codec
);
2091 codec
= twl4030_codec
;
2092 twl4030
= codec
->private_data
;
2093 socdev
->card
->codec
= codec
;
2095 /* Configuration for headset ramp delay from setup data */
2097 unsigned char hs_pop
;
2100 twl4030
->sysclk
= setup
->sysclk
;
2102 twl4030
->sysclk
= 26000;
2104 hs_pop
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
2105 hs_pop
&= ~TWL4030_RAMP_DELAY
;
2106 hs_pop
|= (setup
->ramp_delay_value
<< 2);
2107 twl4030_write_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
, hs_pop
);
2109 twl4030
->sysclk
= 26000;
2113 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
2115 dev_err(&pdev
->dev
, "failed to create pcms\n");
2119 snd_soc_add_controls(codec
, twl4030_snd_controls
,
2120 ARRAY_SIZE(twl4030_snd_controls
));
2121 twl4030_add_widgets(codec
);
2123 ret
= snd_soc_init_card(socdev
);
2125 dev_err(&pdev
->dev
, "failed to register card\n");
2132 snd_soc_free_pcms(socdev
);
2133 snd_soc_dapm_free(socdev
);
2138 static int twl4030_soc_remove(struct platform_device
*pdev
)
2140 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
2141 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
2143 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2144 snd_soc_free_pcms(socdev
);
2145 snd_soc_dapm_free(socdev
);
2146 kfree(codec
->private_data
);
2152 static int __devinit
twl4030_codec_probe(struct platform_device
*pdev
)
2154 struct twl4030_codec_audio_data
*pdata
= pdev
->dev
.platform_data
;
2155 struct snd_soc_codec
*codec
;
2156 struct twl4030_priv
*twl4030
;
2159 if (!pdata
|| !(pdata
->audio_mclk
== 19200000 ||
2160 pdata
->audio_mclk
== 26000000 ||
2161 pdata
->audio_mclk
== 38400000)) {
2162 dev_err(&pdev
->dev
, "Invalid platform_data\n");
2166 twl4030
= kzalloc(sizeof(struct twl4030_priv
), GFP_KERNEL
);
2167 if (twl4030
== NULL
) {
2168 dev_err(&pdev
->dev
, "Can not allocate memroy\n");
2172 codec
= &twl4030
->codec
;
2173 codec
->private_data
= twl4030
;
2174 codec
->dev
= &pdev
->dev
;
2175 twl4030_dai
[0].dev
= &pdev
->dev
;
2176 twl4030_dai
[1].dev
= &pdev
->dev
;
2178 mutex_init(&codec
->mutex
);
2179 INIT_LIST_HEAD(&codec
->dapm_widgets
);
2180 INIT_LIST_HEAD(&codec
->dapm_paths
);
2182 codec
->name
= "twl4030";
2183 codec
->owner
= THIS_MODULE
;
2184 codec
->read
= twl4030_read_reg_cache
;
2185 codec
->write
= twl4030_write
;
2186 codec
->set_bias_level
= twl4030_set_bias_level
;
2187 codec
->dai
= twl4030_dai
;
2188 codec
->num_dai
= ARRAY_SIZE(twl4030_dai
),
2189 codec
->reg_cache_size
= sizeof(twl4030_reg
);
2190 codec
->reg_cache
= kmemdup(twl4030_reg
, sizeof(twl4030_reg
),
2192 if (codec
->reg_cache
== NULL
) {
2197 platform_set_drvdata(pdev
, twl4030
);
2198 twl4030_codec
= codec
;
2200 /* Set the defaults, and power up the codec */
2201 twl4030_init_chip(codec
);
2202 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
2204 ret
= snd_soc_register_codec(codec
);
2206 dev_err(codec
->dev
, "Failed to register codec: %d\n", ret
);
2210 ret
= snd_soc_register_dais(&twl4030_dai
[0], ARRAY_SIZE(twl4030_dai
));
2212 dev_err(codec
->dev
, "Failed to register DAIs: %d\n", ret
);
2213 snd_soc_unregister_codec(codec
);
2220 twl4030_power_down(codec
);
2221 kfree(codec
->reg_cache
);
2227 static int __devexit
twl4030_codec_remove(struct platform_device
*pdev
)
2229 struct twl4030_priv
*twl4030
= platform_get_drvdata(pdev
);
2233 twl4030_codec
= NULL
;
2237 MODULE_ALIAS("platform:twl4030_codec_audio");
2239 static struct platform_driver twl4030_codec_driver
= {
2240 .probe
= twl4030_codec_probe
,
2241 .remove
= __devexit_p(twl4030_codec_remove
),
2243 .name
= "twl4030_codec_audio",
2244 .owner
= THIS_MODULE
,
2248 static int __init
twl4030_modinit(void)
2250 return platform_driver_register(&twl4030_codec_driver
);
2252 module_init(twl4030_modinit
);
2254 static void __exit
twl4030_exit(void)
2256 platform_driver_unregister(&twl4030_codec_driver
);
2258 module_exit(twl4030_exit
);
2260 struct snd_soc_codec_device soc_codec_dev_twl4030
= {
2261 .probe
= twl4030_soc_probe
,
2262 .remove
= twl4030_soc_remove
,
2263 .suspend
= twl4030_soc_suspend
,
2264 .resume
= twl4030_soc_resume
,
2266 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030
);
2268 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2269 MODULE_AUTHOR("Steve Sakoman");
2270 MODULE_LICENSE("GPL");