2 * ALSA SoC TWL4030 codec driver
4 * Author: Steve Sakoman, <steve@sakoman.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
22 #include <linux/module.h>
23 #include <linux/moduleparam.h>
24 #include <linux/init.h>
25 #include <linux/delay.h>
27 #include <linux/i2c.h>
28 #include <linux/platform_device.h>
29 #include <linux/i2c/twl4030.h>
30 #include <sound/core.h>
31 #include <sound/pcm.h>
32 #include <sound/pcm_params.h>
33 #include <sound/soc.h>
34 #include <sound/soc-dapm.h>
35 #include <sound/initval.h>
36 #include <sound/tlv.h>
41 * twl4030 register cache & default register settings
43 static const u8 twl4030_reg
[TWL4030_CACHEREGNUM
] = {
44 0x00, /* this register not used */
45 0x91, /* REG_CODEC_MODE (0x1) */
46 0xc3, /* REG_OPTION (0x2) */
47 0x00, /* REG_UNKNOWN (0x3) */
48 0x00, /* REG_MICBIAS_CTL (0x4) */
49 0x20, /* REG_ANAMICL (0x5) */
50 0x00, /* REG_ANAMICR (0x6) */
51 0x00, /* REG_AVADC_CTL (0x7) */
52 0x00, /* REG_ADCMICSEL (0x8) */
53 0x00, /* REG_DIGMIXING (0x9) */
54 0x0c, /* REG_ATXL1PGA (0xA) */
55 0x0c, /* REG_ATXR1PGA (0xB) */
56 0x00, /* REG_AVTXL2PGA (0xC) */
57 0x00, /* REG_AVTXR2PGA (0xD) */
58 0x01, /* REG_AUDIO_IF (0xE) */
59 0x00, /* REG_VOICE_IF (0xF) */
60 0x00, /* REG_ARXR1PGA (0x10) */
61 0x00, /* REG_ARXL1PGA (0x11) */
62 0x6c, /* REG_ARXR2PGA (0x12) */
63 0x6c, /* REG_ARXL2PGA (0x13) */
64 0x00, /* REG_VRXPGA (0x14) */
65 0x00, /* REG_VSTPGA (0x15) */
66 0x00, /* REG_VRX2ARXPGA (0x16) */
67 0x0c, /* REG_AVDAC_CTL (0x17) */
68 0x00, /* REG_ARX2VTXPGA (0x18) */
69 0x00, /* REG_ARXL1_APGA_CTL (0x19) */
70 0x00, /* REG_ARXR1_APGA_CTL (0x1A) */
71 0x4b, /* REG_ARXL2_APGA_CTL (0x1B) */
72 0x4b, /* REG_ARXR2_APGA_CTL (0x1C) */
73 0x00, /* REG_ATX2ARXPGA (0x1D) */
74 0x00, /* REG_BT_IF (0x1E) */
75 0x00, /* REG_BTPGA (0x1F) */
76 0x00, /* REG_BTSTPGA (0x20) */
77 0x00, /* REG_EAR_CTL (0x21) */
78 0x24, /* REG_HS_SEL (0x22) */
79 0x0a, /* REG_HS_GAIN_SET (0x23) */
80 0x00, /* REG_HS_POPN_SET (0x24) */
81 0x00, /* REG_PREDL_CTL (0x25) */
82 0x00, /* REG_PREDR_CTL (0x26) */
83 0x00, /* REG_PRECKL_CTL (0x27) */
84 0x00, /* REG_PRECKR_CTL (0x28) */
85 0x00, /* REG_HFL_CTL (0x29) */
86 0x00, /* REG_HFR_CTL (0x2A) */
87 0x00, /* REG_ALC_CTL (0x2B) */
88 0x00, /* REG_ALC_SET1 (0x2C) */
89 0x00, /* REG_ALC_SET2 (0x2D) */
90 0x00, /* REG_BOOST_CTL (0x2E) */
91 0x00, /* REG_SOFTVOL_CTL (0x2F) */
92 0x00, /* REG_DTMF_FREQSEL (0x30) */
93 0x00, /* REG_DTMF_TONEXT1H (0x31) */
94 0x00, /* REG_DTMF_TONEXT1L (0x32) */
95 0x00, /* REG_DTMF_TONEXT2H (0x33) */
96 0x00, /* REG_DTMF_TONEXT2L (0x34) */
97 0x00, /* REG_DTMF_TONOFF (0x35) */
98 0x00, /* REG_DTMF_WANONOFF (0x36) */
99 0x00, /* REG_I2S_RX_SCRAMBLE_H (0x37) */
100 0x00, /* REG_I2S_RX_SCRAMBLE_M (0x38) */
101 0x00, /* REG_I2S_RX_SCRAMBLE_L (0x39) */
102 0x16, /* REG_APLL_CTL (0x3A) */
103 0x00, /* REG_DTMF_CTL (0x3B) */
104 0x00, /* REG_DTMF_PGA_CTL2 (0x3C) */
105 0x00, /* REG_DTMF_PGA_CTL1 (0x3D) */
106 0x00, /* REG_MISC_SET_1 (0x3E) */
107 0x00, /* REG_PCMBTMUX (0x3F) */
108 0x00, /* not used (0x40) */
109 0x00, /* not used (0x41) */
110 0x00, /* not used (0x42) */
111 0x00, /* REG_RX_PATH_SEL (0x43) */
112 0x00, /* REG_VDL_APGA_CTL (0x44) */
113 0x00, /* REG_VIBRA_CTL (0x45) */
114 0x00, /* REG_VIBRA_SET (0x46) */
115 0x00, /* REG_VIBRA_PWM_SET (0x47) */
116 0x00, /* REG_ANAMIC_GAIN (0x48) */
117 0x00, /* REG_MISC_SET_2 (0x49) */
121 * read twl4030 register cache
123 static inline unsigned int twl4030_read_reg_cache(struct snd_soc_codec
*codec
,
126 u8
*cache
= codec
->reg_cache
;
128 if (reg
>= TWL4030_CACHEREGNUM
)
135 * write twl4030 register cache
137 static inline void twl4030_write_reg_cache(struct snd_soc_codec
*codec
,
140 u8
*cache
= codec
->reg_cache
;
142 if (reg
>= TWL4030_CACHEREGNUM
)
148 * write to the twl4030 register space
150 static int twl4030_write(struct snd_soc_codec
*codec
,
151 unsigned int reg
, unsigned int value
)
153 twl4030_write_reg_cache(codec
, reg
, value
);
154 return twl4030_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE
, value
, reg
);
157 static void twl4030_codec_enable(struct snd_soc_codec
*codec
, int enable
)
161 mode
= twl4030_read_reg_cache(codec
, TWL4030_REG_CODEC_MODE
);
163 mode
|= TWL4030_CODECPDZ
;
165 mode
&= ~TWL4030_CODECPDZ
;
167 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
169 /* REVISIT: this delay is present in TI sample drivers */
170 /* but there seems to be no TRM requirement for it */
174 static void twl4030_init_chip(struct snd_soc_codec
*codec
)
178 /* clear CODECPDZ prior to setting register defaults */
179 twl4030_codec_enable(codec
, 0);
181 /* set all audio section registers to reasonable defaults */
182 for (i
= TWL4030_REG_OPTION
; i
<= TWL4030_REG_MISC_SET_2
; i
++)
183 twl4030_write(codec
, i
, twl4030_reg
[i
]);
188 static const char *twl4030_earpiece_texts
[] =
189 {"Off", "DACL1", "DACL2", "DACR1"};
191 static const unsigned int twl4030_earpiece_values
[] =
192 {0x0, 0x1, 0x2, 0x4};
194 static const struct soc_enum twl4030_earpiece_enum
=
195 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_EAR_CTL
, 1, 0x7,
196 ARRAY_SIZE(twl4030_earpiece_texts
),
197 twl4030_earpiece_texts
,
198 twl4030_earpiece_values
);
200 static const struct snd_kcontrol_new twl4030_dapm_earpiece_control
=
201 SOC_DAPM_VALUE_ENUM("Route", twl4030_earpiece_enum
);
204 static const char *twl4030_predrivel_texts
[] =
205 {"Off", "DACL1", "DACL2", "DACR2"};
207 static const unsigned int twl4030_predrivel_values
[] =
208 {0x0, 0x1, 0x2, 0x4};
210 static const struct soc_enum twl4030_predrivel_enum
=
211 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDL_CTL
, 1, 0x7,
212 ARRAY_SIZE(twl4030_predrivel_texts
),
213 twl4030_predrivel_texts
,
214 twl4030_predrivel_values
);
216 static const struct snd_kcontrol_new twl4030_dapm_predrivel_control
=
217 SOC_DAPM_VALUE_ENUM("Route", twl4030_predrivel_enum
);
220 static const char *twl4030_predriver_texts
[] =
221 {"Off", "DACR1", "DACR2", "DACL2"};
223 static const unsigned int twl4030_predriver_values
[] =
224 {0x0, 0x1, 0x2, 0x4};
226 static const struct soc_enum twl4030_predriver_enum
=
227 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_PREDR_CTL
, 1, 0x7,
228 ARRAY_SIZE(twl4030_predriver_texts
),
229 twl4030_predriver_texts
,
230 twl4030_predriver_values
);
232 static const struct snd_kcontrol_new twl4030_dapm_predriver_control
=
233 SOC_DAPM_VALUE_ENUM("Route", twl4030_predriver_enum
);
236 static const char *twl4030_hsol_texts
[] =
237 {"Off", "DACL1", "DACL2"};
239 static const struct soc_enum twl4030_hsol_enum
=
240 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL
, 1,
241 ARRAY_SIZE(twl4030_hsol_texts
),
244 static const struct snd_kcontrol_new twl4030_dapm_hsol_control
=
245 SOC_DAPM_ENUM("Route", twl4030_hsol_enum
);
248 static const char *twl4030_hsor_texts
[] =
249 {"Off", "DACR1", "DACR2"};
251 static const struct soc_enum twl4030_hsor_enum
=
252 SOC_ENUM_SINGLE(TWL4030_REG_HS_SEL
, 4,
253 ARRAY_SIZE(twl4030_hsor_texts
),
256 static const struct snd_kcontrol_new twl4030_dapm_hsor_control
=
257 SOC_DAPM_ENUM("Route", twl4030_hsor_enum
);
260 static const char *twl4030_carkitl_texts
[] =
261 {"Off", "DACL1", "DACL2"};
263 static const struct soc_enum twl4030_carkitl_enum
=
264 SOC_ENUM_SINGLE(TWL4030_REG_PRECKL_CTL
, 1,
265 ARRAY_SIZE(twl4030_carkitl_texts
),
266 twl4030_carkitl_texts
);
268 static const struct snd_kcontrol_new twl4030_dapm_carkitl_control
=
269 SOC_DAPM_ENUM("Route", twl4030_carkitl_enum
);
272 static const char *twl4030_carkitr_texts
[] =
273 {"Off", "DACR1", "DACR2"};
275 static const struct soc_enum twl4030_carkitr_enum
=
276 SOC_ENUM_SINGLE(TWL4030_REG_PRECKR_CTL
, 1,
277 ARRAY_SIZE(twl4030_carkitr_texts
),
278 twl4030_carkitr_texts
);
280 static const struct snd_kcontrol_new twl4030_dapm_carkitr_control
=
281 SOC_DAPM_ENUM("Route", twl4030_carkitr_enum
);
284 static const char *twl4030_handsfreel_texts
[] =
285 {"Voice", "DACL1", "DACL2", "DACR2"};
287 static const struct soc_enum twl4030_handsfreel_enum
=
288 SOC_ENUM_SINGLE(TWL4030_REG_HFL_CTL
, 0,
289 ARRAY_SIZE(twl4030_handsfreel_texts
),
290 twl4030_handsfreel_texts
);
292 static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control
=
293 SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum
);
295 /* Handsfree Right */
296 static const char *twl4030_handsfreer_texts
[] =
297 {"Voice", "DACR1", "DACR2", "DACL2"};
299 static const struct soc_enum twl4030_handsfreer_enum
=
300 SOC_ENUM_SINGLE(TWL4030_REG_HFR_CTL
, 0,
301 ARRAY_SIZE(twl4030_handsfreer_texts
),
302 twl4030_handsfreer_texts
);
304 static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control
=
305 SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum
);
307 /* Left analog microphone selection */
308 static const char *twl4030_analoglmic_texts
[] =
309 {"Off", "Main mic", "Headset mic", "AUXL", "Carkit mic"};
311 static const unsigned int twl4030_analoglmic_values
[] =
312 {0x0, 0x1, 0x2, 0x4, 0x8};
314 static const struct soc_enum twl4030_analoglmic_enum
=
315 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICL
, 0, 0xf,
316 ARRAY_SIZE(twl4030_analoglmic_texts
),
317 twl4030_analoglmic_texts
,
318 twl4030_analoglmic_values
);
320 static const struct snd_kcontrol_new twl4030_dapm_analoglmic_control
=
321 SOC_DAPM_VALUE_ENUM("Route", twl4030_analoglmic_enum
);
323 /* Right analog microphone selection */
324 static const char *twl4030_analogrmic_texts
[] =
325 {"Off", "Sub mic", "AUXR"};
327 static const unsigned int twl4030_analogrmic_values
[] =
330 static const struct soc_enum twl4030_analogrmic_enum
=
331 SOC_VALUE_ENUM_SINGLE(TWL4030_REG_ANAMICR
, 0, 0x5,
332 ARRAY_SIZE(twl4030_analogrmic_texts
),
333 twl4030_analogrmic_texts
,
334 twl4030_analogrmic_values
);
336 static const struct snd_kcontrol_new twl4030_dapm_analogrmic_control
=
337 SOC_DAPM_VALUE_ENUM("Route", twl4030_analogrmic_enum
);
339 /* TX1 L/R Analog/Digital microphone selection */
340 static const char *twl4030_micpathtx1_texts
[] =
341 {"Analog", "Digimic0"};
343 static const struct soc_enum twl4030_micpathtx1_enum
=
344 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 0,
345 ARRAY_SIZE(twl4030_micpathtx1_texts
),
346 twl4030_micpathtx1_texts
);
348 static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control
=
349 SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum
);
351 /* TX2 L/R Analog/Digital microphone selection */
352 static const char *twl4030_micpathtx2_texts
[] =
353 {"Analog", "Digimic1"};
355 static const struct soc_enum twl4030_micpathtx2_enum
=
356 SOC_ENUM_SINGLE(TWL4030_REG_ADCMICSEL
, 2,
357 ARRAY_SIZE(twl4030_micpathtx2_texts
),
358 twl4030_micpathtx2_texts
);
360 static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control
=
361 SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum
);
363 static int micpath_event(struct snd_soc_dapm_widget
*w
,
364 struct snd_kcontrol
*kcontrol
, int event
)
366 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
367 unsigned char adcmicsel
, micbias_ctl
;
369 adcmicsel
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_ADCMICSEL
);
370 micbias_ctl
= twl4030_read_reg_cache(w
->codec
, TWL4030_REG_MICBIAS_CTL
);
371 /* Prepare the bits for the given TX path:
372 * shift_l == 0: TX1 microphone path
373 * shift_l == 2: TX2 microphone path */
375 /* TX2 microphone path */
376 if (adcmicsel
& TWL4030_TX2IN_SEL
)
377 micbias_ctl
|= TWL4030_MICBIAS2_CTL
; /* digimic */
379 micbias_ctl
&= ~TWL4030_MICBIAS2_CTL
;
381 /* TX1 microphone path */
382 if (adcmicsel
& TWL4030_TX1IN_SEL
)
383 micbias_ctl
|= TWL4030_MICBIAS1_CTL
; /* digimic */
385 micbias_ctl
&= ~TWL4030_MICBIAS1_CTL
;
388 twl4030_write(w
->codec
, TWL4030_REG_MICBIAS_CTL
, micbias_ctl
);
393 static int handsfree_event(struct snd_soc_dapm_widget
*w
,
394 struct snd_kcontrol
*kcontrol
, int event
)
396 struct soc_enum
*e
= (struct soc_enum
*)w
->kcontrols
->private_value
;
397 unsigned char hs_ctl
;
399 hs_ctl
= twl4030_read_reg_cache(w
->codec
, e
->reg
);
401 if (hs_ctl
& TWL4030_HF_CTL_REF_EN
) {
402 hs_ctl
|= TWL4030_HF_CTL_RAMP_EN
;
403 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
404 hs_ctl
|= TWL4030_HF_CTL_LOOP_EN
;
405 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
406 hs_ctl
|= TWL4030_HF_CTL_HB_EN
;
407 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
409 hs_ctl
&= ~(TWL4030_HF_CTL_RAMP_EN
| TWL4030_HF_CTL_LOOP_EN
410 | TWL4030_HF_CTL_HB_EN
);
411 twl4030_write(w
->codec
, e
->reg
, hs_ctl
);
418 * Some of the gain controls in TWL (mostly those which are associated with
419 * the outputs) are implemented in an interesting way:
420 * 0x0 : Power down (mute)
424 * Inverting not going to help with these.
425 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
427 #define SOC_DOUBLE_TLV_TWL4030(xname, xreg, shift_left, shift_right, xmax,\
428 xinvert, tlv_array) \
429 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
430 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
431 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
432 .tlv.p = (tlv_array), \
433 .info = snd_soc_info_volsw, \
434 .get = snd_soc_get_volsw_twl4030, \
435 .put = snd_soc_put_volsw_twl4030, \
436 .private_value = (unsigned long)&(struct soc_mixer_control) \
437 {.reg = xreg, .shift = shift_left, .rshift = shift_right,\
438 .max = xmax, .invert = xinvert} }
439 #define SOC_DOUBLE_R_TLV_TWL4030(xname, reg_left, reg_right, xshift, xmax,\
440 xinvert, tlv_array) \
441 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname),\
442 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
443 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
444 .tlv.p = (tlv_array), \
445 .info = snd_soc_info_volsw_2r, \
446 .get = snd_soc_get_volsw_r2_twl4030,\
447 .put = snd_soc_put_volsw_r2_twl4030, \
448 .private_value = (unsigned long)&(struct soc_mixer_control) \
449 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
450 .rshift = xshift, .max = xmax, .invert = xinvert} }
451 #define SOC_SINGLE_TLV_TWL4030(xname, xreg, xshift, xmax, xinvert, tlv_array) \
452 SOC_DOUBLE_TLV_TWL4030(xname, xreg, xshift, xshift, xmax, \
455 static int snd_soc_get_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
456 struct snd_ctl_elem_value
*ucontrol
)
458 struct soc_mixer_control
*mc
=
459 (struct soc_mixer_control
*)kcontrol
->private_value
;
460 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
461 unsigned int reg
= mc
->reg
;
462 unsigned int shift
= mc
->shift
;
463 unsigned int rshift
= mc
->rshift
;
465 int mask
= (1 << fls(max
)) - 1;
467 ucontrol
->value
.integer
.value
[0] =
468 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
469 if (ucontrol
->value
.integer
.value
[0])
470 ucontrol
->value
.integer
.value
[0] =
471 max
+ 1 - ucontrol
->value
.integer
.value
[0];
473 if (shift
!= rshift
) {
474 ucontrol
->value
.integer
.value
[1] =
475 (snd_soc_read(codec
, reg
) >> rshift
) & mask
;
476 if (ucontrol
->value
.integer
.value
[1])
477 ucontrol
->value
.integer
.value
[1] =
478 max
+ 1 - ucontrol
->value
.integer
.value
[1];
484 static int snd_soc_put_volsw_twl4030(struct snd_kcontrol
*kcontrol
,
485 struct snd_ctl_elem_value
*ucontrol
)
487 struct soc_mixer_control
*mc
=
488 (struct soc_mixer_control
*)kcontrol
->private_value
;
489 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
490 unsigned int reg
= mc
->reg
;
491 unsigned int shift
= mc
->shift
;
492 unsigned int rshift
= mc
->rshift
;
494 int mask
= (1 << fls(max
)) - 1;
495 unsigned short val
, val2
, val_mask
;
497 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
499 val_mask
= mask
<< shift
;
503 if (shift
!= rshift
) {
504 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
505 val_mask
|= mask
<< rshift
;
507 val2
= max
+ 1 - val2
;
508 val
|= val2
<< rshift
;
510 return snd_soc_update_bits(codec
, reg
, val_mask
, val
);
513 static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
514 struct snd_ctl_elem_value
*ucontrol
)
516 struct soc_mixer_control
*mc
=
517 (struct soc_mixer_control
*)kcontrol
->private_value
;
518 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
519 unsigned int reg
= mc
->reg
;
520 unsigned int reg2
= mc
->rreg
;
521 unsigned int shift
= mc
->shift
;
523 int mask
= (1<<fls(max
))-1;
525 ucontrol
->value
.integer
.value
[0] =
526 (snd_soc_read(codec
, reg
) >> shift
) & mask
;
527 ucontrol
->value
.integer
.value
[1] =
528 (snd_soc_read(codec
, reg2
) >> shift
) & mask
;
530 if (ucontrol
->value
.integer
.value
[0])
531 ucontrol
->value
.integer
.value
[0] =
532 max
+ 1 - ucontrol
->value
.integer
.value
[0];
533 if (ucontrol
->value
.integer
.value
[1])
534 ucontrol
->value
.integer
.value
[1] =
535 max
+ 1 - ucontrol
->value
.integer
.value
[1];
540 static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol
*kcontrol
,
541 struct snd_ctl_elem_value
*ucontrol
)
543 struct soc_mixer_control
*mc
=
544 (struct soc_mixer_control
*)kcontrol
->private_value
;
545 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
546 unsigned int reg
= mc
->reg
;
547 unsigned int reg2
= mc
->rreg
;
548 unsigned int shift
= mc
->shift
;
550 int mask
= (1 << fls(max
)) - 1;
552 unsigned short val
, val2
, val_mask
;
554 val_mask
= mask
<< shift
;
555 val
= (ucontrol
->value
.integer
.value
[0] & mask
);
556 val2
= (ucontrol
->value
.integer
.value
[1] & mask
);
561 val2
= max
+ 1 - val2
;
564 val2
= val2
<< shift
;
566 err
= snd_soc_update_bits(codec
, reg
, val_mask
, val
);
570 err
= snd_soc_update_bits(codec
, reg2
, val_mask
, val2
);
575 * FGAIN volume control:
576 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
578 static DECLARE_TLV_DB_SCALE(digital_fine_tlv
, -6300, 100, 1);
581 * CGAIN volume control:
582 * 0 dB to 12 dB in 6 dB steps
583 * value 2 and 3 means 12 dB
585 static DECLARE_TLV_DB_SCALE(digital_coarse_tlv
, 0, 600, 0);
588 * Analog playback gain
589 * -24 dB to 12 dB in 2 dB steps
591 static DECLARE_TLV_DB_SCALE(analog_tlv
, -2400, 200, 0);
594 * Gain controls tied to outputs
595 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
597 static DECLARE_TLV_DB_SCALE(output_tvl
, -1200, 600, 1);
600 * Capture gain after the ADCs
601 * from 0 dB to 31 dB in 1 dB steps
603 static DECLARE_TLV_DB_SCALE(digital_capture_tlv
, 0, 100, 0);
606 * Gain control for input amplifiers
607 * 0 dB to 30 dB in 6 dB steps
609 static DECLARE_TLV_DB_SCALE(input_gain_tlv
, 0, 600, 0);
611 static const struct snd_kcontrol_new twl4030_snd_controls
[] = {
612 /* Common playback gain controls */
613 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
614 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
615 0, 0x3f, 0, digital_fine_tlv
),
616 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
617 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
618 0, 0x3f, 0, digital_fine_tlv
),
620 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
621 TWL4030_REG_ARXL1PGA
, TWL4030_REG_ARXR1PGA
,
622 6, 0x2, 0, digital_coarse_tlv
),
623 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
624 TWL4030_REG_ARXL2PGA
, TWL4030_REG_ARXR2PGA
,
625 6, 0x2, 0, digital_coarse_tlv
),
627 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
628 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
629 3, 0x12, 1, analog_tlv
),
630 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
631 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
632 3, 0x12, 1, analog_tlv
),
633 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
634 TWL4030_REG_ARXL1_APGA_CTL
, TWL4030_REG_ARXR1_APGA_CTL
,
636 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
637 TWL4030_REG_ARXL2_APGA_CTL
, TWL4030_REG_ARXR2_APGA_CTL
,
640 /* Separate output gain controls */
641 SOC_DOUBLE_R_TLV_TWL4030("PreDriv Playback Volume",
642 TWL4030_REG_PREDL_CTL
, TWL4030_REG_PREDR_CTL
,
643 4, 3, 0, output_tvl
),
645 SOC_DOUBLE_TLV_TWL4030("Headset Playback Volume",
646 TWL4030_REG_HS_GAIN_SET
, 0, 2, 3, 0, output_tvl
),
648 SOC_DOUBLE_R_TLV_TWL4030("Carkit Playback Volume",
649 TWL4030_REG_PRECKL_CTL
, TWL4030_REG_PRECKR_CTL
,
650 4, 3, 0, output_tvl
),
652 SOC_SINGLE_TLV_TWL4030("Earpiece Playback Volume",
653 TWL4030_REG_EAR_CTL
, 4, 3, 0, output_tvl
),
655 /* Common capture gain controls */
656 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
657 TWL4030_REG_ATXL1PGA
, TWL4030_REG_ATXR1PGA
,
658 0, 0x1f, 0, digital_capture_tlv
),
659 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
660 TWL4030_REG_AVTXL2PGA
, TWL4030_REG_AVTXR2PGA
,
661 0, 0x1f, 0, digital_capture_tlv
),
663 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN
,
664 0, 3, 5, 0, input_gain_tlv
),
667 static const struct snd_soc_dapm_widget twl4030_dapm_widgets
[] = {
668 /* Left channel inputs */
669 SND_SOC_DAPM_INPUT("MAINMIC"),
670 SND_SOC_DAPM_INPUT("HSMIC"),
671 SND_SOC_DAPM_INPUT("AUXL"),
672 SND_SOC_DAPM_INPUT("CARKITMIC"),
673 /* Right channel inputs */
674 SND_SOC_DAPM_INPUT("SUBMIC"),
675 SND_SOC_DAPM_INPUT("AUXR"),
676 /* Digital microphones (Stereo) */
677 SND_SOC_DAPM_INPUT("DIGIMIC0"),
678 SND_SOC_DAPM_INPUT("DIGIMIC1"),
681 SND_SOC_DAPM_OUTPUT("OUTL"),
682 SND_SOC_DAPM_OUTPUT("OUTR"),
683 SND_SOC_DAPM_OUTPUT("EARPIECE"),
684 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
685 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
686 SND_SOC_DAPM_OUTPUT("HSOL"),
687 SND_SOC_DAPM_OUTPUT("HSOR"),
688 SND_SOC_DAPM_OUTPUT("CARKITL"),
689 SND_SOC_DAPM_OUTPUT("CARKITR"),
690 SND_SOC_DAPM_OUTPUT("HFL"),
691 SND_SOC_DAPM_OUTPUT("HFR"),
694 SND_SOC_DAPM_DAC("DAC Right1", "Right Front Playback",
695 TWL4030_REG_AVDAC_CTL
, 0, 0),
696 SND_SOC_DAPM_DAC("DAC Left1", "Left Front Playback",
697 TWL4030_REG_AVDAC_CTL
, 1, 0),
698 SND_SOC_DAPM_DAC("DAC Right2", "Right Rear Playback",
699 TWL4030_REG_AVDAC_CTL
, 2, 0),
700 SND_SOC_DAPM_DAC("DAC Left2", "Left Rear Playback",
701 TWL4030_REG_AVDAC_CTL
, 3, 0),
704 SND_SOC_DAPM_PGA("ARXR1_APGA", TWL4030_REG_ARXR1_APGA_CTL
,
706 SND_SOC_DAPM_PGA("ARXL1_APGA", TWL4030_REG_ARXL1_APGA_CTL
,
708 SND_SOC_DAPM_PGA("ARXR2_APGA", TWL4030_REG_ARXR2_APGA_CTL
,
710 SND_SOC_DAPM_PGA("ARXL2_APGA", TWL4030_REG_ARXL2_APGA_CTL
,
713 /* Output MUX controls */
715 SND_SOC_DAPM_VALUE_MUX("Earpiece Mux", SND_SOC_NOPM
, 0, 0,
716 &twl4030_dapm_earpiece_control
),
718 SND_SOC_DAPM_VALUE_MUX("PredriveL Mux", SND_SOC_NOPM
, 0, 0,
719 &twl4030_dapm_predrivel_control
),
720 SND_SOC_DAPM_VALUE_MUX("PredriveR Mux", SND_SOC_NOPM
, 0, 0,
721 &twl4030_dapm_predriver_control
),
723 SND_SOC_DAPM_MUX("HeadsetL Mux", SND_SOC_NOPM
, 0, 0,
724 &twl4030_dapm_hsol_control
),
725 SND_SOC_DAPM_MUX("HeadsetR Mux", SND_SOC_NOPM
, 0, 0,
726 &twl4030_dapm_hsor_control
),
728 SND_SOC_DAPM_MUX("CarkitL Mux", SND_SOC_NOPM
, 0, 0,
729 &twl4030_dapm_carkitl_control
),
730 SND_SOC_DAPM_MUX("CarkitR Mux", SND_SOC_NOPM
, 0, 0,
731 &twl4030_dapm_carkitr_control
),
733 SND_SOC_DAPM_MUX_E("HandsfreeL Mux", TWL4030_REG_HFL_CTL
, 5, 0,
734 &twl4030_dapm_handsfreel_control
, handsfree_event
,
735 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
736 SND_SOC_DAPM_MUX_E("HandsfreeR Mux", TWL4030_REG_HFR_CTL
, 5, 0,
737 &twl4030_dapm_handsfreer_control
, handsfree_event
,
738 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
),
740 /* Introducing four virtual ADC, since TWL4030 have four channel for
742 SND_SOC_DAPM_ADC("ADC Virtual Left1", "Left Front Capture",
744 SND_SOC_DAPM_ADC("ADC Virtual Right1", "Right Front Capture",
746 SND_SOC_DAPM_ADC("ADC Virtual Left2", "Left Rear Capture",
748 SND_SOC_DAPM_ADC("ADC Virtual Right2", "Right Rear Capture",
751 /* Analog/Digital mic path selection.
752 TX1 Left/Right: either analog Left/Right or Digimic0
753 TX2 Left/Right: either analog Left/Right or Digimic1 */
754 SND_SOC_DAPM_MUX_E("TX1 Capture Route", SND_SOC_NOPM
, 0, 0,
755 &twl4030_dapm_micpathtx1_control
, micpath_event
,
756 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
757 SND_SOC_DAPM_POST_REG
),
758 SND_SOC_DAPM_MUX_E("TX2 Capture Route", SND_SOC_NOPM
, 0, 0,
759 &twl4030_dapm_micpathtx2_control
, micpath_event
,
760 SND_SOC_DAPM_POST_PMU
|SND_SOC_DAPM_POST_PMD
|
761 SND_SOC_DAPM_POST_REG
),
763 /* Analog input muxes with power switch for the physical ADCL/R */
764 SND_SOC_DAPM_VALUE_MUX("Analog Left Capture Route",
765 TWL4030_REG_AVADC_CTL
, 3, 0, &twl4030_dapm_analoglmic_control
),
766 SND_SOC_DAPM_VALUE_MUX("Analog Right Capture Route",
767 TWL4030_REG_AVADC_CTL
, 1, 0, &twl4030_dapm_analogrmic_control
),
769 SND_SOC_DAPM_PGA("Analog Left Amplifier",
770 TWL4030_REG_ANAMICL
, 4, 0, NULL
, 0),
771 SND_SOC_DAPM_PGA("Analog Right Amplifier",
772 TWL4030_REG_ANAMICR
, 4, 0, NULL
, 0),
774 SND_SOC_DAPM_PGA("Digimic0 Enable",
775 TWL4030_REG_ADCMICSEL
, 1, 0, NULL
, 0),
776 SND_SOC_DAPM_PGA("Digimic1 Enable",
777 TWL4030_REG_ADCMICSEL
, 3, 0, NULL
, 0),
779 SND_SOC_DAPM_MICBIAS("Mic Bias 1", TWL4030_REG_MICBIAS_CTL
, 0, 0),
780 SND_SOC_DAPM_MICBIAS("Mic Bias 2", TWL4030_REG_MICBIAS_CTL
, 1, 0),
781 SND_SOC_DAPM_MICBIAS("Headset Mic Bias", TWL4030_REG_MICBIAS_CTL
, 2, 0),
784 static const struct snd_soc_dapm_route intercon
[] = {
785 {"ARXL1_APGA", NULL
, "DAC Left1"},
786 {"ARXR1_APGA", NULL
, "DAC Right1"},
787 {"ARXL2_APGA", NULL
, "DAC Left2"},
788 {"ARXR2_APGA", NULL
, "DAC Right2"},
790 /* Internal playback routings */
792 {"Earpiece Mux", "DACL1", "ARXL1_APGA"},
793 {"Earpiece Mux", "DACL2", "ARXL2_APGA"},
794 {"Earpiece Mux", "DACR1", "ARXR1_APGA"},
796 {"PredriveL Mux", "DACL1", "ARXL1_APGA"},
797 {"PredriveL Mux", "DACL2", "ARXL2_APGA"},
798 {"PredriveL Mux", "DACR2", "ARXR2_APGA"},
800 {"PredriveR Mux", "DACR1", "ARXR1_APGA"},
801 {"PredriveR Mux", "DACR2", "ARXR2_APGA"},
802 {"PredriveR Mux", "DACL2", "ARXL2_APGA"},
804 {"HeadsetL Mux", "DACL1", "ARXL1_APGA"},
805 {"HeadsetL Mux", "DACL2", "ARXL2_APGA"},
807 {"HeadsetR Mux", "DACR1", "ARXR1_APGA"},
808 {"HeadsetR Mux", "DACR2", "ARXR2_APGA"},
810 {"CarkitL Mux", "DACL1", "ARXL1_APGA"},
811 {"CarkitL Mux", "DACL2", "ARXL2_APGA"},
813 {"CarkitR Mux", "DACR1", "ARXR1_APGA"},
814 {"CarkitR Mux", "DACR2", "ARXR2_APGA"},
816 {"HandsfreeL Mux", "DACL1", "ARXL1_APGA"},
817 {"HandsfreeL Mux", "DACL2", "ARXL2_APGA"},
818 {"HandsfreeL Mux", "DACR2", "ARXR2_APGA"},
820 {"HandsfreeR Mux", "DACR1", "ARXR1_APGA"},
821 {"HandsfreeR Mux", "DACR2", "ARXR2_APGA"},
822 {"HandsfreeR Mux", "DACL2", "ARXL2_APGA"},
825 {"OUTL", NULL
, "ARXL2_APGA"},
826 {"OUTR", NULL
, "ARXR2_APGA"},
827 {"EARPIECE", NULL
, "Earpiece Mux"},
828 {"PREDRIVEL", NULL
, "PredriveL Mux"},
829 {"PREDRIVER", NULL
, "PredriveR Mux"},
830 {"HSOL", NULL
, "HeadsetL Mux"},
831 {"HSOR", NULL
, "HeadsetR Mux"},
832 {"CARKITL", NULL
, "CarkitL Mux"},
833 {"CARKITR", NULL
, "CarkitR Mux"},
834 {"HFL", NULL
, "HandsfreeL Mux"},
835 {"HFR", NULL
, "HandsfreeR Mux"},
838 {"Analog Left Capture Route", "Main mic", "MAINMIC"},
839 {"Analog Left Capture Route", "Headset mic", "HSMIC"},
840 {"Analog Left Capture Route", "AUXL", "AUXL"},
841 {"Analog Left Capture Route", "Carkit mic", "CARKITMIC"},
843 {"Analog Right Capture Route", "Sub mic", "SUBMIC"},
844 {"Analog Right Capture Route", "AUXR", "AUXR"},
846 {"Analog Left Amplifier", NULL
, "Analog Left Capture Route"},
847 {"Analog Right Amplifier", NULL
, "Analog Right Capture Route"},
849 {"Digimic0 Enable", NULL
, "DIGIMIC0"},
850 {"Digimic1 Enable", NULL
, "DIGIMIC1"},
852 /* TX1 Left capture path */
853 {"TX1 Capture Route", "Analog", "Analog Left Amplifier"},
854 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
855 /* TX1 Right capture path */
856 {"TX1 Capture Route", "Analog", "Analog Right Amplifier"},
857 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
858 /* TX2 Left capture path */
859 {"TX2 Capture Route", "Analog", "Analog Left Amplifier"},
860 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
861 /* TX2 Right capture path */
862 {"TX2 Capture Route", "Analog", "Analog Right Amplifier"},
863 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
865 {"ADC Virtual Left1", NULL
, "TX1 Capture Route"},
866 {"ADC Virtual Right1", NULL
, "TX1 Capture Route"},
867 {"ADC Virtual Left2", NULL
, "TX2 Capture Route"},
868 {"ADC Virtual Right2", NULL
, "TX2 Capture Route"},
872 static int twl4030_add_widgets(struct snd_soc_codec
*codec
)
874 snd_soc_dapm_new_controls(codec
, twl4030_dapm_widgets
,
875 ARRAY_SIZE(twl4030_dapm_widgets
));
877 snd_soc_dapm_add_routes(codec
, intercon
, ARRAY_SIZE(intercon
));
879 snd_soc_dapm_new_widgets(codec
);
883 static void twl4030_power_up(struct snd_soc_codec
*codec
)
885 u8 anamicl
, regmisc1
, byte
, popn
;
888 /* set CODECPDZ to turn on codec */
889 twl4030_codec_enable(codec
, 1);
891 /* initiate offset cancellation */
892 anamicl
= twl4030_read_reg_cache(codec
, TWL4030_REG_ANAMICL
);
893 twl4030_write(codec
, TWL4030_REG_ANAMICL
,
894 anamicl
| TWL4030_CNCL_OFFSET_START
);
897 /* wait for offset cancellation to complete */
899 /* this takes a little while, so don't slam i2c */
901 twl4030_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE
, &byte
,
902 TWL4030_REG_ANAMICL
);
903 } while ((i
++ < 100) &&
904 ((byte
& TWL4030_CNCL_OFFSET_START
) ==
905 TWL4030_CNCL_OFFSET_START
));
907 /* Make sure that the reg_cache has the same value as the HW */
908 twl4030_write_reg_cache(codec
, TWL4030_REG_ANAMICL
, byte
);
910 /* anti-pop when changing analog gain */
911 regmisc1
= twl4030_read_reg_cache(codec
, TWL4030_REG_MISC_SET_1
);
912 twl4030_write(codec
, TWL4030_REG_MISC_SET_1
,
913 regmisc1
| TWL4030_SMOOTH_ANAVOL_EN
);
915 /* toggle CODECPDZ as per TRM */
916 twl4030_codec_enable(codec
, 0);
917 twl4030_codec_enable(codec
, 1);
919 /* program anti-pop with bias ramp delay */
920 popn
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
921 popn
&= TWL4030_RAMP_DELAY
;
922 popn
|= TWL4030_RAMP_DELAY_645MS
;
923 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
924 popn
|= TWL4030_VMID_EN
;
925 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
927 /* enable anti-pop ramp */
928 popn
|= TWL4030_RAMP_EN
;
929 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
932 static void twl4030_power_down(struct snd_soc_codec
*codec
)
936 /* disable anti-pop ramp */
937 popn
= twl4030_read_reg_cache(codec
, TWL4030_REG_HS_POPN_SET
);
938 popn
&= ~TWL4030_RAMP_EN
;
939 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
941 /* disable bias out */
942 popn
&= ~TWL4030_VMID_EN
;
943 twl4030_write(codec
, TWL4030_REG_HS_POPN_SET
, popn
);
946 twl4030_codec_enable(codec
, 0);
949 static int twl4030_set_bias_level(struct snd_soc_codec
*codec
,
950 enum snd_soc_bias_level level
)
953 case SND_SOC_BIAS_ON
:
954 twl4030_power_up(codec
);
956 case SND_SOC_BIAS_PREPARE
:
957 /* TODO: develop a twl4030_prepare function */
959 case SND_SOC_BIAS_STANDBY
:
960 /* TODO: develop a twl4030_standby function */
961 twl4030_power_down(codec
);
963 case SND_SOC_BIAS_OFF
:
964 twl4030_power_down(codec
);
967 codec
->bias_level
= level
;
972 static int twl4030_hw_params(struct snd_pcm_substream
*substream
,
973 struct snd_pcm_hw_params
*params
,
974 struct snd_soc_dai
*dai
)
976 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
977 struct snd_soc_device
*socdev
= rtd
->socdev
;
978 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
979 u8 mode
, old_mode
, format
, old_format
;
983 old_mode
= twl4030_read_reg_cache(codec
,
984 TWL4030_REG_CODEC_MODE
) & ~TWL4030_CODECPDZ
;
985 mode
= old_mode
& ~TWL4030_APLL_RATE
;
987 switch (params_rate(params
)) {
989 mode
|= TWL4030_APLL_RATE_8000
;
992 mode
|= TWL4030_APLL_RATE_11025
;
995 mode
|= TWL4030_APLL_RATE_12000
;
998 mode
|= TWL4030_APLL_RATE_16000
;
1001 mode
|= TWL4030_APLL_RATE_22050
;
1004 mode
|= TWL4030_APLL_RATE_24000
;
1007 mode
|= TWL4030_APLL_RATE_32000
;
1010 mode
|= TWL4030_APLL_RATE_44100
;
1013 mode
|= TWL4030_APLL_RATE_48000
;
1016 printk(KERN_ERR
"TWL4030 hw params: unknown rate %d\n",
1017 params_rate(params
));
1021 if (mode
!= old_mode
) {
1022 /* change rate and set CODECPDZ */
1023 twl4030_write(codec
, TWL4030_REG_CODEC_MODE
, mode
);
1024 twl4030_codec_enable(codec
, 1);
1028 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1029 format
= old_format
;
1030 format
&= ~TWL4030_DATA_WIDTH
;
1031 switch (params_format(params
)) {
1032 case SNDRV_PCM_FORMAT_S16_LE
:
1033 format
|= TWL4030_DATA_WIDTH_16S_16W
;
1035 case SNDRV_PCM_FORMAT_S24_LE
:
1036 format
|= TWL4030_DATA_WIDTH_32S_24W
;
1039 printk(KERN_ERR
"TWL4030 hw params: unknown format %d\n",
1040 params_format(params
));
1044 if (format
!= old_format
) {
1046 /* clear CODECPDZ before changing format (codec requirement) */
1047 twl4030_codec_enable(codec
, 0);
1050 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1052 /* set CODECPDZ afterwards */
1053 twl4030_codec_enable(codec
, 1);
1058 static int twl4030_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1059 int clk_id
, unsigned int freq
, int dir
)
1061 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1066 infreq
= TWL4030_APLL_INFREQ_19200KHZ
;
1069 infreq
= TWL4030_APLL_INFREQ_26000KHZ
;
1072 infreq
= TWL4030_APLL_INFREQ_38400KHZ
;
1075 printk(KERN_ERR
"TWL4030 set sysclk: unknown rate %d\n",
1080 infreq
|= TWL4030_APLL_EN
;
1081 twl4030_write(codec
, TWL4030_REG_APLL_CTL
, infreq
);
1086 static int twl4030_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1089 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1090 u8 old_format
, format
;
1093 old_format
= twl4030_read_reg_cache(codec
, TWL4030_REG_AUDIO_IF
);
1094 format
= old_format
;
1096 /* set master/slave audio interface */
1097 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1098 case SND_SOC_DAIFMT_CBM_CFM
:
1099 format
&= ~(TWL4030_AIF_SLAVE_EN
);
1100 format
&= ~(TWL4030_CLK256FS_EN
);
1102 case SND_SOC_DAIFMT_CBS_CFS
:
1103 format
|= TWL4030_AIF_SLAVE_EN
;
1104 format
|= TWL4030_CLK256FS_EN
;
1110 /* interface format */
1111 format
&= ~TWL4030_AIF_FORMAT
;
1112 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1113 case SND_SOC_DAIFMT_I2S
:
1114 format
|= TWL4030_AIF_FORMAT_CODEC
;
1120 if (format
!= old_format
) {
1122 /* clear CODECPDZ before changing format (codec requirement) */
1123 twl4030_codec_enable(codec
, 0);
1126 twl4030_write(codec
, TWL4030_REG_AUDIO_IF
, format
);
1128 /* set CODECPDZ afterwards */
1129 twl4030_codec_enable(codec
, 1);
1135 #define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
1136 #define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FORMAT_S24_LE)
1138 struct snd_soc_dai twl4030_dai
= {
1141 .stream_name
= "Playback",
1144 .rates
= TWL4030_RATES
,
1145 .formats
= TWL4030_FORMATS
,},
1147 .stream_name
= "Capture",
1150 .rates
= TWL4030_RATES
,
1151 .formats
= TWL4030_FORMATS
,},
1153 .hw_params
= twl4030_hw_params
,
1154 .set_sysclk
= twl4030_set_dai_sysclk
,
1155 .set_fmt
= twl4030_set_dai_fmt
,
1158 EXPORT_SYMBOL_GPL(twl4030_dai
);
1160 static int twl4030_suspend(struct platform_device
*pdev
, pm_message_t state
)
1162 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1163 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1165 twl4030_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1170 static int twl4030_resume(struct platform_device
*pdev
)
1172 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1173 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1175 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1176 twl4030_set_bias_level(codec
, codec
->suspend_bias_level
);
1181 * initialize the driver
1182 * register the mixer and dsp interfaces with the kernel
1185 static int twl4030_init(struct snd_soc_device
*socdev
)
1187 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1190 printk(KERN_INFO
"TWL4030 Audio Codec init \n");
1192 codec
->name
= "twl4030";
1193 codec
->owner
= THIS_MODULE
;
1194 codec
->read
= twl4030_read_reg_cache
;
1195 codec
->write
= twl4030_write
;
1196 codec
->set_bias_level
= twl4030_set_bias_level
;
1197 codec
->dai
= &twl4030_dai
;
1199 codec
->reg_cache_size
= sizeof(twl4030_reg
);
1200 codec
->reg_cache
= kmemdup(twl4030_reg
, sizeof(twl4030_reg
),
1202 if (codec
->reg_cache
== NULL
)
1206 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1208 printk(KERN_ERR
"twl4030: failed to create pcms\n");
1212 twl4030_init_chip(codec
);
1214 /* power on device */
1215 twl4030_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1217 snd_soc_add_controls(codec
, twl4030_snd_controls
,
1218 ARRAY_SIZE(twl4030_snd_controls
));
1219 twl4030_add_widgets(codec
);
1221 ret
= snd_soc_init_card(socdev
);
1223 printk(KERN_ERR
"twl4030: failed to register card\n");
1230 snd_soc_free_pcms(socdev
);
1231 snd_soc_dapm_free(socdev
);
1233 kfree(codec
->reg_cache
);
1237 static struct snd_soc_device
*twl4030_socdev
;
1239 static int twl4030_probe(struct platform_device
*pdev
)
1241 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1242 struct snd_soc_codec
*codec
;
1244 codec
= kzalloc(sizeof(struct snd_soc_codec
), GFP_KERNEL
);
1248 socdev
->card
->codec
= codec
;
1249 mutex_init(&codec
->mutex
);
1250 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1251 INIT_LIST_HEAD(&codec
->dapm_paths
);
1253 twl4030_socdev
= socdev
;
1254 twl4030_init(socdev
);
1259 static int twl4030_remove(struct platform_device
*pdev
)
1261 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1262 struct snd_soc_codec
*codec
= socdev
->card
->codec
;
1264 printk(KERN_INFO
"TWL4030 Audio Codec remove\n");
1265 snd_soc_free_pcms(socdev
);
1266 snd_soc_dapm_free(socdev
);
1272 struct snd_soc_codec_device soc_codec_dev_twl4030
= {
1273 .probe
= twl4030_probe
,
1274 .remove
= twl4030_remove
,
1275 .suspend
= twl4030_suspend
,
1276 .resume
= twl4030_resume
,
1278 EXPORT_SYMBOL_GPL(soc_codec_dev_twl4030
);
1280 static int __init
twl4030_modinit(void)
1282 return snd_soc_register_dai(&twl4030_dai
);
1284 module_init(twl4030_modinit
);
1286 static void __exit
twl4030_exit(void)
1288 snd_soc_unregister_dai(&twl4030_dai
);
1290 module_exit(twl4030_exit
);
1292 MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
1293 MODULE_AUTHOR("Steve Sakoman");
1294 MODULE_LICENSE("GPL");