sound/soc/codecs/uda1380.c

   1 /*
   2  * uda1380.c - Philips UDA1380 ALSA SoC audio driver
   3  *
   4  * This program is free software; you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License version 2 as
   6  * published by the Free Software Foundation.
   7  *
   8  * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
   9  * Improved support for DAPM and audio routing/mixing capabilities,
  10  * added TLV support.
  11  *
  12  * Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
  13  * codec model.
  14  *
  15  * Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
  16  * Copyright 2005 Openedhand Ltd.
  17  */
  18
  19 #include <linux/module.h>
  20 #include <linux/init.h>
  21 #include <linux/types.h>
  22 #include <linux/string.h>
  23 #include <linux/slab.h>
  24 #include <linux/errno.h>
  25 #include <linux/ioctl.h>
  26 #include <linux/delay.h>
  27 #include <linux/i2c.h>
  28 #include <sound/core.h>
  29 #include <sound/control.h>
  30 #include <sound/initval.h>
  31 #include <sound/info.h>
  32 #include <sound/soc.h>
  33 #include <sound/soc-dapm.h>
  34 #include <sound/tlv.h>
  35
  36 #include "uda1380.h"
  37
  38 #define UDA1380_VERSION "0.6"
  39
  40 /*
  41  * uda1380 register cache
  42  */
  43 static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
  44         0x0502, 0x0000, 0x0000, 0x3f3f,
  45         0x0202, 0x0000, 0x0000, 0x0000,
  46         0x0000, 0x0000, 0x0000, 0x0000,
  47         0x0000, 0x0000, 0x0000, 0x0000,
  48         0x0000, 0xff00, 0x0000, 0x4800,
  49         0x0000, 0x0000, 0x0000, 0x0000,
  50         0x0000, 0x0000, 0x0000, 0x0000,
  51         0x0000, 0x0000, 0x0000, 0x0000,
  52         0x0000, 0x8000, 0x0002, 0x0000,
  53 };
  54
  55 /*
  56  * read uda1380 register cache
  57  */
  58 static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
  59         unsigned int reg)
  60 {
  61         u16 *cache = codec->reg_cache;
  62         if (reg == UDA1380_RESET)
  63                 return 0;
  64         if (reg >= UDA1380_CACHEREGNUM)
  65                 return -1;
  66         return cache[reg];
  67 }
  68
  69 /*
  70  * write uda1380 register cache
  71  */
  72 static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
  73         u16 reg, unsigned int value)
  74 {
  75         u16 *cache = codec->reg_cache;
  76         if (reg >= UDA1380_CACHEREGNUM)
  77                 return;
  78         cache[reg] = value;
  79 }
  80
  81 /*
  82  * write to the UDA1380 register space
  83  */
  84 static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
  85         unsigned int value)
  86 {
  87         u8 data[3];
  88
  89         /* data is
  90          *   data[0] is register offset
  91          *   data[1] is MS byte
  92          *   data[2] is LS byte
  93          */
  94         data[0] = reg;
  95         data[1] = (value & 0xff00) >> 8;
  96         data[2] = value & 0x00ff;
  97
  98         uda1380_write_reg_cache(codec, reg, value);
  99
 100         /* the interpolator & decimator regs must only be written when the
 101          * codec DAI is active.
 102          */
 103         if (!codec->active && (reg >= UDA1380_MVOL))
 104                 return 0;
 105         pr_debug("uda1380: hw write %x val %x\n", reg, value);
 106         if (codec->hw_write(codec->control_data, data, 3) == 3) {
 107                 unsigned int val;
 108                 i2c_master_send(codec->control_data, data, 1);
 109                 i2c_master_recv(codec->control_data, data, 2);
 110                 val = (data[0]<<8) | data[1];
 111                 if (val != value) {
 112                         pr_debug("uda1380: READ BACK VAL %x\n",
 113                                         (data[0]<<8) | data[1]);
 114                         return -EIO;
 115                 }
 116                 return 0;
 117         } else
 118                 return -EIO;
 119 }
 120
 121 #define uda1380_reset(c)        uda1380_write(c, UDA1380_RESET, 0)
 122
 123 /* declarations of ALSA reg_elem_REAL controls */
 124 static const char *uda1380_deemp[] = {
 125         "None",
 126         "32kHz",
 127         "44.1kHz",
 128         "48kHz",
 129         "96kHz",
 130 };
 131 static const char *uda1380_input_sel[] = {
 132         "Line",
 133         "Mic + Line R",
 134         "Line L",
 135         "Mic",
 136 };
 137 static const char *uda1380_output_sel[] = {
 138         "DAC",
 139         "Analog Mixer",
 140 };
 141 static const char *uda1380_spf_mode[] = {
 142         "Flat",
 143         "Minimum1",
 144         "Minimum2",
 145         "Maximum"
 146 };
 147 static const char *uda1380_capture_sel[] = {
 148         "ADC",
 149         "Digital Mixer"
 150 };
 151 static const char *uda1380_sel_ns[] = {
 152         "3rd-order",
 153         "5th-order"
 154 };
 155 static const char *uda1380_mix_control[] = {
 156         "off",
 157         "PCM only",
 158         "before sound processing",
 159         "after sound processing"
 160 };
 161 static const char *uda1380_sdet_setting[] = {
 162         "3200",
 163         "4800",
 164         "9600",
 165         "19200"
 166 };
 167 static const char *uda1380_os_setting[] = {
 168         "single-speed",
 169         "double-speed (no mixing)",
 170         "quad-speed (no mixing)"
 171 };
 172
 173 static const struct soc_enum uda1380_deemp_enum[] = {
 174         SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, 5, uda1380_deemp),
 175         SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, 5, uda1380_deemp),
 176 };
 177 static const struct soc_enum uda1380_input_sel_enum =
 178         SOC_ENUM_SINGLE(UDA1380_ADC, 2, 4, uda1380_input_sel);          /* SEL_MIC, SEL_LNA */
 179 static const struct soc_enum uda1380_output_sel_enum =
 180         SOC_ENUM_SINGLE(UDA1380_PM, 7, 2, uda1380_output_sel);          /* R02_EN_AVC */
 181 static const struct soc_enum uda1380_spf_enum =
 182         SOC_ENUM_SINGLE(UDA1380_MODE, 14, 4, uda1380_spf_mode);         /* M */
 183 static const struct soc_enum uda1380_capture_sel_enum =
 184         SOC_ENUM_SINGLE(UDA1380_IFACE, 6, 2, uda1380_capture_sel);      /* SEL_SOURCE */
 185 static const struct soc_enum uda1380_sel_ns_enum =
 186         SOC_ENUM_SINGLE(UDA1380_MIXER, 14, 2, uda1380_sel_ns);          /* SEL_NS */
 187 static const struct soc_enum uda1380_mix_enum =
 188         SOC_ENUM_SINGLE(UDA1380_MIXER, 12, 4, uda1380_mix_control);     /* MIX, MIX_POS */
 189 static const struct soc_enum uda1380_sdet_enum =
 190         SOC_ENUM_SINGLE(UDA1380_MIXER, 4, 4, uda1380_sdet_setting);     /* SD_VALUE */
 191 static const struct soc_enum uda1380_os_enum =
 192         SOC_ENUM_SINGLE(UDA1380_MIXER, 0, 3, uda1380_os_setting);       /* OS */
 193
 194 /*
 195  * from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
 196  */
 197 static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
 198
 199 /*
 200  * from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
 201  * from -66 dB in 0.5 dB steps (2 dB steps, really) and
 202  * from -52 dB in 0.25 dB steps
 203  */
 204 static const unsigned int mvol_tlv[] = {
 205         TLV_DB_RANGE_HEAD(3),
 206         0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
 207         16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
 208         44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0),
 209 };
 210
 211 /*
 212  * from -72 dB in 1.5 dB steps (6 dB steps really),
 213  * from -66 dB in 0.75 dB steps (3 dB steps really),
 214  * from -60 dB in 0.5 dB steps (2 dB steps really) and
 215  * from -46 dB in 0.25 dB steps
 216  */
 217 static const unsigned int vc_tlv[] = {
 218         TLV_DB_RANGE_HEAD(4),
 219         0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
 220         8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
 221         16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
 222         44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0),
 223 };
 224
 225 /* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
 226 static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
 227
 228 /* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
 229  * off at 18 dB max) */
 230 static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
 231
 232 /* from -63 to 24 dB in 0.5 dB steps (-128...48) */
 233 static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
 234
 235 /* from 0 to 24 dB in 3 dB steps */
 236 static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
 237
 238 /* from 0 to 30 dB in 2 dB steps */
 239 static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
 240
 241 static const struct snd_kcontrol_new uda1380_snd_controls[] = {
 242         SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv),     /* AVCR, AVCL */
 243         SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
 244         SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv),       /* VC2 */
 245         SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv),       /* VC1 */
 246         SOC_ENUM("Sound Processing Filter", uda1380_spf_enum),                          /* M */
 247         SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv),     /* TRL, TRR */
 248         SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv),       /* BBL, BBR */
 249 /**/    SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1),          /* MTM */
 250         SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1),             /* MT2 from decimation filter */
 251         SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]),            /* DE2 */
 252         SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1),              /* MT1, from digital data input */
 253         SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]),            /* DE1 */
 254         SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0),   /* DA_POL_INV */
 255         SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum),                          /* SEL_NS */
 256         SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum),             /* MIX_POS, MIX */
 257         SOC_SINGLE("Silence Switch", UDA1380_MIXER, 7, 1, 0),                   /* SILENCE, force DAC output to silence */
 258         SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0),          /* SDET_ON */
 259         SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum),                /* SD_VALUE */
 260         SOC_ENUM("Oversampling Input", uda1380_os_enum),                        /* OS */
 261         SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv),        /* ML_DEC, MR_DEC */
 262 /**/    SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1),                /* MT_ADC */
 263         SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
 264         SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0),     /* ADCPOL_INV */
 265         SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv),   /* VGA_CTRL */
 266         SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0),            /* SKIP_DCFIL (before decimator) */
 267         SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0),            /* EN_DCFIL (at output of decimator) */
 268         SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0),                 /* TODO: enum, see table 62 */
 269         SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1),                   /* AGC_LEVEL */
 270         /* -5.5, -8, -11.5, -14 dBFS */
 271         SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
 272 };
 273
 274 /* Input mux */
 275 static const struct snd_kcontrol_new uda1380_input_mux_control =
 276         SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
 277
 278 /* Output mux */
 279 static const struct snd_kcontrol_new uda1380_output_mux_control =
 280         SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
 281
 282 /* Capture mux */
 283 static const struct snd_kcontrol_new uda1380_capture_mux_control =
 284         SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
 285
 286
 287 static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
 288         SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
 289                 &uda1380_input_mux_control),
 290         SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
 291                 &uda1380_output_mux_control),
 292         SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
 293                 &uda1380_capture_mux_control),
 294         SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
 295         SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
 296         SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
 297         SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
 298         SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
 299         SND_SOC_DAPM_INPUT("VINM"),
 300         SND_SOC_DAPM_INPUT("VINL"),
 301         SND_SOC_DAPM_INPUT("VINR"),
 302         SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
 303         SND_SOC_DAPM_OUTPUT("VOUTLHP"),
 304         SND_SOC_DAPM_OUTPUT("VOUTRHP"),
 305         SND_SOC_DAPM_OUTPUT("VOUTL"),
 306         SND_SOC_DAPM_OUTPUT("VOUTR"),
 307         SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
 308         SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
 309 };
 310
 311 static const struct snd_soc_dapm_route audio_map[] = {
 312
 313         /* output mux */
 314         {"HeadPhone Driver", NULL, "Output Mux"},
 315         {"VOUTR", NULL, "Output Mux"},
 316         {"VOUTL", NULL, "Output Mux"},
 317
 318         {"Analog Mixer", NULL, "VINR"},
 319         {"Analog Mixer", NULL, "VINL"},
 320         {"Analog Mixer", NULL, "DAC"},
 321
 322         {"Output Mux", "DAC", "DAC"},
 323         {"Output Mux", "Analog Mixer", "Analog Mixer"},
 324
 325         /* {"DAC", "Digital Mixer", "I2S" } */
 326
 327         /* headphone driver */
 328         {"VOUTLHP", NULL, "HeadPhone Driver"},
 329         {"VOUTRHP", NULL, "HeadPhone Driver"},
 330
 331         /* input mux */
 332         {"Left ADC", NULL, "Input Mux"},
 333         {"Input Mux", "Mic", "Mic LNA"},
 334         {"Input Mux", "Mic + Line R", "Mic LNA"},
 335         {"Input Mux", "Line L", "Left PGA"},
 336         {"Input Mux", "Line", "Left PGA"},
 337
 338         /* right input */
 339         {"Right ADC", "Mic + Line R", "Right PGA"},
 340         {"Right ADC", "Line", "Right PGA"},
 341
 342         /* inputs */
 343         {"Mic LNA", NULL, "VINM"},
 344         {"Left PGA", NULL, "VINL"},
 345         {"Right PGA", NULL, "VINR"},
 346 };
 347
 348 static int uda1380_add_widgets(struct snd_soc_codec *codec)
 349 {
 350         snd_soc_dapm_new_controls(codec, uda1380_dapm_widgets,
 351                                   ARRAY_SIZE(uda1380_dapm_widgets));
 352
 353         snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map));
 354
 355         snd_soc_dapm_new_widgets(codec);
 356         return 0;
 357 }
 358
 359 static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
 360                 unsigned int fmt)
 361 {
 362         struct snd_soc_codec *codec = codec_dai->codec;
 363         int iface;
 364
 365         /* set up DAI based upon fmt */
 366         iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
 367         iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
 368
 369         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 370         case SND_SOC_DAIFMT_I2S:
 371                 iface |= R01_SFORI_I2S | R01_SFORO_I2S;
 372                 break;
 373         case SND_SOC_DAIFMT_LSB:
 374                 iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
 375                 break;
 376         case SND_SOC_DAIFMT_MSB:
 377                 iface |= R01_SFORI_MSB | R01_SFORO_MSB;
 378         }
 379
 380         if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
 381                 iface |= R01_SIM;
 382
 383         uda1380_write(codec, UDA1380_IFACE, iface);
 384
 385         return 0;
 386 }
 387
 388 static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
 389                 unsigned int fmt)
 390 {
 391         struct snd_soc_codec *codec = codec_dai->codec;
 392         int iface;
 393
 394         /* set up DAI based upon fmt */
 395         iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
 396         iface &= ~R01_SFORI_MASK;
 397
 398         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 399         case SND_SOC_DAIFMT_I2S:
 400                 iface |= R01_SFORI_I2S;
 401                 break;
 402         case SND_SOC_DAIFMT_LSB:
 403                 iface |= R01_SFORI_LSB16;
 404                 break;
 405         case SND_SOC_DAIFMT_MSB:
 406                 iface |= R01_SFORI_MSB;
 407         }
 408
 409         uda1380_write(codec, UDA1380_IFACE, iface);
 410
 411         return 0;
 412 }
 413
 414 static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
 415                 unsigned int fmt)
 416 {
 417         struct snd_soc_codec *codec = codec_dai->codec;
 418         int iface;
 419
 420         /* set up DAI based upon fmt */
 421         iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
 422         iface &= ~(R01_SIM | R01_SFORO_MASK);
 423
 424         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
 425         case SND_SOC_DAIFMT_I2S:
 426                 iface |= R01_SFORO_I2S;
 427                 break;
 428         case SND_SOC_DAIFMT_LSB:
 429                 iface |= R01_SFORO_LSB16;
 430                 break;
 431         case SND_SOC_DAIFMT_MSB:
 432                 iface |= R01_SFORO_MSB;
 433         }
 434
 435         if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
 436                 iface |= R01_SIM;
 437
 438         uda1380_write(codec, UDA1380_IFACE, iface);
 439
 440         return 0;
 441 }
 442
 443 /*
 444  * Flush reg cache
 445  * We can only write the interpolator and decimator registers
 446  * when the DAI is being clocked by the CPU DAI. It's up to the
 447  * machine and cpu DAI driver to do this before we are called.
 448  */
 449 static int uda1380_pcm_prepare(struct snd_pcm_substream *substream,
 450                                struct snd_soc_dai *dai)
 451 {
 452         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 453         struct snd_soc_device *socdev = rtd->socdev;
 454         struct snd_soc_codec *codec = socdev->card->codec;
 455         int reg, reg_start, reg_end, clk;
 456
 457         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
 458                 reg_start = UDA1380_MVOL;
 459                 reg_end = UDA1380_MIXER;
 460         } else {
 461                 reg_start = UDA1380_DEC;
 462                 reg_end = UDA1380_AGC;
 463         }
 464
 465         /* FIXME disable DAC_CLK */
 466         clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 467         uda1380_write(codec, UDA1380_CLK, clk & ~R00_DAC_CLK);
 468
 469         for (reg = reg_start; reg <= reg_end; reg++) {
 470                 pr_debug("uda1380: flush reg %x val %x:", reg,
 471                                 uda1380_read_reg_cache(codec, reg));
 472                 uda1380_write(codec, reg, uda1380_read_reg_cache(codec, reg));
 473         }
 474
 475         /* FIXME restore DAC_CLK */
 476         uda1380_write(codec, UDA1380_CLK, clk);
 477
 478         return 0;
 479 }
 480
 481 static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
 482                                  struct snd_pcm_hw_params *params,
 483                                  struct snd_soc_dai *dai)
 484 {
 485         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 486         struct snd_soc_device *socdev = rtd->socdev;
 487         struct snd_soc_codec *codec = socdev->card->codec;
 488         u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 489
 490         /* set WSPLL power and divider if running from this clock */
 491         if (clk & R00_DAC_CLK) {
 492                 int rate = params_rate(params);
 493                 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 494                 clk &= ~0x3; /* clear SEL_LOOP_DIV */
 495                 switch (rate) {
 496                 case 6250 ... 12500:
 497                         clk |= 0x0;
 498                         break;
 499                 case 12501 ... 25000:
 500                         clk |= 0x1;
 501                         break;
 502                 case 25001 ... 50000:
 503                         clk |= 0x2;
 504                         break;
 505                 case 50001 ... 100000:
 506                         clk |= 0x3;
 507                         break;
 508                 }
 509                 uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
 510         }
 511
 512         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 513                 clk |= R00_EN_DAC | R00_EN_INT;
 514         else
 515                 clk |= R00_EN_ADC | R00_EN_DEC;
 516
 517         uda1380_write(codec, UDA1380_CLK, clk);
 518         return 0;
 519 }
 520
 521 static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream,
 522                                  struct snd_soc_dai *dai)
 523 {
 524         struct snd_soc_pcm_runtime *rtd = substream->private_data;
 525         struct snd_soc_device *socdev = rtd->socdev;
 526         struct snd_soc_codec *codec = socdev->card->codec;
 527         u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 528
 529         /* shut down WSPLL power if running from this clock */
 530         if (clk & R00_DAC_CLK) {
 531                 u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 532                 uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
 533         }
 534
 535         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
 536                 clk &= ~(R00_EN_DAC | R00_EN_INT);
 537         else
 538                 clk &= ~(R00_EN_ADC | R00_EN_DEC);
 539
 540         uda1380_write(codec, UDA1380_CLK, clk);
 541 }
 542
 543 static int uda1380_mute(struct snd_soc_dai *codec_dai, int mute)
 544 {
 545         struct snd_soc_codec *codec = codec_dai->codec;
 546         u16 mute_reg = uda1380_read_reg_cache(codec, UDA1380_DEEMP) & ~R13_MTM;
 547
 548         /* FIXME: mute(codec,0) is called when the magician clock is already
 549          * set to WSPLL, but for some unknown reason writing to interpolator
 550          * registers works only when clocked by SYSCLK */
 551         u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
 552         uda1380_write(codec, UDA1380_CLK, ~R00_DAC_CLK & clk);
 553         if (mute)
 554                 uda1380_write(codec, UDA1380_DEEMP, mute_reg | R13_MTM);
 555         else
 556                 uda1380_write(codec, UDA1380_DEEMP, mute_reg);
 557         uda1380_write(codec, UDA1380_CLK, clk);
 558         return 0;
 559 }
 560
 561 static int uda1380_set_bias_level(struct snd_soc_codec *codec,
 562         enum snd_soc_bias_level level)
 563 {
 564         int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
 565
 566         switch (level) {
 567         case SND_SOC_BIAS_ON:
 568         case SND_SOC_BIAS_PREPARE:
 569                 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
 570                 break;
 571         case SND_SOC_BIAS_STANDBY:
 572                 uda1380_write(codec, UDA1380_PM, R02_PON_BIAS);
 573                 break;
 574         case SND_SOC_BIAS_OFF:
 575                 uda1380_write(codec, UDA1380_PM, 0x0);
 576                 break;
 577         }
 578         codec->bias_level = level;
 579         return 0;
 580 }
 581
 582 #define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
 583                        SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
 584                        SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
 585
 586 struct snd_soc_dai uda1380_dai[] = {
 587 {
 588         .name = "UDA1380",
 589         .playback = {
 590                 .stream_name = "Playback",
 591                 .channels_min = 1,
 592                 .channels_max = 2,
 593                 .rates = UDA1380_RATES,
 594                 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
 595         .capture = {
 596                 .stream_name = "Capture",
 597                 .channels_min = 1,
 598                 .channels_max = 2,
 599                 .rates = UDA1380_RATES,
 600                 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
 601         .ops = {
 602                 .hw_params = uda1380_pcm_hw_params,
 603                 .shutdown = uda1380_pcm_shutdown,
 604                 .prepare = uda1380_pcm_prepare,
 605                 .digital_mute = uda1380_mute,
 606                 .set_fmt = uda1380_set_dai_fmt_both,
 607         },
 608 },
 609 { /* playback only - dual interface */
 610         .name = "UDA1380",
 611         .playback = {
 612                 .stream_name = "Playback",
 613                 .channels_min = 1,
 614                 .channels_max = 2,
 615                 .rates = UDA1380_RATES,
 616                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 617         },
 618         .ops = {
 619                 .hw_params = uda1380_pcm_hw_params,
 620                 .shutdown = uda1380_pcm_shutdown,
 621                 .prepare = uda1380_pcm_prepare,
 622                 .digital_mute = uda1380_mute,
 623                 .set_fmt = uda1380_set_dai_fmt_playback,
 624         },
 625 },
 626 { /* capture only - dual interface*/
 627         .name = "UDA1380",
 628         .capture = {
 629                 .stream_name = "Capture",
 630                 .channels_min = 1,
 631                 .channels_max = 2,
 632                 .rates = UDA1380_RATES,
 633                 .formats = SNDRV_PCM_FMTBIT_S16_LE,
 634         },
 635         .ops = {
 636                 .hw_params = uda1380_pcm_hw_params,
 637                 .shutdown = uda1380_pcm_shutdown,
 638                 .prepare = uda1380_pcm_prepare,
 639                 .set_fmt = uda1380_set_dai_fmt_capture,
 640         },
 641 },
 642 };
 643 EXPORT_SYMBOL_GPL(uda1380_dai);
 644
 645 static int uda1380_suspend(struct platform_device *pdev, pm_message_t state)
 646 {
 647         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 648         struct snd_soc_codec *codec = socdev->card->codec;
 649
 650         uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
 651         return 0;
 652 }
 653
 654 static int uda1380_resume(struct platform_device *pdev)
 655 {
 656         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 657         struct snd_soc_codec *codec = socdev->card->codec;
 658         int i;
 659         u8 data[2];
 660         u16 *cache = codec->reg_cache;
 661
 662         /* Sync reg_cache with the hardware */
 663         for (i = 0; i < ARRAY_SIZE(uda1380_reg); i++) {
 664                 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
 665                 data[1] = cache[i] & 0x00ff;
 666                 codec->hw_write(codec->control_data, data, 2);
 667         }
 668         uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 669         uda1380_set_bias_level(codec, codec->suspend_bias_level);
 670         return 0;
 671 }
 672
 673 /*
 674  * initialise the UDA1380 driver
 675  * register mixer and dsp interfaces with the kernel
 676  */
 677 static int uda1380_init(struct snd_soc_device *socdev, int dac_clk)
 678 {
 679         struct snd_soc_codec *codec = socdev->card->codec;
 680         int ret = 0;
 681
 682         codec->name = "UDA1380";
 683         codec->owner = THIS_MODULE;
 684         codec->read = uda1380_read_reg_cache;
 685         codec->write = uda1380_write;
 686         codec->set_bias_level = uda1380_set_bias_level;
 687         codec->dai = uda1380_dai;
 688         codec->num_dai = ARRAY_SIZE(uda1380_dai);
 689         codec->reg_cache = kmemdup(uda1380_reg, sizeof(uda1380_reg),
 690                                    GFP_KERNEL);
 691         if (codec->reg_cache == NULL)
 692                 return -ENOMEM;
 693         codec->reg_cache_size = ARRAY_SIZE(uda1380_reg);
 694         codec->reg_cache_step = 1;
 695         uda1380_reset(codec);
 696
 697         /* register pcms */
 698         ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
 699         if (ret < 0) {
 700                 pr_err("uda1380: failed to create pcms\n");
 701                 goto pcm_err;
 702         }
 703
 704         /* power on device */
 705         uda1380_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
 706         /* set clock input */
 707         switch (dac_clk) {
 708         case UDA1380_DAC_CLK_SYSCLK:
 709                 uda1380_write(codec, UDA1380_CLK, 0);
 710                 break;
 711         case UDA1380_DAC_CLK_WSPLL:
 712                 uda1380_write(codec, UDA1380_CLK, R00_DAC_CLK);
 713                 break;
 714         }
 715
 716         /* uda1380 init */
 717         snd_soc_add_controls(codec, uda1380_snd_controls,
 718                                 ARRAY_SIZE(uda1380_snd_controls));
 719         uda1380_add_widgets(codec);
 720         ret = snd_soc_init_card(socdev);
 721         if (ret < 0) {
 722                 pr_err("uda1380: failed to register card\n");
 723                 goto card_err;
 724         }
 725
 726         return ret;
 727
 728 card_err:
 729         snd_soc_free_pcms(socdev);
 730         snd_soc_dapm_free(socdev);
 731 pcm_err:
 732         kfree(codec->reg_cache);
 733         return ret;
 734 }
 735
 736 static struct snd_soc_device *uda1380_socdev;
 737
 738 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 739
 740 static int uda1380_i2c_probe(struct i2c_client *i2c,
 741                              const struct i2c_device_id *id)
 742 {
 743         struct snd_soc_device *socdev = uda1380_socdev;
 744         struct uda1380_setup_data *setup = socdev->codec_data;
 745         struct snd_soc_codec *codec = socdev->card->codec;
 746         int ret;
 747
 748         i2c_set_clientdata(i2c, codec);
 749         codec->control_data = i2c;
 750
 751         ret = uda1380_init(socdev, setup->dac_clk);
 752         if (ret < 0)
 753                 pr_err("uda1380: failed to initialise UDA1380\n");
 754
 755         return ret;
 756 }
 757
 758 static int uda1380_i2c_remove(struct i2c_client *client)
 759 {
 760         struct snd_soc_codec *codec = i2c_get_clientdata(client);
 761         kfree(codec->reg_cache);
 762         return 0;
 763 }
 764
 765 static const struct i2c_device_id uda1380_i2c_id[] = {
 766         { "uda1380", 0 },
 767         { }
 768 };
 769 MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
 770
 771 static struct i2c_driver uda1380_i2c_driver = {
 772         .driver = {
 773                 .name =  "UDA1380 I2C Codec",
 774                 .owner = THIS_MODULE,
 775         },
 776         .probe =    uda1380_i2c_probe,
 777         .remove =   uda1380_i2c_remove,
 778         .id_table = uda1380_i2c_id,
 779 };
 780
 781 static int uda1380_add_i2c_device(struct platform_device *pdev,
 782                                   const struct uda1380_setup_data *setup)
 783 {
 784         struct i2c_board_info info;
 785         struct i2c_adapter *adapter;
 786         struct i2c_client *client;
 787         int ret;
 788
 789         ret = i2c_add_driver(&uda1380_i2c_driver);
 790         if (ret != 0) {
 791                 dev_err(&pdev->dev, "can't add i2c driver\n");
 792                 return ret;
 793         }
 794
 795         memset(&info, 0, sizeof(struct i2c_board_info));
 796         info.addr = setup->i2c_address;
 797         strlcpy(info.type, "uda1380", I2C_NAME_SIZE);
 798
 799         adapter = i2c_get_adapter(setup->i2c_bus);
 800         if (!adapter) {
 801                 dev_err(&pdev->dev, "can't get i2c adapter %d\n",
 802                         setup->i2c_bus);
 803                 goto err_driver;
 804         }
 805
 806         client = i2c_new_device(adapter, &info);
 807         i2c_put_adapter(adapter);
 808         if (!client) {
 809                 dev_err(&pdev->dev, "can't add i2c device at 0x%x\n",
 810                         (unsigned int)info.addr);
 811                 goto err_driver;
 812         }
 813
 814         return 0;
 815
 816 err_driver:
 817         i2c_del_driver(&uda1380_i2c_driver);
 818         return -ENODEV;
 819 }
 820 #endif
 821
 822 static int uda1380_probe(struct platform_device *pdev)
 823 {
 824         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 825         struct uda1380_setup_data *setup;
 826         struct snd_soc_codec *codec;
 827         int ret;
 828
 829         pr_info("UDA1380 Audio Codec %s", UDA1380_VERSION);
 830
 831         setup = socdev->codec_data;
 832         codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
 833         if (codec == NULL)
 834                 return -ENOMEM;
 835
 836         socdev->card->codec = codec;
 837         mutex_init(&codec->mutex);
 838         INIT_LIST_HEAD(&codec->dapm_widgets);
 839         INIT_LIST_HEAD(&codec->dapm_paths);
 840
 841         uda1380_socdev = socdev;
 842         ret = -ENODEV;
 843
 844 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 845         if (setup->i2c_address) {
 846                 codec->hw_write = (hw_write_t)i2c_master_send;
 847                 ret = uda1380_add_i2c_device(pdev, setup);
 848         }
 849 #endif
 850
 851         if (ret != 0)
 852                 kfree(codec);
 853         return ret;
 854 }
 855
 856 /* power down chip */
 857 static int uda1380_remove(struct platform_device *pdev)
 858 {
 859         struct snd_soc_device *socdev = platform_get_drvdata(pdev);
 860         struct snd_soc_codec *codec = socdev->card->codec;
 861
 862         if (codec->control_data)
 863                 uda1380_set_bias_level(codec, SND_SOC_BIAS_OFF);
 864
 865         snd_soc_free_pcms(socdev);
 866         snd_soc_dapm_free(socdev);
 867 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
 868         i2c_unregister_device(codec->control_data);
 869         i2c_del_driver(&uda1380_i2c_driver);
 870 #endif
 871         kfree(codec);
 872
 873         return 0;
 874 }
 875
 876 struct snd_soc_codec_device soc_codec_dev_uda1380 = {
 877         .probe =        uda1380_probe,
 878         .remove =       uda1380_remove,
 879         .suspend =      uda1380_suspend,
 880         .resume =       uda1380_resume,
 881 };
 882 EXPORT_SYMBOL_GPL(soc_codec_dev_uda1380);
 883
 884 static int __init uda1380_modinit(void)
 885 {
 886         return snd_soc_register_dais(uda1380_dai, ARRAY_SIZE(uda1380_dai));
 887 }
 888 module_init(uda1380_modinit);
 889
 890 static void __exit uda1380_exit(void)
 891 {
 892         snd_soc_unregister_dais(uda1380_dai, ARRAY_SIZE(uda1380_dai));
 893 }
 894 module_exit(uda1380_exit);
 895
 896 MODULE_AUTHOR("Giorgio Padrin");
 897 MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
 898 MODULE_LICENSE("GPL");