2 * wm0010.c -- WM0010 DSP Driver
4 * Copyright 2012 Wolfson Microelectronics PLC.
6 * Authors: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 * Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
8 * Scott Ling <sl@opensource.wolfsonmicro.com>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/irqreturn.h>
18 #include <linux/init.h>
19 #include <linux/spi/spi.h>
20 #include <linux/firmware.h>
21 #include <linux/delay.h>
23 #include <linux/miscdevice.h>
24 #include <linux/gpio.h>
25 #include <linux/regulator/consumer.h>
26 #include <linux/mutex.h>
27 #include <linux/workqueue.h>
29 #include <sound/soc.h>
30 #include <sound/wm0010.h>
32 #define DEVICE_ID_WM0010 10
61 static struct pll_clock_map
{
63 int max_pll_spi_speed
;
65 } pll_clock_map
[] = { /* Dividers */
66 { 22000000, 26000000, 0x00201f11 }, /* 2,32,2 */
67 { 18000000, 26000000, 0x00203f21 }, /* 2,64,4 */
68 { 14000000, 26000000, 0x00202620 }, /* 1,39,4 */
69 { 10000000, 22000000, 0x00203120 }, /* 1,50,4 */
70 { 6500000, 22000000, 0x00204520 }, /* 1,70,4 */
71 { 5500000, 22000000, 0x00103f10 }, /* 1,64,2 */
83 struct snd_soc_codec
*codec
;
88 struct wm0010_pdata pdata
;
93 struct regulator_bulk_data core_supplies
[2];
94 struct regulator
*dbvdd
;
98 enum wm0010_state state
;
104 int board_max_spi_speed
;
110 struct completion boot_completion
;
113 struct wm0010_spi_msg
{
114 struct spi_message m
;
115 struct spi_transfer t
;
121 static const struct snd_soc_dapm_route wm0010_dapm_routes
[] = {
122 { "SDI2 Playback", NULL
, "SDI1 Playback" },
125 static const char *wm0010_state_to_str(enum wm0010_state state
)
127 const char *state_to_str
[] = {
135 if (state
< 0 || state
>= ARRAY_SIZE(state_to_str
))
137 return state_to_str
[state
];
140 /* Called with wm0010->lock held */
141 static void wm0010_halt(struct snd_soc_codec
*codec
)
143 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
145 enum wm0010_state state
;
147 /* Fetch the wm0010 state */
148 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
149 state
= wm0010
->state
;
150 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
153 case WM0010_POWER_OFF
:
154 /* If there's nothing to do, bail out */
156 case WM0010_OUT_OF_RESET
:
159 case WM0010_FIRMWARE
:
160 /* Remember to put chip back into reset */
161 gpio_set_value(wm0010
->gpio_reset
, wm0010
->gpio_reset_value
);
162 /* Disable the regulators */
163 regulator_disable(wm0010
->dbvdd
);
164 regulator_bulk_disable(ARRAY_SIZE(wm0010
->core_supplies
),
165 wm0010
->core_supplies
);
169 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
170 wm0010
->state
= WM0010_POWER_OFF
;
171 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
174 struct wm0010_boot_xfer
{
175 struct list_head list
;
176 struct snd_soc_codec
*codec
;
177 struct completion
*done
;
178 struct spi_message m
;
179 struct spi_transfer t
;
182 /* Called with wm0010->lock held */
183 static void wm0010_mark_boot_failure(struct wm0010_priv
*wm0010
)
185 enum wm0010_state state
;
188 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
189 state
= wm0010
->state
;
190 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
192 dev_err(wm0010
->dev
, "Failed to transition from `%s' state to `%s' state\n",
193 wm0010_state_to_str(state
), wm0010_state_to_str(state
+ 1));
195 wm0010
->boot_failed
= true;
198 static void wm0010_boot_xfer_complete(void *data
)
200 struct wm0010_boot_xfer
*xfer
= data
;
201 struct snd_soc_codec
*codec
= xfer
->codec
;
202 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
203 u32
*out32
= xfer
->t
.rx_buf
;
206 if (xfer
->m
.status
!= 0) {
207 dev_err(codec
->dev
, "SPI transfer failed: %d\n",
209 wm0010_mark_boot_failure(wm0010
);
211 complete(xfer
->done
);
215 for (i
= 0; i
< xfer
->t
.len
/ 4; i
++) {
216 dev_dbg(codec
->dev
, "%d: %04x\n", i
, out32
[i
]);
218 switch (be32_to_cpu(out32
[i
])) {
221 "%d: ROM error reported in stage 2\n", i
);
222 wm0010_mark_boot_failure(wm0010
);
226 if (wm0010
->boot_done
== 0)
229 "%d: ROM bootloader running in stage 2\n", i
);
230 wm0010_mark_boot_failure(wm0010
);
234 dev_dbg(codec
->dev
, "Stage2 loader running\n");
238 dev_dbg(codec
->dev
, "CODE_HDR packet received\n");
242 dev_dbg(codec
->dev
, "CODE_DATA packet received\n");
246 dev_dbg(codec
->dev
, "Download complete\n");
250 dev_dbg(codec
->dev
, "Application start\n");
254 dev_dbg(codec
->dev
, "PLL packet received\n");
255 wm0010
->pll_running
= true;
259 dev_err(codec
->dev
, "Device reports image too long\n");
260 wm0010_mark_boot_failure(wm0010
);
264 dev_err(codec
->dev
, "Device reports bad SPI packet\n");
265 wm0010_mark_boot_failure(wm0010
);
269 dev_err(codec
->dev
, "Device reports SPI read overflow\n");
270 wm0010_mark_boot_failure(wm0010
);
274 dev_err(codec
->dev
, "Device reports SPI underclock\n");
275 wm0010_mark_boot_failure(wm0010
);
279 dev_err(codec
->dev
, "Device reports bad header packet\n");
280 wm0010_mark_boot_failure(wm0010
);
284 dev_err(codec
->dev
, "Device reports invalid packet type\n");
285 wm0010_mark_boot_failure(wm0010
);
289 dev_err(codec
->dev
, "Device reports data before header error\n");
290 wm0010_mark_boot_failure(wm0010
);
294 dev_err(codec
->dev
, "Device reports invalid PLL packet\n");
298 dev_err(codec
->dev
, "Device reports packet alignment error\n");
299 wm0010_mark_boot_failure(wm0010
);
303 dev_err(codec
->dev
, "Unrecognised return 0x%x\n",
304 be32_to_cpu(out32
[i
]));
305 wm0010_mark_boot_failure(wm0010
);
309 if (wm0010
->boot_failed
)
315 complete(xfer
->done
);
318 static void byte_swap_64(u64
*data_in
, u64
*data_out
, u32 len
)
322 for (i
= 0; i
< len
/ 8; i
++)
323 data_out
[i
] = cpu_to_be64(le64_to_cpu(data_in
[i
]));
326 static int wm0010_boot(struct snd_soc_codec
*codec
)
328 struct spi_device
*spi
= to_spi_device(codec
->dev
);
329 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
331 struct list_head xfer_list
;
332 struct wm0010_boot_xfer
*xfer
;
334 struct completion done
;
335 const struct firmware
*fw
;
336 const struct dfw_binrec
*rec
;
337 struct spi_message m
;
338 struct spi_transfer t
;
339 struct dfw_pllrec pll_rec
;
346 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
347 if (wm0010
->state
!= WM0010_POWER_OFF
)
348 dev_warn(wm0010
->dev
, "DSP already powered up!\n");
349 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
351 if (wm0010
->sysclk
> 26000000) {
352 dev_err(codec
->dev
, "Max DSP clock frequency is 26MHz\n");
357 INIT_LIST_HEAD(&xfer_list
);
359 mutex_lock(&wm0010
->lock
);
360 wm0010
->pll_running
= false;
362 dev_dbg(codec
->dev
, "max_spi_freq: %d\n", wm0010
->max_spi_freq
);
364 ret
= regulator_bulk_enable(ARRAY_SIZE(wm0010
->core_supplies
),
365 wm0010
->core_supplies
);
367 dev_err(&spi
->dev
, "Failed to enable core supplies: %d\n",
369 mutex_unlock(&wm0010
->lock
);
373 ret
= regulator_enable(wm0010
->dbvdd
);
375 dev_err(&spi
->dev
, "Failed to enable DBVDD: %d\n", ret
);
380 gpio_set_value(wm0010
->gpio_reset
, !wm0010
->gpio_reset_value
);
381 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
382 wm0010
->state
= WM0010_OUT_OF_RESET
;
383 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
385 /* First the bootloader */
386 ret
= request_firmware(&fw
, "wm0010_stage2.bin", codec
->dev
);
388 dev_err(codec
->dev
, "Failed to request stage2 loader: %d\n",
393 if (!wait_for_completion_timeout(&wm0010
->boot_completion
,
394 msecs_to_jiffies(10)))
395 dev_err(codec
->dev
, "Failed to get interrupt from DSP\n");
397 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
398 wm0010
->state
= WM0010_BOOTROM
;
399 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
401 dev_dbg(codec
->dev
, "Downloading %d byte stage 2 loader\n", fw
->size
);
403 /* Copy to local buffer first as vmalloc causes problems for dma */
404 img
= kzalloc(fw
->size
, GFP_KERNEL
);
406 dev_err(codec
->dev
, "Failed to allocate image buffer\n");
410 out
= kzalloc(fw
->size
, GFP_KERNEL
);
412 dev_err(codec
->dev
, "Failed to allocate output buffer\n");
416 memcpy(img
, &fw
->data
[0], fw
->size
);
418 spi_message_init(&m
);
419 memset(&t
, 0, sizeof(t
));
424 t
.speed_hz
= wm0010
->sysclk
/ 10;
425 spi_message_add_tail(&t
, &m
);
427 dev_dbg(codec
->dev
, "Starting initial download at %dHz\n",
430 ret
= spi_sync(spi
, &m
);
432 dev_err(codec
->dev
, "Initial download failed: %d\n", ret
);
436 /* Look for errors from the boot ROM */
437 for (i
= 0; i
< fw
->size
; i
++) {
438 if (out
[i
] != 0x55) {
440 dev_err(codec
->dev
, "Boot ROM error: %x in %d\n",
442 wm0010_mark_boot_failure(wm0010
);
447 release_firmware(fw
);
451 if (!wait_for_completion_timeout(&wm0010
->boot_completion
,
452 msecs_to_jiffies(10)))
453 dev_err(codec
->dev
, "Failed to get interrupt from DSP loader.\n");
455 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
456 wm0010
->state
= WM0010_STAGE2
;
457 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
459 /* Only initialise PLL if max_spi_freq initialised */
460 if (wm0010
->max_spi_freq
) {
462 /* Initialise a PLL record */
463 memset(&pll_rec
, 0, sizeof(pll_rec
));
464 pll_rec
.command
= DFW_CMD_PLL
;
465 pll_rec
.length
= (sizeof(pll_rec
) - 8);
467 /* On wm0010 only the CLKCTRL1 value is used */
468 pll_rec
.clkctrl1
= wm0010
->pll_clkctrl1
;
470 len
= pll_rec
.length
+ 8;
471 out
= kzalloc(len
, GFP_KERNEL
);
474 "Failed to allocate RX buffer\n");
478 img_swap
= kzalloc(len
, GFP_KERNEL
);
481 "Failed to allocate image buffer\n");
485 /* We need to re-order for 0010 */
486 byte_swap_64((u64
*)&pll_rec
, img_swap
, len
);
488 spi_message_init(&m
);
489 memset(&t
, 0, sizeof(t
));
494 t
.speed_hz
= wm0010
->sysclk
/ 6;
495 spi_message_add_tail(&t
, &m
);
497 ret
= spi_sync(spi
, &m
);
499 dev_err(codec
->dev
, "First PLL write failed: %d\n", ret
);
503 /* Use a second send of the message to get the return status */
504 ret
= spi_sync(spi
, &m
);
506 dev_err(codec
->dev
, "Second PLL write failed: %d\n", ret
);
512 /* Look for PLL active code from the DSP */
513 for (i
= 0; i
< len
/ 4; i
++) {
514 if (*p
== 0x0e00ed0f) {
515 dev_dbg(codec
->dev
, "PLL packet received\n");
516 wm0010
->pll_running
= true;
525 dev_dbg(codec
->dev
, "Not enabling DSP PLL.");
527 ret
= request_firmware(&fw
, "wm0010.dfw", codec
->dev
);
529 dev_err(codec
->dev
, "Failed to request application: %d\n",
534 rec
= (const struct dfw_binrec
*)fw
->data
;
536 wm0010
->boot_done
= 0;
537 wm0010
->boot_failed
= false;
538 BUG_ON(!list_empty(&xfer_list
));
539 init_completion(&done
);
541 /* First record should be INFO */
542 if (rec
->command
!= DFW_CMD_INFO
) {
543 dev_err(codec
->dev
, "First record not INFO\r\n");
547 /* Check it's a 0010 file */
548 if (rec
->data
[0] != DEVICE_ID_WM0010
) {
549 dev_err(codec
->dev
, "Not a WM0010 firmware file.\r\n");
553 /* Skip the info record as we don't need to send it */
554 offset
+= ((rec
->length
) + 8);
555 rec
= (void *)&rec
->data
[rec
->length
];
557 while (offset
< fw
->size
) {
559 "Packet: command %d, data length = 0x%x\r\n",
560 rec
->command
, rec
->length
);
561 len
= rec
->length
+ 8;
563 out
= kzalloc(len
, GFP_KERNEL
);
566 "Failed to allocate RX buffer\n");
570 img_swap
= kzalloc(len
, GFP_KERNEL
);
573 "Failed to allocate image buffer\n");
577 /* We need to re-order for 0010 */
578 byte_swap_64((u64
*)&rec
->command
, img_swap
, len
);
580 xfer
= kzalloc(sizeof(*xfer
), GFP_KERNEL
);
582 dev_err(codec
->dev
, "Failed to allocate xfer\n");
587 list_add_tail(&xfer
->list
, &xfer_list
);
589 spi_message_init(&xfer
->m
);
590 xfer
->m
.complete
= wm0010_boot_xfer_complete
;
591 xfer
->m
.context
= xfer
;
592 xfer
->t
.tx_buf
= img_swap
;
593 xfer
->t
.rx_buf
= out
;
595 xfer
->t
.bits_per_word
= 8;
597 if (!wm0010
->pll_running
) {
598 xfer
->t
.speed_hz
= wm0010
->sysclk
/ 6;
600 xfer
->t
.speed_hz
= wm0010
->max_spi_freq
;
602 if (wm0010
->board_max_spi_speed
&&
603 (wm0010
->board_max_spi_speed
< wm0010
->max_spi_freq
))
604 xfer
->t
.speed_hz
= wm0010
->board_max_spi_speed
;
607 /* Store max usable spi frequency for later use */
608 wm0010
->max_spi_freq
= xfer
->t
.speed_hz
;
610 spi_message_add_tail(&xfer
->t
, &xfer
->m
);
612 offset
+= ((rec
->length
) + 8);
613 rec
= (void *)&rec
->data
[rec
->length
];
615 if (offset
>= fw
->size
) {
616 dev_dbg(codec
->dev
, "All transfers scheduled\n");
620 ret
= spi_async(spi
, &xfer
->m
);
622 dev_err(codec
->dev
, "Write failed: %d\n", ret
);
626 if (wm0010
->boot_failed
)
630 wait_for_completion(&done
);
632 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
633 wm0010
->state
= WM0010_FIRMWARE
;
634 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
636 mutex_unlock(&wm0010
->lock
);
638 release_firmware(fw
);
640 while (!list_empty(&xfer_list
)) {
641 xfer
= list_first_entry(&xfer_list
, struct wm0010_boot_xfer
,
643 kfree(xfer
->t
.rx_buf
);
644 kfree(xfer
->t
.tx_buf
);
645 list_del(&xfer
->list
);
652 /* Put the chip back into reset */
654 mutex_unlock(&wm0010
->lock
);
657 regulator_bulk_disable(ARRAY_SIZE(wm0010
->core_supplies
),
658 wm0010
->core_supplies
);
663 static int wm0010_set_bias_level(struct snd_soc_codec
*codec
,
664 enum snd_soc_bias_level level
)
666 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
669 case SND_SOC_BIAS_ON
:
670 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_PREPARE
)
673 case SND_SOC_BIAS_PREPARE
:
675 case SND_SOC_BIAS_STANDBY
:
676 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_PREPARE
) {
677 mutex_lock(&wm0010
->lock
);
679 mutex_unlock(&wm0010
->lock
);
682 case SND_SOC_BIAS_OFF
:
686 codec
->dapm
.bias_level
= level
;
691 static int wm0010_set_sysclk(struct snd_soc_codec
*codec
, int source
,
692 int clk_id
, unsigned int freq
, int dir
)
694 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
697 wm0010
->sysclk
= freq
;
699 if (freq
< pll_clock_map
[ARRAY_SIZE(pll_clock_map
)-1].max_sysclk
) {
700 wm0010
->max_spi_freq
= 0;
702 for (i
= 0; i
< ARRAY_SIZE(pll_clock_map
); i
++)
703 if (freq
>= pll_clock_map
[i
].max_sysclk
)
706 wm0010
->max_spi_freq
= pll_clock_map
[i
].max_pll_spi_speed
;
707 wm0010
->pll_clkctrl1
= pll_clock_map
[i
].pll_clkctrl1
;
713 static int wm0010_probe(struct snd_soc_codec
*codec
);
715 static struct snd_soc_codec_driver soc_codec_dev_wm0010
= {
716 .probe
= wm0010_probe
,
717 .set_bias_level
= wm0010_set_bias_level
,
718 .set_sysclk
= wm0010_set_sysclk
,
720 .dapm_routes
= wm0010_dapm_routes
,
721 .num_dapm_routes
= ARRAY_SIZE(wm0010_dapm_routes
),
724 #define WM0010_RATES (SNDRV_PCM_RATE_48000)
725 #define WM0010_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\
726 SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE |\
727 SNDRV_PCM_FMTBIT_S32_LE)
729 static struct snd_soc_dai_driver wm0010_dai
[] = {
731 .name
= "wm0010-sdi1",
733 .stream_name
= "SDI1 Playback",
736 .rates
= WM0010_RATES
,
737 .formats
= WM0010_FORMATS
,
740 .stream_name
= "SDI1 Capture",
743 .rates
= WM0010_RATES
,
744 .formats
= WM0010_FORMATS
,
748 .name
= "wm0010-sdi2",
750 .stream_name
= "SDI2 Playback",
753 .rates
= WM0010_RATES
,
754 .formats
= WM0010_FORMATS
,
757 .stream_name
= "SDI2 Capture",
760 .rates
= WM0010_RATES
,
761 .formats
= WM0010_FORMATS
,
766 static irqreturn_t
wm0010_irq(int irq
, void *data
)
768 struct wm0010_priv
*wm0010
= data
;
770 switch (wm0010
->state
) {
771 case WM0010_POWER_OFF
:
772 case WM0010_OUT_OF_RESET
:
775 spin_lock(&wm0010
->irq_lock
);
776 complete(&wm0010
->boot_completion
);
777 spin_unlock(&wm0010
->irq_lock
);
786 static int wm0010_probe(struct snd_soc_codec
*codec
)
788 struct wm0010_priv
*wm0010
= snd_soc_codec_get_drvdata(codec
);
789 struct spi_device
*spi
= to_spi_device(wm0010
->dev
);
791 unsigned long gpio_flags
;
796 wm0010
->codec
= codec
;
798 init_completion(&wm0010
->boot_completion
);
800 wm0010
->core_supplies
[0].supply
= "AVDD";
801 wm0010
->core_supplies
[1].supply
= "DCVDD";
802 ret
= devm_regulator_bulk_get(wm0010
->dev
, ARRAY_SIZE(wm0010
->core_supplies
),
803 wm0010
->core_supplies
);
805 dev_err(wm0010
->dev
, "Failed to obtain core supplies: %d\n",
810 wm0010
->dbvdd
= devm_regulator_get(wm0010
->dev
, "DBVDD");
811 if (IS_ERR(wm0010
->dbvdd
)) {
812 ret
= PTR_ERR(wm0010
->dbvdd
);
813 dev_err(wm0010
->dev
, "Failed to obtain DBVDD: %d\n", ret
);
817 if (wm0010
->pdata
.gpio_reset
) {
818 wm0010
->gpio_reset
= wm0010
->pdata
.gpio_reset
;
820 if (wm0010
->pdata
.reset_active_high
)
821 wm0010
->gpio_reset_value
= 1;
823 wm0010
->gpio_reset_value
= 0;
825 if (wm0010
->gpio_reset_value
)
826 gpio_flags
= GPIOF_OUT_INIT_HIGH
;
828 gpio_flags
= GPIOF_OUT_INIT_LOW
;
830 ret
= devm_gpio_request_one(wm0010
->dev
, wm0010
->gpio_reset
,
831 gpio_flags
, "wm0010 reset");
834 "Failed to request GPIO for DSP reset: %d\n",
839 dev_err(wm0010
->dev
, "No reset GPIO configured\n");
844 if (wm0010
->pdata
.irq_flags
)
845 trigger
= wm0010
->pdata
.irq_flags
;
847 trigger
= IRQF_TRIGGER_FALLING
;
848 trigger
|= IRQF_ONESHOT
;
850 ret
= request_threaded_irq(irq
, NULL
, wm0010_irq
, trigger
,
853 dev_err(wm0010
->dev
, "Failed to request IRQ %d: %d\n",
857 if (spi
->max_speed_hz
)
858 wm0010
->board_max_spi_speed
= spi
->max_speed_hz
;
860 wm0010
->board_max_spi_speed
= 0;
862 spin_lock_irqsave(&wm0010
->irq_lock
, flags
);
863 wm0010
->state
= WM0010_POWER_OFF
;
864 spin_unlock_irqrestore(&wm0010
->irq_lock
, flags
);
869 static int __devinit
wm0010_spi_probe(struct spi_device
*spi
)
871 struct wm0010_priv
*wm0010
;
874 wm0010
= devm_kzalloc(&spi
->dev
, sizeof(*wm0010
),
879 mutex_init(&wm0010
->lock
);
880 spin_lock_init(&wm0010
->irq_lock
);
882 spi_set_drvdata(spi
, wm0010
);
883 wm0010
->dev
= &spi
->dev
;
885 if (dev_get_platdata(&spi
->dev
))
886 memcpy(&wm0010
->pdata
, dev_get_platdata(&spi
->dev
),
887 sizeof(wm0010
->pdata
));
889 ret
= snd_soc_register_codec(&spi
->dev
,
890 &soc_codec_dev_wm0010
, wm0010_dai
,
891 ARRAY_SIZE(wm0010_dai
));
898 static int __devexit
wm0010_spi_remove(struct spi_device
*spi
)
900 struct wm0010_priv
*wm0010
= spi_get_drvdata(spi
);
902 snd_soc_unregister_codec(&spi
->dev
);
904 if (wm0010
->gpio_reset
) {
905 /* Remember to put chip back into reset */
906 gpio_set_value(wm0010
->gpio_reset
, wm0010
->gpio_reset_value
);
907 gpio_free(wm0010
->gpio_reset
);
911 free_irq(wm0010
->irq
, wm0010
);
916 static struct spi_driver wm0010_spi_driver
= {
919 .bus
= &spi_bus_type
,
920 .owner
= THIS_MODULE
,
922 .probe
= wm0010_spi_probe
,
923 .remove
= __devexit_p(wm0010_spi_remove
),
926 module_spi_driver(wm0010_spi_driver
);
928 MODULE_DESCRIPTION("ASoC WM0010 driver");
929 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
930 MODULE_LICENSE("GPL");