2 * wm8350.c -- WM8350 ALSA SoC audio driver
4 * Copyright (C) 2007-12 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/slab.h>
17 #include <linux/delay.h>
19 #include <linux/platform_device.h>
20 #include <linux/mfd/wm8350/audio.h>
21 #include <linux/mfd/wm8350/core.h>
22 #include <linux/regulator/consumer.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <trace/events/asoc.h>
33 #define WM8350_OUTn_0dB 0x39
35 #define WM8350_RAMP_NONE 0
36 #define WM8350_RAMP_UP 1
37 #define WM8350_RAMP_DOWN 2
39 /* We only include the analogue supplies here; the digital supplies
40 * need to be available well before this driver can be probed.
42 static const char *supply_names
[] = {
47 struct wm8350_output
{
55 struct wm8350_jack_data
{
56 struct snd_soc_jack
*jack
;
57 struct delayed_work work
;
63 struct wm8350
*wm8350
;
64 struct wm8350_output out1
;
65 struct wm8350_output out2
;
66 struct wm8350_jack_data hpl
;
67 struct wm8350_jack_data hpr
;
68 struct wm8350_jack_data mic
;
69 struct regulator_bulk_data supplies
[ARRAY_SIZE(supply_names
)];
72 struct delayed_work pga_work
;
76 * Ramp OUT1 PGA volume to minimise pops at stream startup and shutdown.
78 static inline int wm8350_out1_ramp_step(struct wm8350_data
*wm8350_data
)
80 struct wm8350_output
*out1
= &wm8350_data
->out1
;
81 struct wm8350
*wm8350
= wm8350_data
->wm8350
;
82 int left_complete
= 0, right_complete
= 0;
86 reg
= wm8350_reg_read(wm8350
, WM8350_LOUT1_VOLUME
);
87 val
= (reg
& WM8350_OUT1L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
89 if (out1
->ramp
== WM8350_RAMP_UP
) {
91 if (val
< out1
->left_vol
) {
93 reg
&= ~WM8350_OUT1L_VOL_MASK
;
94 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
,
95 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
98 } else if (out1
->ramp
== WM8350_RAMP_DOWN
) {
102 reg
&= ~WM8350_OUT1L_VOL_MASK
;
103 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
,
104 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
111 reg
= wm8350_reg_read(wm8350
, WM8350_ROUT1_VOLUME
);
112 val
= (reg
& WM8350_OUT1R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
113 if (out1
->ramp
== WM8350_RAMP_UP
) {
115 if (val
< out1
->right_vol
) {
117 reg
&= ~WM8350_OUT1R_VOL_MASK
;
118 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
,
119 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
122 } else if (out1
->ramp
== WM8350_RAMP_DOWN
) {
126 reg
&= ~WM8350_OUT1R_VOL_MASK
;
127 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
,
128 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
133 /* only hit the update bit if either volume has changed this step */
134 if (!left_complete
|| !right_complete
)
135 wm8350_set_bits(wm8350
, WM8350_LOUT1_VOLUME
, WM8350_OUT1_VU
);
137 return left_complete
& right_complete
;
141 * Ramp OUT2 PGA volume to minimise pops at stream startup and shutdown.
143 static inline int wm8350_out2_ramp_step(struct wm8350_data
*wm8350_data
)
145 struct wm8350_output
*out2
= &wm8350_data
->out2
;
146 struct wm8350
*wm8350
= wm8350_data
->wm8350
;
147 int left_complete
= 0, right_complete
= 0;
151 reg
= wm8350_reg_read(wm8350
, WM8350_LOUT2_VOLUME
);
152 val
= (reg
& WM8350_OUT2L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
153 if (out2
->ramp
== WM8350_RAMP_UP
) {
155 if (val
< out2
->left_vol
) {
157 reg
&= ~WM8350_OUT2L_VOL_MASK
;
158 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
,
159 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
162 } else if (out2
->ramp
== WM8350_RAMP_DOWN
) {
166 reg
&= ~WM8350_OUT2L_VOL_MASK
;
167 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
,
168 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
175 reg
= wm8350_reg_read(wm8350
, WM8350_ROUT2_VOLUME
);
176 val
= (reg
& WM8350_OUT2R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
177 if (out2
->ramp
== WM8350_RAMP_UP
) {
179 if (val
< out2
->right_vol
) {
181 reg
&= ~WM8350_OUT2R_VOL_MASK
;
182 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
,
183 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
186 } else if (out2
->ramp
== WM8350_RAMP_DOWN
) {
190 reg
&= ~WM8350_OUT2R_VOL_MASK
;
191 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
,
192 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
197 /* only hit the update bit if either volume has changed this step */
198 if (!left_complete
|| !right_complete
)
199 wm8350_set_bits(wm8350
, WM8350_LOUT2_VOLUME
, WM8350_OUT2_VU
);
201 return left_complete
& right_complete
;
205 * This work ramps both output PGAs at stream start/stop time to
206 * minimise pop associated with DAPM power switching.
207 * It's best to enable Zero Cross when ramping occurs to minimise any
210 static void wm8350_pga_work(struct work_struct
*work
)
212 struct wm8350_data
*wm8350_data
=
213 container_of(work
, struct wm8350_data
, pga_work
.work
);
214 struct wm8350_output
*out1
= &wm8350_data
->out1
,
215 *out2
= &wm8350_data
->out2
;
216 int i
, out1_complete
, out2_complete
;
218 /* do we need to ramp at all ? */
219 if (out1
->ramp
== WM8350_RAMP_NONE
&& out2
->ramp
== WM8350_RAMP_NONE
)
222 /* PGA volumes have 6 bits of resolution to ramp */
223 for (i
= 0; i
<= 63; i
++) {
224 out1_complete
= 1, out2_complete
= 1;
225 if (out1
->ramp
!= WM8350_RAMP_NONE
)
226 out1_complete
= wm8350_out1_ramp_step(wm8350_data
);
227 if (out2
->ramp
!= WM8350_RAMP_NONE
)
228 out2_complete
= wm8350_out2_ramp_step(wm8350_data
);
230 /* ramp finished ? */
231 if (out1_complete
&& out2_complete
)
234 /* we need to delay longer on the up ramp */
235 if (out1
->ramp
== WM8350_RAMP_UP
||
236 out2
->ramp
== WM8350_RAMP_UP
) {
237 /* delay is longer over 0dB as increases are larger */
238 if (i
>= WM8350_OUTn_0dB
)
239 schedule_timeout_interruptible(msecs_to_jiffies
242 schedule_timeout_interruptible(msecs_to_jiffies
245 udelay(50); /* doesn't matter if we delay longer */
248 out1
->ramp
= WM8350_RAMP_NONE
;
249 out2
->ramp
= WM8350_RAMP_NONE
;
256 static int pga_event(struct snd_soc_dapm_widget
*w
,
257 struct snd_kcontrol
*kcontrol
, int event
)
259 struct snd_soc_codec
*codec
= snd_soc_dapm_to_codec(w
->dapm
);
260 struct wm8350_data
*wm8350_data
= snd_soc_codec_get_drvdata(codec
);
261 struct wm8350_output
*out
;
266 out
= &wm8350_data
->out1
;
270 out
= &wm8350_data
->out2
;
274 WARN(1, "Invalid shift %d\n", w
->shift
);
279 case SND_SOC_DAPM_POST_PMU
:
280 out
->ramp
= WM8350_RAMP_UP
;
283 schedule_delayed_work(&wm8350_data
->pga_work
,
284 msecs_to_jiffies(1));
287 case SND_SOC_DAPM_PRE_PMD
:
288 out
->ramp
= WM8350_RAMP_DOWN
;
291 schedule_delayed_work(&wm8350_data
->pga_work
,
292 msecs_to_jiffies(1));
299 static int wm8350_put_volsw_2r_vu(struct snd_kcontrol
*kcontrol
,
300 struct snd_ctl_elem_value
*ucontrol
)
302 struct snd_soc_codec
*codec
= snd_soc_kcontrol_codec(kcontrol
);
303 struct wm8350_data
*wm8350_priv
= snd_soc_codec_get_drvdata(codec
);
304 struct wm8350_output
*out
= NULL
;
305 struct soc_mixer_control
*mc
=
306 (struct soc_mixer_control
*)kcontrol
->private_value
;
308 unsigned int reg
= mc
->reg
;
311 /* For OUT1 and OUT2 we shadow the values and only actually write
312 * them out when active in order to ensure the amplifier comes on
313 * as quietly as possible. */
315 case WM8350_LOUT1_VOLUME
:
316 out
= &wm8350_priv
->out1
;
318 case WM8350_LOUT2_VOLUME
:
319 out
= &wm8350_priv
->out2
;
326 out
->left_vol
= ucontrol
->value
.integer
.value
[0];
327 out
->right_vol
= ucontrol
->value
.integer
.value
[1];
332 ret
= snd_soc_put_volsw(kcontrol
, ucontrol
);
336 /* now hit the volume update bits (always bit 8) */
337 val
= snd_soc_read(codec
, reg
);
338 snd_soc_write(codec
, reg
, val
| WM8350_OUT1_VU
);
342 static int wm8350_get_volsw_2r(struct snd_kcontrol
*kcontrol
,
343 struct snd_ctl_elem_value
*ucontrol
)
345 struct snd_soc_codec
*codec
= snd_soc_kcontrol_codec(kcontrol
);
346 struct wm8350_data
*wm8350_priv
= snd_soc_codec_get_drvdata(codec
);
347 struct wm8350_output
*out1
= &wm8350_priv
->out1
;
348 struct wm8350_output
*out2
= &wm8350_priv
->out2
;
349 struct soc_mixer_control
*mc
=
350 (struct soc_mixer_control
*)kcontrol
->private_value
;
351 unsigned int reg
= mc
->reg
;
353 /* If these are cached registers use the cache */
355 case WM8350_LOUT1_VOLUME
:
356 ucontrol
->value
.integer
.value
[0] = out1
->left_vol
;
357 ucontrol
->value
.integer
.value
[1] = out1
->right_vol
;
360 case WM8350_LOUT2_VOLUME
:
361 ucontrol
->value
.integer
.value
[0] = out2
->left_vol
;
362 ucontrol
->value
.integer
.value
[1] = out2
->right_vol
;
369 return snd_soc_get_volsw(kcontrol
, ucontrol
);
372 static const char *wm8350_deemp
[] = { "None", "32kHz", "44.1kHz", "48kHz" };
373 static const char *wm8350_pol
[] = { "Normal", "Inv R", "Inv L", "Inv L & R" };
374 static const char *wm8350_dacmutem
[] = { "Normal", "Soft" };
375 static const char *wm8350_dacmutes
[] = { "Fast", "Slow" };
376 static const char *wm8350_adcfilter
[] = { "None", "High Pass" };
377 static const char *wm8350_adchp
[] = { "44.1kHz", "8kHz", "16kHz", "32kHz" };
378 static const char *wm8350_lr
[] = { "Left", "Right" };
380 static const struct soc_enum wm8350_enum
[] = {
381 SOC_ENUM_SINGLE(WM8350_DAC_CONTROL
, 4, 4, wm8350_deemp
),
382 SOC_ENUM_SINGLE(WM8350_DAC_CONTROL
, 0, 4, wm8350_pol
),
383 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 14, 2, wm8350_dacmutem
),
384 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 13, 2, wm8350_dacmutes
),
385 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 15, 2, wm8350_adcfilter
),
386 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 8, 4, wm8350_adchp
),
387 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 0, 4, wm8350_pol
),
388 SOC_ENUM_SINGLE(WM8350_INPUT_MIXER_VOLUME
, 15, 2, wm8350_lr
),
391 static DECLARE_TLV_DB_SCALE(pre_amp_tlv
, -1200, 3525, 0);
392 static DECLARE_TLV_DB_SCALE(out_pga_tlv
, -5700, 600, 0);
393 static DECLARE_TLV_DB_SCALE(dac_pcm_tlv
, -7163, 36, 1);
394 static DECLARE_TLV_DB_SCALE(adc_pcm_tlv
, -12700, 50, 1);
395 static DECLARE_TLV_DB_SCALE(out_mix_tlv
, -1500, 300, 1);
397 static const unsigned int capture_sd_tlv
[] = {
398 TLV_DB_RANGE_HEAD(2),
399 0, 12, TLV_DB_SCALE_ITEM(-3600, 300, 1),
400 13, 15, TLV_DB_SCALE_ITEM(0, 0, 0),
403 static const struct snd_kcontrol_new wm8350_snd_controls
[] = {
404 SOC_ENUM("Playback Deemphasis", wm8350_enum
[0]),
405 SOC_ENUM("Playback DAC Inversion", wm8350_enum
[1]),
406 SOC_DOUBLE_R_EXT_TLV("Playback PCM Volume",
407 WM8350_DAC_DIGITAL_VOLUME_L
,
408 WM8350_DAC_DIGITAL_VOLUME_R
,
409 0, 255, 0, wm8350_get_volsw_2r
,
410 wm8350_put_volsw_2r_vu
, dac_pcm_tlv
),
411 SOC_ENUM("Playback PCM Mute Function", wm8350_enum
[2]),
412 SOC_ENUM("Playback PCM Mute Speed", wm8350_enum
[3]),
413 SOC_ENUM("Capture PCM Filter", wm8350_enum
[4]),
414 SOC_ENUM("Capture PCM HP Filter", wm8350_enum
[5]),
415 SOC_ENUM("Capture ADC Inversion", wm8350_enum
[6]),
416 SOC_DOUBLE_R_EXT_TLV("Capture PCM Volume",
417 WM8350_ADC_DIGITAL_VOLUME_L
,
418 WM8350_ADC_DIGITAL_VOLUME_R
,
419 0, 255, 0, wm8350_get_volsw_2r
,
420 wm8350_put_volsw_2r_vu
, adc_pcm_tlv
),
421 SOC_DOUBLE_TLV("Capture Sidetone Volume",
423 8, 4, 15, 1, capture_sd_tlv
),
424 SOC_DOUBLE_R_EXT_TLV("Capture Volume",
425 WM8350_LEFT_INPUT_VOLUME
,
426 WM8350_RIGHT_INPUT_VOLUME
,
427 2, 63, 0, wm8350_get_volsw_2r
,
428 wm8350_put_volsw_2r_vu
, pre_amp_tlv
),
429 SOC_DOUBLE_R("Capture ZC Switch",
430 WM8350_LEFT_INPUT_VOLUME
,
431 WM8350_RIGHT_INPUT_VOLUME
, 13, 1, 0),
432 SOC_SINGLE_TLV("Left Input Left Sidetone Volume",
433 WM8350_OUTPUT_LEFT_MIXER_VOLUME
, 1, 7, 0, out_mix_tlv
),
434 SOC_SINGLE_TLV("Left Input Right Sidetone Volume",
435 WM8350_OUTPUT_LEFT_MIXER_VOLUME
,
436 5, 7, 0, out_mix_tlv
),
437 SOC_SINGLE_TLV("Left Input Bypass Volume",
438 WM8350_OUTPUT_LEFT_MIXER_VOLUME
,
439 9, 7, 0, out_mix_tlv
),
440 SOC_SINGLE_TLV("Right Input Left Sidetone Volume",
441 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
442 1, 7, 0, out_mix_tlv
),
443 SOC_SINGLE_TLV("Right Input Right Sidetone Volume",
444 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
445 5, 7, 0, out_mix_tlv
),
446 SOC_SINGLE_TLV("Right Input Bypass Volume",
447 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
448 13, 7, 0, out_mix_tlv
),
449 SOC_SINGLE("Left Input Mixer +20dB Switch",
450 WM8350_INPUT_MIXER_VOLUME_L
, 0, 1, 0),
451 SOC_SINGLE("Right Input Mixer +20dB Switch",
452 WM8350_INPUT_MIXER_VOLUME_R
, 0, 1, 0),
453 SOC_SINGLE_TLV("Out4 Capture Volume",
454 WM8350_INPUT_MIXER_VOLUME
,
455 1, 7, 0, out_mix_tlv
),
456 SOC_DOUBLE_R_EXT_TLV("Out1 Playback Volume",
459 2, 63, 0, wm8350_get_volsw_2r
,
460 wm8350_put_volsw_2r_vu
, out_pga_tlv
),
461 SOC_DOUBLE_R("Out1 Playback ZC Switch",
463 WM8350_ROUT1_VOLUME
, 13, 1, 0),
464 SOC_DOUBLE_R_EXT_TLV("Out2 Playback Volume",
467 2, 63, 0, wm8350_get_volsw_2r
,
468 wm8350_put_volsw_2r_vu
, out_pga_tlv
),
469 SOC_DOUBLE_R("Out2 Playback ZC Switch", WM8350_LOUT2_VOLUME
,
470 WM8350_ROUT2_VOLUME
, 13, 1, 0),
471 SOC_SINGLE("Out2 Right Invert Switch", WM8350_ROUT2_VOLUME
, 10, 1, 0),
472 SOC_SINGLE_TLV("Out2 Beep Volume", WM8350_BEEP_VOLUME
,
473 5, 7, 0, out_mix_tlv
),
475 SOC_DOUBLE_R("Out1 Playback Switch",
479 SOC_DOUBLE_R("Out2 Playback Switch",
489 /* Left Playback Mixer */
490 static const struct snd_kcontrol_new wm8350_left_play_mixer_controls
[] = {
491 SOC_DAPM_SINGLE("Playback Switch",
492 WM8350_LEFT_MIXER_CONTROL
, 11, 1, 0),
493 SOC_DAPM_SINGLE("Left Bypass Switch",
494 WM8350_LEFT_MIXER_CONTROL
, 2, 1, 0),
495 SOC_DAPM_SINGLE("Right Playback Switch",
496 WM8350_LEFT_MIXER_CONTROL
, 12, 1, 0),
497 SOC_DAPM_SINGLE("Left Sidetone Switch",
498 WM8350_LEFT_MIXER_CONTROL
, 0, 1, 0),
499 SOC_DAPM_SINGLE("Right Sidetone Switch",
500 WM8350_LEFT_MIXER_CONTROL
, 1, 1, 0),
503 /* Right Playback Mixer */
504 static const struct snd_kcontrol_new wm8350_right_play_mixer_controls
[] = {
505 SOC_DAPM_SINGLE("Playback Switch",
506 WM8350_RIGHT_MIXER_CONTROL
, 12, 1, 0),
507 SOC_DAPM_SINGLE("Right Bypass Switch",
508 WM8350_RIGHT_MIXER_CONTROL
, 3, 1, 0),
509 SOC_DAPM_SINGLE("Left Playback Switch",
510 WM8350_RIGHT_MIXER_CONTROL
, 11, 1, 0),
511 SOC_DAPM_SINGLE("Left Sidetone Switch",
512 WM8350_RIGHT_MIXER_CONTROL
, 0, 1, 0),
513 SOC_DAPM_SINGLE("Right Sidetone Switch",
514 WM8350_RIGHT_MIXER_CONTROL
, 1, 1, 0),
518 static const struct snd_kcontrol_new wm8350_out4_mixer_controls
[] = {
519 SOC_DAPM_SINGLE("Right Playback Switch",
520 WM8350_OUT4_MIXER_CONTROL
, 12, 1, 0),
521 SOC_DAPM_SINGLE("Left Playback Switch",
522 WM8350_OUT4_MIXER_CONTROL
, 11, 1, 0),
523 SOC_DAPM_SINGLE("Right Capture Switch",
524 WM8350_OUT4_MIXER_CONTROL
, 9, 1, 0),
525 SOC_DAPM_SINGLE("Out3 Playback Switch",
526 WM8350_OUT4_MIXER_CONTROL
, 2, 1, 0),
527 SOC_DAPM_SINGLE("Right Mixer Switch",
528 WM8350_OUT4_MIXER_CONTROL
, 1, 1, 0),
529 SOC_DAPM_SINGLE("Left Mixer Switch",
530 WM8350_OUT4_MIXER_CONTROL
, 0, 1, 0),
534 static const struct snd_kcontrol_new wm8350_out3_mixer_controls
[] = {
535 SOC_DAPM_SINGLE("Left Playback Switch",
536 WM8350_OUT3_MIXER_CONTROL
, 11, 1, 0),
537 SOC_DAPM_SINGLE("Left Capture Switch",
538 WM8350_OUT3_MIXER_CONTROL
, 8, 1, 0),
539 SOC_DAPM_SINGLE("Out4 Playback Switch",
540 WM8350_OUT3_MIXER_CONTROL
, 3, 1, 0),
541 SOC_DAPM_SINGLE("Left Mixer Switch",
542 WM8350_OUT3_MIXER_CONTROL
, 0, 1, 0),
545 /* Left Input Mixer */
546 static const struct snd_kcontrol_new wm8350_left_capt_mixer_controls
[] = {
547 SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
548 WM8350_INPUT_MIXER_VOLUME_L
, 1, 7, 0, out_mix_tlv
),
549 SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
550 WM8350_INPUT_MIXER_VOLUME_L
, 9, 7, 0, out_mix_tlv
),
551 SOC_DAPM_SINGLE("PGA Capture Switch",
552 WM8350_LEFT_INPUT_VOLUME
, 14, 1, 1),
555 /* Right Input Mixer */
556 static const struct snd_kcontrol_new wm8350_right_capt_mixer_controls
[] = {
557 SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
558 WM8350_INPUT_MIXER_VOLUME_R
, 5, 7, 0, out_mix_tlv
),
559 SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
560 WM8350_INPUT_MIXER_VOLUME_R
, 13, 7, 0, out_mix_tlv
),
561 SOC_DAPM_SINGLE("PGA Capture Switch",
562 WM8350_RIGHT_INPUT_VOLUME
, 14, 1, 1),
566 static const struct snd_kcontrol_new wm8350_left_mic_mixer_controls
[] = {
567 SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL
, 1, 1, 0),
568 SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL
, 0, 1, 0),
569 SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL
, 2, 1, 0),
572 /* Right Mic Mixer */
573 static const struct snd_kcontrol_new wm8350_right_mic_mixer_controls
[] = {
574 SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL
, 9, 1, 0),
575 SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL
, 8, 1, 0),
576 SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL
, 10, 1, 0),
580 static const struct snd_kcontrol_new wm8350_beep_switch_controls
=
581 SOC_DAPM_SINGLE("Switch", WM8350_BEEP_VOLUME
, 15, 1, 1);
583 /* Out4 Capture Mux */
584 static const struct snd_kcontrol_new wm8350_out4_capture_controls
=
585 SOC_DAPM_ENUM("Route", wm8350_enum
[7]);
587 static const struct snd_soc_dapm_widget wm8350_dapm_widgets
[] = {
589 SND_SOC_DAPM_PGA("IN3R PGA", WM8350_POWER_MGMT_2
, 11, 0, NULL
, 0),
590 SND_SOC_DAPM_PGA("IN3L PGA", WM8350_POWER_MGMT_2
, 10, 0, NULL
, 0),
591 SND_SOC_DAPM_PGA_E("Right Out2 PGA", WM8350_POWER_MGMT_3
, 3, 0, NULL
,
593 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
594 SND_SOC_DAPM_PGA_E("Left Out2 PGA", WM8350_POWER_MGMT_3
, 2, 0, NULL
, 0,
596 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
597 SND_SOC_DAPM_PGA_E("Right Out1 PGA", WM8350_POWER_MGMT_3
, 1, 0, NULL
,
599 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
600 SND_SOC_DAPM_PGA_E("Left Out1 PGA", WM8350_POWER_MGMT_3
, 0, 0, NULL
, 0,
602 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
604 SND_SOC_DAPM_MIXER("Right Capture Mixer", WM8350_POWER_MGMT_2
,
605 7, 0, &wm8350_right_capt_mixer_controls
[0],
606 ARRAY_SIZE(wm8350_right_capt_mixer_controls
)),
608 SND_SOC_DAPM_MIXER("Left Capture Mixer", WM8350_POWER_MGMT_2
,
609 6, 0, &wm8350_left_capt_mixer_controls
[0],
610 ARRAY_SIZE(wm8350_left_capt_mixer_controls
)),
612 SND_SOC_DAPM_MIXER("Out4 Mixer", WM8350_POWER_MGMT_2
, 5, 0,
613 &wm8350_out4_mixer_controls
[0],
614 ARRAY_SIZE(wm8350_out4_mixer_controls
)),
616 SND_SOC_DAPM_MIXER("Out3 Mixer", WM8350_POWER_MGMT_2
, 4, 0,
617 &wm8350_out3_mixer_controls
[0],
618 ARRAY_SIZE(wm8350_out3_mixer_controls
)),
620 SND_SOC_DAPM_MIXER("Right Playback Mixer", WM8350_POWER_MGMT_2
, 1, 0,
621 &wm8350_right_play_mixer_controls
[0],
622 ARRAY_SIZE(wm8350_right_play_mixer_controls
)),
624 SND_SOC_DAPM_MIXER("Left Playback Mixer", WM8350_POWER_MGMT_2
, 0, 0,
625 &wm8350_left_play_mixer_controls
[0],
626 ARRAY_SIZE(wm8350_left_play_mixer_controls
)),
628 SND_SOC_DAPM_MIXER("Left Mic Mixer", WM8350_POWER_MGMT_2
, 8, 0,
629 &wm8350_left_mic_mixer_controls
[0],
630 ARRAY_SIZE(wm8350_left_mic_mixer_controls
)),
632 SND_SOC_DAPM_MIXER("Right Mic Mixer", WM8350_POWER_MGMT_2
, 9, 0,
633 &wm8350_right_mic_mixer_controls
[0],
634 ARRAY_SIZE(wm8350_right_mic_mixer_controls
)),
636 /* virtual mixer for Beep and Out2R */
637 SND_SOC_DAPM_MIXER("Out2 Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
639 SND_SOC_DAPM_SWITCH("Beep", WM8350_POWER_MGMT_3
, 7, 0,
640 &wm8350_beep_switch_controls
),
642 SND_SOC_DAPM_ADC("Right ADC", "Right Capture",
643 WM8350_POWER_MGMT_4
, 3, 0),
644 SND_SOC_DAPM_ADC("Left ADC", "Left Capture",
645 WM8350_POWER_MGMT_4
, 2, 0),
646 SND_SOC_DAPM_DAC("Right DAC", "Right Playback",
647 WM8350_POWER_MGMT_4
, 5, 0),
648 SND_SOC_DAPM_DAC("Left DAC", "Left Playback",
649 WM8350_POWER_MGMT_4
, 4, 0),
651 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8350_POWER_MGMT_1
, 4, 0),
653 SND_SOC_DAPM_MUX("Out4 Capture Channel", SND_SOC_NOPM
, 0, 0,
654 &wm8350_out4_capture_controls
),
656 SND_SOC_DAPM_OUTPUT("OUT1R"),
657 SND_SOC_DAPM_OUTPUT("OUT1L"),
658 SND_SOC_DAPM_OUTPUT("OUT2R"),
659 SND_SOC_DAPM_OUTPUT("OUT2L"),
660 SND_SOC_DAPM_OUTPUT("OUT3"),
661 SND_SOC_DAPM_OUTPUT("OUT4"),
663 SND_SOC_DAPM_INPUT("IN1RN"),
664 SND_SOC_DAPM_INPUT("IN1RP"),
665 SND_SOC_DAPM_INPUT("IN2R"),
666 SND_SOC_DAPM_INPUT("IN1LP"),
667 SND_SOC_DAPM_INPUT("IN1LN"),
668 SND_SOC_DAPM_INPUT("IN2L"),
669 SND_SOC_DAPM_INPUT("IN3R"),
670 SND_SOC_DAPM_INPUT("IN3L"),
673 static const struct snd_soc_dapm_route wm8350_dapm_routes
[] = {
675 /* left playback mixer */
676 {"Left Playback Mixer", "Playback Switch", "Left DAC"},
677 {"Left Playback Mixer", "Left Bypass Switch", "IN3L PGA"},
678 {"Left Playback Mixer", "Right Playback Switch", "Right DAC"},
679 {"Left Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
680 {"Left Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
682 /* right playback mixer */
683 {"Right Playback Mixer", "Playback Switch", "Right DAC"},
684 {"Right Playback Mixer", "Right Bypass Switch", "IN3R PGA"},
685 {"Right Playback Mixer", "Left Playback Switch", "Left DAC"},
686 {"Right Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
687 {"Right Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
689 /* out4 playback mixer */
690 {"Out4 Mixer", "Right Playback Switch", "Right DAC"},
691 {"Out4 Mixer", "Left Playback Switch", "Left DAC"},
692 {"Out4 Mixer", "Right Capture Switch", "Right Capture Mixer"},
693 {"Out4 Mixer", "Out3 Playback Switch", "Out3 Mixer"},
694 {"Out4 Mixer", "Right Mixer Switch", "Right Playback Mixer"},
695 {"Out4 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
696 {"OUT4", NULL
, "Out4 Mixer"},
698 /* out3 playback mixer */
699 {"Out3 Mixer", "Left Playback Switch", "Left DAC"},
700 {"Out3 Mixer", "Left Capture Switch", "Left Capture Mixer"},
701 {"Out3 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
702 {"Out3 Mixer", "Out4 Playback Switch", "Out4 Mixer"},
703 {"OUT3", NULL
, "Out3 Mixer"},
706 {"Right Out2 PGA", NULL
, "Right Playback Mixer"},
707 {"Left Out2 PGA", NULL
, "Left Playback Mixer"},
708 {"OUT2L", NULL
, "Left Out2 PGA"},
709 {"OUT2R", NULL
, "Right Out2 PGA"},
712 {"Right Out1 PGA", NULL
, "Right Playback Mixer"},
713 {"Left Out1 PGA", NULL
, "Left Playback Mixer"},
714 {"OUT1L", NULL
, "Left Out1 PGA"},
715 {"OUT1R", NULL
, "Right Out1 PGA"},
718 {"Left ADC", NULL
, "Left Capture Mixer"},
719 {"Right ADC", NULL
, "Right Capture Mixer"},
721 /* Left capture mixer */
722 {"Left Capture Mixer", "L2 Capture Volume", "IN2L"},
723 {"Left Capture Mixer", "L3 Capture Volume", "IN3L PGA"},
724 {"Left Capture Mixer", "PGA Capture Switch", "Left Mic Mixer"},
725 {"Left Capture Mixer", NULL
, "Out4 Capture Channel"},
727 /* Right capture mixer */
728 {"Right Capture Mixer", "L2 Capture Volume", "IN2R"},
729 {"Right Capture Mixer", "L3 Capture Volume", "IN3R PGA"},
730 {"Right Capture Mixer", "PGA Capture Switch", "Right Mic Mixer"},
731 {"Right Capture Mixer", NULL
, "Out4 Capture Channel"},
734 {"IN3L PGA", NULL
, "IN3L"},
735 {"IN3R PGA", NULL
, "IN3R"},
738 {"Left Mic Mixer", "INN Capture Switch", "IN1LN"},
739 {"Left Mic Mixer", "INP Capture Switch", "IN1LP"},
740 {"Left Mic Mixer", "IN2 Capture Switch", "IN2L"},
742 /* Right Mic mixer */
743 {"Right Mic Mixer", "INN Capture Switch", "IN1RN"},
744 {"Right Mic Mixer", "INP Capture Switch", "IN1RP"},
745 {"Right Mic Mixer", "IN2 Capture Switch", "IN2R"},
748 {"Out4 Capture Channel", NULL
, "Out4 Mixer"},
751 {"Beep", NULL
, "IN3R PGA"},
754 static int wm8350_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
755 int clk_id
, unsigned int freq
, int dir
)
757 struct snd_soc_codec
*codec
= codec_dai
->codec
;
758 struct wm8350_data
*wm8350_data
= snd_soc_codec_get_drvdata(codec
);
759 struct wm8350
*wm8350
= wm8350_data
->wm8350
;
763 case WM8350_MCLK_SEL_MCLK
:
764 wm8350_clear_bits(wm8350
, WM8350_CLOCK_CONTROL_1
,
767 case WM8350_MCLK_SEL_PLL_MCLK
:
768 case WM8350_MCLK_SEL_PLL_DAC
:
769 case WM8350_MCLK_SEL_PLL_ADC
:
770 case WM8350_MCLK_SEL_PLL_32K
:
771 wm8350_set_bits(wm8350
, WM8350_CLOCK_CONTROL_1
,
773 fll_4
= snd_soc_read(codec
, WM8350_FLL_CONTROL_4
) &
774 ~WM8350_FLL_CLK_SRC_MASK
;
775 snd_soc_write(codec
, WM8350_FLL_CONTROL_4
, fll_4
| clk_id
);
780 if (dir
== SND_SOC_CLOCK_OUT
)
781 wm8350_set_bits(wm8350
, WM8350_CLOCK_CONTROL_2
,
784 wm8350_clear_bits(wm8350
, WM8350_CLOCK_CONTROL_2
,
790 static int wm8350_set_clkdiv(struct snd_soc_dai
*codec_dai
, int div_id
, int div
)
792 struct snd_soc_codec
*codec
= codec_dai
->codec
;
796 case WM8350_ADC_CLKDIV
:
797 val
= snd_soc_read(codec
, WM8350_ADC_DIVIDER
) &
798 ~WM8350_ADC_CLKDIV_MASK
;
799 snd_soc_write(codec
, WM8350_ADC_DIVIDER
, val
| div
);
801 case WM8350_DAC_CLKDIV
:
802 val
= snd_soc_read(codec
, WM8350_DAC_CLOCK_CONTROL
) &
803 ~WM8350_DAC_CLKDIV_MASK
;
804 snd_soc_write(codec
, WM8350_DAC_CLOCK_CONTROL
, val
| div
);
806 case WM8350_BCLK_CLKDIV
:
807 val
= snd_soc_read(codec
, WM8350_CLOCK_CONTROL_1
) &
808 ~WM8350_BCLK_DIV_MASK
;
809 snd_soc_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
811 case WM8350_OPCLK_CLKDIV
:
812 val
= snd_soc_read(codec
, WM8350_CLOCK_CONTROL_1
) &
813 ~WM8350_OPCLK_DIV_MASK
;
814 snd_soc_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
816 case WM8350_SYS_CLKDIV
:
817 val
= snd_soc_read(codec
, WM8350_CLOCK_CONTROL_1
) &
818 ~WM8350_MCLK_DIV_MASK
;
819 snd_soc_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
821 case WM8350_DACLR_CLKDIV
:
822 val
= snd_soc_read(codec
, WM8350_DAC_LR_RATE
) &
823 ~WM8350_DACLRC_RATE_MASK
;
824 snd_soc_write(codec
, WM8350_DAC_LR_RATE
, val
| div
);
826 case WM8350_ADCLR_CLKDIV
:
827 val
= snd_soc_read(codec
, WM8350_ADC_LR_RATE
) &
828 ~WM8350_ADCLRC_RATE_MASK
;
829 snd_soc_write(codec
, WM8350_ADC_LR_RATE
, val
| div
);
838 static int wm8350_set_dai_fmt(struct snd_soc_dai
*codec_dai
, unsigned int fmt
)
840 struct snd_soc_codec
*codec
= codec_dai
->codec
;
841 u16 iface
= snd_soc_read(codec
, WM8350_AI_FORMATING
) &
842 ~(WM8350_AIF_BCLK_INV
| WM8350_AIF_LRCLK_INV
| WM8350_AIF_FMT_MASK
);
843 u16 master
= snd_soc_read(codec
, WM8350_AI_DAC_CONTROL
) &
845 u16 dac_lrc
= snd_soc_read(codec
, WM8350_DAC_LR_RATE
) &
847 u16 adc_lrc
= snd_soc_read(codec
, WM8350_ADC_LR_RATE
) &
850 /* set master/slave audio interface */
851 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
852 case SND_SOC_DAIFMT_CBM_CFM
:
853 master
|= WM8350_BCLK_MSTR
;
854 dac_lrc
|= WM8350_DACLRC_ENA
;
855 adc_lrc
|= WM8350_ADCLRC_ENA
;
857 case SND_SOC_DAIFMT_CBS_CFS
:
863 /* interface format */
864 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
865 case SND_SOC_DAIFMT_I2S
:
868 case SND_SOC_DAIFMT_RIGHT_J
:
870 case SND_SOC_DAIFMT_LEFT_J
:
873 case SND_SOC_DAIFMT_DSP_A
:
876 case SND_SOC_DAIFMT_DSP_B
:
877 iface
|= 0x3 << 8 | WM8350_AIF_LRCLK_INV
;
883 /* clock inversion */
884 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
885 case SND_SOC_DAIFMT_NB_NF
:
887 case SND_SOC_DAIFMT_IB_IF
:
888 iface
|= WM8350_AIF_LRCLK_INV
| WM8350_AIF_BCLK_INV
;
890 case SND_SOC_DAIFMT_IB_NF
:
891 iface
|= WM8350_AIF_BCLK_INV
;
893 case SND_SOC_DAIFMT_NB_IF
:
894 iface
|= WM8350_AIF_LRCLK_INV
;
900 snd_soc_write(codec
, WM8350_AI_FORMATING
, iface
);
901 snd_soc_write(codec
, WM8350_AI_DAC_CONTROL
, master
);
902 snd_soc_write(codec
, WM8350_DAC_LR_RATE
, dac_lrc
);
903 snd_soc_write(codec
, WM8350_ADC_LR_RATE
, adc_lrc
);
907 static int wm8350_pcm_hw_params(struct snd_pcm_substream
*substream
,
908 struct snd_pcm_hw_params
*params
,
909 struct snd_soc_dai
*codec_dai
)
911 struct snd_soc_codec
*codec
= codec_dai
->codec
;
912 struct wm8350_data
*wm8350_data
= snd_soc_codec_get_drvdata(codec
);
913 struct wm8350
*wm8350
= wm8350_data
->wm8350
;
914 u16 iface
= snd_soc_read(codec
, WM8350_AI_FORMATING
) &
918 switch (params_width(params
)) {
932 snd_soc_write(codec
, WM8350_AI_FORMATING
, iface
);
934 /* The sloping stopband filter is recommended for use with
935 * lower sample rates to improve performance.
937 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
) {
938 if (params_rate(params
) < 24000)
939 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE_VOLUME
,
942 wm8350_clear_bits(wm8350
, WM8350_DAC_MUTE_VOLUME
,
949 static int wm8350_mute(struct snd_soc_dai
*dai
, int mute
)
951 struct snd_soc_codec
*codec
= dai
->codec
;
955 val
= WM8350_DAC_MUTE_ENA
;
959 snd_soc_update_bits(codec
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
, val
);
966 int div
; /* FLL_OUTDIV */
969 int ratio
; /* FLL_FRATIO */
972 /* The size in bits of the fll divide multiplied by 10
973 * to allow rounding later */
974 #define FIXED_FLL_SIZE ((1 << 16) * 10)
976 static inline int fll_factors(struct _fll_div
*fll_div
, unsigned int input
,
980 unsigned int t1
, t2
, K
, Nmod
;
982 if (output
>= 2815250 && output
<= 3125000)
984 else if (output
>= 5625000 && output
<= 6250000)
986 else if (output
>= 11250000 && output
<= 12500000)
988 else if (output
>= 22500000 && output
<= 25000000)
991 printk(KERN_ERR
"wm8350: fll freq %d out of range\n", output
);
1000 t1
= output
* (1 << (fll_div
->div
+ 1));
1001 t2
= input
* fll_div
->ratio
;
1003 fll_div
->n
= t1
/ t2
;
1007 Kpart
= FIXED_FLL_SIZE
* (long long)Nmod
;
1009 K
= Kpart
& 0xFFFFFFFF;
1011 /* Check if we need to round */
1015 /* Move down to proper range now rounding is done */
1024 static int wm8350_set_fll(struct snd_soc_dai
*codec_dai
,
1025 int pll_id
, int source
, unsigned int freq_in
,
1026 unsigned int freq_out
)
1028 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1029 struct wm8350_data
*priv
= snd_soc_codec_get_drvdata(codec
);
1030 struct wm8350
*wm8350
= priv
->wm8350
;
1031 struct _fll_div fll_div
;
1035 if (freq_in
== priv
->fll_freq_in
&& freq_out
== priv
->fll_freq_out
)
1038 /* power down FLL - we need to do this for reconfiguration */
1039 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
,
1040 WM8350_FLL_ENA
| WM8350_FLL_OSC_ENA
);
1042 if (freq_out
== 0 || freq_in
== 0)
1045 ret
= fll_factors(&fll_div
, freq_in
, freq_out
);
1048 dev_dbg(wm8350
->dev
,
1049 "FLL in %u FLL out %u N 0x%x K 0x%x div %d ratio %d",
1050 freq_in
, freq_out
, fll_div
.n
, fll_div
.k
, fll_div
.div
,
1053 /* set up N.K & dividers */
1054 fll_1
= snd_soc_read(codec
, WM8350_FLL_CONTROL_1
) &
1055 ~(WM8350_FLL_OUTDIV_MASK
| WM8350_FLL_RSP_RATE_MASK
| 0xc000);
1056 snd_soc_write(codec
, WM8350_FLL_CONTROL_1
,
1057 fll_1
| (fll_div
.div
<< 8) | 0x50);
1058 snd_soc_write(codec
, WM8350_FLL_CONTROL_2
,
1059 (fll_div
.ratio
<< 11) | (fll_div
.
1060 n
& WM8350_FLL_N_MASK
));
1061 snd_soc_write(codec
, WM8350_FLL_CONTROL_3
, fll_div
.k
);
1062 fll_4
= snd_soc_read(codec
, WM8350_FLL_CONTROL_4
) &
1063 ~(WM8350_FLL_FRAC
| WM8350_FLL_SLOW_LOCK_REF
);
1064 snd_soc_write(codec
, WM8350_FLL_CONTROL_4
,
1065 fll_4
| (fll_div
.k
? WM8350_FLL_FRAC
: 0) |
1066 (fll_div
.ratio
== 8 ? WM8350_FLL_SLOW_LOCK_REF
: 0));
1069 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_FLL_OSC_ENA
);
1070 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_FLL_ENA
);
1072 priv
->fll_freq_out
= freq_out
;
1073 priv
->fll_freq_in
= freq_in
;
1078 static int wm8350_set_bias_level(struct snd_soc_codec
*codec
,
1079 enum snd_soc_bias_level level
)
1081 struct wm8350_data
*priv
= snd_soc_codec_get_drvdata(codec
);
1082 struct wm8350
*wm8350
= priv
->wm8350
;
1083 struct wm8350_audio_platform_data
*platform
=
1084 wm8350
->codec
.platform_data
;
1089 case SND_SOC_BIAS_ON
:
1090 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1091 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1092 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1093 pm1
| WM8350_VMID_50K
|
1094 platform
->codec_current_on
<< 14);
1097 case SND_SOC_BIAS_PREPARE
:
1098 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
);
1099 pm1
&= ~WM8350_VMID_MASK
;
1100 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1101 pm1
| WM8350_VMID_50K
);
1104 case SND_SOC_BIAS_STANDBY
:
1105 if (snd_soc_codec_get_bias_level(codec
) == SND_SOC_BIAS_OFF
) {
1106 ret
= regulator_bulk_enable(ARRAY_SIZE(priv
->supplies
),
1111 /* Enable the system clock */
1112 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
,
1115 /* mute DAC & outputs */
1116 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
,
1117 WM8350_DAC_MUTE_ENA
);
1119 /* discharge cap memory */
1120 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1121 platform
->dis_out1
|
1122 (platform
->dis_out2
<< 2) |
1123 (platform
->dis_out3
<< 4) |
1124 (platform
->dis_out4
<< 6));
1126 /* wait for discharge */
1127 schedule_timeout_interruptible(msecs_to_jiffies
1129 cap_discharge_msecs
));
1131 /* enable antipop */
1132 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1133 (platform
->vmid_s_curve
<< 8));
1136 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1138 codec_current_charge
<< 14) |
1139 WM8350_VMID_5K
| WM8350_VMIDEN
|
1143 schedule_timeout_interruptible(msecs_to_jiffies
1145 vmid_charge_msecs
));
1147 /* turn on vmid 300k */
1148 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1149 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1150 pm1
|= WM8350_VMID_300K
|
1151 (platform
->codec_current_standby
<< 14);
1152 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1156 /* enable analogue bias */
1157 pm1
|= WM8350_BIASEN
;
1158 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1160 /* disable antipop */
1161 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
, 0);
1164 /* turn on vmid 300k and reduce current */
1165 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1166 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1167 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1168 pm1
| WM8350_VMID_300K
|
1170 codec_current_standby
<< 14));
1175 case SND_SOC_BIAS_OFF
:
1177 /* mute DAC & enable outputs */
1178 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1180 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_3
,
1181 WM8350_OUT1L_ENA
| WM8350_OUT1R_ENA
|
1182 WM8350_OUT2L_ENA
| WM8350_OUT2R_ENA
);
1184 /* enable anti pop S curve */
1185 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1186 (platform
->vmid_s_curve
<< 8));
1189 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1191 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1194 schedule_timeout_interruptible(msecs_to_jiffies
1196 vmid_discharge_msecs
));
1198 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1199 (platform
->vmid_s_curve
<< 8) |
1200 platform
->dis_out1
|
1201 (platform
->dis_out2
<< 2) |
1202 (platform
->dis_out3
<< 4) |
1203 (platform
->dis_out4
<< 6));
1205 /* turn off VBuf and drain */
1206 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1207 ~(WM8350_VBUFEN
| WM8350_VMID_MASK
);
1208 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1209 pm1
| WM8350_OUTPUT_DRAIN_EN
);
1212 schedule_timeout_interruptible(msecs_to_jiffies
1213 (platform
->drain_msecs
));
1215 pm1
&= ~WM8350_BIASEN
;
1216 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1218 /* disable anti-pop */
1219 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
, 0);
1221 wm8350_clear_bits(wm8350
, WM8350_LOUT1_VOLUME
,
1223 wm8350_clear_bits(wm8350
, WM8350_ROUT1_VOLUME
,
1225 wm8350_clear_bits(wm8350
, WM8350_LOUT2_VOLUME
,
1227 wm8350_clear_bits(wm8350
, WM8350_ROUT2_VOLUME
,
1230 /* disable clock gen */
1231 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
,
1234 regulator_bulk_disable(ARRAY_SIZE(priv
->supplies
),
1241 static void wm8350_hp_work(struct wm8350_data
*priv
,
1242 struct wm8350_jack_data
*jack
,
1245 struct wm8350
*wm8350
= priv
->wm8350
;
1249 reg
= wm8350_reg_read(wm8350
, WM8350_JACK_PIN_STATUS
);
1251 report
= jack
->report
;
1255 snd_soc_jack_report(jack
->jack
, report
, jack
->report
);
1259 static void wm8350_hpl_work(struct work_struct
*work
)
1261 struct wm8350_data
*priv
=
1262 container_of(work
, struct wm8350_data
, hpl
.work
.work
);
1264 wm8350_hp_work(priv
, &priv
->hpl
, WM8350_JACK_L_LVL
);
1267 static void wm8350_hpr_work(struct work_struct
*work
)
1269 struct wm8350_data
*priv
=
1270 container_of(work
, struct wm8350_data
, hpr
.work
.work
);
1272 wm8350_hp_work(priv
, &priv
->hpr
, WM8350_JACK_R_LVL
);
1275 static irqreturn_t
wm8350_hpl_jack_handler(int irq
, void *data
)
1277 struct wm8350_data
*priv
= data
;
1278 struct wm8350
*wm8350
= priv
->wm8350
;
1280 #ifndef CONFIG_SND_SOC_WM8350_MODULE
1281 trace_snd_soc_jack_irq("WM8350 HPL");
1284 if (device_may_wakeup(wm8350
->dev
))
1285 pm_wakeup_event(wm8350
->dev
, 250);
1287 queue_delayed_work(system_power_efficient_wq
,
1288 &priv
->hpl
.work
, msecs_to_jiffies(200));
1293 static irqreturn_t
wm8350_hpr_jack_handler(int irq
, void *data
)
1295 struct wm8350_data
*priv
= data
;
1296 struct wm8350
*wm8350
= priv
->wm8350
;
1298 #ifndef CONFIG_SND_SOC_WM8350_MODULE
1299 trace_snd_soc_jack_irq("WM8350 HPR");
1302 if (device_may_wakeup(wm8350
->dev
))
1303 pm_wakeup_event(wm8350
->dev
, 250);
1305 queue_delayed_work(system_power_efficient_wq
,
1306 &priv
->hpr
.work
, msecs_to_jiffies(200));
1312 * wm8350_hp_jack_detect - Enable headphone jack detection.
1314 * @codec: WM8350 codec
1315 * @which: left or right jack detect signal
1316 * @jack: jack to report detection events on
1317 * @report: value to report
1319 * Enables the headphone jack detection of the WM8350. If no report
1320 * is specified then detection is disabled.
1322 int wm8350_hp_jack_detect(struct snd_soc_codec
*codec
, enum wm8350_jack which
,
1323 struct snd_soc_jack
*jack
, int report
)
1325 struct wm8350_data
*priv
= snd_soc_codec_get_drvdata(codec
);
1326 struct wm8350
*wm8350
= priv
->wm8350
;
1331 priv
->hpl
.jack
= jack
;
1332 priv
->hpl
.report
= report
;
1333 ena
= WM8350_JDL_ENA
;
1337 priv
->hpr
.jack
= jack
;
1338 priv
->hpr
.report
= report
;
1339 ena
= WM8350_JDR_ENA
;
1347 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_TOCLK_ENA
);
1348 wm8350_set_bits(wm8350
, WM8350_JACK_DETECT
, ena
);
1350 wm8350_clear_bits(wm8350
, WM8350_JACK_DETECT
, ena
);
1356 wm8350_hpl_jack_handler(0, priv
);
1359 wm8350_hpr_jack_handler(0, priv
);
1365 EXPORT_SYMBOL_GPL(wm8350_hp_jack_detect
);
1367 static irqreturn_t
wm8350_mic_handler(int irq
, void *data
)
1369 struct wm8350_data
*priv
= data
;
1370 struct wm8350
*wm8350
= priv
->wm8350
;
1374 #ifndef CONFIG_SND_SOC_WM8350_MODULE
1375 trace_snd_soc_jack_irq("WM8350 mic");
1378 reg
= wm8350_reg_read(wm8350
, WM8350_JACK_PIN_STATUS
);
1379 if (reg
& WM8350_JACK_MICSCD_LVL
)
1380 report
|= priv
->mic
.short_report
;
1381 if (reg
& WM8350_JACK_MICSD_LVL
)
1382 report
|= priv
->mic
.report
;
1384 snd_soc_jack_report(priv
->mic
.jack
, report
,
1385 priv
->mic
.report
| priv
->mic
.short_report
);
1391 * wm8350_mic_jack_detect - Enable microphone jack detection.
1393 * @codec: WM8350 codec
1394 * @jack: jack to report detection events on
1395 * @detect_report: value to report when presence detected
1396 * @short_report: value to report when microphone short detected
1398 * Enables the microphone jack detection of the WM8350. If both reports
1399 * are specified as zero then detection is disabled.
1401 int wm8350_mic_jack_detect(struct snd_soc_codec
*codec
,
1402 struct snd_soc_jack
*jack
,
1403 int detect_report
, int short_report
)
1405 struct wm8350_data
*priv
= snd_soc_codec_get_drvdata(codec
);
1406 struct wm8350
*wm8350
= priv
->wm8350
;
1408 priv
->mic
.jack
= jack
;
1409 priv
->mic
.report
= detect_report
;
1410 priv
->mic
.short_report
= short_report
;
1412 if (detect_report
|| short_report
) {
1413 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_TOCLK_ENA
);
1414 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_1
,
1415 WM8350_MIC_DET_ENA
);
1417 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_1
,
1418 WM8350_MIC_DET_ENA
);
1423 EXPORT_SYMBOL_GPL(wm8350_mic_jack_detect
);
1425 #define WM8350_RATES (SNDRV_PCM_RATE_8000_96000)
1427 #define WM8350_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1428 SNDRV_PCM_FMTBIT_S20_3LE |\
1429 SNDRV_PCM_FMTBIT_S24_LE)
1431 static const struct snd_soc_dai_ops wm8350_dai_ops
= {
1432 .hw_params
= wm8350_pcm_hw_params
,
1433 .digital_mute
= wm8350_mute
,
1434 .set_fmt
= wm8350_set_dai_fmt
,
1435 .set_sysclk
= wm8350_set_dai_sysclk
,
1436 .set_pll
= wm8350_set_fll
,
1437 .set_clkdiv
= wm8350_set_clkdiv
,
1440 static struct snd_soc_dai_driver wm8350_dai
= {
1441 .name
= "wm8350-hifi",
1443 .stream_name
= "Playback",
1446 .rates
= WM8350_RATES
,
1447 .formats
= WM8350_FORMATS
,
1450 .stream_name
= "Capture",
1453 .rates
= WM8350_RATES
,
1454 .formats
= WM8350_FORMATS
,
1456 .ops
= &wm8350_dai_ops
,
1459 static int wm8350_codec_probe(struct snd_soc_codec
*codec
)
1461 struct wm8350
*wm8350
= dev_get_platdata(codec
->dev
);
1462 struct wm8350_data
*priv
;
1463 struct wm8350_output
*out1
;
1464 struct wm8350_output
*out2
;
1467 if (wm8350
->codec
.platform_data
== NULL
) {
1468 dev_err(codec
->dev
, "No audio platform data supplied\n");
1472 priv
= devm_kzalloc(codec
->dev
, sizeof(struct wm8350_data
),
1476 snd_soc_codec_set_drvdata(codec
, priv
);
1478 priv
->wm8350
= wm8350
;
1480 for (i
= 0; i
< ARRAY_SIZE(supply_names
); i
++)
1481 priv
->supplies
[i
].supply
= supply_names
[i
];
1483 ret
= devm_regulator_bulk_get(wm8350
->dev
, ARRAY_SIZE(priv
->supplies
),
1488 /* Put the codec into reset if it wasn't already */
1489 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1491 INIT_DELAYED_WORK(&priv
->pga_work
, wm8350_pga_work
);
1492 INIT_DELAYED_WORK(&priv
->hpl
.work
, wm8350_hpl_work
);
1493 INIT_DELAYED_WORK(&priv
->hpr
.work
, wm8350_hpr_work
);
1495 /* Enable the codec */
1496 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1498 /* Enable robust clocking mode in ADC */
1499 snd_soc_write(codec
, WM8350_SECURITY
, 0xa7);
1500 snd_soc_write(codec
, 0xde, 0x13);
1501 snd_soc_write(codec
, WM8350_SECURITY
, 0);
1503 /* read OUT1 & OUT2 volumes */
1506 out1
->left_vol
= (wm8350_reg_read(wm8350
, WM8350_LOUT1_VOLUME
) &
1507 WM8350_OUT1L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
1508 out1
->right_vol
= (wm8350_reg_read(wm8350
, WM8350_ROUT1_VOLUME
) &
1509 WM8350_OUT1R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
1510 out2
->left_vol
= (wm8350_reg_read(wm8350
, WM8350_LOUT2_VOLUME
) &
1511 WM8350_OUT2L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
1512 out2
->right_vol
= (wm8350_reg_read(wm8350
, WM8350_ROUT2_VOLUME
) &
1513 WM8350_OUT2R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
1514 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
, 0);
1515 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
, 0);
1516 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
, 0);
1517 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
, 0);
1519 /* Latch VU bits & mute */
1520 wm8350_set_bits(wm8350
, WM8350_LOUT1_VOLUME
,
1521 WM8350_OUT1_VU
| WM8350_OUT1L_MUTE
);
1522 wm8350_set_bits(wm8350
, WM8350_LOUT2_VOLUME
,
1523 WM8350_OUT2_VU
| WM8350_OUT2L_MUTE
);
1524 wm8350_set_bits(wm8350
, WM8350_ROUT1_VOLUME
,
1525 WM8350_OUT1_VU
| WM8350_OUT1R_MUTE
);
1526 wm8350_set_bits(wm8350
, WM8350_ROUT2_VOLUME
,
1527 WM8350_OUT2_VU
| WM8350_OUT2R_MUTE
);
1529 /* Make sure AIF tristating is disabled by default */
1530 wm8350_clear_bits(wm8350
, WM8350_AI_FORMATING
, WM8350_AIF_TRI
);
1532 /* Make sure we've got a sane companding setup too */
1533 wm8350_clear_bits(wm8350
, WM8350_ADC_DAC_COMP
,
1534 WM8350_DAC_COMP
| WM8350_LOOPBACK
);
1536 /* Make sure jack detect is disabled to start off with */
1537 wm8350_clear_bits(wm8350
, WM8350_JACK_DETECT
,
1538 WM8350_JDL_ENA
| WM8350_JDR_ENA
);
1540 wm8350_register_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
,
1541 wm8350_hpl_jack_handler
, 0, "Left jack detect",
1543 wm8350_register_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
,
1544 wm8350_hpr_jack_handler
, 0, "Right jack detect",
1546 wm8350_register_irq(wm8350
, WM8350_IRQ_CODEC_MICSCD
,
1547 wm8350_mic_handler
, 0, "Microphone short", priv
);
1548 wm8350_register_irq(wm8350
, WM8350_IRQ_CODEC_MICD
,
1549 wm8350_mic_handler
, 0, "Microphone detect", priv
);
1554 static int wm8350_codec_remove(struct snd_soc_codec
*codec
)
1556 struct wm8350_data
*priv
= snd_soc_codec_get_drvdata(codec
);
1557 struct wm8350
*wm8350
= dev_get_platdata(codec
->dev
);
1559 wm8350_clear_bits(wm8350
, WM8350_JACK_DETECT
,
1560 WM8350_JDL_ENA
| WM8350_JDR_ENA
);
1561 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_TOCLK_ENA
);
1563 wm8350_free_irq(wm8350
, WM8350_IRQ_CODEC_MICD
, priv
);
1564 wm8350_free_irq(wm8350
, WM8350_IRQ_CODEC_MICSCD
, priv
);
1565 wm8350_free_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_L
, priv
);
1566 wm8350_free_irq(wm8350
, WM8350_IRQ_CODEC_JCK_DET_R
, priv
);
1568 priv
->hpl
.jack
= NULL
;
1569 priv
->hpr
.jack
= NULL
;
1570 priv
->mic
.jack
= NULL
;
1572 cancel_delayed_work_sync(&priv
->hpl
.work
);
1573 cancel_delayed_work_sync(&priv
->hpr
.work
);
1575 /* if there was any work waiting then we run it now and
1576 * wait for its completion */
1577 flush_delayed_work(&priv
->pga_work
);
1579 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1584 static struct regmap
*wm8350_get_regmap(struct device
*dev
)
1586 struct wm8350
*wm8350
= dev_get_platdata(dev
);
1588 return wm8350
->regmap
;
1591 static struct snd_soc_codec_driver soc_codec_dev_wm8350
= {
1592 .probe
= wm8350_codec_probe
,
1593 .remove
= wm8350_codec_remove
,
1594 .get_regmap
= wm8350_get_regmap
,
1595 .set_bias_level
= wm8350_set_bias_level
,
1596 .suspend_bias_off
= true,
1598 .controls
= wm8350_snd_controls
,
1599 .num_controls
= ARRAY_SIZE(wm8350_snd_controls
),
1600 .dapm_widgets
= wm8350_dapm_widgets
,
1601 .num_dapm_widgets
= ARRAY_SIZE(wm8350_dapm_widgets
),
1602 .dapm_routes
= wm8350_dapm_routes
,
1603 .num_dapm_routes
= ARRAY_SIZE(wm8350_dapm_routes
),
1606 static int wm8350_probe(struct platform_device
*pdev
)
1608 return snd_soc_register_codec(&pdev
->dev
, &soc_codec_dev_wm8350
,
1612 static int wm8350_remove(struct platform_device
*pdev
)
1614 snd_soc_unregister_codec(&pdev
->dev
);
1618 static struct platform_driver wm8350_codec_driver
= {
1620 .name
= "wm8350-codec",
1622 .probe
= wm8350_probe
,
1623 .remove
= wm8350_remove
,
1626 module_platform_driver(wm8350_codec_driver
);
1628 MODULE_DESCRIPTION("ASoC WM8350 driver");
1629 MODULE_AUTHOR("Liam Girdwood");
1630 MODULE_LICENSE("GPL");
1631 MODULE_ALIAS("platform:wm8350-codec");