2 * wm8350.c -- WM8350 ALSA SoC audio driver
4 * Copyright (C) 2007, 2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood <lg@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
18 #include <linux/platform_device.h>
19 #include <linux/mfd/wm8350/audio.h>
20 #include <linux/mfd/wm8350/core.h>
21 #include <linux/regulator/consumer.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
32 #define WM8350_OUTn_0dB 0x39
34 #define WM8350_RAMP_NONE 0
35 #define WM8350_RAMP_UP 1
36 #define WM8350_RAMP_DOWN 2
38 /* We only include the analogue supplies here; the digital supplies
39 * need to be available well before this driver can be probed.
41 static const char *supply_names
[] = {
46 struct wm8350_output
{
55 struct snd_soc_codec codec
;
56 struct wm8350_output out1
;
57 struct wm8350_output out2
;
58 struct regulator_bulk_data supplies
[ARRAY_SIZE(supply_names
)];
61 static unsigned int wm8350_codec_cache_read(struct snd_soc_codec
*codec
,
64 struct wm8350
*wm8350
= codec
->control_data
;
65 return wm8350
->reg_cache
[reg
];
68 static unsigned int wm8350_codec_read(struct snd_soc_codec
*codec
,
71 struct wm8350
*wm8350
= codec
->control_data
;
72 return wm8350_reg_read(wm8350
, reg
);
75 static int wm8350_codec_write(struct snd_soc_codec
*codec
, unsigned int reg
,
78 struct wm8350
*wm8350
= codec
->control_data
;
79 return wm8350_reg_write(wm8350
, reg
, value
);
83 * Ramp OUT1 PGA volume to minimise pops at stream startup and shutdown.
85 static inline int wm8350_out1_ramp_step(struct snd_soc_codec
*codec
)
87 struct wm8350_data
*wm8350_data
= codec
->private_data
;
88 struct wm8350_output
*out1
= &wm8350_data
->out1
;
89 struct wm8350
*wm8350
= codec
->control_data
;
90 int left_complete
= 0, right_complete
= 0;
94 reg
= wm8350_reg_read(wm8350
, WM8350_LOUT1_VOLUME
);
95 val
= (reg
& WM8350_OUT1L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
97 if (out1
->ramp
== WM8350_RAMP_UP
) {
99 if (val
< out1
->left_vol
) {
101 reg
&= ~WM8350_OUT1L_VOL_MASK
;
102 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
,
103 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
106 } else if (out1
->ramp
== WM8350_RAMP_DOWN
) {
110 reg
&= ~WM8350_OUT1L_VOL_MASK
;
111 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
,
112 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
119 reg
= wm8350_reg_read(wm8350
, WM8350_ROUT1_VOLUME
);
120 val
= (reg
& WM8350_OUT1R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
121 if (out1
->ramp
== WM8350_RAMP_UP
) {
123 if (val
< out1
->right_vol
) {
125 reg
&= ~WM8350_OUT1R_VOL_MASK
;
126 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
,
127 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
130 } else if (out1
->ramp
== WM8350_RAMP_DOWN
) {
134 reg
&= ~WM8350_OUT1R_VOL_MASK
;
135 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
,
136 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
141 /* only hit the update bit if either volume has changed this step */
142 if (!left_complete
|| !right_complete
)
143 wm8350_set_bits(wm8350
, WM8350_LOUT1_VOLUME
, WM8350_OUT1_VU
);
145 return left_complete
& right_complete
;
149 * Ramp OUT2 PGA volume to minimise pops at stream startup and shutdown.
151 static inline int wm8350_out2_ramp_step(struct snd_soc_codec
*codec
)
153 struct wm8350_data
*wm8350_data
= codec
->private_data
;
154 struct wm8350_output
*out2
= &wm8350_data
->out2
;
155 struct wm8350
*wm8350
= codec
->control_data
;
156 int left_complete
= 0, right_complete
= 0;
160 reg
= wm8350_reg_read(wm8350
, WM8350_LOUT2_VOLUME
);
161 val
= (reg
& WM8350_OUT2L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
162 if (out2
->ramp
== WM8350_RAMP_UP
) {
164 if (val
< out2
->left_vol
) {
166 reg
&= ~WM8350_OUT2L_VOL_MASK
;
167 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
,
168 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
171 } else if (out2
->ramp
== WM8350_RAMP_DOWN
) {
175 reg
&= ~WM8350_OUT2L_VOL_MASK
;
176 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
,
177 reg
| (val
<< WM8350_OUT1L_VOL_SHIFT
));
184 reg
= wm8350_reg_read(wm8350
, WM8350_ROUT2_VOLUME
);
185 val
= (reg
& WM8350_OUT2R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
186 if (out2
->ramp
== WM8350_RAMP_UP
) {
188 if (val
< out2
->right_vol
) {
190 reg
&= ~WM8350_OUT2R_VOL_MASK
;
191 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
,
192 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
195 } else if (out2
->ramp
== WM8350_RAMP_DOWN
) {
199 reg
&= ~WM8350_OUT2R_VOL_MASK
;
200 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
,
201 reg
| (val
<< WM8350_OUT1R_VOL_SHIFT
));
206 /* only hit the update bit if either volume has changed this step */
207 if (!left_complete
|| !right_complete
)
208 wm8350_set_bits(wm8350
, WM8350_LOUT2_VOLUME
, WM8350_OUT2_VU
);
210 return left_complete
& right_complete
;
214 * This work ramps both output PGAs at stream start/stop time to
215 * minimise pop associated with DAPM power switching.
216 * It's best to enable Zero Cross when ramping occurs to minimise any
219 static void wm8350_pga_work(struct work_struct
*work
)
221 struct snd_soc_codec
*codec
=
222 container_of(work
, struct snd_soc_codec
, delayed_work
.work
);
223 struct wm8350_data
*wm8350_data
= codec
->private_data
;
224 struct wm8350_output
*out1
= &wm8350_data
->out1
,
225 *out2
= &wm8350_data
->out2
;
226 int i
, out1_complete
, out2_complete
;
228 /* do we need to ramp at all ? */
229 if (out1
->ramp
== WM8350_RAMP_NONE
&& out2
->ramp
== WM8350_RAMP_NONE
)
232 /* PGA volumes have 6 bits of resolution to ramp */
233 for (i
= 0; i
<= 63; i
++) {
234 out1_complete
= 1, out2_complete
= 1;
235 if (out1
->ramp
!= WM8350_RAMP_NONE
)
236 out1_complete
= wm8350_out1_ramp_step(codec
);
237 if (out2
->ramp
!= WM8350_RAMP_NONE
)
238 out2_complete
= wm8350_out2_ramp_step(codec
);
240 /* ramp finished ? */
241 if (out1_complete
&& out2_complete
)
244 /* we need to delay longer on the up ramp */
245 if (out1
->ramp
== WM8350_RAMP_UP
||
246 out2
->ramp
== WM8350_RAMP_UP
) {
247 /* delay is longer over 0dB as increases are larger */
248 if (i
>= WM8350_OUTn_0dB
)
249 schedule_timeout_interruptible(msecs_to_jiffies
252 schedule_timeout_interruptible(msecs_to_jiffies
255 udelay(50); /* doesn't matter if we delay longer */
258 out1
->ramp
= WM8350_RAMP_NONE
;
259 out2
->ramp
= WM8350_RAMP_NONE
;
266 static int pga_event(struct snd_soc_dapm_widget
*w
,
267 struct snd_kcontrol
*kcontrol
, int event
)
269 struct snd_soc_codec
*codec
= w
->codec
;
270 struct wm8350_data
*wm8350_data
= codec
->private_data
;
271 struct wm8350_output
*out
;
276 out
= &wm8350_data
->out1
;
280 out
= &wm8350_data
->out2
;
289 case SND_SOC_DAPM_POST_PMU
:
290 out
->ramp
= WM8350_RAMP_UP
;
293 if (!delayed_work_pending(&codec
->delayed_work
))
294 schedule_delayed_work(&codec
->delayed_work
,
295 msecs_to_jiffies(1));
298 case SND_SOC_DAPM_PRE_PMD
:
299 out
->ramp
= WM8350_RAMP_DOWN
;
302 if (!delayed_work_pending(&codec
->delayed_work
))
303 schedule_delayed_work(&codec
->delayed_work
,
304 msecs_to_jiffies(1));
311 static int wm8350_put_volsw_2r_vu(struct snd_kcontrol
*kcontrol
,
312 struct snd_ctl_elem_value
*ucontrol
)
314 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
315 struct wm8350_data
*wm8350_priv
= codec
->private_data
;
316 struct wm8350_output
*out
= NULL
;
317 struct soc_mixer_control
*mc
=
318 (struct soc_mixer_control
*)kcontrol
->private_value
;
320 unsigned int reg
= mc
->reg
;
323 /* For OUT1 and OUT2 we shadow the values and only actually write
324 * them out when active in order to ensure the amplifier comes on
325 * as quietly as possible. */
327 case WM8350_LOUT1_VOLUME
:
328 out
= &wm8350_priv
->out1
;
330 case WM8350_LOUT2_VOLUME
:
331 out
= &wm8350_priv
->out2
;
338 out
->left_vol
= ucontrol
->value
.integer
.value
[0];
339 out
->right_vol
= ucontrol
->value
.integer
.value
[1];
344 ret
= snd_soc_put_volsw_2r(kcontrol
, ucontrol
);
348 /* now hit the volume update bits (always bit 8) */
349 val
= wm8350_codec_read(codec
, reg
);
350 wm8350_codec_write(codec
, reg
, val
| WM8350_OUT1_VU
);
354 static int wm8350_get_volsw_2r(struct snd_kcontrol
*kcontrol
,
355 struct snd_ctl_elem_value
*ucontrol
)
357 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
358 struct wm8350_data
*wm8350_priv
= codec
->private_data
;
359 struct wm8350_output
*out1
= &wm8350_priv
->out1
;
360 struct wm8350_output
*out2
= &wm8350_priv
->out2
;
361 struct soc_mixer_control
*mc
=
362 (struct soc_mixer_control
*)kcontrol
->private_value
;
363 unsigned int reg
= mc
->reg
;
365 /* If these are cached registers use the cache */
367 case WM8350_LOUT1_VOLUME
:
368 ucontrol
->value
.integer
.value
[0] = out1
->left_vol
;
369 ucontrol
->value
.integer
.value
[1] = out1
->right_vol
;
372 case WM8350_LOUT2_VOLUME
:
373 ucontrol
->value
.integer
.value
[0] = out2
->left_vol
;
374 ucontrol
->value
.integer
.value
[1] = out2
->right_vol
;
381 return snd_soc_get_volsw_2r(kcontrol
, ucontrol
);
384 /* double control with volume update */
385 #define SOC_WM8350_DOUBLE_R_TLV(xname, reg_left, reg_right, xshift, xmax, \
386 xinvert, tlv_array) \
387 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
388 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
389 SNDRV_CTL_ELEM_ACCESS_READWRITE | \
390 SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
391 .tlv.p = (tlv_array), \
392 .info = snd_soc_info_volsw_2r, \
393 .get = wm8350_get_volsw_2r, .put = wm8350_put_volsw_2r_vu, \
394 .private_value = (unsigned long)&(struct soc_mixer_control) \
395 {.reg = reg_left, .rreg = reg_right, .shift = xshift, \
396 .rshift = xshift, .max = xmax, .invert = xinvert}, }
398 static const char *wm8350_deemp
[] = { "None", "32kHz", "44.1kHz", "48kHz" };
399 static const char *wm8350_pol
[] = { "Normal", "Inv R", "Inv L", "Inv L & R" };
400 static const char *wm8350_dacmutem
[] = { "Normal", "Soft" };
401 static const char *wm8350_dacmutes
[] = { "Fast", "Slow" };
402 static const char *wm8350_dacfilter
[] = { "Normal", "Sloping" };
403 static const char *wm8350_adcfilter
[] = { "None", "High Pass" };
404 static const char *wm8350_adchp
[] = { "44.1kHz", "8kHz", "16kHz", "32kHz" };
405 static const char *wm8350_lr
[] = { "Left", "Right" };
407 static const struct soc_enum wm8350_enum
[] = {
408 SOC_ENUM_SINGLE(WM8350_DAC_CONTROL
, 4, 4, wm8350_deemp
),
409 SOC_ENUM_SINGLE(WM8350_DAC_CONTROL
, 0, 4, wm8350_pol
),
410 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 14, 2, wm8350_dacmutem
),
411 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 13, 2, wm8350_dacmutes
),
412 SOC_ENUM_SINGLE(WM8350_DAC_MUTE_VOLUME
, 12, 2, wm8350_dacfilter
),
413 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 15, 2, wm8350_adcfilter
),
414 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 8, 4, wm8350_adchp
),
415 SOC_ENUM_SINGLE(WM8350_ADC_CONTROL
, 0, 4, wm8350_pol
),
416 SOC_ENUM_SINGLE(WM8350_INPUT_MIXER_VOLUME
, 15, 2, wm8350_lr
),
419 static DECLARE_TLV_DB_LINEAR(pre_amp_tlv
, -1200, 3525);
420 static DECLARE_TLV_DB_LINEAR(out_pga_tlv
, -5700, 600);
421 static DECLARE_TLV_DB_SCALE(dac_pcm_tlv
, -7163, 36, 1);
422 static DECLARE_TLV_DB_SCALE(adc_pcm_tlv
, -12700, 50, 1);
423 static DECLARE_TLV_DB_SCALE(out_mix_tlv
, -1500, 300, 1);
425 static const unsigned int capture_sd_tlv
[] = {
426 TLV_DB_RANGE_HEAD(2),
427 0, 12, TLV_DB_SCALE_ITEM(-3600, 300, 1),
428 13, 15, TLV_DB_SCALE_ITEM(0, 0, 0),
431 static const struct snd_kcontrol_new wm8350_snd_controls
[] = {
432 SOC_ENUM("Playback Deemphasis", wm8350_enum
[0]),
433 SOC_ENUM("Playback DAC Inversion", wm8350_enum
[1]),
434 SOC_WM8350_DOUBLE_R_TLV("Playback PCM Volume",
435 WM8350_DAC_DIGITAL_VOLUME_L
,
436 WM8350_DAC_DIGITAL_VOLUME_R
,
437 0, 255, 0, dac_pcm_tlv
),
438 SOC_ENUM("Playback PCM Mute Function", wm8350_enum
[2]),
439 SOC_ENUM("Playback PCM Mute Speed", wm8350_enum
[3]),
440 SOC_ENUM("Playback PCM Filter", wm8350_enum
[4]),
441 SOC_ENUM("Capture PCM Filter", wm8350_enum
[5]),
442 SOC_ENUM("Capture PCM HP Filter", wm8350_enum
[6]),
443 SOC_ENUM("Capture ADC Inversion", wm8350_enum
[7]),
444 SOC_WM8350_DOUBLE_R_TLV("Capture PCM Volume",
445 WM8350_ADC_DIGITAL_VOLUME_L
,
446 WM8350_ADC_DIGITAL_VOLUME_R
,
447 0, 255, 0, adc_pcm_tlv
),
448 SOC_DOUBLE_TLV("Capture Sidetone Volume",
450 8, 4, 15, 1, capture_sd_tlv
),
451 SOC_WM8350_DOUBLE_R_TLV("Capture Volume",
452 WM8350_LEFT_INPUT_VOLUME
,
453 WM8350_RIGHT_INPUT_VOLUME
,
454 2, 63, 0, pre_amp_tlv
),
455 SOC_DOUBLE_R("Capture ZC Switch",
456 WM8350_LEFT_INPUT_VOLUME
,
457 WM8350_RIGHT_INPUT_VOLUME
, 13, 1, 0),
458 SOC_SINGLE_TLV("Left Input Left Sidetone Volume",
459 WM8350_OUTPUT_LEFT_MIXER_VOLUME
, 1, 7, 0, out_mix_tlv
),
460 SOC_SINGLE_TLV("Left Input Right Sidetone Volume",
461 WM8350_OUTPUT_LEFT_MIXER_VOLUME
,
462 5, 7, 0, out_mix_tlv
),
463 SOC_SINGLE_TLV("Left Input Bypass Volume",
464 WM8350_OUTPUT_LEFT_MIXER_VOLUME
,
465 9, 7, 0, out_mix_tlv
),
466 SOC_SINGLE_TLV("Right Input Left Sidetone Volume",
467 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
468 1, 7, 0, out_mix_tlv
),
469 SOC_SINGLE_TLV("Right Input Right Sidetone Volume",
470 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
471 5, 7, 0, out_mix_tlv
),
472 SOC_SINGLE_TLV("Right Input Bypass Volume",
473 WM8350_OUTPUT_RIGHT_MIXER_VOLUME
,
474 13, 7, 0, out_mix_tlv
),
475 SOC_SINGLE("Left Input Mixer +20dB Switch",
476 WM8350_INPUT_MIXER_VOLUME_L
, 0, 1, 0),
477 SOC_SINGLE("Right Input Mixer +20dB Switch",
478 WM8350_INPUT_MIXER_VOLUME_R
, 0, 1, 0),
479 SOC_SINGLE_TLV("Out4 Capture Volume",
480 WM8350_INPUT_MIXER_VOLUME
,
481 1, 7, 0, out_mix_tlv
),
482 SOC_WM8350_DOUBLE_R_TLV("Out1 Playback Volume",
485 2, 63, 0, out_pga_tlv
),
486 SOC_DOUBLE_R("Out1 Playback ZC Switch",
488 WM8350_ROUT1_VOLUME
, 13, 1, 0),
489 SOC_WM8350_DOUBLE_R_TLV("Out2 Playback Volume",
492 2, 63, 0, out_pga_tlv
),
493 SOC_DOUBLE_R("Out2 Playback ZC Switch", WM8350_LOUT2_VOLUME
,
494 WM8350_ROUT2_VOLUME
, 13, 1, 0),
495 SOC_SINGLE("Out2 Right Invert Switch", WM8350_ROUT2_VOLUME
, 10, 1, 0),
496 SOC_SINGLE_TLV("Out2 Beep Volume", WM8350_BEEP_VOLUME
,
497 5, 7, 0, out_mix_tlv
),
499 SOC_DOUBLE_R("Out1 Playback Switch",
503 SOC_DOUBLE_R("Out2 Playback Switch",
513 /* Left Playback Mixer */
514 static const struct snd_kcontrol_new wm8350_left_play_mixer_controls
[] = {
515 SOC_DAPM_SINGLE("Playback Switch",
516 WM8350_LEFT_MIXER_CONTROL
, 11, 1, 0),
517 SOC_DAPM_SINGLE("Left Bypass Switch",
518 WM8350_LEFT_MIXER_CONTROL
, 2, 1, 0),
519 SOC_DAPM_SINGLE("Right Playback Switch",
520 WM8350_LEFT_MIXER_CONTROL
, 12, 1, 0),
521 SOC_DAPM_SINGLE("Left Sidetone Switch",
522 WM8350_LEFT_MIXER_CONTROL
, 0, 1, 0),
523 SOC_DAPM_SINGLE("Right Sidetone Switch",
524 WM8350_LEFT_MIXER_CONTROL
, 1, 1, 0),
527 /* Right Playback Mixer */
528 static const struct snd_kcontrol_new wm8350_right_play_mixer_controls
[] = {
529 SOC_DAPM_SINGLE("Playback Switch",
530 WM8350_RIGHT_MIXER_CONTROL
, 12, 1, 0),
531 SOC_DAPM_SINGLE("Right Bypass Switch",
532 WM8350_RIGHT_MIXER_CONTROL
, 3, 1, 0),
533 SOC_DAPM_SINGLE("Left Playback Switch",
534 WM8350_RIGHT_MIXER_CONTROL
, 11, 1, 0),
535 SOC_DAPM_SINGLE("Left Sidetone Switch",
536 WM8350_RIGHT_MIXER_CONTROL
, 0, 1, 0),
537 SOC_DAPM_SINGLE("Right Sidetone Switch",
538 WM8350_RIGHT_MIXER_CONTROL
, 1, 1, 0),
542 static const struct snd_kcontrol_new wm8350_out4_mixer_controls
[] = {
543 SOC_DAPM_SINGLE("Right Playback Switch",
544 WM8350_OUT4_MIXER_CONTROL
, 12, 1, 0),
545 SOC_DAPM_SINGLE("Left Playback Switch",
546 WM8350_OUT4_MIXER_CONTROL
, 11, 1, 0),
547 SOC_DAPM_SINGLE("Right Capture Switch",
548 WM8350_OUT4_MIXER_CONTROL
, 9, 1, 0),
549 SOC_DAPM_SINGLE("Out3 Playback Switch",
550 WM8350_OUT4_MIXER_CONTROL
, 2, 1, 0),
551 SOC_DAPM_SINGLE("Right Mixer Switch",
552 WM8350_OUT4_MIXER_CONTROL
, 1, 1, 0),
553 SOC_DAPM_SINGLE("Left Mixer Switch",
554 WM8350_OUT4_MIXER_CONTROL
, 0, 1, 0),
558 static const struct snd_kcontrol_new wm8350_out3_mixer_controls
[] = {
559 SOC_DAPM_SINGLE("Left Playback Switch",
560 WM8350_OUT3_MIXER_CONTROL
, 11, 1, 0),
561 SOC_DAPM_SINGLE("Left Capture Switch",
562 WM8350_OUT3_MIXER_CONTROL
, 8, 1, 0),
563 SOC_DAPM_SINGLE("Out4 Playback Switch",
564 WM8350_OUT3_MIXER_CONTROL
, 3, 1, 0),
565 SOC_DAPM_SINGLE("Left Mixer Switch",
566 WM8350_OUT3_MIXER_CONTROL
, 0, 1, 0),
569 /* Left Input Mixer */
570 static const struct snd_kcontrol_new wm8350_left_capt_mixer_controls
[] = {
571 SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
572 WM8350_INPUT_MIXER_VOLUME_L
, 1, 7, 0, out_mix_tlv
),
573 SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
574 WM8350_INPUT_MIXER_VOLUME_L
, 9, 7, 0, out_mix_tlv
),
575 SOC_DAPM_SINGLE("PGA Capture Switch",
576 WM8350_LEFT_INPUT_VOLUME
, 14, 1, 0),
579 /* Right Input Mixer */
580 static const struct snd_kcontrol_new wm8350_right_capt_mixer_controls
[] = {
581 SOC_DAPM_SINGLE_TLV("L2 Capture Volume",
582 WM8350_INPUT_MIXER_VOLUME_R
, 5, 7, 0, out_mix_tlv
),
583 SOC_DAPM_SINGLE_TLV("L3 Capture Volume",
584 WM8350_INPUT_MIXER_VOLUME_R
, 13, 7, 0, out_mix_tlv
),
585 SOC_DAPM_SINGLE("PGA Capture Switch",
586 WM8350_RIGHT_INPUT_VOLUME
, 14, 1, 0),
590 static const struct snd_kcontrol_new wm8350_left_mic_mixer_controls
[] = {
591 SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL
, 1, 1, 0),
592 SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL
, 0, 1, 0),
593 SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL
, 2, 1, 0),
596 /* Right Mic Mixer */
597 static const struct snd_kcontrol_new wm8350_right_mic_mixer_controls
[] = {
598 SOC_DAPM_SINGLE("INN Capture Switch", WM8350_INPUT_CONTROL
, 9, 1, 0),
599 SOC_DAPM_SINGLE("INP Capture Switch", WM8350_INPUT_CONTROL
, 8, 1, 0),
600 SOC_DAPM_SINGLE("IN2 Capture Switch", WM8350_INPUT_CONTROL
, 10, 1, 0),
604 static const struct snd_kcontrol_new wm8350_beep_switch_controls
=
605 SOC_DAPM_SINGLE("Switch", WM8350_BEEP_VOLUME
, 15, 1, 1);
607 /* Out4 Capture Mux */
608 static const struct snd_kcontrol_new wm8350_out4_capture_controls
=
609 SOC_DAPM_ENUM("Route", wm8350_enum
[8]);
611 static const struct snd_soc_dapm_widget wm8350_dapm_widgets
[] = {
613 SND_SOC_DAPM_PGA("IN3R PGA", WM8350_POWER_MGMT_2
, 11, 0, NULL
, 0),
614 SND_SOC_DAPM_PGA("IN3L PGA", WM8350_POWER_MGMT_2
, 10, 0, NULL
, 0),
615 SND_SOC_DAPM_PGA_E("Right Out2 PGA", WM8350_POWER_MGMT_3
, 3, 0, NULL
,
617 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
618 SND_SOC_DAPM_PGA_E("Left Out2 PGA", WM8350_POWER_MGMT_3
, 2, 0, NULL
, 0,
620 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
621 SND_SOC_DAPM_PGA_E("Right Out1 PGA", WM8350_POWER_MGMT_3
, 1, 0, NULL
,
623 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
624 SND_SOC_DAPM_PGA_E("Left Out1 PGA", WM8350_POWER_MGMT_3
, 0, 0, NULL
, 0,
626 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
628 SND_SOC_DAPM_MIXER("Right Capture Mixer", WM8350_POWER_MGMT_2
,
629 7, 0, &wm8350_right_capt_mixer_controls
[0],
630 ARRAY_SIZE(wm8350_right_capt_mixer_controls
)),
632 SND_SOC_DAPM_MIXER("Left Capture Mixer", WM8350_POWER_MGMT_2
,
633 6, 0, &wm8350_left_capt_mixer_controls
[0],
634 ARRAY_SIZE(wm8350_left_capt_mixer_controls
)),
636 SND_SOC_DAPM_MIXER("Out4 Mixer", WM8350_POWER_MGMT_2
, 5, 0,
637 &wm8350_out4_mixer_controls
[0],
638 ARRAY_SIZE(wm8350_out4_mixer_controls
)),
640 SND_SOC_DAPM_MIXER("Out3 Mixer", WM8350_POWER_MGMT_2
, 4, 0,
641 &wm8350_out3_mixer_controls
[0],
642 ARRAY_SIZE(wm8350_out3_mixer_controls
)),
644 SND_SOC_DAPM_MIXER("Right Playback Mixer", WM8350_POWER_MGMT_2
, 1, 0,
645 &wm8350_right_play_mixer_controls
[0],
646 ARRAY_SIZE(wm8350_right_play_mixer_controls
)),
648 SND_SOC_DAPM_MIXER("Left Playback Mixer", WM8350_POWER_MGMT_2
, 0, 0,
649 &wm8350_left_play_mixer_controls
[0],
650 ARRAY_SIZE(wm8350_left_play_mixer_controls
)),
652 SND_SOC_DAPM_MIXER("Left Mic Mixer", WM8350_POWER_MGMT_2
, 8, 0,
653 &wm8350_left_mic_mixer_controls
[0],
654 ARRAY_SIZE(wm8350_left_mic_mixer_controls
)),
656 SND_SOC_DAPM_MIXER("Right Mic Mixer", WM8350_POWER_MGMT_2
, 9, 0,
657 &wm8350_right_mic_mixer_controls
[0],
658 ARRAY_SIZE(wm8350_right_mic_mixer_controls
)),
660 /* virtual mixer for Beep and Out2R */
661 SND_SOC_DAPM_MIXER("Out2 Mixer", SND_SOC_NOPM
, 0, 0, NULL
, 0),
663 SND_SOC_DAPM_SWITCH("Beep", WM8350_POWER_MGMT_3
, 7, 0,
664 &wm8350_beep_switch_controls
),
666 SND_SOC_DAPM_ADC("Right ADC", "Right Capture",
667 WM8350_POWER_MGMT_4
, 3, 0),
668 SND_SOC_DAPM_ADC("Left ADC", "Left Capture",
669 WM8350_POWER_MGMT_4
, 2, 0),
670 SND_SOC_DAPM_DAC("Right DAC", "Right Playback",
671 WM8350_POWER_MGMT_4
, 5, 0),
672 SND_SOC_DAPM_DAC("Left DAC", "Left Playback",
673 WM8350_POWER_MGMT_4
, 4, 0),
675 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8350_POWER_MGMT_1
, 4, 0),
677 SND_SOC_DAPM_MUX("Out4 Capture Channel", SND_SOC_NOPM
, 0, 0,
678 &wm8350_out4_capture_controls
),
680 SND_SOC_DAPM_OUTPUT("OUT1R"),
681 SND_SOC_DAPM_OUTPUT("OUT1L"),
682 SND_SOC_DAPM_OUTPUT("OUT2R"),
683 SND_SOC_DAPM_OUTPUT("OUT2L"),
684 SND_SOC_DAPM_OUTPUT("OUT3"),
685 SND_SOC_DAPM_OUTPUT("OUT4"),
687 SND_SOC_DAPM_INPUT("IN1RN"),
688 SND_SOC_DAPM_INPUT("IN1RP"),
689 SND_SOC_DAPM_INPUT("IN2R"),
690 SND_SOC_DAPM_INPUT("IN1LP"),
691 SND_SOC_DAPM_INPUT("IN1LN"),
692 SND_SOC_DAPM_INPUT("IN2L"),
693 SND_SOC_DAPM_INPUT("IN3R"),
694 SND_SOC_DAPM_INPUT("IN3L"),
697 static const struct snd_soc_dapm_route audio_map
[] = {
699 /* left playback mixer */
700 {"Left Playback Mixer", "Playback Switch", "Left DAC"},
701 {"Left Playback Mixer", "Left Bypass Switch", "IN3L PGA"},
702 {"Left Playback Mixer", "Right Playback Switch", "Right DAC"},
703 {"Left Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
704 {"Left Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
706 /* right playback mixer */
707 {"Right Playback Mixer", "Playback Switch", "Right DAC"},
708 {"Right Playback Mixer", "Right Bypass Switch", "IN3R PGA"},
709 {"Right Playback Mixer", "Left Playback Switch", "Left DAC"},
710 {"Right Playback Mixer", "Left Sidetone Switch", "Left Mic Mixer"},
711 {"Right Playback Mixer", "Right Sidetone Switch", "Right Mic Mixer"},
713 /* out4 playback mixer */
714 {"Out4 Mixer", "Right Playback Switch", "Right DAC"},
715 {"Out4 Mixer", "Left Playback Switch", "Left DAC"},
716 {"Out4 Mixer", "Right Capture Switch", "Right Capture Mixer"},
717 {"Out4 Mixer", "Out3 Playback Switch", "Out3 Mixer"},
718 {"Out4 Mixer", "Right Mixer Switch", "Right Playback Mixer"},
719 {"Out4 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
720 {"OUT4", NULL
, "Out4 Mixer"},
722 /* out3 playback mixer */
723 {"Out3 Mixer", "Left Playback Switch", "Left DAC"},
724 {"Out3 Mixer", "Left Capture Switch", "Left Capture Mixer"},
725 {"Out3 Mixer", "Left Mixer Switch", "Left Playback Mixer"},
726 {"Out3 Mixer", "Out4 Playback Switch", "Out4 Mixer"},
727 {"OUT3", NULL
, "Out3 Mixer"},
730 {"Right Out2 PGA", NULL
, "Right Playback Mixer"},
731 {"Left Out2 PGA", NULL
, "Left Playback Mixer"},
732 {"OUT2L", NULL
, "Left Out2 PGA"},
733 {"OUT2R", NULL
, "Right Out2 PGA"},
736 {"Right Out1 PGA", NULL
, "Right Playback Mixer"},
737 {"Left Out1 PGA", NULL
, "Left Playback Mixer"},
738 {"OUT1L", NULL
, "Left Out1 PGA"},
739 {"OUT1R", NULL
, "Right Out1 PGA"},
742 {"Left ADC", NULL
, "Left Capture Mixer"},
743 {"Right ADC", NULL
, "Right Capture Mixer"},
745 /* Left capture mixer */
746 {"Left Capture Mixer", "L2 Capture Volume", "IN2L"},
747 {"Left Capture Mixer", "L3 Capture Volume", "IN3L PGA"},
748 {"Left Capture Mixer", "PGA Capture Switch", "Left Mic Mixer"},
749 {"Left Capture Mixer", NULL
, "Out4 Capture Channel"},
751 /* Right capture mixer */
752 {"Right Capture Mixer", "L2 Capture Volume", "IN2R"},
753 {"Right Capture Mixer", "L3 Capture Volume", "IN3R PGA"},
754 {"Right Capture Mixer", "PGA Capture Switch", "Right Mic Mixer"},
755 {"Right Capture Mixer", NULL
, "Out4 Capture Channel"},
758 {"IN3L PGA", NULL
, "IN3L"},
759 {"IN3R PGA", NULL
, "IN3R"},
762 {"Left Mic Mixer", "INN Capture Switch", "IN1LN"},
763 {"Left Mic Mixer", "INP Capture Switch", "IN1LP"},
764 {"Left Mic Mixer", "IN2 Capture Switch", "IN2L"},
766 /* Right Mic mixer */
767 {"Right Mic Mixer", "INN Capture Switch", "IN1RN"},
768 {"Right Mic Mixer", "INP Capture Switch", "IN1RP"},
769 {"Right Mic Mixer", "IN2 Capture Switch", "IN2R"},
772 {"Out4 Capture Channel", NULL
, "Out4 Mixer"},
775 {"Beep", NULL
, "IN3R PGA"},
778 static int wm8350_add_controls(struct snd_soc_codec
*codec
)
782 for (i
= 0; i
< ARRAY_SIZE(wm8350_snd_controls
); i
++) {
783 err
= snd_ctl_add(codec
->card
,
784 snd_soc_cnew(&wm8350_snd_controls
[i
],
793 static int wm8350_add_widgets(struct snd_soc_codec
*codec
)
797 ret
= snd_soc_dapm_new_controls(codec
,
799 ARRAY_SIZE(wm8350_dapm_widgets
));
801 dev_err(codec
->dev
, "dapm control register failed\n");
805 /* set up audio paths */
806 ret
= snd_soc_dapm_add_routes(codec
, audio_map
, ARRAY_SIZE(audio_map
));
808 dev_err(codec
->dev
, "DAPM route register failed\n");
812 return snd_soc_dapm_new_widgets(codec
);
815 static int wm8350_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
816 int clk_id
, unsigned int freq
, int dir
)
818 struct snd_soc_codec
*codec
= codec_dai
->codec
;
819 struct wm8350
*wm8350
= codec
->control_data
;
823 case WM8350_MCLK_SEL_MCLK
:
824 wm8350_clear_bits(wm8350
, WM8350_CLOCK_CONTROL_1
,
827 case WM8350_MCLK_SEL_PLL_MCLK
:
828 case WM8350_MCLK_SEL_PLL_DAC
:
829 case WM8350_MCLK_SEL_PLL_ADC
:
830 case WM8350_MCLK_SEL_PLL_32K
:
831 wm8350_set_bits(wm8350
, WM8350_CLOCK_CONTROL_1
,
833 fll_4
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_4
) &
834 ~WM8350_FLL_CLK_SRC_MASK
;
835 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_4
, fll_4
| clk_id
);
840 if (dir
== WM8350_MCLK_DIR_OUT
)
841 wm8350_set_bits(wm8350
, WM8350_CLOCK_CONTROL_2
,
844 wm8350_clear_bits(wm8350
, WM8350_CLOCK_CONTROL_2
,
850 static int wm8350_set_clkdiv(struct snd_soc_dai
*codec_dai
, int div_id
, int div
)
852 struct snd_soc_codec
*codec
= codec_dai
->codec
;
856 case WM8350_ADC_CLKDIV
:
857 val
= wm8350_codec_read(codec
, WM8350_ADC_DIVIDER
) &
858 ~WM8350_ADC_CLKDIV_MASK
;
859 wm8350_codec_write(codec
, WM8350_ADC_DIVIDER
, val
| div
);
861 case WM8350_DAC_CLKDIV
:
862 val
= wm8350_codec_read(codec
, WM8350_DAC_CLOCK_CONTROL
) &
863 ~WM8350_DAC_CLKDIV_MASK
;
864 wm8350_codec_write(codec
, WM8350_DAC_CLOCK_CONTROL
, val
| div
);
866 case WM8350_BCLK_CLKDIV
:
867 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
868 ~WM8350_BCLK_DIV_MASK
;
869 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
871 case WM8350_OPCLK_CLKDIV
:
872 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
873 ~WM8350_OPCLK_DIV_MASK
;
874 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
876 case WM8350_SYS_CLKDIV
:
877 val
= wm8350_codec_read(codec
, WM8350_CLOCK_CONTROL_1
) &
878 ~WM8350_MCLK_DIV_MASK
;
879 wm8350_codec_write(codec
, WM8350_CLOCK_CONTROL_1
, val
| div
);
881 case WM8350_DACLR_CLKDIV
:
882 val
= wm8350_codec_read(codec
, WM8350_DAC_LR_RATE
) &
883 ~WM8350_DACLRC_RATE_MASK
;
884 wm8350_codec_write(codec
, WM8350_DAC_LR_RATE
, val
| div
);
886 case WM8350_ADCLR_CLKDIV
:
887 val
= wm8350_codec_read(codec
, WM8350_ADC_LR_RATE
) &
888 ~WM8350_ADCLRC_RATE_MASK
;
889 wm8350_codec_write(codec
, WM8350_ADC_LR_RATE
, val
| div
);
898 static int wm8350_set_dai_fmt(struct snd_soc_dai
*codec_dai
, unsigned int fmt
)
900 struct snd_soc_codec
*codec
= codec_dai
->codec
;
901 u16 iface
= wm8350_codec_read(codec
, WM8350_AI_FORMATING
) &
902 ~(WM8350_AIF_BCLK_INV
| WM8350_AIF_LRCLK_INV
| WM8350_AIF_FMT_MASK
);
903 u16 master
= wm8350_codec_read(codec
, WM8350_AI_DAC_CONTROL
) &
905 u16 dac_lrc
= wm8350_codec_read(codec
, WM8350_DAC_LR_RATE
) &
907 u16 adc_lrc
= wm8350_codec_read(codec
, WM8350_ADC_LR_RATE
) &
910 /* set master/slave audio interface */
911 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
912 case SND_SOC_DAIFMT_CBM_CFM
:
913 master
|= WM8350_BCLK_MSTR
;
914 dac_lrc
|= WM8350_DACLRC_ENA
;
915 adc_lrc
|= WM8350_ADCLRC_ENA
;
917 case SND_SOC_DAIFMT_CBS_CFS
:
923 /* interface format */
924 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
925 case SND_SOC_DAIFMT_I2S
:
928 case SND_SOC_DAIFMT_RIGHT_J
:
930 case SND_SOC_DAIFMT_LEFT_J
:
933 case SND_SOC_DAIFMT_DSP_A
:
936 case SND_SOC_DAIFMT_DSP_B
:
937 iface
|= 0x3 << 8; /* lg not sure which mode */
943 /* clock inversion */
944 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
945 case SND_SOC_DAIFMT_NB_NF
:
947 case SND_SOC_DAIFMT_IB_IF
:
948 iface
|= WM8350_AIF_LRCLK_INV
| WM8350_AIF_BCLK_INV
;
950 case SND_SOC_DAIFMT_IB_NF
:
951 iface
|= WM8350_AIF_BCLK_INV
;
953 case SND_SOC_DAIFMT_NB_IF
:
954 iface
|= WM8350_AIF_LRCLK_INV
;
960 wm8350_codec_write(codec
, WM8350_AI_FORMATING
, iface
);
961 wm8350_codec_write(codec
, WM8350_AI_DAC_CONTROL
, master
);
962 wm8350_codec_write(codec
, WM8350_DAC_LR_RATE
, dac_lrc
);
963 wm8350_codec_write(codec
, WM8350_ADC_LR_RATE
, adc_lrc
);
967 static int wm8350_pcm_trigger(struct snd_pcm_substream
*substream
,
968 int cmd
, struct snd_soc_dai
*codec_dai
)
970 struct snd_soc_codec
*codec
= codec_dai
->codec
;
971 int master
= wm8350_codec_cache_read(codec
, WM8350_AI_DAC_CONTROL
) &
975 /* Check that the DACs or ADCs are enabled since they are
976 * required for LRC in master mode. The DACs or ADCs need a
977 * valid audio path i.e. pin -> ADC or DAC -> pin before
978 * the LRC will be enabled in master mode. */
979 if (!master
&& cmd
!= SNDRV_PCM_TRIGGER_START
)
982 if (substream
->stream
== SNDRV_PCM_STREAM_CAPTURE
) {
983 enabled
= wm8350_codec_cache_read(codec
, WM8350_POWER_MGMT_4
) &
984 (WM8350_ADCR_ENA
| WM8350_ADCL_ENA
);
986 enabled
= wm8350_codec_cache_read(codec
, WM8350_POWER_MGMT_4
) &
987 (WM8350_DACR_ENA
| WM8350_DACL_ENA
);
992 "%s: invalid audio path - no clocks available\n",
999 static int wm8350_pcm_hw_params(struct snd_pcm_substream
*substream
,
1000 struct snd_pcm_hw_params
*params
,
1001 struct snd_soc_dai
*codec_dai
)
1003 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1004 u16 iface
= wm8350_codec_read(codec
, WM8350_AI_FORMATING
) &
1005 ~WM8350_AIF_WL_MASK
;
1008 switch (params_format(params
)) {
1009 case SNDRV_PCM_FORMAT_S16_LE
:
1011 case SNDRV_PCM_FORMAT_S20_3LE
:
1014 case SNDRV_PCM_FORMAT_S24_LE
:
1017 case SNDRV_PCM_FORMAT_S32_LE
:
1022 wm8350_codec_write(codec
, WM8350_AI_FORMATING
, iface
);
1026 static int wm8350_mute(struct snd_soc_dai
*dai
, int mute
)
1028 struct snd_soc_codec
*codec
= dai
->codec
;
1029 struct wm8350
*wm8350
= codec
->control_data
;
1032 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1034 wm8350_clear_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1040 int div
; /* FLL_OUTDIV */
1043 int ratio
; /* FLL_FRATIO */
1046 /* The size in bits of the fll divide multiplied by 10
1047 * to allow rounding later */
1048 #define FIXED_FLL_SIZE ((1 << 16) * 10)
1050 static inline int fll_factors(struct _fll_div
*fll_div
, unsigned int input
,
1051 unsigned int output
)
1054 unsigned int t1
, t2
, K
, Nmod
;
1056 if (output
>= 2815250 && output
<= 3125000)
1058 else if (output
>= 5625000 && output
<= 6250000)
1060 else if (output
>= 11250000 && output
<= 12500000)
1062 else if (output
>= 22500000 && output
<= 25000000)
1065 printk(KERN_ERR
"wm8350: fll freq %d out of range\n", output
);
1074 t1
= output
* (1 << (fll_div
->div
+ 1));
1075 t2
= input
* fll_div
->ratio
;
1077 fll_div
->n
= t1
/ t2
;
1081 Kpart
= FIXED_FLL_SIZE
* (long long)Nmod
;
1083 K
= Kpart
& 0xFFFFFFFF;
1085 /* Check if we need to round */
1089 /* Move down to proper range now rounding is done */
1098 static int wm8350_set_fll(struct snd_soc_dai
*codec_dai
,
1099 int pll_id
, unsigned int freq_in
,
1100 unsigned int freq_out
)
1102 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1103 struct wm8350
*wm8350
= codec
->control_data
;
1104 struct _fll_div fll_div
;
1108 /* power down FLL - we need to do this for reconfiguration */
1109 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
,
1110 WM8350_FLL_ENA
| WM8350_FLL_OSC_ENA
);
1112 if (freq_out
== 0 || freq_in
== 0)
1115 ret
= fll_factors(&fll_div
, freq_in
, freq_out
);
1118 dev_dbg(wm8350
->dev
,
1119 "FLL in %d FLL out %d N 0x%x K 0x%x div %d ratio %d",
1120 freq_in
, freq_out
, fll_div
.n
, fll_div
.k
, fll_div
.div
,
1123 /* set up N.K & dividers */
1124 fll_1
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_1
) &
1125 ~(WM8350_FLL_OUTDIV_MASK
| WM8350_FLL_RSP_RATE_MASK
| 0xc000);
1126 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_1
,
1127 fll_1
| (fll_div
.div
<< 8) | 0x50);
1128 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_2
,
1129 (fll_div
.ratio
<< 11) | (fll_div
.
1130 n
& WM8350_FLL_N_MASK
));
1131 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_3
, fll_div
.k
);
1132 fll_4
= wm8350_codec_read(codec
, WM8350_FLL_CONTROL_4
) &
1133 ~(WM8350_FLL_FRAC
| WM8350_FLL_SLOW_LOCK_REF
);
1134 wm8350_codec_write(codec
, WM8350_FLL_CONTROL_4
,
1135 fll_4
| (fll_div
.k
? WM8350_FLL_FRAC
: 0) |
1136 (fll_div
.ratio
== 8 ? WM8350_FLL_SLOW_LOCK_REF
: 0));
1139 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_FLL_OSC_ENA
);
1140 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
, WM8350_FLL_ENA
);
1145 static int wm8350_set_bias_level(struct snd_soc_codec
*codec
,
1146 enum snd_soc_bias_level level
)
1148 struct wm8350
*wm8350
= codec
->control_data
;
1149 struct wm8350_data
*priv
= codec
->private_data
;
1150 struct wm8350_audio_platform_data
*platform
=
1151 wm8350
->codec
.platform_data
;
1156 case SND_SOC_BIAS_ON
:
1157 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1158 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1159 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1160 pm1
| WM8350_VMID_50K
|
1161 platform
->codec_current_on
<< 14);
1164 case SND_SOC_BIAS_PREPARE
:
1165 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
);
1166 pm1
&= ~WM8350_VMID_MASK
;
1167 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1168 pm1
| WM8350_VMID_50K
);
1171 case SND_SOC_BIAS_STANDBY
:
1172 if (codec
->bias_level
== SND_SOC_BIAS_OFF
) {
1173 ret
= regulator_bulk_enable(ARRAY_SIZE(priv
->supplies
),
1178 /* Enable the system clock */
1179 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_4
,
1182 /* mute DAC & outputs */
1183 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
,
1184 WM8350_DAC_MUTE_ENA
);
1186 /* discharge cap memory */
1187 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1188 platform
->dis_out1
|
1189 (platform
->dis_out2
<< 2) |
1190 (platform
->dis_out3
<< 4) |
1191 (platform
->dis_out4
<< 6));
1193 /* wait for discharge */
1194 schedule_timeout_interruptible(msecs_to_jiffies
1196 cap_discharge_msecs
));
1198 /* enable antipop */
1199 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1200 (platform
->vmid_s_curve
<< 8));
1203 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1205 codec_current_charge
<< 14) |
1206 WM8350_VMID_5K
| WM8350_VMIDEN
|
1210 schedule_timeout_interruptible(msecs_to_jiffies
1212 vmid_charge_msecs
));
1214 /* turn on vmid 300k */
1215 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1216 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1217 pm1
|= WM8350_VMID_300K
|
1218 (platform
->codec_current_standby
<< 14);
1219 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1223 /* enable analogue bias */
1224 pm1
|= WM8350_BIASEN
;
1225 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1227 /* disable antipop */
1228 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
, 0);
1231 /* turn on vmid 300k and reduce current */
1232 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1233 ~(WM8350_VMID_MASK
| WM8350_CODEC_ISEL_MASK
);
1234 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1235 pm1
| WM8350_VMID_300K
|
1237 codec_current_standby
<< 14));
1242 case SND_SOC_BIAS_OFF
:
1244 /* mute DAC & enable outputs */
1245 wm8350_set_bits(wm8350
, WM8350_DAC_MUTE
, WM8350_DAC_MUTE_ENA
);
1247 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_3
,
1248 WM8350_OUT1L_ENA
| WM8350_OUT1R_ENA
|
1249 WM8350_OUT2L_ENA
| WM8350_OUT2R_ENA
);
1251 /* enable anti pop S curve */
1252 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1253 (platform
->vmid_s_curve
<< 8));
1256 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1258 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1261 schedule_timeout_interruptible(msecs_to_jiffies
1263 vmid_discharge_msecs
));
1265 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
,
1266 (platform
->vmid_s_curve
<< 8) |
1267 platform
->dis_out1
|
1268 (platform
->dis_out2
<< 2) |
1269 (platform
->dis_out3
<< 4) |
1270 (platform
->dis_out4
<< 6));
1272 /* turn off VBuf and drain */
1273 pm1
= wm8350_reg_read(wm8350
, WM8350_POWER_MGMT_1
) &
1274 ~(WM8350_VBUFEN
| WM8350_VMID_MASK
);
1275 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
,
1276 pm1
| WM8350_OUTPUT_DRAIN_EN
);
1279 schedule_timeout_interruptible(msecs_to_jiffies
1280 (platform
->drain_msecs
));
1282 pm1
&= ~WM8350_BIASEN
;
1283 wm8350_reg_write(wm8350
, WM8350_POWER_MGMT_1
, pm1
);
1285 /* disable anti-pop */
1286 wm8350_reg_write(wm8350
, WM8350_ANTI_POP_CONTROL
, 0);
1288 wm8350_clear_bits(wm8350
, WM8350_LOUT1_VOLUME
,
1290 wm8350_clear_bits(wm8350
, WM8350_ROUT1_VOLUME
,
1292 wm8350_clear_bits(wm8350
, WM8350_LOUT2_VOLUME
,
1294 wm8350_clear_bits(wm8350
, WM8350_ROUT2_VOLUME
,
1297 /* disable clock gen */
1298 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_4
,
1301 regulator_bulk_disable(ARRAY_SIZE(priv
->supplies
),
1305 codec
->bias_level
= level
;
1309 static int wm8350_suspend(struct platform_device
*pdev
, pm_message_t state
)
1311 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1312 struct snd_soc_codec
*codec
= socdev
->codec
;
1314 wm8350_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1318 static int wm8350_resume(struct platform_device
*pdev
)
1320 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1321 struct snd_soc_codec
*codec
= socdev
->codec
;
1323 wm8350_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1325 if (codec
->suspend_bias_level
== SND_SOC_BIAS_ON
)
1326 wm8350_set_bias_level(codec
, SND_SOC_BIAS_ON
);
1331 static struct snd_soc_codec
*wm8350_codec
;
1333 static int wm8350_probe(struct platform_device
*pdev
)
1335 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1336 struct snd_soc_codec
*codec
;
1337 struct wm8350
*wm8350
;
1338 struct wm8350_data
*priv
;
1340 struct wm8350_output
*out1
;
1341 struct wm8350_output
*out2
;
1343 BUG_ON(!wm8350_codec
);
1345 socdev
->codec
= wm8350_codec
;
1346 codec
= socdev
->codec
;
1347 wm8350
= codec
->control_data
;
1348 priv
= codec
->private_data
;
1350 /* Enable the codec */
1351 wm8350_set_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1353 /* Enable robust clocking mode in ADC */
1354 wm8350_codec_write(codec
, WM8350_SECURITY
, 0xa7);
1355 wm8350_codec_write(codec
, 0xde, 0x13);
1356 wm8350_codec_write(codec
, WM8350_SECURITY
, 0);
1358 /* read OUT1 & OUT2 volumes */
1361 out1
->left_vol
= (wm8350_reg_read(wm8350
, WM8350_LOUT1_VOLUME
) &
1362 WM8350_OUT1L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
1363 out1
->right_vol
= (wm8350_reg_read(wm8350
, WM8350_ROUT1_VOLUME
) &
1364 WM8350_OUT1R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
1365 out2
->left_vol
= (wm8350_reg_read(wm8350
, WM8350_LOUT2_VOLUME
) &
1366 WM8350_OUT2L_VOL_MASK
) >> WM8350_OUT1L_VOL_SHIFT
;
1367 out2
->right_vol
= (wm8350_reg_read(wm8350
, WM8350_ROUT2_VOLUME
) &
1368 WM8350_OUT2R_VOL_MASK
) >> WM8350_OUT1R_VOL_SHIFT
;
1369 wm8350_reg_write(wm8350
, WM8350_LOUT1_VOLUME
, 0);
1370 wm8350_reg_write(wm8350
, WM8350_ROUT1_VOLUME
, 0);
1371 wm8350_reg_write(wm8350
, WM8350_LOUT2_VOLUME
, 0);
1372 wm8350_reg_write(wm8350
, WM8350_ROUT2_VOLUME
, 0);
1374 /* Latch VU bits & mute */
1375 wm8350_set_bits(wm8350
, WM8350_LOUT1_VOLUME
,
1376 WM8350_OUT1_VU
| WM8350_OUT1L_MUTE
);
1377 wm8350_set_bits(wm8350
, WM8350_LOUT2_VOLUME
,
1378 WM8350_OUT2_VU
| WM8350_OUT2L_MUTE
);
1379 wm8350_set_bits(wm8350
, WM8350_ROUT1_VOLUME
,
1380 WM8350_OUT1_VU
| WM8350_OUT1R_MUTE
);
1381 wm8350_set_bits(wm8350
, WM8350_ROUT2_VOLUME
,
1382 WM8350_OUT2_VU
| WM8350_OUT2R_MUTE
);
1384 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1386 dev_err(&pdev
->dev
, "failed to create pcms\n");
1390 wm8350_add_controls(codec
);
1391 wm8350_add_widgets(codec
);
1393 wm8350_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1395 ret
= snd_soc_init_card(socdev
);
1397 dev_err(&pdev
->dev
, "failed to register card\n");
1404 snd_soc_free_pcms(socdev
);
1405 snd_soc_dapm_free(socdev
);
1409 static int wm8350_remove(struct platform_device
*pdev
)
1411 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1412 struct snd_soc_codec
*codec
= socdev
->codec
;
1413 struct wm8350
*wm8350
= codec
->control_data
;
1416 /* cancel any work waiting to be queued. */
1417 ret
= cancel_delayed_work(&codec
->delayed_work
);
1419 /* if there was any work waiting then we run it now and
1420 * wait for its completion */
1422 schedule_delayed_work(&codec
->delayed_work
, 0);
1423 flush_scheduled_work();
1426 wm8350_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1428 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1433 #define WM8350_RATES (SNDRV_PCM_RATE_8000_96000)
1435 #define WM8350_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1436 SNDRV_PCM_FMTBIT_S20_3LE |\
1437 SNDRV_PCM_FMTBIT_S24_LE)
1439 struct snd_soc_dai wm8350_dai
= {
1442 .stream_name
= "Playback",
1445 .rates
= WM8350_RATES
,
1446 .formats
= WM8350_FORMATS
,
1449 .stream_name
= "Capture",
1452 .rates
= WM8350_RATES
,
1453 .formats
= WM8350_FORMATS
,
1456 .hw_params
= wm8350_pcm_hw_params
,
1457 .digital_mute
= wm8350_mute
,
1458 .trigger
= wm8350_pcm_trigger
,
1459 .set_fmt
= wm8350_set_dai_fmt
,
1460 .set_sysclk
= wm8350_set_dai_sysclk
,
1461 .set_pll
= wm8350_set_fll
,
1462 .set_clkdiv
= wm8350_set_clkdiv
,
1465 EXPORT_SYMBOL_GPL(wm8350_dai
);
1467 struct snd_soc_codec_device soc_codec_dev_wm8350
= {
1468 .probe
= wm8350_probe
,
1469 .remove
= wm8350_remove
,
1470 .suspend
= wm8350_suspend
,
1471 .resume
= wm8350_resume
,
1473 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8350
);
1475 static int wm8350_codec_probe(struct platform_device
*pdev
)
1477 struct wm8350
*wm8350
= platform_get_drvdata(pdev
);
1478 struct wm8350_data
*priv
;
1479 struct snd_soc_codec
*codec
;
1482 if (wm8350
->codec
.platform_data
== NULL
) {
1483 dev_err(&pdev
->dev
, "No audio platform data supplied\n");
1487 priv
= kzalloc(sizeof(struct wm8350_data
), GFP_KERNEL
);
1491 for (i
= 0; i
< ARRAY_SIZE(supply_names
); i
++)
1492 priv
->supplies
[i
].supply
= supply_names
[i
];
1494 ret
= regulator_bulk_get(wm8350
->dev
, ARRAY_SIZE(priv
->supplies
),
1499 codec
= &priv
->codec
;
1500 wm8350
->codec
.codec
= codec
;
1502 wm8350_dai
.dev
= &pdev
->dev
;
1504 mutex_init(&codec
->mutex
);
1505 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1506 INIT_LIST_HEAD(&codec
->dapm_paths
);
1507 codec
->dev
= &pdev
->dev
;
1508 codec
->name
= "WM8350";
1509 codec
->owner
= THIS_MODULE
;
1510 codec
->read
= wm8350_codec_read
;
1511 codec
->write
= wm8350_codec_write
;
1512 codec
->bias_level
= SND_SOC_BIAS_OFF
;
1513 codec
->set_bias_level
= wm8350_set_bias_level
;
1514 codec
->dai
= &wm8350_dai
;
1516 codec
->reg_cache_size
= WM8350_MAX_REGISTER
;
1517 codec
->private_data
= priv
;
1518 codec
->control_data
= wm8350
;
1520 /* Put the codec into reset if it wasn't already */
1521 wm8350_clear_bits(wm8350
, WM8350_POWER_MGMT_5
, WM8350_CODEC_ENA
);
1523 INIT_DELAYED_WORK(&codec
->delayed_work
, wm8350_pga_work
);
1524 ret
= snd_soc_register_codec(codec
);
1528 wm8350_codec
= codec
;
1530 ret
= snd_soc_register_dai(&wm8350_dai
);
1536 snd_soc_unregister_codec(codec
);
1538 regulator_bulk_free(ARRAY_SIZE(priv
->supplies
), priv
->supplies
);
1541 wm8350_codec
= NULL
;
1545 static int __devexit
wm8350_codec_remove(struct platform_device
*pdev
)
1547 struct wm8350
*wm8350
= platform_get_drvdata(pdev
);
1548 struct snd_soc_codec
*codec
= wm8350
->codec
.codec
;
1549 struct wm8350_data
*priv
= codec
->private_data
;
1551 snd_soc_unregister_dai(&wm8350_dai
);
1552 snd_soc_unregister_codec(codec
);
1553 regulator_bulk_free(ARRAY_SIZE(priv
->supplies
), priv
->supplies
);
1555 wm8350_codec
= NULL
;
1559 static struct platform_driver wm8350_codec_driver
= {
1561 .name
= "wm8350-codec",
1562 .owner
= THIS_MODULE
,
1564 .probe
= wm8350_codec_probe
,
1565 .remove
= __devexit_p(wm8350_codec_remove
),
1568 static __init
int wm8350_init(void)
1570 return platform_driver_register(&wm8350_codec_driver
);
1572 module_init(wm8350_init
);
1574 static __exit
void wm8350_exit(void)
1576 platform_driver_unregister(&wm8350_codec_driver
);
1578 module_exit(wm8350_exit
);
1580 MODULE_DESCRIPTION("ASoC WM8350 driver");
1581 MODULE_AUTHOR("Liam Girdwood");
1582 MODULE_LICENSE("GPL");
1583 MODULE_ALIAS("platform:wm8350-codec");