ASoC: One more x86 typo fix
[deliverable/linux.git] / sound / soc / codecs / wm8523.c
1 /*
2 * wm8523.c -- WM8523 ALSA SoC Audio driver
3 *
4 * Copyright 2009 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
18 #include <linux/pm.h>
19 #include <linux/i2c.h>
20 #include <linux/platform_device.h>
21 #include <linux/regulator/consumer.h>
22 #include <linux/slab.h>
23 #include <sound/core.h>
24 #include <sound/pcm.h>
25 #include <sound/pcm_params.h>
26 #include <sound/soc.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29
30 #include "wm8523.h"
31
32 #define WM8523_NUM_SUPPLIES 2
33 static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
34 "AVDD",
35 "LINEVDD",
36 };
37
38 #define WM8523_NUM_RATES 7
39
40 /* codec private data */
41 struct wm8523_priv {
42 enum snd_soc_control_type control_type;
43 u16 reg_cache[WM8523_REGISTER_COUNT];
44 struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
45 unsigned int sysclk;
46 unsigned int rate_constraint_list[WM8523_NUM_RATES];
47 struct snd_pcm_hw_constraint_list rate_constraint;
48 };
49
50 static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
51 0x8523, /* R0 - DEVICE_ID */
52 0x0001, /* R1 - REVISION */
53 0x0000, /* R2 - PSCTRL1 */
54 0x1812, /* R3 - AIF_CTRL1 */
55 0x0000, /* R4 - AIF_CTRL2 */
56 0x0001, /* R5 - DAC_CTRL3 */
57 0x0190, /* R6 - DAC_GAINL */
58 0x0190, /* R7 - DAC_GAINR */
59 0x0000, /* R8 - ZERO_DETECT */
60 };
61
62 static int wm8523_volatile_register(unsigned int reg)
63 {
64 switch (reg) {
65 case WM8523_DEVICE_ID:
66 case WM8523_REVISION:
67 return 1;
68 default:
69 return 0;
70 }
71 }
72
73 static int wm8523_reset(struct snd_soc_codec *codec)
74 {
75 return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
76 }
77
78 static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
79
80 static const char *wm8523_zd_count_text[] = {
81 "1024",
82 "2048",
83 };
84
85 static const struct soc_enum wm8523_zc_count =
86 SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
87
88 static const struct snd_kcontrol_new wm8523_snd_controls[] = {
89 SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
90 0, 448, 0, dac_tlv),
91 SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
92 SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
93 SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
94 SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
95 SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
96 SOC_ENUM("Zero Detect Count", wm8523_zc_count),
97 };
98
99 static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
100 SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
101 SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
102 SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
103 };
104
105 static const struct snd_soc_dapm_route intercon[] = {
106 { "LINEVOUTL", NULL, "DAC" },
107 { "LINEVOUTR", NULL, "DAC" },
108 };
109
110 static int wm8523_add_widgets(struct snd_soc_codec *codec)
111 {
112 struct snd_soc_dapm_context *dapm = &codec->dapm;
113
114 snd_soc_dapm_new_controls(dapm, wm8523_dapm_widgets,
115 ARRAY_SIZE(wm8523_dapm_widgets));
116 snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
117
118 return 0;
119 }
120
121 static struct {
122 int value;
123 int ratio;
124 } lrclk_ratios[WM8523_NUM_RATES] = {
125 { 1, 128 },
126 { 2, 192 },
127 { 3, 256 },
128 { 4, 384 },
129 { 5, 512 },
130 { 6, 768 },
131 { 7, 1152 },
132 };
133
134 static int wm8523_startup(struct snd_pcm_substream *substream,
135 struct snd_soc_dai *dai)
136 {
137 struct snd_soc_codec *codec = dai->codec;
138 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
139
140 /* The set of sample rates that can be supported depends on the
141 * MCLK supplied to the CODEC - enforce this.
142 */
143 if (!wm8523->sysclk) {
144 dev_err(codec->dev,
145 "No MCLK configured, call set_sysclk() on init\n");
146 return -EINVAL;
147 }
148
149 snd_pcm_hw_constraint_list(substream->runtime, 0,
150 SNDRV_PCM_HW_PARAM_RATE,
151 &wm8523->rate_constraint);
152
153 return 0;
154 }
155
156 static int wm8523_hw_params(struct snd_pcm_substream *substream,
157 struct snd_pcm_hw_params *params,
158 struct snd_soc_dai *dai)
159 {
160 struct snd_soc_pcm_runtime *rtd = substream->private_data;
161 struct snd_soc_codec *codec = rtd->codec;
162 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
163 int i;
164 u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
165 u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
166
167 /* Find a supported LRCLK ratio */
168 for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
169 if (wm8523->sysclk / params_rate(params) ==
170 lrclk_ratios[i].ratio)
171 break;
172 }
173
174 /* Should never happen, should be handled by constraints */
175 if (i == ARRAY_SIZE(lrclk_ratios)) {
176 dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
177 wm8523->sysclk / params_rate(params));
178 return -EINVAL;
179 }
180
181 aifctrl2 &= ~WM8523_SR_MASK;
182 aifctrl2 |= lrclk_ratios[i].value;
183
184 aifctrl1 &= ~WM8523_WL_MASK;
185 switch (params_format(params)) {
186 case SNDRV_PCM_FORMAT_S16_LE:
187 break;
188 case SNDRV_PCM_FORMAT_S20_3LE:
189 aifctrl1 |= 0x8;
190 break;
191 case SNDRV_PCM_FORMAT_S24_LE:
192 aifctrl1 |= 0x10;
193 break;
194 case SNDRV_PCM_FORMAT_S32_LE:
195 aifctrl1 |= 0x18;
196 break;
197 }
198
199 snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
200 snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
201
202 return 0;
203 }
204
205 static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
206 int clk_id, unsigned int freq, int dir)
207 {
208 struct snd_soc_codec *codec = codec_dai->codec;
209 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
210 unsigned int val;
211 int i;
212
213 wm8523->sysclk = freq;
214
215 wm8523->rate_constraint.count = 0;
216 for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
217 val = freq / lrclk_ratios[i].ratio;
218 /* Check that it's a standard rate since core can't
219 * cope with others and having the odd rates confuses
220 * constraint matching.
221 */
222 switch (val) {
223 case 8000:
224 case 11025:
225 case 16000:
226 case 22050:
227 case 32000:
228 case 44100:
229 case 48000:
230 case 64000:
231 case 88200:
232 case 96000:
233 case 176400:
234 case 192000:
235 dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
236 val);
237 wm8523->rate_constraint_list[i] = val;
238 wm8523->rate_constraint.count++;
239 break;
240 default:
241 dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
242 val);
243 }
244 }
245
246 /* Need at least one supported rate... */
247 if (wm8523->rate_constraint.count == 0)
248 return -EINVAL;
249
250 return 0;
251 }
252
253
254 static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
255 unsigned int fmt)
256 {
257 struct snd_soc_codec *codec = codec_dai->codec;
258 u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
259
260 aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
261 WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
262
263 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
264 case SND_SOC_DAIFMT_CBM_CFM:
265 aifctrl1 |= WM8523_AIF_MSTR;
266 break;
267 case SND_SOC_DAIFMT_CBS_CFS:
268 break;
269 default:
270 return -EINVAL;
271 }
272
273 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
274 case SND_SOC_DAIFMT_I2S:
275 aifctrl1 |= 0x0002;
276 break;
277 case SND_SOC_DAIFMT_RIGHT_J:
278 break;
279 case SND_SOC_DAIFMT_LEFT_J:
280 aifctrl1 |= 0x0001;
281 break;
282 case SND_SOC_DAIFMT_DSP_A:
283 aifctrl1 |= 0x0003;
284 break;
285 case SND_SOC_DAIFMT_DSP_B:
286 aifctrl1 |= 0x0023;
287 break;
288 default:
289 return -EINVAL;
290 }
291
292 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
293 case SND_SOC_DAIFMT_NB_NF:
294 break;
295 case SND_SOC_DAIFMT_IB_IF:
296 aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
297 break;
298 case SND_SOC_DAIFMT_IB_NF:
299 aifctrl1 |= WM8523_BCLK_INV;
300 break;
301 case SND_SOC_DAIFMT_NB_IF:
302 aifctrl1 |= WM8523_LRCLK_INV;
303 break;
304 default:
305 return -EINVAL;
306 }
307
308 snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
309
310 return 0;
311 }
312
313 static int wm8523_set_bias_level(struct snd_soc_codec *codec,
314 enum snd_soc_bias_level level)
315 {
316 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
317 int ret, i;
318
319 switch (level) {
320 case SND_SOC_BIAS_ON:
321 break;
322
323 case SND_SOC_BIAS_PREPARE:
324 /* Full power on */
325 snd_soc_update_bits(codec, WM8523_PSCTRL1,
326 WM8523_SYS_ENA_MASK, 3);
327 break;
328
329 case SND_SOC_BIAS_STANDBY:
330 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
331 ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
332 wm8523->supplies);
333 if (ret != 0) {
334 dev_err(codec->dev,
335 "Failed to enable supplies: %d\n",
336 ret);
337 return ret;
338 }
339
340 /* Initial power up */
341 snd_soc_update_bits(codec, WM8523_PSCTRL1,
342 WM8523_SYS_ENA_MASK, 1);
343
344 /* Sync back default/cached values */
345 for (i = WM8523_AIF_CTRL1;
346 i < WM8523_MAX_REGISTER; i++)
347 snd_soc_write(codec, i, wm8523->reg_cache[i]);
348
349
350 msleep(100);
351 }
352
353 /* Power up to mute */
354 snd_soc_update_bits(codec, WM8523_PSCTRL1,
355 WM8523_SYS_ENA_MASK, 2);
356
357 break;
358
359 case SND_SOC_BIAS_OFF:
360 /* The chip runs through the power down sequence for us. */
361 snd_soc_update_bits(codec, WM8523_PSCTRL1,
362 WM8523_SYS_ENA_MASK, 0);
363 msleep(100);
364
365 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
366 wm8523->supplies);
367 break;
368 }
369 codec->dapm.bias_level = level;
370 return 0;
371 }
372
373 #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
374
375 #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
376 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
377
378 static struct snd_soc_dai_ops wm8523_dai_ops = {
379 .startup = wm8523_startup,
380 .hw_params = wm8523_hw_params,
381 .set_sysclk = wm8523_set_dai_sysclk,
382 .set_fmt = wm8523_set_dai_fmt,
383 };
384
385 static struct snd_soc_dai_driver wm8523_dai = {
386 .name = "wm8523-hifi",
387 .playback = {
388 .stream_name = "Playback",
389 .channels_min = 2, /* Mono modes not yet supported */
390 .channels_max = 2,
391 .rates = WM8523_RATES,
392 .formats = WM8523_FORMATS,
393 },
394 .ops = &wm8523_dai_ops,
395 };
396
397 #ifdef CONFIG_PM
398 static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state)
399 {
400 wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
401 return 0;
402 }
403
404 static int wm8523_resume(struct snd_soc_codec *codec)
405 {
406 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
407 return 0;
408 }
409 #else
410 #define wm8523_suspend NULL
411 #define wm8523_resume NULL
412 #endif
413
414 static int wm8523_probe(struct snd_soc_codec *codec)
415 {
416 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
417 int ret, i;
418
419 codec->hw_write = (hw_write_t)i2c_master_send;
420 wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
421 wm8523->rate_constraint.count =
422 ARRAY_SIZE(wm8523->rate_constraint_list);
423
424 ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
425 if (ret != 0) {
426 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
427 return ret;
428 }
429
430 for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
431 wm8523->supplies[i].supply = wm8523_supply_names[i];
432
433 ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
434 wm8523->supplies);
435 if (ret != 0) {
436 dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
437 return ret;
438 }
439
440 ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
441 wm8523->supplies);
442 if (ret != 0) {
443 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
444 goto err_get;
445 }
446
447 ret = snd_soc_read(codec, WM8523_DEVICE_ID);
448 if (ret < 0) {
449 dev_err(codec->dev, "Failed to read ID register\n");
450 goto err_enable;
451 }
452 if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
453 dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
454 ret = -EINVAL;
455 goto err_enable;
456 }
457
458 ret = snd_soc_read(codec, WM8523_REVISION);
459 if (ret < 0) {
460 dev_err(codec->dev, "Failed to read revision register\n");
461 goto err_enable;
462 }
463 dev_info(codec->dev, "revision %c\n",
464 (ret & WM8523_CHIP_REV_MASK) + 'A');
465
466 ret = wm8523_reset(codec);
467 if (ret < 0) {
468 dev_err(codec->dev, "Failed to issue reset\n");
469 goto err_enable;
470 }
471
472 /* Change some default settings - latch VU and enable ZC */
473 wm8523->reg_cache[WM8523_DAC_GAINR] |= WM8523_DACR_VU;
474 wm8523->reg_cache[WM8523_DAC_CTRL3] |= WM8523_ZC;
475
476 wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
477
478 /* Bias level configuration will have done an extra enable */
479 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
480
481 snd_soc_add_controls(codec, wm8523_snd_controls,
482 ARRAY_SIZE(wm8523_snd_controls));
483 wm8523_add_widgets(codec);
484
485 return 0;
486
487 err_enable:
488 regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
489 err_get:
490 regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
491
492 return ret;
493 }
494
495 static int wm8523_remove(struct snd_soc_codec *codec)
496 {
497 struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
498
499 wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
500 regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
501 return 0;
502 }
503
504 static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
505 .probe = wm8523_probe,
506 .remove = wm8523_remove,
507 .suspend = wm8523_suspend,
508 .resume = wm8523_resume,
509 .set_bias_level = wm8523_set_bias_level,
510 .reg_cache_size = WM8523_REGISTER_COUNT,
511 .reg_word_size = sizeof(u16),
512 .reg_cache_default = wm8523_reg,
513 .volatile_register = wm8523_volatile_register,
514 };
515
516 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
517 static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
518 const struct i2c_device_id *id)
519 {
520 struct wm8523_priv *wm8523;
521 int ret;
522
523 wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
524 if (wm8523 == NULL)
525 return -ENOMEM;
526
527 i2c_set_clientdata(i2c, wm8523);
528 wm8523->control_type = SND_SOC_I2C;
529
530 ret = snd_soc_register_codec(&i2c->dev,
531 &soc_codec_dev_wm8523, &wm8523_dai, 1);
532 if (ret < 0)
533 kfree(wm8523);
534 return ret;
535
536 }
537
538 static __devexit int wm8523_i2c_remove(struct i2c_client *client)
539 {
540 snd_soc_unregister_codec(&client->dev);
541 kfree(i2c_get_clientdata(client));
542 return 0;
543 }
544
545 static const struct i2c_device_id wm8523_i2c_id[] = {
546 { "wm8523", 0 },
547 { }
548 };
549 MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
550
551 static struct i2c_driver wm8523_i2c_driver = {
552 .driver = {
553 .name = "wm8523-codec",
554 .owner = THIS_MODULE,
555 },
556 .probe = wm8523_i2c_probe,
557 .remove = __devexit_p(wm8523_i2c_remove),
558 .id_table = wm8523_i2c_id,
559 };
560 #endif
561
562 static int __init wm8523_modinit(void)
563 {
564 int ret;
565 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
566 ret = i2c_add_driver(&wm8523_i2c_driver);
567 if (ret != 0) {
568 printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
569 ret);
570 }
571 #endif
572 return 0;
573 }
574 module_init(wm8523_modinit);
575
576 static void __exit wm8523_exit(void)
577 {
578 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
579 i2c_del_driver(&wm8523_i2c_driver);
580 #endif
581 }
582 module_exit(wm8523_exit);
583
584 MODULE_DESCRIPTION("ASoC WM8523 driver");
585 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
586 MODULE_LICENSE("GPL");
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