Merge branch 'for-2.6.37' into HEAD
[deliverable/linux.git] / sound / soc / codecs / wm8750.c
1 /*
2 * wm8750.c -- WM8750 ALSA SoC audio driver
3 *
4 * Copyright 2005 Openedhand Ltd.
5 *
6 * Author: Richard Purdie <richard@openedhand.com>
7 *
8 * Based on WM8753.c
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/pm.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <linux/spi/spi.h>
23 #include <linux/slab.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/pcm_params.h>
27 #include <sound/soc.h>
28 #include <sound/soc-dapm.h>
29 #include <sound/initval.h>
30
31 #include "wm8750.h"
32
33 /*
34 * wm8750 register cache
35 * We can't read the WM8750 register space when we
36 * are using 2 wire for device control, so we cache them instead.
37 */
38 static const u16 wm8750_reg[] = {
39 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */
40 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */
41 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */
42 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */
43 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */
44 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */
45 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */
46 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */
47 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */
48 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */
49 0x0079, 0x0079, 0x0079, /* 40 */
50 };
51
52 /* codec private data */
53 struct wm8750_priv {
54 unsigned int sysclk;
55 enum snd_soc_control_type control_type;
56 u16 reg_cache[ARRAY_SIZE(wm8750_reg)];
57 };
58
59 #define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0)
60
61 /*
62 * WM8750 Controls
63 */
64 static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
65 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
66 static const char *wm8750_treble[] = {"8kHz", "4kHz"};
67 static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
68 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
69 static const char *wm8750_3d_func[] = {"Capture", "Playback"};
70 static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
71 static const char *wm8750_ng_type[] = {"Constant PGA Gain",
72 "Mute ADC Output"};
73 static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
74 "Differential"};
75 static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
76 "Differential"};
77 static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
78 "ROUT1"};
79 static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
80 static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
81 "L + R Invert"};
82 static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
83 static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
84 "Mono (Right)", "Digital Mono"};
85
86 static const struct soc_enum wm8750_enum[] = {
87 SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
88 SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
89 SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
90 SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
91 SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
92 SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
93 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
94 SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
95 SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
96 SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
97 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
98 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
99 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
100 SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
101 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
102 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
103 SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
104
105 };
106
107 static const struct snd_kcontrol_new wm8750_snd_controls[] = {
108
109 SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
110 SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
111 SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
112
113 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
114 WM8750_ROUT1V, 7, 1, 0),
115 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
116 WM8750_ROUT2V, 7, 1, 0),
117
118 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
119
120 SOC_ENUM("Capture Polarity", wm8750_enum[14]),
121 SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
122 SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
123
124 SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
125
126 SOC_ENUM("Bass Boost", wm8750_enum[0]),
127 SOC_ENUM("Bass Filter", wm8750_enum[1]),
128 SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
129
130 SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
131 SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
132
133 SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
134 SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
135 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
136 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
137 SOC_ENUM("3D Mode", wm8750_enum[5]),
138
139 SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
140 SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
141 SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
142 SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
143 SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
144 SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
145 SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
146 SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
147 SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
148 SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
149
150 SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
151 SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
152
153 SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
154 SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
155
156 SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
157
158 /* Unimplemented */
159 /* ADCDAC Bit 0 - ADCHPD */
160 /* ADCDAC Bit 4 - HPOR */
161 /* ADCTL1 Bit 2,3 - DATSEL */
162 /* ADCTL1 Bit 4,5 - DMONOMIX */
163 /* ADCTL1 Bit 6,7 - VSEL */
164 /* ADCTL2 Bit 2 - LRCM */
165 /* ADCTL2 Bit 3 - TRI */
166 /* ADCTL3 Bit 5 - HPFLREN */
167 /* ADCTL3 Bit 6 - VROI */
168 /* ADCTL3 Bit 7,8 - ADCLRM */
169 /* ADCIN Bit 4 - LDCM */
170 /* ADCIN Bit 5 - RDCM */
171
172 SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
173
174 SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
175 WM8750_LOUTM2, 4, 7, 1),
176 SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
177 WM8750_ROUTM2, 4, 7, 1),
178 SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
179 WM8750_MOUTM2, 4, 7, 1),
180
181 SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
182
183 SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
184 0, 127, 0),
185 SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
186 0, 127, 0),
187
188 SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
189
190 };
191
192 /*
193 * DAPM Controls
194 */
195
196 /* Left Mixer */
197 static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
198 SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
199 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
200 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
201 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
202 };
203
204 /* Right Mixer */
205 static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
206 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
207 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
208 SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
209 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
210 };
211
212 /* Mono Mixer */
213 static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
214 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
215 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
216 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
217 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
218 };
219
220 /* Left Line Mux */
221 static const struct snd_kcontrol_new wm8750_left_line_controls =
222 SOC_DAPM_ENUM("Route", wm8750_enum[8]);
223
224 /* Right Line Mux */
225 static const struct snd_kcontrol_new wm8750_right_line_controls =
226 SOC_DAPM_ENUM("Route", wm8750_enum[9]);
227
228 /* Left PGA Mux */
229 static const struct snd_kcontrol_new wm8750_left_pga_controls =
230 SOC_DAPM_ENUM("Route", wm8750_enum[10]);
231
232 /* Right PGA Mux */
233 static const struct snd_kcontrol_new wm8750_right_pga_controls =
234 SOC_DAPM_ENUM("Route", wm8750_enum[11]);
235
236 /* Out 3 Mux */
237 static const struct snd_kcontrol_new wm8750_out3_controls =
238 SOC_DAPM_ENUM("Route", wm8750_enum[12]);
239
240 /* Differential Mux */
241 static const struct snd_kcontrol_new wm8750_diffmux_controls =
242 SOC_DAPM_ENUM("Route", wm8750_enum[13]);
243
244 /* Mono ADC Mux */
245 static const struct snd_kcontrol_new wm8750_monomux_controls =
246 SOC_DAPM_ENUM("Route", wm8750_enum[16]);
247
248 static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
249 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
250 &wm8750_left_mixer_controls[0],
251 ARRAY_SIZE(wm8750_left_mixer_controls)),
252 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
253 &wm8750_right_mixer_controls[0],
254 ARRAY_SIZE(wm8750_right_mixer_controls)),
255 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
256 &wm8750_mono_mixer_controls[0],
257 ARRAY_SIZE(wm8750_mono_mixer_controls)),
258
259 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
260 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
261 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
262 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
263 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
264 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
265
266 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
267 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
268 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
269
270 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
271 &wm8750_left_pga_controls),
272 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
273 &wm8750_right_pga_controls),
274 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
275 &wm8750_left_line_controls),
276 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
277 &wm8750_right_line_controls),
278
279 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
280 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
281 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
282
283 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
284 &wm8750_diffmux_controls),
285 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
286 &wm8750_monomux_controls),
287 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
288 &wm8750_monomux_controls),
289
290 SND_SOC_DAPM_OUTPUT("LOUT1"),
291 SND_SOC_DAPM_OUTPUT("ROUT1"),
292 SND_SOC_DAPM_OUTPUT("LOUT2"),
293 SND_SOC_DAPM_OUTPUT("ROUT2"),
294 SND_SOC_DAPM_OUTPUT("MONO1"),
295 SND_SOC_DAPM_OUTPUT("OUT3"),
296 SND_SOC_DAPM_OUTPUT("VREF"),
297
298 SND_SOC_DAPM_INPUT("LINPUT1"),
299 SND_SOC_DAPM_INPUT("LINPUT2"),
300 SND_SOC_DAPM_INPUT("LINPUT3"),
301 SND_SOC_DAPM_INPUT("RINPUT1"),
302 SND_SOC_DAPM_INPUT("RINPUT2"),
303 SND_SOC_DAPM_INPUT("RINPUT3"),
304 };
305
306 static const struct snd_soc_dapm_route audio_map[] = {
307 /* left mixer */
308 {"Left Mixer", "Playback Switch", "Left DAC"},
309 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
310 {"Left Mixer", "Right Playback Switch", "Right DAC"},
311 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
312
313 /* right mixer */
314 {"Right Mixer", "Left Playback Switch", "Left DAC"},
315 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
316 {"Right Mixer", "Playback Switch", "Right DAC"},
317 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
318
319 /* left out 1 */
320 {"Left Out 1", NULL, "Left Mixer"},
321 {"LOUT1", NULL, "Left Out 1"},
322
323 /* left out 2 */
324 {"Left Out 2", NULL, "Left Mixer"},
325 {"LOUT2", NULL, "Left Out 2"},
326
327 /* right out 1 */
328 {"Right Out 1", NULL, "Right Mixer"},
329 {"ROUT1", NULL, "Right Out 1"},
330
331 /* right out 2 */
332 {"Right Out 2", NULL, "Right Mixer"},
333 {"ROUT2", NULL, "Right Out 2"},
334
335 /* mono mixer */
336 {"Mono Mixer", "Left Playback Switch", "Left DAC"},
337 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
338 {"Mono Mixer", "Right Playback Switch", "Right DAC"},
339 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
340
341 /* mono out */
342 {"Mono Out 1", NULL, "Mono Mixer"},
343 {"MONO1", NULL, "Mono Out 1"},
344
345 /* out 3 */
346 {"Out3 Mux", "VREF", "VREF"},
347 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
348 {"Out3 Mux", "ROUT1", "Right Mixer"},
349 {"Out3 Mux", "MonoOut", "MONO1"},
350 {"Out 3", NULL, "Out3 Mux"},
351 {"OUT3", NULL, "Out 3"},
352
353 /* Left Line Mux */
354 {"Left Line Mux", "Line 1", "LINPUT1"},
355 {"Left Line Mux", "Line 2", "LINPUT2"},
356 {"Left Line Mux", "Line 3", "LINPUT3"},
357 {"Left Line Mux", "PGA", "Left PGA Mux"},
358 {"Left Line Mux", "Differential", "Differential Mux"},
359
360 /* Right Line Mux */
361 {"Right Line Mux", "Line 1", "RINPUT1"},
362 {"Right Line Mux", "Line 2", "RINPUT2"},
363 {"Right Line Mux", "Line 3", "RINPUT3"},
364 {"Right Line Mux", "PGA", "Right PGA Mux"},
365 {"Right Line Mux", "Differential", "Differential Mux"},
366
367 /* Left PGA Mux */
368 {"Left PGA Mux", "Line 1", "LINPUT1"},
369 {"Left PGA Mux", "Line 2", "LINPUT2"},
370 {"Left PGA Mux", "Line 3", "LINPUT3"},
371 {"Left PGA Mux", "Differential", "Differential Mux"},
372
373 /* Right PGA Mux */
374 {"Right PGA Mux", "Line 1", "RINPUT1"},
375 {"Right PGA Mux", "Line 2", "RINPUT2"},
376 {"Right PGA Mux", "Line 3", "RINPUT3"},
377 {"Right PGA Mux", "Differential", "Differential Mux"},
378
379 /* Differential Mux */
380 {"Differential Mux", "Line 1", "LINPUT1"},
381 {"Differential Mux", "Line 1", "RINPUT1"},
382 {"Differential Mux", "Line 2", "LINPUT2"},
383 {"Differential Mux", "Line 2", "RINPUT2"},
384
385 /* Left ADC Mux */
386 {"Left ADC Mux", "Stereo", "Left PGA Mux"},
387 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
388 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
389
390 /* Right ADC Mux */
391 {"Right ADC Mux", "Stereo", "Right PGA Mux"},
392 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
393 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
394
395 /* ADC */
396 {"Left ADC", NULL, "Left ADC Mux"},
397 {"Right ADC", NULL, "Right ADC Mux"},
398 };
399
400 static int wm8750_add_widgets(struct snd_soc_codec *codec)
401 {
402 struct snd_soc_dapm_context *dapm = &codec->dapm;
403
404 snd_soc_dapm_new_controls(dapm, wm8750_dapm_widgets,
405 ARRAY_SIZE(wm8750_dapm_widgets));
406 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map));
407
408 return 0;
409 }
410
411 struct _coeff_div {
412 u32 mclk;
413 u32 rate;
414 u16 fs;
415 u8 sr:5;
416 u8 usb:1;
417 };
418
419 /* codec hifi mclk clock divider coefficients */
420 static const struct _coeff_div coeff_div[] = {
421 /* 8k */
422 {12288000, 8000, 1536, 0x6, 0x0},
423 {11289600, 8000, 1408, 0x16, 0x0},
424 {18432000, 8000, 2304, 0x7, 0x0},
425 {16934400, 8000, 2112, 0x17, 0x0},
426 {12000000, 8000, 1500, 0x6, 0x1},
427
428 /* 11.025k */
429 {11289600, 11025, 1024, 0x18, 0x0},
430 {16934400, 11025, 1536, 0x19, 0x0},
431 {12000000, 11025, 1088, 0x19, 0x1},
432
433 /* 16k */
434 {12288000, 16000, 768, 0xa, 0x0},
435 {18432000, 16000, 1152, 0xb, 0x0},
436 {12000000, 16000, 750, 0xa, 0x1},
437
438 /* 22.05k */
439 {11289600, 22050, 512, 0x1a, 0x0},
440 {16934400, 22050, 768, 0x1b, 0x0},
441 {12000000, 22050, 544, 0x1b, 0x1},
442
443 /* 32k */
444 {12288000, 32000, 384, 0xc, 0x0},
445 {18432000, 32000, 576, 0xd, 0x0},
446 {12000000, 32000, 375, 0xa, 0x1},
447
448 /* 44.1k */
449 {11289600, 44100, 256, 0x10, 0x0},
450 {16934400, 44100, 384, 0x11, 0x0},
451 {12000000, 44100, 272, 0x11, 0x1},
452
453 /* 48k */
454 {12288000, 48000, 256, 0x0, 0x0},
455 {18432000, 48000, 384, 0x1, 0x0},
456 {12000000, 48000, 250, 0x0, 0x1},
457
458 /* 88.2k */
459 {11289600, 88200, 128, 0x1e, 0x0},
460 {16934400, 88200, 192, 0x1f, 0x0},
461 {12000000, 88200, 136, 0x1f, 0x1},
462
463 /* 96k */
464 {12288000, 96000, 128, 0xe, 0x0},
465 {18432000, 96000, 192, 0xf, 0x0},
466 {12000000, 96000, 125, 0xe, 0x1},
467 };
468
469 static inline int get_coeff(int mclk, int rate)
470 {
471 int i;
472
473 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
474 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
475 return i;
476 }
477
478 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
479 mclk, rate);
480 return -EINVAL;
481 }
482
483 static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai,
484 int clk_id, unsigned int freq, int dir)
485 {
486 struct snd_soc_codec *codec = codec_dai->codec;
487 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
488
489 switch (freq) {
490 case 11289600:
491 case 12000000:
492 case 12288000:
493 case 16934400:
494 case 18432000:
495 wm8750->sysclk = freq;
496 return 0;
497 }
498 return -EINVAL;
499 }
500
501 static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai,
502 unsigned int fmt)
503 {
504 struct snd_soc_codec *codec = codec_dai->codec;
505 u16 iface = 0;
506
507 /* set master/slave audio interface */
508 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
509 case SND_SOC_DAIFMT_CBM_CFM:
510 iface = 0x0040;
511 break;
512 case SND_SOC_DAIFMT_CBS_CFS:
513 break;
514 default:
515 return -EINVAL;
516 }
517
518 /* interface format */
519 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
520 case SND_SOC_DAIFMT_I2S:
521 iface |= 0x0002;
522 break;
523 case SND_SOC_DAIFMT_RIGHT_J:
524 break;
525 case SND_SOC_DAIFMT_LEFT_J:
526 iface |= 0x0001;
527 break;
528 case SND_SOC_DAIFMT_DSP_A:
529 iface |= 0x0003;
530 break;
531 case SND_SOC_DAIFMT_DSP_B:
532 iface |= 0x0013;
533 break;
534 default:
535 return -EINVAL;
536 }
537
538 /* clock inversion */
539 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
540 case SND_SOC_DAIFMT_NB_NF:
541 break;
542 case SND_SOC_DAIFMT_IB_IF:
543 iface |= 0x0090;
544 break;
545 case SND_SOC_DAIFMT_IB_NF:
546 iface |= 0x0080;
547 break;
548 case SND_SOC_DAIFMT_NB_IF:
549 iface |= 0x0010;
550 break;
551 default:
552 return -EINVAL;
553 }
554
555 snd_soc_write(codec, WM8750_IFACE, iface);
556 return 0;
557 }
558
559 static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
560 struct snd_pcm_hw_params *params,
561 struct snd_soc_dai *dai)
562 {
563 struct snd_soc_pcm_runtime *rtd = substream->private_data;
564 struct snd_soc_codec *codec = rtd->codec;
565 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
566 u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3;
567 u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0;
568 int coeff = get_coeff(wm8750->sysclk, params_rate(params));
569
570 /* bit size */
571 switch (params_format(params)) {
572 case SNDRV_PCM_FORMAT_S16_LE:
573 break;
574 case SNDRV_PCM_FORMAT_S20_3LE:
575 iface |= 0x0004;
576 break;
577 case SNDRV_PCM_FORMAT_S24_LE:
578 iface |= 0x0008;
579 break;
580 case SNDRV_PCM_FORMAT_S32_LE:
581 iface |= 0x000c;
582 break;
583 }
584
585 /* set iface & srate */
586 snd_soc_write(codec, WM8750_IFACE, iface);
587 if (coeff >= 0)
588 snd_soc_write(codec, WM8750_SRATE, srate |
589 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
590
591 return 0;
592 }
593
594 static int wm8750_mute(struct snd_soc_dai *dai, int mute)
595 {
596 struct snd_soc_codec *codec = dai->codec;
597 u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7;
598
599 if (mute)
600 snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
601 else
602 snd_soc_write(codec, WM8750_ADCDAC, mute_reg);
603 return 0;
604 }
605
606 static int wm8750_set_bias_level(struct snd_soc_codec *codec,
607 enum snd_soc_bias_level level)
608 {
609 u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e;
610
611 switch (level) {
612 case SND_SOC_BIAS_ON:
613 /* set vmid to 50k and unmute dac */
614 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
615 break;
616 case SND_SOC_BIAS_PREPARE:
617 break;
618 case SND_SOC_BIAS_STANDBY:
619 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
620 /* Set VMID to 5k */
621 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
622
623 /* ...and ramp */
624 msleep(1000);
625 }
626
627 /* mute dac and set vmid to 500k, enable VREF */
628 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
629 break;
630 case SND_SOC_BIAS_OFF:
631 snd_soc_write(codec, WM8750_PWR1, 0x0001);
632 break;
633 }
634 codec->dapm.bias_level = level;
635 return 0;
636 }
637
638 #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
639 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
640 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
641
642 #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
643 SNDRV_PCM_FMTBIT_S24_LE)
644
645 static struct snd_soc_dai_ops wm8750_dai_ops = {
646 .hw_params = wm8750_pcm_hw_params,
647 .digital_mute = wm8750_mute,
648 .set_fmt = wm8750_set_dai_fmt,
649 .set_sysclk = wm8750_set_dai_sysclk,
650 };
651
652 static struct snd_soc_dai_driver wm8750_dai = {
653 .name = "wm8750-hifi",
654 .playback = {
655 .stream_name = "Playback",
656 .channels_min = 1,
657 .channels_max = 2,
658 .rates = WM8750_RATES,
659 .formats = WM8750_FORMATS,},
660 .capture = {
661 .stream_name = "Capture",
662 .channels_min = 1,
663 .channels_max = 2,
664 .rates = WM8750_RATES,
665 .formats = WM8750_FORMATS,},
666 .ops = &wm8750_dai_ops,
667 };
668
669 static int wm8750_suspend(struct snd_soc_codec *codec, pm_message_t state)
670 {
671 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
672 return 0;
673 }
674
675 static int wm8750_resume(struct snd_soc_codec *codec)
676 {
677 int i;
678 u8 data[2];
679 u16 *cache = codec->reg_cache;
680
681 /* Sync reg_cache with the hardware */
682 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
683 if (i == WM8750_RESET)
684 continue;
685 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
686 data[1] = cache[i] & 0x00ff;
687 codec->hw_write(codec->control_data, data, 2);
688 }
689
690 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
691
692 return 0;
693 }
694
695 static int wm8750_probe(struct snd_soc_codec *codec)
696 {
697 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec);
698 int reg, ret;
699
700 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8750->control_type);
701 if (ret < 0) {
702 printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret);
703 return ret;
704 }
705
706 ret = wm8750_reset(codec);
707 if (ret < 0) {
708 printk(KERN_ERR "wm8750: failed to reset: %d\n", ret);
709 return ret;
710 }
711
712 /* charge output caps */
713 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
714
715 /* set the update bits */
716 reg = snd_soc_read(codec, WM8750_LDAC);
717 snd_soc_write(codec, WM8750_LDAC, reg | 0x0100);
718 reg = snd_soc_read(codec, WM8750_RDAC);
719 snd_soc_write(codec, WM8750_RDAC, reg | 0x0100);
720 reg = snd_soc_read(codec, WM8750_LOUT1V);
721 snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100);
722 reg = snd_soc_read(codec, WM8750_ROUT1V);
723 snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100);
724 reg = snd_soc_read(codec, WM8750_LOUT2V);
725 snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100);
726 reg = snd_soc_read(codec, WM8750_ROUT2V);
727 snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100);
728 reg = snd_soc_read(codec, WM8750_LINVOL);
729 snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100);
730 reg = snd_soc_read(codec, WM8750_RINVOL);
731 snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100);
732
733 snd_soc_add_controls(codec, wm8750_snd_controls,
734 ARRAY_SIZE(wm8750_snd_controls));
735 wm8750_add_widgets(codec);
736 return ret;
737 }
738
739 static int wm8750_remove(struct snd_soc_codec *codec)
740 {
741 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF);
742 return 0;
743 }
744
745 static struct snd_soc_codec_driver soc_codec_dev_wm8750 = {
746 .probe = wm8750_probe,
747 .remove = wm8750_remove,
748 .suspend = wm8750_suspend,
749 .resume = wm8750_resume,
750 .set_bias_level = wm8750_set_bias_level,
751 .reg_cache_size = ARRAY_SIZE(wm8750_reg),
752 .reg_word_size = sizeof(u16),
753 .reg_cache_default = wm8750_reg,
754 };
755
756 #if defined(CONFIG_SPI_MASTER)
757 static int __devinit wm8750_spi_probe(struct spi_device *spi)
758 {
759 struct wm8750_priv *wm8750;
760 int ret;
761
762 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
763 if (wm8750 == NULL)
764 return -ENOMEM;
765
766 wm8750->control_type = SND_SOC_SPI;
767 spi_set_drvdata(spi, wm8750);
768
769 ret = snd_soc_register_codec(&spi->dev,
770 &soc_codec_dev_wm8750, &wm8750_dai, 1);
771 if (ret < 0)
772 kfree(wm8750);
773 return ret;
774 }
775
776 static int __devexit wm8750_spi_remove(struct spi_device *spi)
777 {
778 snd_soc_unregister_codec(&spi->dev);
779 kfree(spi_get_drvdata(spi));
780 return 0;
781 }
782
783 static struct spi_driver wm8750_spi_driver = {
784 .driver = {
785 .name = "wm8750-codec",
786 .owner = THIS_MODULE,
787 },
788 .probe = wm8750_spi_probe,
789 .remove = __devexit_p(wm8750_spi_remove),
790 };
791 #endif /* CONFIG_SPI_MASTER */
792
793 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
794 static __devinit int wm8750_i2c_probe(struct i2c_client *i2c,
795 const struct i2c_device_id *id)
796 {
797 struct wm8750_priv *wm8750;
798 int ret;
799
800 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
801 if (wm8750 == NULL)
802 return -ENOMEM;
803
804 i2c_set_clientdata(i2c, wm8750);
805 wm8750->control_type = SND_SOC_I2C;
806
807 ret = snd_soc_register_codec(&i2c->dev,
808 &soc_codec_dev_wm8750, &wm8750_dai, 1);
809 if (ret < 0)
810 kfree(wm8750);
811 return ret;
812 }
813
814 static __devexit int wm8750_i2c_remove(struct i2c_client *client)
815 {
816 snd_soc_unregister_codec(&client->dev);
817 kfree(i2c_get_clientdata(client));
818 return 0;
819 }
820
821 static const struct i2c_device_id wm8750_i2c_id[] = {
822 { "wm8750", 0 },
823 { "wm8987", 0 },
824 { }
825 };
826 MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id);
827
828 static struct i2c_driver wm8750_i2c_driver = {
829 .driver = {
830 .name = "wm8750-codec",
831 .owner = THIS_MODULE,
832 },
833 .probe = wm8750_i2c_probe,
834 .remove = __devexit_p(wm8750_i2c_remove),
835 .id_table = wm8750_i2c_id,
836 };
837 #endif
838
839 static int __init wm8750_modinit(void)
840 {
841 int ret = 0;
842 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
843 ret = i2c_add_driver(&wm8750_i2c_driver);
844 if (ret != 0) {
845 printk(KERN_ERR "Failed to register wm8750 I2C driver: %d\n",
846 ret);
847 }
848 #endif
849 #if defined(CONFIG_SPI_MASTER)
850 ret = spi_register_driver(&wm8750_spi_driver);
851 if (ret != 0) {
852 printk(KERN_ERR "Failed to register wm8750 SPI driver: %d\n",
853 ret);
854 }
855 #endif
856 return ret;
857 }
858 module_init(wm8750_modinit);
859
860 static void __exit wm8750_exit(void)
861 {
862 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
863 i2c_del_driver(&wm8750_i2c_driver);
864 #endif
865 #if defined(CONFIG_SPI_MASTER)
866 spi_unregister_driver(&wm8750_spi_driver);
867 #endif
868 }
869 module_exit(wm8750_exit);
870
871 MODULE_DESCRIPTION("ASoC WM8750 driver");
872 MODULE_AUTHOR("Liam Girdwood");
873 MODULE_LICENSE("GPL");
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