2 * wm8903.c -- WM8903 ALSA SoC Audio driver
4 * Copyright 2008 Wolfson Microelectronics
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 * - TDM mode configuration.
14 * - Digital microphone support.
17 #include <linux/module.h>
18 #include <linux/moduleparam.h>
19 #include <linux/init.h>
20 #include <linux/completion.h>
21 #include <linux/delay.h>
23 #include <linux/i2c.h>
24 #include <linux/platform_device.h>
25 #include <linux/slab.h>
26 #include <sound/core.h>
27 #include <sound/jack.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/tlv.h>
31 #include <sound/soc.h>
32 #include <sound/initval.h>
33 #include <sound/wm8903.h>
37 /* Register defaults at reset */
38 static u16 wm8903_reg_defaults
[] = {
39 0x8903, /* R0 - SW Reset and ID */
40 0x0000, /* R1 - Revision Number */
43 0x0018, /* R4 - Bias Control 0 */
44 0x0000, /* R5 - VMID Control 0 */
45 0x0000, /* R6 - Mic Bias Control 0 */
47 0x0001, /* R8 - Analogue DAC 0 */
49 0x0001, /* R10 - Analogue ADC 0 */
51 0x0000, /* R12 - Power Management 0 */
52 0x0000, /* R13 - Power Management 1 */
53 0x0000, /* R14 - Power Management 2 */
54 0x0000, /* R15 - Power Management 3 */
55 0x0000, /* R16 - Power Management 4 */
56 0x0000, /* R17 - Power Management 5 */
57 0x0000, /* R18 - Power Management 6 */
59 0x0400, /* R20 - Clock Rates 0 */
60 0x0D07, /* R21 - Clock Rates 1 */
61 0x0000, /* R22 - Clock Rates 2 */
63 0x0050, /* R24 - Audio Interface 0 */
64 0x0242, /* R25 - Audio Interface 1 */
65 0x0008, /* R26 - Audio Interface 2 */
66 0x0022, /* R27 - Audio Interface 3 */
69 0x00C0, /* R30 - DAC Digital Volume Left */
70 0x00C0, /* R31 - DAC Digital Volume Right */
71 0x0000, /* R32 - DAC Digital 0 */
72 0x0000, /* R33 - DAC Digital 1 */
75 0x00C0, /* R36 - ADC Digital Volume Left */
76 0x00C0, /* R37 - ADC Digital Volume Right */
77 0x0000, /* R38 - ADC Digital 0 */
78 0x0073, /* R39 - Digital Microphone 0 */
79 0x09BF, /* R40 - DRC 0 */
80 0x3241, /* R41 - DRC 1 */
81 0x0020, /* R42 - DRC 2 */
82 0x0000, /* R43 - DRC 3 */
83 0x0085, /* R44 - Analogue Left Input 0 */
84 0x0085, /* R45 - Analogue Right Input 0 */
85 0x0044, /* R46 - Analogue Left Input 1 */
86 0x0044, /* R47 - Analogue Right Input 1 */
89 0x0008, /* R50 - Analogue Left Mix 0 */
90 0x0004, /* R51 - Analogue Right Mix 0 */
91 0x0000, /* R52 - Analogue Spk Mix Left 0 */
92 0x0000, /* R53 - Analogue Spk Mix Left 1 */
93 0x0000, /* R54 - Analogue Spk Mix Right 0 */
94 0x0000, /* R55 - Analogue Spk Mix Right 1 */
96 0x002D, /* R57 - Analogue OUT1 Left */
97 0x002D, /* R58 - Analogue OUT1 Right */
98 0x0039, /* R59 - Analogue OUT2 Left */
99 0x0039, /* R60 - Analogue OUT2 Right */
101 0x0139, /* R62 - Analogue OUT3 Left */
102 0x0139, /* R63 - Analogue OUT3 Right */
104 0x0000, /* R65 - Analogue SPK Output Control 0 */
106 0x0010, /* R67 - DC Servo 0 */
108 0x00A4, /* R69 - DC Servo 2 */
129 0x0000, /* R90 - Analogue HP 0 */
133 0x0000, /* R94 - Analogue Lineout 0 */
137 0x0000, /* R98 - Charge Pump 0 */
143 0x0000, /* R104 - Class W 0 */
147 0x0000, /* R108 - Write Sequencer 0 */
148 0x0000, /* R109 - Write Sequencer 1 */
149 0x0000, /* R110 - Write Sequencer 2 */
150 0x0000, /* R111 - Write Sequencer 3 */
151 0x0000, /* R112 - Write Sequencer 4 */
153 0x0000, /* R114 - Control Interface */
155 0x00A8, /* R116 - GPIO Control 1 */
156 0x00A8, /* R117 - GPIO Control 2 */
157 0x00A8, /* R118 - GPIO Control 3 */
158 0x0220, /* R119 - GPIO Control 4 */
159 0x01A0, /* R120 - GPIO Control 5 */
160 0x0000, /* R121 - Interrupt Status 1 */
161 0xFFFF, /* R122 - Interrupt Status 1 Mask */
162 0x0000, /* R123 - Interrupt Polarity 1 */
165 0x0000, /* R126 - Interrupt Control */
168 0x0000, /* R129 - Control Interface Test 1 */
188 0x6810, /* R149 - Charge Pump Test 1 */
203 0x0028, /* R164 - Clock Rate Test 4 */
211 0x0000, /* R172 - Analogue Output Bias 0 */
216 u16 reg_cache
[ARRAY_SIZE(wm8903_reg_defaults
)];
221 /* Reference counts */
226 struct completion wseq
;
228 struct snd_soc_jack
*mic_jack
;
234 struct snd_pcm_substream
*master_substream
;
235 struct snd_pcm_substream
*slave_substream
;
238 static int wm8903_volatile_register(unsigned int reg
)
241 case WM8903_SW_RESET_AND_ID
:
242 case WM8903_REVISION_NUMBER
:
243 case WM8903_INTERRUPT_STATUS_1
:
244 case WM8903_WRITE_SEQUENCER_4
:
252 static int wm8903_run_sequence(struct snd_soc_codec
*codec
, unsigned int start
)
255 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
259 /* Enable the sequencer if it's not already on */
260 reg
[0] = snd_soc_read(codec
, WM8903_WRITE_SEQUENCER_0
);
261 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_0
,
262 reg
[0] | WM8903_WSEQ_ENA
);
264 dev_dbg(codec
->dev
, "Starting sequence at %d\n", start
);
266 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_3
,
267 start
| WM8903_WSEQ_START
);
269 /* Wait for it to complete. If we have the interrupt wired up then
270 * that will break us out of the poll early.
273 wait_for_completion_timeout(&wm8903
->wseq
,
274 msecs_to_jiffies(10));
276 reg
[4] = snd_soc_read(codec
, WM8903_WRITE_SEQUENCER_4
);
277 } while (reg
[4] & WM8903_WSEQ_BUSY
);
279 dev_dbg(codec
->dev
, "Sequence complete\n");
281 /* Disable the sequencer again if we enabled it */
282 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_0
, reg
[0]);
287 static void wm8903_sync_reg_cache(struct snd_soc_codec
*codec
, u16
*cache
)
291 /* There really ought to be something better we can do here :/ */
292 for (i
= 0; i
< ARRAY_SIZE(wm8903_reg_defaults
); i
++)
293 cache
[i
] = codec
->hw_read(codec
, i
);
296 static void wm8903_reset(struct snd_soc_codec
*codec
)
298 snd_soc_write(codec
, WM8903_SW_RESET_AND_ID
, 0);
299 memcpy(codec
->reg_cache
, wm8903_reg_defaults
,
300 sizeof(wm8903_reg_defaults
));
303 #define WM8903_OUTPUT_SHORT 0x8
304 #define WM8903_OUTPUT_OUT 0x4
305 #define WM8903_OUTPUT_INT 0x2
306 #define WM8903_OUTPUT_IN 0x1
308 static int wm8903_cp_event(struct snd_soc_dapm_widget
*w
,
309 struct snd_kcontrol
*kcontrol
, int event
)
311 WARN_ON(event
!= SND_SOC_DAPM_POST_PMU
);
318 * Event for headphone and line out amplifier power changes. Special
319 * power up/down sequences are required in order to maximise pop/click
322 static int wm8903_output_event(struct snd_soc_dapm_widget
*w
,
323 struct snd_kcontrol
*kcontrol
, int event
)
325 struct snd_soc_codec
*codec
= w
->codec
;
333 case WM8903_POWER_MANAGEMENT_2
:
334 reg
= WM8903_ANALOGUE_HP_0
;
335 dcs_bit
= 0 + w
->shift
;
337 case WM8903_POWER_MANAGEMENT_3
:
338 reg
= WM8903_ANALOGUE_LINEOUT_0
;
339 dcs_bit
= 2 + w
->shift
;
343 return -EINVAL
; /* Spurious warning from some compilers */
355 return -EINVAL
; /* Spurious warning from some compilers */
358 if (event
& SND_SOC_DAPM_PRE_PMU
) {
359 val
= snd_soc_read(codec
, reg
);
361 /* Short the output */
362 val
&= ~(WM8903_OUTPUT_SHORT
<< shift
);
363 snd_soc_write(codec
, reg
, val
);
366 if (event
& SND_SOC_DAPM_POST_PMU
) {
367 val
= snd_soc_read(codec
, reg
);
369 val
|= (WM8903_OUTPUT_IN
<< shift
);
370 snd_soc_write(codec
, reg
, val
);
372 val
|= (WM8903_OUTPUT_INT
<< shift
);
373 snd_soc_write(codec
, reg
, val
);
375 /* Turn on the output ENA_OUTP */
376 val
|= (WM8903_OUTPUT_OUT
<< shift
);
377 snd_soc_write(codec
, reg
, val
);
379 /* Enable the DC servo */
380 dcs_reg
= snd_soc_read(codec
, WM8903_DC_SERVO_0
);
382 snd_soc_write(codec
, WM8903_DC_SERVO_0
, dcs_reg
);
384 /* Remove the short */
385 val
|= (WM8903_OUTPUT_SHORT
<< shift
);
386 snd_soc_write(codec
, reg
, val
);
389 if (event
& SND_SOC_DAPM_PRE_PMD
) {
390 val
= snd_soc_read(codec
, reg
);
392 /* Short the output */
393 val
&= ~(WM8903_OUTPUT_SHORT
<< shift
);
394 snd_soc_write(codec
, reg
, val
);
396 /* Disable the DC servo */
397 dcs_reg
= snd_soc_read(codec
, WM8903_DC_SERVO_0
);
399 snd_soc_write(codec
, WM8903_DC_SERVO_0
, dcs_reg
);
401 /* Then disable the intermediate and output stages */
402 val
&= ~((WM8903_OUTPUT_OUT
| WM8903_OUTPUT_INT
|
403 WM8903_OUTPUT_IN
) << shift
);
404 snd_soc_write(codec
, reg
, val
);
411 * When used with DAC outputs only the WM8903 charge pump supports
412 * operation in class W mode, providing very low power consumption
413 * when used with digital sources. Enable and disable this mode
414 * automatically depending on the mixer configuration.
416 * All the relevant controls are simple switches.
418 static int wm8903_class_w_put(struct snd_kcontrol
*kcontrol
,
419 struct snd_ctl_elem_value
*ucontrol
)
421 struct snd_soc_dapm_widget
*widget
= snd_kcontrol_chip(kcontrol
);
422 struct snd_soc_codec
*codec
= widget
->codec
;
423 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
427 reg
= snd_soc_read(codec
, WM8903_CLASS_W_0
);
429 /* Turn it off if we're about to enable bypass */
430 if (ucontrol
->value
.integer
.value
[0]) {
431 if (wm8903
->class_w_users
== 0) {
432 dev_dbg(codec
->dev
, "Disabling Class W\n");
433 snd_soc_write(codec
, WM8903_CLASS_W_0
, reg
&
434 ~(WM8903_CP_DYN_FREQ
| WM8903_CP_DYN_V
));
436 wm8903
->class_w_users
++;
439 /* Implement the change */
440 ret
= snd_soc_dapm_put_volsw(kcontrol
, ucontrol
);
442 /* If we've just disabled the last bypass path turn Class W on */
443 if (!ucontrol
->value
.integer
.value
[0]) {
444 if (wm8903
->class_w_users
== 1) {
445 dev_dbg(codec
->dev
, "Enabling Class W\n");
446 snd_soc_write(codec
, WM8903_CLASS_W_0
, reg
|
447 WM8903_CP_DYN_FREQ
| WM8903_CP_DYN_V
);
449 wm8903
->class_w_users
--;
452 dev_dbg(codec
->dev
, "Bypass use count now %d\n",
453 wm8903
->class_w_users
);
458 #define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
459 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
460 .info = snd_soc_info_volsw, \
461 .get = snd_soc_dapm_get_volsw, .put = wm8903_class_w_put, \
462 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
465 /* ALSA can only do steps of .01dB */
466 static const DECLARE_TLV_DB_SCALE(digital_tlv
, -7200, 75, 1);
468 static const DECLARE_TLV_DB_SCALE(digital_sidetone_tlv
, -3600, 300, 0);
469 static const DECLARE_TLV_DB_SCALE(out_tlv
, -5700, 100, 0);
471 static const DECLARE_TLV_DB_SCALE(drc_tlv_thresh
, 0, 75, 0);
472 static const DECLARE_TLV_DB_SCALE(drc_tlv_amp
, -2250, 75, 0);
473 static const DECLARE_TLV_DB_SCALE(drc_tlv_min
, 0, 600, 0);
474 static const DECLARE_TLV_DB_SCALE(drc_tlv_max
, 1200, 600, 0);
475 static const DECLARE_TLV_DB_SCALE(drc_tlv_startup
, -300, 50, 0);
477 static const char *drc_slope_text
[] = {
478 "1", "1/2", "1/4", "1/8", "1/16", "0"
481 static const struct soc_enum drc_slope_r0
=
482 SOC_ENUM_SINGLE(WM8903_DRC_2
, 3, 6, drc_slope_text
);
484 static const struct soc_enum drc_slope_r1
=
485 SOC_ENUM_SINGLE(WM8903_DRC_2
, 0, 6, drc_slope_text
);
487 static const char *drc_attack_text
[] = {
489 "363us", "762us", "1.45ms", "2.9ms", "5.8ms", "11.6ms", "23.2ms",
490 "46.4ms", "92.8ms", "185.6ms"
493 static const struct soc_enum drc_attack
=
494 SOC_ENUM_SINGLE(WM8903_DRC_1
, 12, 11, drc_attack_text
);
496 static const char *drc_decay_text
[] = {
497 "186ms", "372ms", "743ms", "1.49s", "2.97s", "5.94s", "11.89s",
501 static const struct soc_enum drc_decay
=
502 SOC_ENUM_SINGLE(WM8903_DRC_1
, 8, 9, drc_decay_text
);
504 static const char *drc_ff_delay_text
[] = {
505 "5 samples", "9 samples"
508 static const struct soc_enum drc_ff_delay
=
509 SOC_ENUM_SINGLE(WM8903_DRC_0
, 5, 2, drc_ff_delay_text
);
511 static const char *drc_qr_decay_text
[] = {
512 "0.725ms", "1.45ms", "5.8ms"
515 static const struct soc_enum drc_qr_decay
=
516 SOC_ENUM_SINGLE(WM8903_DRC_1
, 4, 3, drc_qr_decay_text
);
518 static const char *drc_smoothing_text
[] = {
519 "Low", "Medium", "High"
522 static const struct soc_enum drc_smoothing
=
523 SOC_ENUM_SINGLE(WM8903_DRC_0
, 11, 3, drc_smoothing_text
);
525 static const char *soft_mute_text
[] = {
526 "Fast (fs/2)", "Slow (fs/32)"
529 static const struct soc_enum soft_mute
=
530 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 10, 2, soft_mute_text
);
532 static const char *mute_mode_text
[] = {
536 static const struct soc_enum mute_mode
=
537 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 9, 2, mute_mode_text
);
539 static const char *dac_deemphasis_text
[] = {
540 "Disabled", "32kHz", "44.1kHz", "48kHz"
543 static const struct soc_enum dac_deemphasis
=
544 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 1, 4, dac_deemphasis_text
);
546 static const char *companding_text
[] = {
550 static const struct soc_enum dac_companding
=
551 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 0, 2, companding_text
);
553 static const struct soc_enum adc_companding
=
554 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 2, 2, companding_text
);
556 static const char *input_mode_text
[] = {
557 "Single-Ended", "Differential Line", "Differential Mic"
560 static const struct soc_enum linput_mode_enum
=
561 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 0, 3, input_mode_text
);
563 static const struct soc_enum rinput_mode_enum
=
564 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 0, 3, input_mode_text
);
566 static const char *linput_mux_text
[] = {
567 "IN1L", "IN2L", "IN3L"
570 static const struct soc_enum linput_enum
=
571 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 2, 3, linput_mux_text
);
573 static const struct soc_enum linput_inv_enum
=
574 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 4, 3, linput_mux_text
);
576 static const char *rinput_mux_text
[] = {
577 "IN1R", "IN2R", "IN3R"
580 static const struct soc_enum rinput_enum
=
581 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 2, 3, rinput_mux_text
);
583 static const struct soc_enum rinput_inv_enum
=
584 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 4, 3, rinput_mux_text
);
587 static const char *sidetone_text
[] = {
588 "None", "Left", "Right"
591 static const struct soc_enum lsidetone_enum
=
592 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0
, 2, 3, sidetone_text
);
594 static const struct soc_enum rsidetone_enum
=
595 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0
, 0, 3, sidetone_text
);
597 static const struct snd_kcontrol_new wm8903_snd_controls
[] = {
599 /* Input PGAs - No TLV since the scale depends on PGA mode */
600 SOC_SINGLE("Left Input PGA Switch", WM8903_ANALOGUE_LEFT_INPUT_0
,
602 SOC_SINGLE("Left Input PGA Volume", WM8903_ANALOGUE_LEFT_INPUT_0
,
604 SOC_SINGLE("Left Input PGA Common Mode Switch", WM8903_ANALOGUE_LEFT_INPUT_1
,
607 SOC_SINGLE("Right Input PGA Switch", WM8903_ANALOGUE_RIGHT_INPUT_0
,
609 SOC_SINGLE("Right Input PGA Volume", WM8903_ANALOGUE_RIGHT_INPUT_0
,
611 SOC_SINGLE("Right Input PGA Common Mode Switch", WM8903_ANALOGUE_RIGHT_INPUT_1
,
615 SOC_SINGLE("DRC Switch", WM8903_DRC_0
, 15, 1, 0),
616 SOC_ENUM("DRC Compressor Slope R0", drc_slope_r0
),
617 SOC_ENUM("DRC Compressor Slope R1", drc_slope_r1
),
618 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8903_DRC_3
, 5, 124, 1,
620 SOC_SINGLE_TLV("DRC Volume", WM8903_DRC_3
, 0, 30, 1, drc_tlv_amp
),
621 SOC_SINGLE_TLV("DRC Minimum Gain Volume", WM8903_DRC_1
, 2, 3, 1, drc_tlv_min
),
622 SOC_SINGLE_TLV("DRC Maximum Gain Volume", WM8903_DRC_1
, 0, 3, 0, drc_tlv_max
),
623 SOC_ENUM("DRC Attack Rate", drc_attack
),
624 SOC_ENUM("DRC Decay Rate", drc_decay
),
625 SOC_ENUM("DRC FF Delay", drc_ff_delay
),
626 SOC_SINGLE("DRC Anticlip Switch", WM8903_DRC_0
, 1, 1, 0),
627 SOC_SINGLE("DRC QR Switch", WM8903_DRC_0
, 2, 1, 0),
628 SOC_SINGLE_TLV("DRC QR Threshold Volume", WM8903_DRC_0
, 6, 3, 0, drc_tlv_max
),
629 SOC_ENUM("DRC QR Decay Rate", drc_qr_decay
),
630 SOC_SINGLE("DRC Smoothing Switch", WM8903_DRC_0
, 3, 1, 0),
631 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8903_DRC_0
, 0, 1, 0),
632 SOC_ENUM("DRC Smoothing Threshold", drc_smoothing
),
633 SOC_SINGLE_TLV("DRC Startup Volume", WM8903_DRC_0
, 6, 18, 0, drc_tlv_startup
),
635 SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8903_ADC_DIGITAL_VOLUME_LEFT
,
636 WM8903_ADC_DIGITAL_VOLUME_RIGHT
, 1, 96, 0, digital_tlv
),
637 SOC_ENUM("ADC Companding Mode", adc_companding
),
638 SOC_SINGLE("ADC Companding Switch", WM8903_AUDIO_INTERFACE_0
, 3, 1, 0),
640 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8903_DAC_DIGITAL_0
, 4, 8,
641 12, 0, digital_sidetone_tlv
),
644 SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8903_DAC_DIGITAL_VOLUME_LEFT
,
645 WM8903_DAC_DIGITAL_VOLUME_RIGHT
, 1, 120, 0, digital_tlv
),
646 SOC_ENUM("DAC Soft Mute Rate", soft_mute
),
647 SOC_ENUM("DAC Mute Mode", mute_mode
),
648 SOC_SINGLE("DAC Mono Switch", WM8903_DAC_DIGITAL_1
, 12, 1, 0),
649 SOC_ENUM("DAC De-emphasis", dac_deemphasis
),
650 SOC_ENUM("DAC Companding Mode", dac_companding
),
651 SOC_SINGLE("DAC Companding Switch", WM8903_AUDIO_INTERFACE_0
, 1, 1, 0),
654 SOC_DOUBLE_R("Headphone Switch",
655 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
657 SOC_DOUBLE_R("Headphone ZC Switch",
658 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
660 SOC_DOUBLE_R_TLV("Headphone Volume",
661 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
665 SOC_DOUBLE_R("Line Out Switch",
666 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
668 SOC_DOUBLE_R("Line Out ZC Switch",
669 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
671 SOC_DOUBLE_R_TLV("Line Out Volume",
672 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
676 SOC_DOUBLE_R("Speaker Switch",
677 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
, 8, 1, 1),
678 SOC_DOUBLE_R("Speaker ZC Switch",
679 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
, 6, 1, 0),
680 SOC_DOUBLE_R_TLV("Speaker Volume",
681 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
,
685 static const struct snd_kcontrol_new linput_mode_mux
=
686 SOC_DAPM_ENUM("Left Input Mode Mux", linput_mode_enum
);
688 static const struct snd_kcontrol_new rinput_mode_mux
=
689 SOC_DAPM_ENUM("Right Input Mode Mux", rinput_mode_enum
);
691 static const struct snd_kcontrol_new linput_mux
=
692 SOC_DAPM_ENUM("Left Input Mux", linput_enum
);
694 static const struct snd_kcontrol_new linput_inv_mux
=
695 SOC_DAPM_ENUM("Left Inverting Input Mux", linput_inv_enum
);
697 static const struct snd_kcontrol_new rinput_mux
=
698 SOC_DAPM_ENUM("Right Input Mux", rinput_enum
);
700 static const struct snd_kcontrol_new rinput_inv_mux
=
701 SOC_DAPM_ENUM("Right Inverting Input Mux", rinput_inv_enum
);
703 static const struct snd_kcontrol_new lsidetone_mux
=
704 SOC_DAPM_ENUM("DACL Sidetone Mux", lsidetone_enum
);
706 static const struct snd_kcontrol_new rsidetone_mux
=
707 SOC_DAPM_ENUM("DACR Sidetone Mux", rsidetone_enum
);
709 static const struct snd_kcontrol_new left_output_mixer
[] = {
710 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 3, 1, 0),
711 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 2, 1, 0),
712 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 1, 1, 0),
713 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 0, 1, 0),
716 static const struct snd_kcontrol_new right_output_mixer
[] = {
717 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 3, 1, 0),
718 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 2, 1, 0),
719 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 1, 1, 0),
720 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 0, 1, 0),
723 static const struct snd_kcontrol_new left_speaker_mixer
[] = {
724 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 3, 1, 0),
725 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 2, 1, 0),
726 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 1, 1, 0),
727 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
,
731 static const struct snd_kcontrol_new right_speaker_mixer
[] = {
732 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
, 3, 1, 0),
733 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
, 2, 1, 0),
734 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
,
736 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
,
740 static const struct snd_soc_dapm_widget wm8903_dapm_widgets
[] = {
741 SND_SOC_DAPM_INPUT("IN1L"),
742 SND_SOC_DAPM_INPUT("IN1R"),
743 SND_SOC_DAPM_INPUT("IN2L"),
744 SND_SOC_DAPM_INPUT("IN2R"),
745 SND_SOC_DAPM_INPUT("IN3L"),
746 SND_SOC_DAPM_INPUT("IN3R"),
748 SND_SOC_DAPM_OUTPUT("HPOUTL"),
749 SND_SOC_DAPM_OUTPUT("HPOUTR"),
750 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
751 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
752 SND_SOC_DAPM_OUTPUT("LOP"),
753 SND_SOC_DAPM_OUTPUT("LON"),
754 SND_SOC_DAPM_OUTPUT("ROP"),
755 SND_SOC_DAPM_OUTPUT("RON"),
757 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8903_MIC_BIAS_CONTROL_0
, 0, 0),
759 SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM
, 0, 0, &linput_mux
),
760 SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM
, 0, 0,
762 SND_SOC_DAPM_MUX("Left Input Mode Mux", SND_SOC_NOPM
, 0, 0, &linput_mode_mux
),
764 SND_SOC_DAPM_MUX("Right Input Mux", SND_SOC_NOPM
, 0, 0, &rinput_mux
),
765 SND_SOC_DAPM_MUX("Right Input Inverting Mux", SND_SOC_NOPM
, 0, 0,
767 SND_SOC_DAPM_MUX("Right Input Mode Mux", SND_SOC_NOPM
, 0, 0, &rinput_mode_mux
),
769 SND_SOC_DAPM_PGA("Left Input PGA", WM8903_POWER_MANAGEMENT_0
, 1, 0, NULL
, 0),
770 SND_SOC_DAPM_PGA("Right Input PGA", WM8903_POWER_MANAGEMENT_0
, 0, 0, NULL
, 0),
772 SND_SOC_DAPM_ADC("ADCL", "Left HiFi Capture", WM8903_POWER_MANAGEMENT_6
, 1, 0),
773 SND_SOC_DAPM_ADC("ADCR", "Right HiFi Capture", WM8903_POWER_MANAGEMENT_6
, 0, 0),
775 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM
, 0, 0, &lsidetone_mux
),
776 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM
, 0, 0, &rsidetone_mux
),
778 SND_SOC_DAPM_DAC("DACL", "Left Playback", WM8903_POWER_MANAGEMENT_6
, 3, 0),
779 SND_SOC_DAPM_DAC("DACR", "Right Playback", WM8903_POWER_MANAGEMENT_6
, 2, 0),
781 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8903_POWER_MANAGEMENT_1
, 1, 0,
782 left_output_mixer
, ARRAY_SIZE(left_output_mixer
)),
783 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8903_POWER_MANAGEMENT_1
, 0, 0,
784 right_output_mixer
, ARRAY_SIZE(right_output_mixer
)),
786 SND_SOC_DAPM_MIXER("Left Speaker Mixer", WM8903_POWER_MANAGEMENT_4
, 1, 0,
787 left_speaker_mixer
, ARRAY_SIZE(left_speaker_mixer
)),
788 SND_SOC_DAPM_MIXER("Right Speaker Mixer", WM8903_POWER_MANAGEMENT_4
, 0, 0,
789 right_speaker_mixer
, ARRAY_SIZE(right_speaker_mixer
)),
791 SND_SOC_DAPM_PGA_E("Left Headphone Output PGA", WM8903_POWER_MANAGEMENT_2
,
792 1, 0, NULL
, 0, wm8903_output_event
,
793 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMU
|
794 SND_SOC_DAPM_PRE_PMD
),
795 SND_SOC_DAPM_PGA_E("Right Headphone Output PGA", WM8903_POWER_MANAGEMENT_2
,
796 0, 0, NULL
, 0, wm8903_output_event
,
797 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMU
|
798 SND_SOC_DAPM_PRE_PMD
),
800 SND_SOC_DAPM_PGA_E("Left Line Output PGA", WM8903_POWER_MANAGEMENT_3
, 1, 0,
801 NULL
, 0, wm8903_output_event
,
802 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMU
|
803 SND_SOC_DAPM_PRE_PMD
),
804 SND_SOC_DAPM_PGA_E("Right Line Output PGA", WM8903_POWER_MANAGEMENT_3
, 0, 0,
805 NULL
, 0, wm8903_output_event
,
806 SND_SOC_DAPM_PRE_PMU
| SND_SOC_DAPM_POST_PMU
|
807 SND_SOC_DAPM_PRE_PMD
),
809 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8903_POWER_MANAGEMENT_5
, 1, 0,
811 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5
, 0, 0,
814 SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0
, 0, 0,
815 wm8903_cp_event
, SND_SOC_DAPM_POST_PMU
),
816 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2
, 1, 0, NULL
, 0),
819 static const struct snd_soc_dapm_route intercon
[] = {
821 { "Left Input Mux", "IN1L", "IN1L" },
822 { "Left Input Mux", "IN2L", "IN2L" },
823 { "Left Input Mux", "IN3L", "IN3L" },
825 { "Left Input Inverting Mux", "IN1L", "IN1L" },
826 { "Left Input Inverting Mux", "IN2L", "IN2L" },
827 { "Left Input Inverting Mux", "IN3L", "IN3L" },
829 { "Right Input Mux", "IN1R", "IN1R" },
830 { "Right Input Mux", "IN2R", "IN2R" },
831 { "Right Input Mux", "IN3R", "IN3R" },
833 { "Right Input Inverting Mux", "IN1R", "IN1R" },
834 { "Right Input Inverting Mux", "IN2R", "IN2R" },
835 { "Right Input Inverting Mux", "IN3R", "IN3R" },
837 { "Left Input Mode Mux", "Single-Ended", "Left Input Inverting Mux" },
838 { "Left Input Mode Mux", "Differential Line",
840 { "Left Input Mode Mux", "Differential Line",
841 "Left Input Inverting Mux" },
842 { "Left Input Mode Mux", "Differential Mic",
844 { "Left Input Mode Mux", "Differential Mic",
845 "Left Input Inverting Mux" },
847 { "Right Input Mode Mux", "Single-Ended",
848 "Right Input Inverting Mux" },
849 { "Right Input Mode Mux", "Differential Line",
851 { "Right Input Mode Mux", "Differential Line",
852 "Right Input Inverting Mux" },
853 { "Right Input Mode Mux", "Differential Mic",
855 { "Right Input Mode Mux", "Differential Mic",
856 "Right Input Inverting Mux" },
858 { "Left Input PGA", NULL
, "Left Input Mode Mux" },
859 { "Right Input PGA", NULL
, "Right Input Mode Mux" },
861 { "ADCL", NULL
, "Left Input PGA" },
862 { "ADCL", NULL
, "CLK_DSP" },
863 { "ADCR", NULL
, "Right Input PGA" },
864 { "ADCR", NULL
, "CLK_DSP" },
866 { "DACL Sidetone", "Left", "ADCL" },
867 { "DACL Sidetone", "Right", "ADCR" },
868 { "DACR Sidetone", "Left", "ADCL" },
869 { "DACR Sidetone", "Right", "ADCR" },
871 { "DACL", NULL
, "DACL Sidetone" },
872 { "DACL", NULL
, "CLK_DSP" },
873 { "DACR", NULL
, "DACR Sidetone" },
874 { "DACR", NULL
, "CLK_DSP" },
876 { "Left Output Mixer", "Left Bypass Switch", "Left Input PGA" },
877 { "Left Output Mixer", "Right Bypass Switch", "Right Input PGA" },
878 { "Left Output Mixer", "DACL Switch", "DACL" },
879 { "Left Output Mixer", "DACR Switch", "DACR" },
881 { "Right Output Mixer", "Left Bypass Switch", "Left Input PGA" },
882 { "Right Output Mixer", "Right Bypass Switch", "Right Input PGA" },
883 { "Right Output Mixer", "DACL Switch", "DACL" },
884 { "Right Output Mixer", "DACR Switch", "DACR" },
886 { "Left Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
887 { "Left Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
888 { "Left Speaker Mixer", "DACL Switch", "DACL" },
889 { "Left Speaker Mixer", "DACR Switch", "DACR" },
891 { "Right Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
892 { "Right Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
893 { "Right Speaker Mixer", "DACL Switch", "DACL" },
894 { "Right Speaker Mixer", "DACR Switch", "DACR" },
896 { "Left Line Output PGA", NULL
, "Left Output Mixer" },
897 { "Right Line Output PGA", NULL
, "Right Output Mixer" },
899 { "Left Headphone Output PGA", NULL
, "Left Output Mixer" },
900 { "Right Headphone Output PGA", NULL
, "Right Output Mixer" },
902 { "Left Speaker PGA", NULL
, "Left Speaker Mixer" },
903 { "Right Speaker PGA", NULL
, "Right Speaker Mixer" },
905 { "HPOUTL", NULL
, "Left Headphone Output PGA" },
906 { "HPOUTR", NULL
, "Right Headphone Output PGA" },
908 { "LINEOUTL", NULL
, "Left Line Output PGA" },
909 { "LINEOUTR", NULL
, "Right Line Output PGA" },
911 { "LOP", NULL
, "Left Speaker PGA" },
912 { "LON", NULL
, "Left Speaker PGA" },
914 { "ROP", NULL
, "Right Speaker PGA" },
915 { "RON", NULL
, "Right Speaker PGA" },
917 { "Left Headphone Output PGA", NULL
, "Charge Pump" },
918 { "Right Headphone Output PGA", NULL
, "Charge Pump" },
919 { "Left Line Output PGA", NULL
, "Charge Pump" },
920 { "Right Line Output PGA", NULL
, "Charge Pump" },
923 static int wm8903_add_widgets(struct snd_soc_codec
*codec
)
925 struct snd_soc_dapm_context
*dapm
= &codec
->dapm
;
927 snd_soc_dapm_new_controls(dapm
, wm8903_dapm_widgets
,
928 ARRAY_SIZE(wm8903_dapm_widgets
));
929 snd_soc_dapm_add_routes(dapm
, intercon
, ARRAY_SIZE(intercon
));
934 static int wm8903_set_bias_level(struct snd_soc_codec
*codec
,
935 enum snd_soc_bias_level level
)
940 case SND_SOC_BIAS_ON
:
941 case SND_SOC_BIAS_PREPARE
:
942 reg
= snd_soc_read(codec
, WM8903_VMID_CONTROL_0
);
943 reg
&= ~(WM8903_VMID_RES_MASK
);
944 reg
|= WM8903_VMID_RES_50K
;
945 snd_soc_write(codec
, WM8903_VMID_CONTROL_0
, reg
);
948 case SND_SOC_BIAS_STANDBY
:
949 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_OFF
) {
950 snd_soc_write(codec
, WM8903_CLOCK_RATES_2
,
953 /* Change DC servo dither level in startup sequence */
954 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_0
, 0x11);
955 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_1
, 0x1257);
956 snd_soc_write(codec
, WM8903_WRITE_SEQUENCER_2
, 0x2);
958 wm8903_run_sequence(codec
, 0);
959 wm8903_sync_reg_cache(codec
, codec
->reg_cache
);
961 /* Enable low impedence charge pump output */
962 reg
= snd_soc_read(codec
,
963 WM8903_CONTROL_INTERFACE_TEST_1
);
964 snd_soc_write(codec
, WM8903_CONTROL_INTERFACE_TEST_1
,
965 reg
| WM8903_TEST_KEY
);
966 reg2
= snd_soc_read(codec
, WM8903_CHARGE_PUMP_TEST_1
);
967 snd_soc_write(codec
, WM8903_CHARGE_PUMP_TEST_1
,
968 reg2
| WM8903_CP_SW_KELVIN_MODE_MASK
);
969 snd_soc_write(codec
, WM8903_CONTROL_INTERFACE_TEST_1
,
972 /* By default no bypass paths are enabled so
973 * enable Class W support.
975 dev_dbg(codec
->dev
, "Enabling Class W\n");
976 snd_soc_write(codec
, WM8903_CLASS_W_0
, reg
|
977 WM8903_CP_DYN_FREQ
| WM8903_CP_DYN_V
);
980 reg
= snd_soc_read(codec
, WM8903_VMID_CONTROL_0
);
981 reg
&= ~(WM8903_VMID_RES_MASK
);
982 reg
|= WM8903_VMID_RES_250K
;
983 snd_soc_write(codec
, WM8903_VMID_CONTROL_0
, reg
);
986 case SND_SOC_BIAS_OFF
:
987 wm8903_run_sequence(codec
, 32);
988 reg
= snd_soc_read(codec
, WM8903_CLOCK_RATES_2
);
989 reg
&= ~WM8903_CLK_SYS_ENA
;
990 snd_soc_write(codec
, WM8903_CLOCK_RATES_2
, reg
);
994 codec
->dapm
.bias_level
= level
;
999 static int wm8903_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1000 int clk_id
, unsigned int freq
, int dir
)
1002 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1003 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1005 wm8903
->sysclk
= freq
;
1010 static int wm8903_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1013 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1014 u16 aif1
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_1
);
1016 aif1
&= ~(WM8903_LRCLK_DIR
| WM8903_BCLK_DIR
| WM8903_AIF_FMT_MASK
|
1017 WM8903_AIF_LRCLK_INV
| WM8903_AIF_BCLK_INV
);
1019 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1020 case SND_SOC_DAIFMT_CBS_CFS
:
1022 case SND_SOC_DAIFMT_CBS_CFM
:
1023 aif1
|= WM8903_LRCLK_DIR
;
1025 case SND_SOC_DAIFMT_CBM_CFM
:
1026 aif1
|= WM8903_LRCLK_DIR
| WM8903_BCLK_DIR
;
1028 case SND_SOC_DAIFMT_CBM_CFS
:
1029 aif1
|= WM8903_BCLK_DIR
;
1035 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1036 case SND_SOC_DAIFMT_DSP_A
:
1039 case SND_SOC_DAIFMT_DSP_B
:
1040 aif1
|= 0x3 | WM8903_AIF_LRCLK_INV
;
1042 case SND_SOC_DAIFMT_I2S
:
1045 case SND_SOC_DAIFMT_RIGHT_J
:
1048 case SND_SOC_DAIFMT_LEFT_J
:
1054 /* Clock inversion */
1055 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1056 case SND_SOC_DAIFMT_DSP_A
:
1057 case SND_SOC_DAIFMT_DSP_B
:
1058 /* frame inversion not valid for DSP modes */
1059 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1060 case SND_SOC_DAIFMT_NB_NF
:
1062 case SND_SOC_DAIFMT_IB_NF
:
1063 aif1
|= WM8903_AIF_BCLK_INV
;
1069 case SND_SOC_DAIFMT_I2S
:
1070 case SND_SOC_DAIFMT_RIGHT_J
:
1071 case SND_SOC_DAIFMT_LEFT_J
:
1072 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1073 case SND_SOC_DAIFMT_NB_NF
:
1075 case SND_SOC_DAIFMT_IB_IF
:
1076 aif1
|= WM8903_AIF_BCLK_INV
| WM8903_AIF_LRCLK_INV
;
1078 case SND_SOC_DAIFMT_IB_NF
:
1079 aif1
|= WM8903_AIF_BCLK_INV
;
1081 case SND_SOC_DAIFMT_NB_IF
:
1082 aif1
|= WM8903_AIF_LRCLK_INV
;
1092 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_1
, aif1
);
1097 static int wm8903_digital_mute(struct snd_soc_dai
*codec_dai
, int mute
)
1099 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1102 reg
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_1
);
1105 reg
|= WM8903_DAC_MUTE
;
1107 reg
&= ~WM8903_DAC_MUTE
;
1109 snd_soc_write(codec
, WM8903_DAC_DIGITAL_1
, reg
);
1114 /* Lookup table for CLK_SYS/fs ratio. 256fs or more is recommended
1115 * for optimal performance so we list the lower rates first and match
1116 * on the last match we find. */
1122 } clk_sys_ratios
[] = {
1123 { 64, 0x0, 0x0, 1 },
1124 { 68, 0x0, 0x1, 1 },
1125 { 125, 0x0, 0x2, 1 },
1126 { 128, 0x1, 0x0, 1 },
1127 { 136, 0x1, 0x1, 1 },
1128 { 192, 0x2, 0x0, 1 },
1129 { 204, 0x2, 0x1, 1 },
1131 { 64, 0x0, 0x0, 2 },
1132 { 68, 0x0, 0x1, 2 },
1133 { 125, 0x0, 0x2, 2 },
1134 { 128, 0x1, 0x0, 2 },
1135 { 136, 0x1, 0x1, 2 },
1136 { 192, 0x2, 0x0, 2 },
1137 { 204, 0x2, 0x1, 2 },
1139 { 250, 0x2, 0x2, 1 },
1140 { 256, 0x3, 0x0, 1 },
1141 { 272, 0x3, 0x1, 1 },
1142 { 384, 0x4, 0x0, 1 },
1143 { 408, 0x4, 0x1, 1 },
1144 { 375, 0x4, 0x2, 1 },
1145 { 512, 0x5, 0x0, 1 },
1146 { 544, 0x5, 0x1, 1 },
1147 { 500, 0x5, 0x2, 1 },
1148 { 768, 0x6, 0x0, 1 },
1149 { 816, 0x6, 0x1, 1 },
1150 { 750, 0x6, 0x2, 1 },
1151 { 1024, 0x7, 0x0, 1 },
1152 { 1088, 0x7, 0x1, 1 },
1153 { 1000, 0x7, 0x2, 1 },
1154 { 1408, 0x8, 0x0, 1 },
1155 { 1496, 0x8, 0x1, 1 },
1156 { 1536, 0x9, 0x0, 1 },
1157 { 1632, 0x9, 0x1, 1 },
1158 { 1500, 0x9, 0x2, 1 },
1160 { 250, 0x2, 0x2, 2 },
1161 { 256, 0x3, 0x0, 2 },
1162 { 272, 0x3, 0x1, 2 },
1163 { 384, 0x4, 0x0, 2 },
1164 { 408, 0x4, 0x1, 2 },
1165 { 375, 0x4, 0x2, 2 },
1166 { 512, 0x5, 0x0, 2 },
1167 { 544, 0x5, 0x1, 2 },
1168 { 500, 0x5, 0x2, 2 },
1169 { 768, 0x6, 0x0, 2 },
1170 { 816, 0x6, 0x1, 2 },
1171 { 750, 0x6, 0x2, 2 },
1172 { 1024, 0x7, 0x0, 2 },
1173 { 1088, 0x7, 0x1, 2 },
1174 { 1000, 0x7, 0x2, 2 },
1175 { 1408, 0x8, 0x0, 2 },
1176 { 1496, 0x8, 0x1, 2 },
1177 { 1536, 0x9, 0x0, 2 },
1178 { 1632, 0x9, 0x1, 2 },
1179 { 1500, 0x9, 0x2, 2 },
1182 /* CLK_SYS/BCLK ratios - multiplied by 10 due to .5s */
1206 /* Sample rates for DSP */
1210 } sample_rates
[] = {
1225 static int wm8903_startup(struct snd_pcm_substream
*substream
,
1226 struct snd_soc_dai
*dai
)
1228 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1229 struct snd_soc_codec
*codec
= rtd
->codec
;
1230 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1231 struct snd_pcm_runtime
*master_runtime
;
1233 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
1234 wm8903
->playback_active
++;
1236 wm8903
->capture_active
++;
1238 /* The DAI has shared clocks so if we already have a playback or
1239 * capture going then constrain this substream to match it.
1241 if (wm8903
->master_substream
) {
1242 master_runtime
= wm8903
->master_substream
->runtime
;
1244 dev_dbg(codec
->dev
, "Constraining to %d bits\n",
1245 master_runtime
->sample_bits
);
1247 snd_pcm_hw_constraint_minmax(substream
->runtime
,
1248 SNDRV_PCM_HW_PARAM_SAMPLE_BITS
,
1249 master_runtime
->sample_bits
,
1250 master_runtime
->sample_bits
);
1252 wm8903
->slave_substream
= substream
;
1254 wm8903
->master_substream
= substream
;
1259 static void wm8903_shutdown(struct snd_pcm_substream
*substream
,
1260 struct snd_soc_dai
*dai
)
1262 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1263 struct snd_soc_codec
*codec
= rtd
->codec
;
1264 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1266 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
1267 wm8903
->playback_active
--;
1269 wm8903
->capture_active
--;
1271 if (wm8903
->master_substream
== substream
)
1272 wm8903
->master_substream
= wm8903
->slave_substream
;
1274 wm8903
->slave_substream
= NULL
;
1277 static int wm8903_hw_params(struct snd_pcm_substream
*substream
,
1278 struct snd_pcm_hw_params
*params
,
1279 struct snd_soc_dai
*dai
)
1281 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1282 struct snd_soc_codec
*codec
=rtd
->codec
;
1283 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1284 int fs
= params_rate(params
);
1294 u16 aif1
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_1
);
1295 u16 aif2
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_2
);
1296 u16 aif3
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_3
);
1297 u16 clock0
= snd_soc_read(codec
, WM8903_CLOCK_RATES_0
);
1298 u16 clock1
= snd_soc_read(codec
, WM8903_CLOCK_RATES_1
);
1299 u16 dac_digital1
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_1
);
1301 if (substream
== wm8903
->slave_substream
) {
1302 dev_dbg(codec
->dev
, "Ignoring hw_params for slave substream\n");
1306 /* Enable sloping stopband filter for low sample rates */
1308 dac_digital1
|= WM8903_DAC_SB_FILT
;
1310 dac_digital1
&= ~WM8903_DAC_SB_FILT
;
1312 /* Configure sample rate logic for DSP - choose nearest rate */
1314 best_val
= abs(sample_rates
[dsp_config
].rate
- fs
);
1315 for (i
= 1; i
< ARRAY_SIZE(sample_rates
); i
++) {
1316 cur_val
= abs(sample_rates
[i
].rate
- fs
);
1317 if (cur_val
<= best_val
) {
1323 /* Constraints should stop us hitting this but let's make sure */
1324 if (wm8903
->capture_active
)
1325 switch (sample_rates
[dsp_config
].rate
) {
1328 dev_err(codec
->dev
, "%dHz unsupported by ADC\n",
1336 dev_dbg(codec
->dev
, "DSP fs = %dHz\n", sample_rates
[dsp_config
].rate
);
1337 clock1
&= ~WM8903_SAMPLE_RATE_MASK
;
1338 clock1
|= sample_rates
[dsp_config
].value
;
1340 aif1
&= ~WM8903_AIF_WL_MASK
;
1342 switch (params_format(params
)) {
1343 case SNDRV_PCM_FORMAT_S16_LE
:
1346 case SNDRV_PCM_FORMAT_S20_3LE
:
1350 case SNDRV_PCM_FORMAT_S24_LE
:
1354 case SNDRV_PCM_FORMAT_S32_LE
:
1362 dev_dbg(codec
->dev
, "MCLK = %dHz, target sample rate = %dHz\n",
1363 wm8903
->sysclk
, fs
);
1365 /* We may not have an MCLK which allows us to generate exactly
1366 * the clock we want, particularly with USB derived inputs, so
1370 best_val
= abs((wm8903
->sysclk
/
1371 (clk_sys_ratios
[0].mclk_div
*
1372 clk_sys_ratios
[0].div
)) - fs
);
1373 for (i
= 1; i
< ARRAY_SIZE(clk_sys_ratios
); i
++) {
1374 cur_val
= abs((wm8903
->sysclk
/
1375 (clk_sys_ratios
[i
].mclk_div
*
1376 clk_sys_ratios
[i
].div
)) - fs
);
1378 if (cur_val
<= best_val
) {
1384 if (clk_sys_ratios
[clk_config
].mclk_div
== 2) {
1385 clock0
|= WM8903_MCLKDIV2
;
1386 clk_sys
= wm8903
->sysclk
/ 2;
1388 clock0
&= ~WM8903_MCLKDIV2
;
1389 clk_sys
= wm8903
->sysclk
;
1392 clock1
&= ~(WM8903_CLK_SYS_RATE_MASK
|
1393 WM8903_CLK_SYS_MODE_MASK
);
1394 clock1
|= clk_sys_ratios
[clk_config
].rate
<< WM8903_CLK_SYS_RATE_SHIFT
;
1395 clock1
|= clk_sys_ratios
[clk_config
].mode
<< WM8903_CLK_SYS_MODE_SHIFT
;
1397 dev_dbg(codec
->dev
, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1398 clk_sys_ratios
[clk_config
].rate
,
1399 clk_sys_ratios
[clk_config
].mode
,
1400 clk_sys_ratios
[clk_config
].div
);
1402 dev_dbg(codec
->dev
, "Actual CLK_SYS = %dHz\n", clk_sys
);
1404 /* We may not get quite the right frequency if using
1405 * approximate clocks so look for the closest match that is
1406 * higher than the target (we need to ensure that there enough
1407 * BCLKs to clock out the samples).
1410 best_val
= ((clk_sys
* 10) / bclk_divs
[0].ratio
) - bclk
;
1412 while (i
< ARRAY_SIZE(bclk_divs
)) {
1413 cur_val
= ((clk_sys
* 10) / bclk_divs
[i
].ratio
) - bclk
;
1414 if (cur_val
< 0) /* BCLK table is sorted */
1421 aif2
&= ~WM8903_BCLK_DIV_MASK
;
1422 aif3
&= ~WM8903_LRCLK_RATE_MASK
;
1424 dev_dbg(codec
->dev
, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1425 bclk_divs
[bclk_div
].ratio
/ 10, bclk
,
1426 (clk_sys
* 10) / bclk_divs
[bclk_div
].ratio
);
1428 aif2
|= bclk_divs
[bclk_div
].div
;
1431 snd_soc_write(codec
, WM8903_CLOCK_RATES_0
, clock0
);
1432 snd_soc_write(codec
, WM8903_CLOCK_RATES_1
, clock1
);
1433 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_1
, aif1
);
1434 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_2
, aif2
);
1435 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_3
, aif3
);
1436 snd_soc_write(codec
, WM8903_DAC_DIGITAL_1
, dac_digital1
);
1442 * wm8903_mic_detect - Enable microphone detection via the WM8903 IRQ
1444 * @codec: WM8903 codec
1445 * @jack: jack to report detection events on
1446 * @det: value to report for presence detection
1447 * @shrt: value to report for short detection
1449 * Enable microphone detection via IRQ on the WM8903. If GPIOs are
1450 * being used to bring out signals to the processor then only platform
1451 * data configuration is needed for WM8903 and processor GPIOs should
1452 * be configured using snd_soc_jack_add_gpios() instead.
1454 * The current threasholds for detection should be configured using
1455 * micdet_cfg in the platform data. Using this function will force on
1456 * the microphone bias for the device.
1458 int wm8903_mic_detect(struct snd_soc_codec
*codec
, struct snd_soc_jack
*jack
,
1461 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1462 int irq_mask
= WM8903_MICDET_EINT
| WM8903_MICSHRT_EINT
;
1464 dev_dbg(codec
->dev
, "Enabling microphone detection: %x %x\n",
1467 /* Store the configuration */
1468 wm8903
->mic_jack
= jack
;
1469 wm8903
->mic_det
= det
;
1470 wm8903
->mic_short
= shrt
;
1472 /* Enable interrupts we've got a report configured for */
1474 irq_mask
&= ~WM8903_MICDET_EINT
;
1476 irq_mask
&= ~WM8903_MICSHRT_EINT
;
1478 snd_soc_update_bits(codec
, WM8903_INTERRUPT_STATUS_1_MASK
,
1479 WM8903_MICDET_EINT
| WM8903_MICSHRT_EINT
,
1483 /* Enable mic detection, this may not have been set through
1484 * platform data (eg, if the defaults are OK). */
1485 snd_soc_update_bits(codec
, WM8903_WRITE_SEQUENCER_0
,
1486 WM8903_WSEQ_ENA
, WM8903_WSEQ_ENA
);
1487 snd_soc_update_bits(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1488 WM8903_MICDET_ENA
, WM8903_MICDET_ENA
);
1490 snd_soc_update_bits(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1491 WM8903_MICDET_ENA
, 0);
1496 EXPORT_SYMBOL_GPL(wm8903_mic_detect
);
1498 static irqreturn_t
wm8903_irq(int irq
, void *data
)
1500 struct snd_soc_codec
*codec
= data
;
1501 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1505 int mask
= ~snd_soc_read(codec
, WM8903_INTERRUPT_STATUS_1_MASK
);
1507 int_val
= snd_soc_read(codec
, WM8903_INTERRUPT_STATUS_1
) & mask
;
1509 if (int_val
& WM8903_WSEQ_BUSY_EINT
) {
1510 dev_dbg(codec
->dev
, "Write sequencer done\n");
1511 complete(&wm8903
->wseq
);
1515 * The rest is microphone jack detection. We need to manually
1516 * invert the polarity of the interrupt after each event - to
1517 * simplify the code keep track of the last state we reported
1518 * and just invert the relevant bits in both the report and
1519 * the polarity register.
1521 mic_report
= wm8903
->mic_last_report
;
1522 int_pol
= snd_soc_read(codec
, WM8903_INTERRUPT_POLARITY_1
);
1524 if (int_val
& WM8903_MICSHRT_EINT
) {
1525 dev_dbg(codec
->dev
, "Microphone short (pol=%x)\n", int_pol
);
1527 mic_report
^= wm8903
->mic_short
;
1528 int_pol
^= WM8903_MICSHRT_INV
;
1531 if (int_val
& WM8903_MICDET_EINT
) {
1532 dev_dbg(codec
->dev
, "Microphone detect (pol=%x)\n", int_pol
);
1534 mic_report
^= wm8903
->mic_det
;
1535 int_pol
^= WM8903_MICDET_INV
;
1537 msleep(wm8903
->mic_delay
);
1540 snd_soc_update_bits(codec
, WM8903_INTERRUPT_POLARITY_1
,
1541 WM8903_MICSHRT_INV
| WM8903_MICDET_INV
, int_pol
);
1543 snd_soc_jack_report(wm8903
->mic_jack
, mic_report
,
1544 wm8903
->mic_short
| wm8903
->mic_det
);
1546 wm8903
->mic_last_report
= mic_report
;
1551 #define WM8903_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\
1552 SNDRV_PCM_RATE_11025 | \
1553 SNDRV_PCM_RATE_16000 | \
1554 SNDRV_PCM_RATE_22050 | \
1555 SNDRV_PCM_RATE_32000 | \
1556 SNDRV_PCM_RATE_44100 | \
1557 SNDRV_PCM_RATE_48000 | \
1558 SNDRV_PCM_RATE_88200 | \
1559 SNDRV_PCM_RATE_96000)
1561 #define WM8903_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
1562 SNDRV_PCM_RATE_11025 | \
1563 SNDRV_PCM_RATE_16000 | \
1564 SNDRV_PCM_RATE_22050 | \
1565 SNDRV_PCM_RATE_32000 | \
1566 SNDRV_PCM_RATE_44100 | \
1567 SNDRV_PCM_RATE_48000)
1569 #define WM8903_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1570 SNDRV_PCM_FMTBIT_S20_3LE |\
1571 SNDRV_PCM_FMTBIT_S24_LE)
1573 static struct snd_soc_dai_ops wm8903_dai_ops
= {
1574 .startup
= wm8903_startup
,
1575 .shutdown
= wm8903_shutdown
,
1576 .hw_params
= wm8903_hw_params
,
1577 .digital_mute
= wm8903_digital_mute
,
1578 .set_fmt
= wm8903_set_dai_fmt
,
1579 .set_sysclk
= wm8903_set_dai_sysclk
,
1582 static struct snd_soc_dai_driver wm8903_dai
= {
1583 .name
= "wm8903-hifi",
1585 .stream_name
= "Playback",
1588 .rates
= WM8903_PLAYBACK_RATES
,
1589 .formats
= WM8903_FORMATS
,
1592 .stream_name
= "Capture",
1595 .rates
= WM8903_CAPTURE_RATES
,
1596 .formats
= WM8903_FORMATS
,
1598 .ops
= &wm8903_dai_ops
,
1599 .symmetric_rates
= 1,
1602 static int wm8903_suspend(struct snd_soc_codec
*codec
, pm_message_t state
)
1604 wm8903_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1609 static int wm8903_resume(struct snd_soc_codec
*codec
)
1612 u16
*reg_cache
= codec
->reg_cache
;
1613 u16
*tmp_cache
= kmemdup(reg_cache
, sizeof(wm8903_reg_defaults
),
1616 /* Bring the codec back up to standby first to minimise pop/clicks */
1617 wm8903_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1619 /* Sync back everything else */
1621 for (i
= 2; i
< ARRAY_SIZE(wm8903_reg_defaults
); i
++)
1622 if (tmp_cache
[i
] != reg_cache
[i
])
1623 snd_soc_write(codec
, i
, tmp_cache
[i
]);
1626 dev_err(codec
->dev
, "Failed to allocate temporary cache\n");
1632 static int wm8903_probe(struct snd_soc_codec
*codec
)
1634 struct wm8903_platform_data
*pdata
= dev_get_platdata(codec
->dev
);
1635 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1637 int trigger
, irq_pol
;
1640 init_completion(&wm8903
->wseq
);
1642 ret
= snd_soc_codec_set_cache_io(codec
, 8, 16, SND_SOC_I2C
);
1644 dev_err(codec
->dev
, "Failed to set cache I/O: %d\n", ret
);
1648 val
= snd_soc_read(codec
, WM8903_SW_RESET_AND_ID
);
1649 if (val
!= wm8903_reg_defaults
[WM8903_SW_RESET_AND_ID
]) {
1651 "Device with ID register %x is not a WM8903\n", val
);
1655 val
= snd_soc_read(codec
, WM8903_REVISION_NUMBER
);
1656 dev_info(codec
->dev
, "WM8903 revision %d\n",
1657 val
& WM8903_CHIP_REV_MASK
);
1659 wm8903_reset(codec
);
1661 /* Set up GPIOs and microphone detection */
1663 for (i
= 0; i
< ARRAY_SIZE(pdata
->gpio_cfg
); i
++) {
1664 if (!pdata
->gpio_cfg
[i
])
1667 snd_soc_write(codec
, WM8903_GPIO_CONTROL_1
+ i
,
1668 pdata
->gpio_cfg
[i
] & 0xffff);
1671 snd_soc_write(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1674 /* Microphone detection needs the WSEQ clock */
1675 if (pdata
->micdet_cfg
)
1676 snd_soc_update_bits(codec
, WM8903_WRITE_SEQUENCER_0
,
1677 WM8903_WSEQ_ENA
, WM8903_WSEQ_ENA
);
1679 wm8903
->mic_delay
= pdata
->micdet_delay
;
1683 if (pdata
&& pdata
->irq_active_low
) {
1684 trigger
= IRQF_TRIGGER_LOW
;
1685 irq_pol
= WM8903_IRQ_POL
;
1687 trigger
= IRQF_TRIGGER_HIGH
;
1691 snd_soc_update_bits(codec
, WM8903_INTERRUPT_CONTROL
,
1692 WM8903_IRQ_POL
, irq_pol
);
1694 ret
= request_threaded_irq(wm8903
->irq
, NULL
, wm8903_irq
,
1695 trigger
| IRQF_ONESHOT
,
1698 dev_err(codec
->dev
, "Failed to request IRQ: %d\n",
1703 /* Enable write sequencer interrupts */
1704 snd_soc_update_bits(codec
, WM8903_INTERRUPT_STATUS_1_MASK
,
1705 WM8903_IM_WSEQ_BUSY_EINT
, 0);
1708 /* power on device */
1709 wm8903_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1711 /* Latch volume update bits */
1712 val
= snd_soc_read(codec
, WM8903_ADC_DIGITAL_VOLUME_LEFT
);
1713 val
|= WM8903_ADCVU
;
1714 snd_soc_write(codec
, WM8903_ADC_DIGITAL_VOLUME_LEFT
, val
);
1715 snd_soc_write(codec
, WM8903_ADC_DIGITAL_VOLUME_RIGHT
, val
);
1717 val
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_VOLUME_LEFT
);
1718 val
|= WM8903_DACVU
;
1719 snd_soc_write(codec
, WM8903_DAC_DIGITAL_VOLUME_LEFT
, val
);
1720 snd_soc_write(codec
, WM8903_DAC_DIGITAL_VOLUME_RIGHT
, val
);
1722 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT1_LEFT
);
1723 val
|= WM8903_HPOUTVU
;
1724 snd_soc_write(codec
, WM8903_ANALOGUE_OUT1_LEFT
, val
);
1725 snd_soc_write(codec
, WM8903_ANALOGUE_OUT1_RIGHT
, val
);
1727 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT2_LEFT
);
1728 val
|= WM8903_LINEOUTVU
;
1729 snd_soc_write(codec
, WM8903_ANALOGUE_OUT2_LEFT
, val
);
1730 snd_soc_write(codec
, WM8903_ANALOGUE_OUT2_RIGHT
, val
);
1732 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT3_LEFT
);
1733 val
|= WM8903_SPKVU
;
1734 snd_soc_write(codec
, WM8903_ANALOGUE_OUT3_LEFT
, val
);
1735 snd_soc_write(codec
, WM8903_ANALOGUE_OUT3_RIGHT
, val
);
1737 /* Enable DAC soft mute by default */
1738 val
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_1
);
1739 val
|= WM8903_DAC_MUTEMODE
;
1740 snd_soc_write(codec
, WM8903_DAC_DIGITAL_1
, val
);
1742 snd_soc_add_controls(codec
, wm8903_snd_controls
,
1743 ARRAY_SIZE(wm8903_snd_controls
));
1744 wm8903_add_widgets(codec
);
1749 /* power down chip */
1750 static int wm8903_remove(struct snd_soc_codec
*codec
)
1752 wm8903_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1756 static struct snd_soc_codec_driver soc_codec_dev_wm8903
= {
1757 .probe
= wm8903_probe
,
1758 .remove
= wm8903_remove
,
1759 .suspend
= wm8903_suspend
,
1760 .resume
= wm8903_resume
,
1761 .set_bias_level
= wm8903_set_bias_level
,
1762 .reg_cache_size
= ARRAY_SIZE(wm8903_reg_defaults
),
1763 .reg_word_size
= sizeof(u16
),
1764 .reg_cache_default
= wm8903_reg_defaults
,
1765 .volatile_register
= wm8903_volatile_register
,
1768 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1769 static __devinit
int wm8903_i2c_probe(struct i2c_client
*i2c
,
1770 const struct i2c_device_id
*id
)
1772 struct wm8903_priv
*wm8903
;
1775 wm8903
= kzalloc(sizeof(struct wm8903_priv
), GFP_KERNEL
);
1779 i2c_set_clientdata(i2c
, wm8903
);
1780 wm8903
->irq
= i2c
->irq
;
1782 ret
= snd_soc_register_codec(&i2c
->dev
,
1783 &soc_codec_dev_wm8903
, &wm8903_dai
, 1);
1789 static __devexit
int wm8903_i2c_remove(struct i2c_client
*client
)
1791 snd_soc_unregister_codec(&client
->dev
);
1792 kfree(i2c_get_clientdata(client
));
1796 static const struct i2c_device_id wm8903_i2c_id
[] = {
1800 MODULE_DEVICE_TABLE(i2c
, wm8903_i2c_id
);
1802 static struct i2c_driver wm8903_i2c_driver
= {
1804 .name
= "wm8903-codec",
1805 .owner
= THIS_MODULE
,
1807 .probe
= wm8903_i2c_probe
,
1808 .remove
= __devexit_p(wm8903_i2c_remove
),
1809 .id_table
= wm8903_i2c_id
,
1813 static int __init
wm8903_modinit(void)
1816 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1817 ret
= i2c_add_driver(&wm8903_i2c_driver
);
1819 printk(KERN_ERR
"Failed to register wm8903 I2C driver: %d\n",
1825 module_init(wm8903_modinit
);
1827 static void __exit
wm8903_exit(void)
1829 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1830 i2c_del_driver(&wm8903_i2c_driver
);
1833 module_exit(wm8903_exit
);
1835 MODULE_DESCRIPTION("ASoC WM8903 driver");
1836 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.cm>");
1837 MODULE_LICENSE("GPL");