2 * wm8903.c -- WM8903 ALSA SoC Audio driver
4 * Copyright 2008 Wolfson Microelectronics
5 * Copyright 2011 NVIDIA, Inc.
7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 * - TDM mode configuration.
15 * - Digital microphone support.
18 #include <linux/module.h>
19 #include <linux/moduleparam.h>
20 #include <linux/init.h>
21 #include <linux/completion.h>
22 #include <linux/delay.h>
23 #include <linux/gpio.h>
25 #include <linux/i2c.h>
26 #include <linux/slab.h>
27 #include <sound/core.h>
28 #include <sound/jack.h>
29 #include <sound/pcm.h>
30 #include <sound/pcm_params.h>
31 #include <sound/tlv.h>
32 #include <sound/soc.h>
33 #include <sound/initval.h>
34 #include <sound/wm8903.h>
35 #include <trace/events/asoc.h>
39 /* Register defaults at reset */
40 static u16 wm8903_reg_defaults
[] = {
41 0x8903, /* R0 - SW Reset and ID */
42 0x0000, /* R1 - Revision Number */
45 0x0018, /* R4 - Bias Control 0 */
46 0x0000, /* R5 - VMID Control 0 */
47 0x0000, /* R6 - Mic Bias Control 0 */
49 0x0001, /* R8 - Analogue DAC 0 */
51 0x0001, /* R10 - Analogue ADC 0 */
53 0x0000, /* R12 - Power Management 0 */
54 0x0000, /* R13 - Power Management 1 */
55 0x0000, /* R14 - Power Management 2 */
56 0x0000, /* R15 - Power Management 3 */
57 0x0000, /* R16 - Power Management 4 */
58 0x0000, /* R17 - Power Management 5 */
59 0x0000, /* R18 - Power Management 6 */
61 0x0400, /* R20 - Clock Rates 0 */
62 0x0D07, /* R21 - Clock Rates 1 */
63 0x0000, /* R22 - Clock Rates 2 */
65 0x0050, /* R24 - Audio Interface 0 */
66 0x0242, /* R25 - Audio Interface 1 */
67 0x0008, /* R26 - Audio Interface 2 */
68 0x0022, /* R27 - Audio Interface 3 */
71 0x00C0, /* R30 - DAC Digital Volume Left */
72 0x00C0, /* R31 - DAC Digital Volume Right */
73 0x0000, /* R32 - DAC Digital 0 */
74 0x0000, /* R33 - DAC Digital 1 */
77 0x00C0, /* R36 - ADC Digital Volume Left */
78 0x00C0, /* R37 - ADC Digital Volume Right */
79 0x0000, /* R38 - ADC Digital 0 */
80 0x0073, /* R39 - Digital Microphone 0 */
81 0x09BF, /* R40 - DRC 0 */
82 0x3241, /* R41 - DRC 1 */
83 0x0020, /* R42 - DRC 2 */
84 0x0000, /* R43 - DRC 3 */
85 0x0085, /* R44 - Analogue Left Input 0 */
86 0x0085, /* R45 - Analogue Right Input 0 */
87 0x0044, /* R46 - Analogue Left Input 1 */
88 0x0044, /* R47 - Analogue Right Input 1 */
91 0x0008, /* R50 - Analogue Left Mix 0 */
92 0x0004, /* R51 - Analogue Right Mix 0 */
93 0x0000, /* R52 - Analogue Spk Mix Left 0 */
94 0x0000, /* R53 - Analogue Spk Mix Left 1 */
95 0x0000, /* R54 - Analogue Spk Mix Right 0 */
96 0x0000, /* R55 - Analogue Spk Mix Right 1 */
98 0x002D, /* R57 - Analogue OUT1 Left */
99 0x002D, /* R58 - Analogue OUT1 Right */
100 0x0039, /* R59 - Analogue OUT2 Left */
101 0x0039, /* R60 - Analogue OUT2 Right */
103 0x0139, /* R62 - Analogue OUT3 Left */
104 0x0139, /* R63 - Analogue OUT3 Right */
106 0x0000, /* R65 - Analogue SPK Output Control 0 */
108 0x0010, /* R67 - DC Servo 0 */
110 0x00A4, /* R69 - DC Servo 2 */
131 0x0000, /* R90 - Analogue HP 0 */
135 0x0000, /* R94 - Analogue Lineout 0 */
139 0x0000, /* R98 - Charge Pump 0 */
145 0x0000, /* R104 - Class W 0 */
149 0x0000, /* R108 - Write Sequencer 0 */
150 0x0000, /* R109 - Write Sequencer 1 */
151 0x0000, /* R110 - Write Sequencer 2 */
152 0x0000, /* R111 - Write Sequencer 3 */
153 0x0000, /* R112 - Write Sequencer 4 */
155 0x0000, /* R114 - Control Interface */
157 0x00A8, /* R116 - GPIO Control 1 */
158 0x00A8, /* R117 - GPIO Control 2 */
159 0x00A8, /* R118 - GPIO Control 3 */
160 0x0220, /* R119 - GPIO Control 4 */
161 0x01A0, /* R120 - GPIO Control 5 */
162 0x0000, /* R121 - Interrupt Status 1 */
163 0xFFFF, /* R122 - Interrupt Status 1 Mask */
164 0x0000, /* R123 - Interrupt Polarity 1 */
167 0x0000, /* R126 - Interrupt Control */
170 0x0000, /* R129 - Control Interface Test 1 */
190 0x6810, /* R149 - Charge Pump Test 1 */
205 0x0028, /* R164 - Clock Rate Test 4 */
213 0x0000, /* R172 - Analogue Output Bias 0 */
217 struct snd_soc_codec
*codec
;
228 /* Reference count */
231 struct snd_soc_jack
*mic_jack
;
237 #ifdef CONFIG_GPIOLIB
238 struct gpio_chip gpio_chip
;
242 static int wm8903_volatile_register(struct snd_soc_codec
*codec
, unsigned int reg
)
245 case WM8903_SW_RESET_AND_ID
:
246 case WM8903_REVISION_NUMBER
:
247 case WM8903_INTERRUPT_STATUS_1
:
248 case WM8903_WRITE_SEQUENCER_4
:
249 case WM8903_DC_SERVO_READBACK_1
:
250 case WM8903_DC_SERVO_READBACK_2
:
251 case WM8903_DC_SERVO_READBACK_3
:
252 case WM8903_DC_SERVO_READBACK_4
:
260 static void wm8903_reset(struct snd_soc_codec
*codec
)
262 snd_soc_write(codec
, WM8903_SW_RESET_AND_ID
, 0);
265 static int wm8903_cp_event(struct snd_soc_dapm_widget
*w
,
266 struct snd_kcontrol
*kcontrol
, int event
)
268 WARN_ON(event
!= SND_SOC_DAPM_POST_PMU
);
274 static int wm8903_dcs_event(struct snd_soc_dapm_widget
*w
,
275 struct snd_kcontrol
*kcontrol
, int event
)
277 struct snd_soc_codec
*codec
= w
->codec
;
278 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
281 case SND_SOC_DAPM_POST_PMU
:
282 wm8903
->dcs_pending
|= 1 << w
->shift
;
284 case SND_SOC_DAPM_PRE_PMD
:
285 snd_soc_update_bits(codec
, WM8903_DC_SERVO_0
,
293 #define WM8903_DCS_MODE_WRITE_STOP 0
294 #define WM8903_DCS_MODE_START_STOP 2
296 static void wm8903_seq_notifier(struct snd_soc_dapm_context
*dapm
,
297 enum snd_soc_dapm_type event
, int subseq
)
299 struct snd_soc_codec
*codec
= container_of(dapm
,
300 struct snd_soc_codec
, dapm
);
301 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
302 int dcs_mode
= WM8903_DCS_MODE_WRITE_STOP
;
305 /* Complete any pending DC servo starts */
306 if (wm8903
->dcs_pending
) {
307 dev_dbg(codec
->dev
, "Starting DC servo for %x\n",
308 wm8903
->dcs_pending
);
310 /* If we've no cached values then we need to do startup */
311 for (i
= 0; i
< ARRAY_SIZE(wm8903
->dcs_cache
); i
++) {
312 if (!(wm8903
->dcs_pending
& (1 << i
)))
315 if (wm8903
->dcs_cache
[i
]) {
317 "Restore DC servo %d value %x\n",
318 3 - i
, wm8903
->dcs_cache
[i
]);
320 snd_soc_write(codec
, WM8903_DC_SERVO_4
+ i
,
321 wm8903
->dcs_cache
[i
] & 0xff);
324 "Calibrate DC servo %d\n", 3 - i
);
325 dcs_mode
= WM8903_DCS_MODE_START_STOP
;
329 /* Don't trust the cache for analogue */
330 if (wm8903
->class_w_users
)
331 dcs_mode
= WM8903_DCS_MODE_START_STOP
;
333 snd_soc_update_bits(codec
, WM8903_DC_SERVO_2
,
334 WM8903_DCS_MODE_MASK
, dcs_mode
);
336 snd_soc_update_bits(codec
, WM8903_DC_SERVO_0
,
337 WM8903_DCS_ENA_MASK
, wm8903
->dcs_pending
);
340 case WM8903_DCS_MODE_WRITE_STOP
:
343 case WM8903_DCS_MODE_START_STOP
:
346 /* Cache the measured offsets for digital */
347 if (wm8903
->class_w_users
)
350 for (i
= 0; i
< ARRAY_SIZE(wm8903
->dcs_cache
); i
++) {
351 if (!(wm8903
->dcs_pending
& (1 << i
)))
354 val
= snd_soc_read(codec
,
355 WM8903_DC_SERVO_READBACK_1
+ i
);
356 dev_dbg(codec
->dev
, "DC servo %d: %x\n",
358 wm8903
->dcs_cache
[i
] = val
;
363 pr_warn("DCS mode %d delay not set\n", dcs_mode
);
367 wm8903
->dcs_pending
= 0;
372 * When used with DAC outputs only the WM8903 charge pump supports
373 * operation in class W mode, providing very low power consumption
374 * when used with digital sources. Enable and disable this mode
375 * automatically depending on the mixer configuration.
377 * All the relevant controls are simple switches.
379 static int wm8903_class_w_put(struct snd_kcontrol
*kcontrol
,
380 struct snd_ctl_elem_value
*ucontrol
)
382 struct snd_soc_dapm_widget_list
*wlist
= snd_kcontrol_chip(kcontrol
);
383 struct snd_soc_dapm_widget
*widget
= wlist
->widgets
[0];
384 struct snd_soc_codec
*codec
= widget
->codec
;
385 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
389 reg
= snd_soc_read(codec
, WM8903_CLASS_W_0
);
391 /* Turn it off if we're about to enable bypass */
392 if (ucontrol
->value
.integer
.value
[0]) {
393 if (wm8903
->class_w_users
== 0) {
394 dev_dbg(codec
->dev
, "Disabling Class W\n");
395 snd_soc_write(codec
, WM8903_CLASS_W_0
, reg
&
396 ~(WM8903_CP_DYN_FREQ
| WM8903_CP_DYN_V
));
398 wm8903
->class_w_users
++;
401 /* Implement the change */
402 ret
= snd_soc_dapm_put_volsw(kcontrol
, ucontrol
);
404 /* If we've just disabled the last bypass path turn Class W on */
405 if (!ucontrol
->value
.integer
.value
[0]) {
406 if (wm8903
->class_w_users
== 1) {
407 dev_dbg(codec
->dev
, "Enabling Class W\n");
408 snd_soc_write(codec
, WM8903_CLASS_W_0
, reg
|
409 WM8903_CP_DYN_FREQ
| WM8903_CP_DYN_V
);
411 wm8903
->class_w_users
--;
414 dev_dbg(codec
->dev
, "Bypass use count now %d\n",
415 wm8903
->class_w_users
);
420 #define SOC_DAPM_SINGLE_W(xname, reg, shift, max, invert) \
421 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \
422 .info = snd_soc_info_volsw, \
423 .get = snd_soc_dapm_get_volsw, .put = wm8903_class_w_put, \
424 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
427 static int wm8903_deemph
[] = { 0, 32000, 44100, 48000 };
429 static int wm8903_set_deemph(struct snd_soc_codec
*codec
)
431 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
434 /* If we're using deemphasis select the nearest available sample
437 if (wm8903
->deemph
) {
439 for (i
= 2; i
< ARRAY_SIZE(wm8903_deemph
); i
++) {
440 if (abs(wm8903_deemph
[i
] - wm8903
->fs
) <
441 abs(wm8903_deemph
[best
] - wm8903
->fs
))
445 val
= best
<< WM8903_DEEMPH_SHIFT
;
451 dev_dbg(codec
->dev
, "Set deemphasis %d (%dHz)\n",
452 best
, wm8903_deemph
[best
]);
454 return snd_soc_update_bits(codec
, WM8903_DAC_DIGITAL_1
,
455 WM8903_DEEMPH_MASK
, val
);
458 static int wm8903_get_deemph(struct snd_kcontrol
*kcontrol
,
459 struct snd_ctl_elem_value
*ucontrol
)
461 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
462 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
464 ucontrol
->value
.enumerated
.item
[0] = wm8903
->deemph
;
469 static int wm8903_put_deemph(struct snd_kcontrol
*kcontrol
,
470 struct snd_ctl_elem_value
*ucontrol
)
472 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
473 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
474 int deemph
= ucontrol
->value
.enumerated
.item
[0];
480 mutex_lock(&codec
->mutex
);
481 if (wm8903
->deemph
!= deemph
) {
482 wm8903
->deemph
= deemph
;
484 wm8903_set_deemph(codec
);
488 mutex_unlock(&codec
->mutex
);
493 /* ALSA can only do steps of .01dB */
494 static const DECLARE_TLV_DB_SCALE(digital_tlv
, -7200, 75, 1);
496 static const DECLARE_TLV_DB_SCALE(digital_sidetone_tlv
, -3600, 300, 0);
497 static const DECLARE_TLV_DB_SCALE(out_tlv
, -5700, 100, 0);
499 static const DECLARE_TLV_DB_SCALE(drc_tlv_thresh
, 0, 75, 0);
500 static const DECLARE_TLV_DB_SCALE(drc_tlv_amp
, -2250, 75, 0);
501 static const DECLARE_TLV_DB_SCALE(drc_tlv_min
, 0, 600, 0);
502 static const DECLARE_TLV_DB_SCALE(drc_tlv_max
, 1200, 600, 0);
503 static const DECLARE_TLV_DB_SCALE(drc_tlv_startup
, -300, 50, 0);
505 static const char *hpf_mode_text
[] = {
506 "Hi-fi", "Voice 1", "Voice 2", "Voice 3"
509 static const struct soc_enum hpf_mode
=
510 SOC_ENUM_SINGLE(WM8903_ADC_DIGITAL_0
, 5, 4, hpf_mode_text
);
512 static const char *osr_text
[] = {
513 "Low power", "High performance"
516 static const struct soc_enum adc_osr
=
517 SOC_ENUM_SINGLE(WM8903_ANALOGUE_ADC_0
, 0, 2, osr_text
);
519 static const struct soc_enum dac_osr
=
520 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 0, 2, osr_text
);
522 static const char *drc_slope_text
[] = {
523 "1", "1/2", "1/4", "1/8", "1/16", "0"
526 static const struct soc_enum drc_slope_r0
=
527 SOC_ENUM_SINGLE(WM8903_DRC_2
, 3, 6, drc_slope_text
);
529 static const struct soc_enum drc_slope_r1
=
530 SOC_ENUM_SINGLE(WM8903_DRC_2
, 0, 6, drc_slope_text
);
532 static const char *drc_attack_text
[] = {
534 "363us", "762us", "1.45ms", "2.9ms", "5.8ms", "11.6ms", "23.2ms",
535 "46.4ms", "92.8ms", "185.6ms"
538 static const struct soc_enum drc_attack
=
539 SOC_ENUM_SINGLE(WM8903_DRC_1
, 12, 11, drc_attack_text
);
541 static const char *drc_decay_text
[] = {
542 "186ms", "372ms", "743ms", "1.49s", "2.97s", "5.94s", "11.89s",
546 static const struct soc_enum drc_decay
=
547 SOC_ENUM_SINGLE(WM8903_DRC_1
, 8, 9, drc_decay_text
);
549 static const char *drc_ff_delay_text
[] = {
550 "5 samples", "9 samples"
553 static const struct soc_enum drc_ff_delay
=
554 SOC_ENUM_SINGLE(WM8903_DRC_0
, 5, 2, drc_ff_delay_text
);
556 static const char *drc_qr_decay_text
[] = {
557 "0.725ms", "1.45ms", "5.8ms"
560 static const struct soc_enum drc_qr_decay
=
561 SOC_ENUM_SINGLE(WM8903_DRC_1
, 4, 3, drc_qr_decay_text
);
563 static const char *drc_smoothing_text
[] = {
564 "Low", "Medium", "High"
567 static const struct soc_enum drc_smoothing
=
568 SOC_ENUM_SINGLE(WM8903_DRC_0
, 11, 3, drc_smoothing_text
);
570 static const char *soft_mute_text
[] = {
571 "Fast (fs/2)", "Slow (fs/32)"
574 static const struct soc_enum soft_mute
=
575 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 10, 2, soft_mute_text
);
577 static const char *mute_mode_text
[] = {
581 static const struct soc_enum mute_mode
=
582 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_1
, 9, 2, mute_mode_text
);
584 static const char *companding_text
[] = {
588 static const struct soc_enum dac_companding
=
589 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 0, 2, companding_text
);
591 static const struct soc_enum adc_companding
=
592 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 2, 2, companding_text
);
594 static const char *input_mode_text
[] = {
595 "Single-Ended", "Differential Line", "Differential Mic"
598 static const struct soc_enum linput_mode_enum
=
599 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 0, 3, input_mode_text
);
601 static const struct soc_enum rinput_mode_enum
=
602 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 0, 3, input_mode_text
);
604 static const char *linput_mux_text
[] = {
605 "IN1L", "IN2L", "IN3L"
608 static const struct soc_enum linput_enum
=
609 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 2, 3, linput_mux_text
);
611 static const struct soc_enum linput_inv_enum
=
612 SOC_ENUM_SINGLE(WM8903_ANALOGUE_LEFT_INPUT_1
, 4, 3, linput_mux_text
);
614 static const char *rinput_mux_text
[] = {
615 "IN1R", "IN2R", "IN3R"
618 static const struct soc_enum rinput_enum
=
619 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 2, 3, rinput_mux_text
);
621 static const struct soc_enum rinput_inv_enum
=
622 SOC_ENUM_SINGLE(WM8903_ANALOGUE_RIGHT_INPUT_1
, 4, 3, rinput_mux_text
);
625 static const char *sidetone_text
[] = {
626 "None", "Left", "Right"
629 static const struct soc_enum lsidetone_enum
=
630 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0
, 2, 3, sidetone_text
);
632 static const struct soc_enum rsidetone_enum
=
633 SOC_ENUM_SINGLE(WM8903_DAC_DIGITAL_0
, 0, 3, sidetone_text
);
635 static const char *adcinput_text
[] = {
639 static const struct soc_enum adcinput_enum
=
640 SOC_ENUM_SINGLE(WM8903_CLOCK_RATE_TEST_4
, 9, 2, adcinput_text
);
642 static const char *aif_text
[] = {
646 static const struct soc_enum lcapture_enum
=
647 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 7, 2, aif_text
);
649 static const struct soc_enum rcapture_enum
=
650 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 6, 2, aif_text
);
652 static const struct soc_enum lplay_enum
=
653 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 5, 2, aif_text
);
655 static const struct soc_enum rplay_enum
=
656 SOC_ENUM_SINGLE(WM8903_AUDIO_INTERFACE_0
, 4, 2, aif_text
);
658 static const struct snd_kcontrol_new wm8903_snd_controls
[] = {
660 /* Input PGAs - No TLV since the scale depends on PGA mode */
661 SOC_SINGLE("Left Input PGA Switch", WM8903_ANALOGUE_LEFT_INPUT_0
,
663 SOC_SINGLE("Left Input PGA Volume", WM8903_ANALOGUE_LEFT_INPUT_0
,
665 SOC_SINGLE("Left Input PGA Common Mode Switch", WM8903_ANALOGUE_LEFT_INPUT_1
,
668 SOC_SINGLE("Right Input PGA Switch", WM8903_ANALOGUE_RIGHT_INPUT_0
,
670 SOC_SINGLE("Right Input PGA Volume", WM8903_ANALOGUE_RIGHT_INPUT_0
,
672 SOC_SINGLE("Right Input PGA Common Mode Switch", WM8903_ANALOGUE_RIGHT_INPUT_1
,
676 SOC_ENUM("ADC OSR", adc_osr
),
677 SOC_SINGLE("HPF Switch", WM8903_ADC_DIGITAL_0
, 4, 1, 0),
678 SOC_ENUM("HPF Mode", hpf_mode
),
679 SOC_SINGLE("DRC Switch", WM8903_DRC_0
, 15, 1, 0),
680 SOC_ENUM("DRC Compressor Slope R0", drc_slope_r0
),
681 SOC_ENUM("DRC Compressor Slope R1", drc_slope_r1
),
682 SOC_SINGLE_TLV("DRC Compressor Threshold Volume", WM8903_DRC_3
, 5, 124, 1,
684 SOC_SINGLE_TLV("DRC Volume", WM8903_DRC_3
, 0, 30, 1, drc_tlv_amp
),
685 SOC_SINGLE_TLV("DRC Minimum Gain Volume", WM8903_DRC_1
, 2, 3, 1, drc_tlv_min
),
686 SOC_SINGLE_TLV("DRC Maximum Gain Volume", WM8903_DRC_1
, 0, 3, 0, drc_tlv_max
),
687 SOC_ENUM("DRC Attack Rate", drc_attack
),
688 SOC_ENUM("DRC Decay Rate", drc_decay
),
689 SOC_ENUM("DRC FF Delay", drc_ff_delay
),
690 SOC_SINGLE("DRC Anticlip Switch", WM8903_DRC_0
, 1, 1, 0),
691 SOC_SINGLE("DRC QR Switch", WM8903_DRC_0
, 2, 1, 0),
692 SOC_SINGLE_TLV("DRC QR Threshold Volume", WM8903_DRC_0
, 6, 3, 0, drc_tlv_max
),
693 SOC_ENUM("DRC QR Decay Rate", drc_qr_decay
),
694 SOC_SINGLE("DRC Smoothing Switch", WM8903_DRC_0
, 3, 1, 0),
695 SOC_SINGLE("DRC Smoothing Hysteresis Switch", WM8903_DRC_0
, 0, 1, 0),
696 SOC_ENUM("DRC Smoothing Threshold", drc_smoothing
),
697 SOC_SINGLE_TLV("DRC Startup Volume", WM8903_DRC_0
, 6, 18, 0, drc_tlv_startup
),
699 SOC_DOUBLE_R_TLV("Digital Capture Volume", WM8903_ADC_DIGITAL_VOLUME_LEFT
,
700 WM8903_ADC_DIGITAL_VOLUME_RIGHT
, 1, 120, 0, digital_tlv
),
701 SOC_ENUM("ADC Companding Mode", adc_companding
),
702 SOC_SINGLE("ADC Companding Switch", WM8903_AUDIO_INTERFACE_0
, 3, 1, 0),
704 SOC_DOUBLE_TLV("Digital Sidetone Volume", WM8903_DAC_DIGITAL_0
, 4, 8,
705 12, 0, digital_sidetone_tlv
),
708 SOC_ENUM("DAC OSR", dac_osr
),
709 SOC_DOUBLE_R_TLV("Digital Playback Volume", WM8903_DAC_DIGITAL_VOLUME_LEFT
,
710 WM8903_DAC_DIGITAL_VOLUME_RIGHT
, 1, 120, 0, digital_tlv
),
711 SOC_ENUM("DAC Soft Mute Rate", soft_mute
),
712 SOC_ENUM("DAC Mute Mode", mute_mode
),
713 SOC_SINGLE("DAC Mono Switch", WM8903_DAC_DIGITAL_1
, 12, 1, 0),
714 SOC_ENUM("DAC Companding Mode", dac_companding
),
715 SOC_SINGLE("DAC Companding Switch", WM8903_AUDIO_INTERFACE_0
, 1, 1, 0),
716 SOC_SINGLE_BOOL_EXT("Playback Deemphasis Switch", 0,
717 wm8903_get_deemph
, wm8903_put_deemph
),
720 SOC_DOUBLE_R("Headphone Switch",
721 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
723 SOC_DOUBLE_R("Headphone ZC Switch",
724 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
726 SOC_DOUBLE_R_TLV("Headphone Volume",
727 WM8903_ANALOGUE_OUT1_LEFT
, WM8903_ANALOGUE_OUT1_RIGHT
,
731 SOC_DOUBLE_R("Line Out Switch",
732 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
734 SOC_DOUBLE_R("Line Out ZC Switch",
735 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
737 SOC_DOUBLE_R_TLV("Line Out Volume",
738 WM8903_ANALOGUE_OUT2_LEFT
, WM8903_ANALOGUE_OUT2_RIGHT
,
742 SOC_DOUBLE_R("Speaker Switch",
743 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
, 8, 1, 1),
744 SOC_DOUBLE_R("Speaker ZC Switch",
745 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
, 6, 1, 0),
746 SOC_DOUBLE_R_TLV("Speaker Volume",
747 WM8903_ANALOGUE_OUT3_LEFT
, WM8903_ANALOGUE_OUT3_RIGHT
,
751 static const struct snd_kcontrol_new linput_mode_mux
=
752 SOC_DAPM_ENUM("Left Input Mode Mux", linput_mode_enum
);
754 static const struct snd_kcontrol_new rinput_mode_mux
=
755 SOC_DAPM_ENUM("Right Input Mode Mux", rinput_mode_enum
);
757 static const struct snd_kcontrol_new linput_mux
=
758 SOC_DAPM_ENUM("Left Input Mux", linput_enum
);
760 static const struct snd_kcontrol_new linput_inv_mux
=
761 SOC_DAPM_ENUM("Left Inverting Input Mux", linput_inv_enum
);
763 static const struct snd_kcontrol_new rinput_mux
=
764 SOC_DAPM_ENUM("Right Input Mux", rinput_enum
);
766 static const struct snd_kcontrol_new rinput_inv_mux
=
767 SOC_DAPM_ENUM("Right Inverting Input Mux", rinput_inv_enum
);
769 static const struct snd_kcontrol_new lsidetone_mux
=
770 SOC_DAPM_ENUM("DACL Sidetone Mux", lsidetone_enum
);
772 static const struct snd_kcontrol_new rsidetone_mux
=
773 SOC_DAPM_ENUM("DACR Sidetone Mux", rsidetone_enum
);
775 static const struct snd_kcontrol_new adcinput_mux
=
776 SOC_DAPM_ENUM("ADC Input", adcinput_enum
);
778 static const struct snd_kcontrol_new lcapture_mux
=
779 SOC_DAPM_ENUM("Left Capture Mux", lcapture_enum
);
781 static const struct snd_kcontrol_new rcapture_mux
=
782 SOC_DAPM_ENUM("Right Capture Mux", rcapture_enum
);
784 static const struct snd_kcontrol_new lplay_mux
=
785 SOC_DAPM_ENUM("Left Playback Mux", lplay_enum
);
787 static const struct snd_kcontrol_new rplay_mux
=
788 SOC_DAPM_ENUM("Right Playback Mux", rplay_enum
);
790 static const struct snd_kcontrol_new left_output_mixer
[] = {
791 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 3, 1, 0),
792 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 2, 1, 0),
793 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 1, 1, 0),
794 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_LEFT_MIX_0
, 0, 1, 0),
797 static const struct snd_kcontrol_new right_output_mixer
[] = {
798 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 3, 1, 0),
799 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 2, 1, 0),
800 SOC_DAPM_SINGLE_W("Left Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 1, 1, 0),
801 SOC_DAPM_SINGLE_W("Right Bypass Switch", WM8903_ANALOGUE_RIGHT_MIX_0
, 0, 1, 0),
804 static const struct snd_kcontrol_new left_speaker_mixer
[] = {
805 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 3, 1, 0),
806 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 2, 1, 0),
807 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
, 1, 1, 0),
808 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_LEFT_0
,
812 static const struct snd_kcontrol_new right_speaker_mixer
[] = {
813 SOC_DAPM_SINGLE("DACL Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
, 3, 1, 0),
814 SOC_DAPM_SINGLE("DACR Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
, 2, 1, 0),
815 SOC_DAPM_SINGLE("Left Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
,
817 SOC_DAPM_SINGLE("Right Bypass Switch", WM8903_ANALOGUE_SPK_MIX_RIGHT_0
,
821 static const struct snd_soc_dapm_widget wm8903_dapm_widgets
[] = {
822 SND_SOC_DAPM_INPUT("IN1L"),
823 SND_SOC_DAPM_INPUT("IN1R"),
824 SND_SOC_DAPM_INPUT("IN2L"),
825 SND_SOC_DAPM_INPUT("IN2R"),
826 SND_SOC_DAPM_INPUT("IN3L"),
827 SND_SOC_DAPM_INPUT("IN3R"),
828 SND_SOC_DAPM_INPUT("DMICDAT"),
830 SND_SOC_DAPM_OUTPUT("HPOUTL"),
831 SND_SOC_DAPM_OUTPUT("HPOUTR"),
832 SND_SOC_DAPM_OUTPUT("LINEOUTL"),
833 SND_SOC_DAPM_OUTPUT("LINEOUTR"),
834 SND_SOC_DAPM_OUTPUT("LOP"),
835 SND_SOC_DAPM_OUTPUT("LON"),
836 SND_SOC_DAPM_OUTPUT("ROP"),
837 SND_SOC_DAPM_OUTPUT("RON"),
839 SND_SOC_DAPM_SUPPLY("MICBIAS", WM8903_MIC_BIAS_CONTROL_0
, 0, 0, NULL
, 0),
841 SND_SOC_DAPM_MUX("Left Input Mux", SND_SOC_NOPM
, 0, 0, &linput_mux
),
842 SND_SOC_DAPM_MUX("Left Input Inverting Mux", SND_SOC_NOPM
, 0, 0,
844 SND_SOC_DAPM_MUX("Left Input Mode Mux", SND_SOC_NOPM
, 0, 0, &linput_mode_mux
),
846 SND_SOC_DAPM_MUX("Right Input Mux", SND_SOC_NOPM
, 0, 0, &rinput_mux
),
847 SND_SOC_DAPM_MUX("Right Input Inverting Mux", SND_SOC_NOPM
, 0, 0,
849 SND_SOC_DAPM_MUX("Right Input Mode Mux", SND_SOC_NOPM
, 0, 0, &rinput_mode_mux
),
851 SND_SOC_DAPM_PGA("Left Input PGA", WM8903_POWER_MANAGEMENT_0
, 1, 0, NULL
, 0),
852 SND_SOC_DAPM_PGA("Right Input PGA", WM8903_POWER_MANAGEMENT_0
, 0, 0, NULL
, 0),
854 SND_SOC_DAPM_MUX("Left ADC Input", SND_SOC_NOPM
, 0, 0, &adcinput_mux
),
855 SND_SOC_DAPM_MUX("Right ADC Input", SND_SOC_NOPM
, 0, 0, &adcinput_mux
),
857 SND_SOC_DAPM_ADC("ADCL", NULL
, WM8903_POWER_MANAGEMENT_6
, 1, 0),
858 SND_SOC_DAPM_ADC("ADCR", NULL
, WM8903_POWER_MANAGEMENT_6
, 0, 0),
860 SND_SOC_DAPM_MUX("Left Capture Mux", SND_SOC_NOPM
, 0, 0, &lcapture_mux
),
861 SND_SOC_DAPM_MUX("Right Capture Mux", SND_SOC_NOPM
, 0, 0, &rcapture_mux
),
863 SND_SOC_DAPM_AIF_OUT("AIFTXL", "Left HiFi Capture", 0, SND_SOC_NOPM
, 0, 0),
864 SND_SOC_DAPM_AIF_OUT("AIFTXR", "Right HiFi Capture", 0, SND_SOC_NOPM
, 0, 0),
866 SND_SOC_DAPM_MUX("DACL Sidetone", SND_SOC_NOPM
, 0, 0, &lsidetone_mux
),
867 SND_SOC_DAPM_MUX("DACR Sidetone", SND_SOC_NOPM
, 0, 0, &rsidetone_mux
),
869 SND_SOC_DAPM_AIF_IN("AIFRXL", "Left Playback", 0, SND_SOC_NOPM
, 0, 0),
870 SND_SOC_DAPM_AIF_IN("AIFRXR", "Right Playback", 0, SND_SOC_NOPM
, 0, 0),
872 SND_SOC_DAPM_MUX("Left Playback Mux", SND_SOC_NOPM
, 0, 0, &lplay_mux
),
873 SND_SOC_DAPM_MUX("Right Playback Mux", SND_SOC_NOPM
, 0, 0, &rplay_mux
),
875 SND_SOC_DAPM_DAC("DACL", NULL
, WM8903_POWER_MANAGEMENT_6
, 3, 0),
876 SND_SOC_DAPM_DAC("DACR", NULL
, WM8903_POWER_MANAGEMENT_6
, 2, 0),
878 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8903_POWER_MANAGEMENT_1
, 1, 0,
879 left_output_mixer
, ARRAY_SIZE(left_output_mixer
)),
880 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8903_POWER_MANAGEMENT_1
, 0, 0,
881 right_output_mixer
, ARRAY_SIZE(right_output_mixer
)),
883 SND_SOC_DAPM_MIXER("Left Speaker Mixer", WM8903_POWER_MANAGEMENT_4
, 1, 0,
884 left_speaker_mixer
, ARRAY_SIZE(left_speaker_mixer
)),
885 SND_SOC_DAPM_MIXER("Right Speaker Mixer", WM8903_POWER_MANAGEMENT_4
, 0, 0,
886 right_speaker_mixer
, ARRAY_SIZE(right_speaker_mixer
)),
888 SND_SOC_DAPM_PGA_S("Left Headphone Output PGA", 0, WM8903_POWER_MANAGEMENT_2
,
890 SND_SOC_DAPM_PGA_S("Right Headphone Output PGA", 0, WM8903_POWER_MANAGEMENT_2
,
893 SND_SOC_DAPM_PGA_S("Left Line Output PGA", 0, WM8903_POWER_MANAGEMENT_3
, 1, 0,
895 SND_SOC_DAPM_PGA_S("Right Line Output PGA", 0, WM8903_POWER_MANAGEMENT_3
, 0, 0,
898 SND_SOC_DAPM_PGA_S("HPL_RMV_SHORT", 4, WM8903_ANALOGUE_HP_0
, 7, 0, NULL
, 0),
899 SND_SOC_DAPM_PGA_S("HPL_ENA_OUTP", 3, WM8903_ANALOGUE_HP_0
, 6, 0, NULL
, 0),
900 SND_SOC_DAPM_PGA_S("HPL_ENA_DLY", 2, WM8903_ANALOGUE_HP_0
, 5, 0, NULL
, 0),
901 SND_SOC_DAPM_PGA_S("HPL_ENA", 1, WM8903_ANALOGUE_HP_0
, 4, 0, NULL
, 0),
902 SND_SOC_DAPM_PGA_S("HPR_RMV_SHORT", 4, WM8903_ANALOGUE_HP_0
, 3, 0, NULL
, 0),
903 SND_SOC_DAPM_PGA_S("HPR_ENA_OUTP", 3, WM8903_ANALOGUE_HP_0
, 2, 0, NULL
, 0),
904 SND_SOC_DAPM_PGA_S("HPR_ENA_DLY", 2, WM8903_ANALOGUE_HP_0
, 1, 0, NULL
, 0),
905 SND_SOC_DAPM_PGA_S("HPR_ENA", 1, WM8903_ANALOGUE_HP_0
, 0, 0, NULL
, 0),
907 SND_SOC_DAPM_PGA_S("LINEOUTL_RMV_SHORT", 4, WM8903_ANALOGUE_LINEOUT_0
, 7, 0,
909 SND_SOC_DAPM_PGA_S("LINEOUTL_ENA_OUTP", 3, WM8903_ANALOGUE_LINEOUT_0
, 6, 0,
911 SND_SOC_DAPM_PGA_S("LINEOUTL_ENA_DLY", 2, WM8903_ANALOGUE_LINEOUT_0
, 5, 0,
913 SND_SOC_DAPM_PGA_S("LINEOUTL_ENA", 1, WM8903_ANALOGUE_LINEOUT_0
, 4, 0,
915 SND_SOC_DAPM_PGA_S("LINEOUTR_RMV_SHORT", 4, WM8903_ANALOGUE_LINEOUT_0
, 3, 0,
917 SND_SOC_DAPM_PGA_S("LINEOUTR_ENA_OUTP", 3, WM8903_ANALOGUE_LINEOUT_0
, 2, 0,
919 SND_SOC_DAPM_PGA_S("LINEOUTR_ENA_DLY", 2, WM8903_ANALOGUE_LINEOUT_0
, 1, 0,
921 SND_SOC_DAPM_PGA_S("LINEOUTR_ENA", 1, WM8903_ANALOGUE_LINEOUT_0
, 0, 0,
924 SND_SOC_DAPM_SUPPLY("DCS Master", WM8903_DC_SERVO_0
, 4, 0, NULL
, 0),
925 SND_SOC_DAPM_PGA_S("HPL_DCS", 3, SND_SOC_NOPM
, 3, 0, wm8903_dcs_event
,
926 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
927 SND_SOC_DAPM_PGA_S("HPR_DCS", 3, SND_SOC_NOPM
, 2, 0, wm8903_dcs_event
,
928 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
929 SND_SOC_DAPM_PGA_S("LINEOUTL_DCS", 3, SND_SOC_NOPM
, 1, 0, wm8903_dcs_event
,
930 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
931 SND_SOC_DAPM_PGA_S("LINEOUTR_DCS", 3, SND_SOC_NOPM
, 0, 0, wm8903_dcs_event
,
932 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_PRE_PMD
),
934 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8903_POWER_MANAGEMENT_5
, 1, 0,
936 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8903_POWER_MANAGEMENT_5
, 0, 0,
939 SND_SOC_DAPM_SUPPLY("Charge Pump", WM8903_CHARGE_PUMP_0
, 0, 0,
940 wm8903_cp_event
, SND_SOC_DAPM_POST_PMU
),
941 SND_SOC_DAPM_SUPPLY("CLK_DSP", WM8903_CLOCK_RATES_2
, 1, 0, NULL
, 0),
942 SND_SOC_DAPM_SUPPLY("CLK_SYS", WM8903_CLOCK_RATES_2
, 2, 0, NULL
, 0),
945 static const struct snd_soc_dapm_route wm8903_intercon
[] = {
947 { "CLK_DSP", NULL
, "CLK_SYS" },
948 { "MICBIAS", NULL
, "CLK_SYS" },
949 { "HPL_DCS", NULL
, "CLK_SYS" },
950 { "HPR_DCS", NULL
, "CLK_SYS" },
951 { "LINEOUTL_DCS", NULL
, "CLK_SYS" },
952 { "LINEOUTR_DCS", NULL
, "CLK_SYS" },
954 { "Left Input Mux", "IN1L", "IN1L" },
955 { "Left Input Mux", "IN2L", "IN2L" },
956 { "Left Input Mux", "IN3L", "IN3L" },
958 { "Left Input Inverting Mux", "IN1L", "IN1L" },
959 { "Left Input Inverting Mux", "IN2L", "IN2L" },
960 { "Left Input Inverting Mux", "IN3L", "IN3L" },
962 { "Right Input Mux", "IN1R", "IN1R" },
963 { "Right Input Mux", "IN2R", "IN2R" },
964 { "Right Input Mux", "IN3R", "IN3R" },
966 { "Right Input Inverting Mux", "IN1R", "IN1R" },
967 { "Right Input Inverting Mux", "IN2R", "IN2R" },
968 { "Right Input Inverting Mux", "IN3R", "IN3R" },
970 { "Left Input Mode Mux", "Single-Ended", "Left Input Inverting Mux" },
971 { "Left Input Mode Mux", "Differential Line",
973 { "Left Input Mode Mux", "Differential Line",
974 "Left Input Inverting Mux" },
975 { "Left Input Mode Mux", "Differential Mic",
977 { "Left Input Mode Mux", "Differential Mic",
978 "Left Input Inverting Mux" },
980 { "Right Input Mode Mux", "Single-Ended",
981 "Right Input Inverting Mux" },
982 { "Right Input Mode Mux", "Differential Line",
984 { "Right Input Mode Mux", "Differential Line",
985 "Right Input Inverting Mux" },
986 { "Right Input Mode Mux", "Differential Mic",
988 { "Right Input Mode Mux", "Differential Mic",
989 "Right Input Inverting Mux" },
991 { "Left Input PGA", NULL
, "Left Input Mode Mux" },
992 { "Right Input PGA", NULL
, "Right Input Mode Mux" },
994 { "Left ADC Input", "ADC", "Left Input PGA" },
995 { "Left ADC Input", "DMIC", "DMICDAT" },
996 { "Right ADC Input", "ADC", "Right Input PGA" },
997 { "Right ADC Input", "DMIC", "DMICDAT" },
999 { "Left Capture Mux", "Left", "ADCL" },
1000 { "Left Capture Mux", "Right", "ADCR" },
1002 { "Right Capture Mux", "Left", "ADCL" },
1003 { "Right Capture Mux", "Right", "ADCR" },
1005 { "AIFTXL", NULL
, "Left Capture Mux" },
1006 { "AIFTXR", NULL
, "Right Capture Mux" },
1008 { "ADCL", NULL
, "Left ADC Input" },
1009 { "ADCL", NULL
, "CLK_DSP" },
1010 { "ADCR", NULL
, "Right ADC Input" },
1011 { "ADCR", NULL
, "CLK_DSP" },
1013 { "Left Playback Mux", "Left", "AIFRXL" },
1014 { "Left Playback Mux", "Right", "AIFRXR" },
1016 { "Right Playback Mux", "Left", "AIFRXL" },
1017 { "Right Playback Mux", "Right", "AIFRXR" },
1019 { "DACL Sidetone", "Left", "ADCL" },
1020 { "DACL Sidetone", "Right", "ADCR" },
1021 { "DACR Sidetone", "Left", "ADCL" },
1022 { "DACR Sidetone", "Right", "ADCR" },
1024 { "DACL", NULL
, "Left Playback Mux" },
1025 { "DACL", NULL
, "DACL Sidetone" },
1026 { "DACL", NULL
, "CLK_DSP" },
1028 { "DACR", NULL
, "Right Playback Mux" },
1029 { "DACR", NULL
, "DACR Sidetone" },
1030 { "DACR", NULL
, "CLK_DSP" },
1032 { "Left Output Mixer", "Left Bypass Switch", "Left Input PGA" },
1033 { "Left Output Mixer", "Right Bypass Switch", "Right Input PGA" },
1034 { "Left Output Mixer", "DACL Switch", "DACL" },
1035 { "Left Output Mixer", "DACR Switch", "DACR" },
1037 { "Right Output Mixer", "Left Bypass Switch", "Left Input PGA" },
1038 { "Right Output Mixer", "Right Bypass Switch", "Right Input PGA" },
1039 { "Right Output Mixer", "DACL Switch", "DACL" },
1040 { "Right Output Mixer", "DACR Switch", "DACR" },
1042 { "Left Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
1043 { "Left Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
1044 { "Left Speaker Mixer", "DACL Switch", "DACL" },
1045 { "Left Speaker Mixer", "DACR Switch", "DACR" },
1047 { "Right Speaker Mixer", "Left Bypass Switch", "Left Input PGA" },
1048 { "Right Speaker Mixer", "Right Bypass Switch", "Right Input PGA" },
1049 { "Right Speaker Mixer", "DACL Switch", "DACL" },
1050 { "Right Speaker Mixer", "DACR Switch", "DACR" },
1052 { "Left Line Output PGA", NULL
, "Left Output Mixer" },
1053 { "Right Line Output PGA", NULL
, "Right Output Mixer" },
1055 { "Left Headphone Output PGA", NULL
, "Left Output Mixer" },
1056 { "Right Headphone Output PGA", NULL
, "Right Output Mixer" },
1058 { "Left Speaker PGA", NULL
, "Left Speaker Mixer" },
1059 { "Right Speaker PGA", NULL
, "Right Speaker Mixer" },
1061 { "HPL_ENA", NULL
, "Left Headphone Output PGA" },
1062 { "HPR_ENA", NULL
, "Right Headphone Output PGA" },
1063 { "HPL_ENA_DLY", NULL
, "HPL_ENA" },
1064 { "HPR_ENA_DLY", NULL
, "HPR_ENA" },
1065 { "LINEOUTL_ENA", NULL
, "Left Line Output PGA" },
1066 { "LINEOUTR_ENA", NULL
, "Right Line Output PGA" },
1067 { "LINEOUTL_ENA_DLY", NULL
, "LINEOUTL_ENA" },
1068 { "LINEOUTR_ENA_DLY", NULL
, "LINEOUTR_ENA" },
1070 { "HPL_DCS", NULL
, "DCS Master" },
1071 { "HPR_DCS", NULL
, "DCS Master" },
1072 { "LINEOUTL_DCS", NULL
, "DCS Master" },
1073 { "LINEOUTR_DCS", NULL
, "DCS Master" },
1075 { "HPL_DCS", NULL
, "HPL_ENA_DLY" },
1076 { "HPR_DCS", NULL
, "HPR_ENA_DLY" },
1077 { "LINEOUTL_DCS", NULL
, "LINEOUTL_ENA_DLY" },
1078 { "LINEOUTR_DCS", NULL
, "LINEOUTR_ENA_DLY" },
1080 { "HPL_ENA_OUTP", NULL
, "HPL_DCS" },
1081 { "HPR_ENA_OUTP", NULL
, "HPR_DCS" },
1082 { "LINEOUTL_ENA_OUTP", NULL
, "LINEOUTL_DCS" },
1083 { "LINEOUTR_ENA_OUTP", NULL
, "LINEOUTR_DCS" },
1085 { "HPL_RMV_SHORT", NULL
, "HPL_ENA_OUTP" },
1086 { "HPR_RMV_SHORT", NULL
, "HPR_ENA_OUTP" },
1087 { "LINEOUTL_RMV_SHORT", NULL
, "LINEOUTL_ENA_OUTP" },
1088 { "LINEOUTR_RMV_SHORT", NULL
, "LINEOUTR_ENA_OUTP" },
1090 { "HPOUTL", NULL
, "HPL_RMV_SHORT" },
1091 { "HPOUTR", NULL
, "HPR_RMV_SHORT" },
1092 { "LINEOUTL", NULL
, "LINEOUTL_RMV_SHORT" },
1093 { "LINEOUTR", NULL
, "LINEOUTR_RMV_SHORT" },
1095 { "LOP", NULL
, "Left Speaker PGA" },
1096 { "LON", NULL
, "Left Speaker PGA" },
1098 { "ROP", NULL
, "Right Speaker PGA" },
1099 { "RON", NULL
, "Right Speaker PGA" },
1101 { "Left Headphone Output PGA", NULL
, "Charge Pump" },
1102 { "Right Headphone Output PGA", NULL
, "Charge Pump" },
1103 { "Left Line Output PGA", NULL
, "Charge Pump" },
1104 { "Right Line Output PGA", NULL
, "Charge Pump" },
1107 static int wm8903_set_bias_level(struct snd_soc_codec
*codec
,
1108 enum snd_soc_bias_level level
)
1111 case SND_SOC_BIAS_ON
:
1114 case SND_SOC_BIAS_PREPARE
:
1115 snd_soc_update_bits(codec
, WM8903_VMID_CONTROL_0
,
1116 WM8903_VMID_RES_MASK
,
1117 WM8903_VMID_RES_50K
);
1120 case SND_SOC_BIAS_STANDBY
:
1121 if (codec
->dapm
.bias_level
== SND_SOC_BIAS_OFF
) {
1122 snd_soc_update_bits(codec
, WM8903_BIAS_CONTROL_0
,
1123 WM8903_POBCTRL
| WM8903_ISEL_MASK
|
1124 WM8903_STARTUP_BIAS_ENA
|
1127 (2 << WM8903_ISEL_SHIFT
) |
1128 WM8903_STARTUP_BIAS_ENA
);
1130 snd_soc_update_bits(codec
,
1131 WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0
,
1132 WM8903_SPK_DISCHARGE
,
1133 WM8903_SPK_DISCHARGE
);
1137 snd_soc_update_bits(codec
, WM8903_POWER_MANAGEMENT_5
,
1138 WM8903_SPKL_ENA
| WM8903_SPKR_ENA
,
1139 WM8903_SPKL_ENA
| WM8903_SPKR_ENA
);
1141 snd_soc_update_bits(codec
,
1142 WM8903_ANALOGUE_SPK_OUTPUT_CONTROL_0
,
1143 WM8903_SPK_DISCHARGE
, 0);
1145 snd_soc_update_bits(codec
, WM8903_VMID_CONTROL_0
,
1146 WM8903_VMID_TIE_ENA
|
1148 WM8903_VMID_IO_ENA
|
1149 WM8903_VMID_SOFT_MASK
|
1150 WM8903_VMID_RES_MASK
|
1151 WM8903_VMID_BUF_ENA
,
1152 WM8903_VMID_TIE_ENA
|
1154 WM8903_VMID_IO_ENA
|
1155 (2 << WM8903_VMID_SOFT_SHIFT
) |
1156 WM8903_VMID_RES_250K
|
1157 WM8903_VMID_BUF_ENA
);
1161 snd_soc_update_bits(codec
, WM8903_POWER_MANAGEMENT_5
,
1162 WM8903_SPKL_ENA
| WM8903_SPKR_ENA
,
1165 snd_soc_update_bits(codec
, WM8903_VMID_CONTROL_0
,
1166 WM8903_VMID_SOFT_MASK
, 0);
1168 snd_soc_update_bits(codec
, WM8903_VMID_CONTROL_0
,
1169 WM8903_VMID_RES_MASK
,
1170 WM8903_VMID_RES_50K
);
1172 snd_soc_update_bits(codec
, WM8903_BIAS_CONTROL_0
,
1173 WM8903_BIAS_ENA
| WM8903_POBCTRL
,
1176 /* By default no bypass paths are enabled so
1177 * enable Class W support.
1179 dev_dbg(codec
->dev
, "Enabling Class W\n");
1180 snd_soc_update_bits(codec
, WM8903_CLASS_W_0
,
1181 WM8903_CP_DYN_FREQ
|
1183 WM8903_CP_DYN_FREQ
|
1187 snd_soc_update_bits(codec
, WM8903_VMID_CONTROL_0
,
1188 WM8903_VMID_RES_MASK
,
1189 WM8903_VMID_RES_250K
);
1192 case SND_SOC_BIAS_OFF
:
1193 snd_soc_update_bits(codec
, WM8903_BIAS_CONTROL_0
,
1194 WM8903_BIAS_ENA
, 0);
1196 snd_soc_update_bits(codec
, WM8903_VMID_CONTROL_0
,
1197 WM8903_VMID_SOFT_MASK
,
1198 2 << WM8903_VMID_SOFT_SHIFT
);
1200 snd_soc_update_bits(codec
, WM8903_VMID_CONTROL_0
,
1201 WM8903_VMID_BUF_ENA
, 0);
1205 snd_soc_update_bits(codec
, WM8903_VMID_CONTROL_0
,
1206 WM8903_VMID_TIE_ENA
| WM8903_BUFIO_ENA
|
1207 WM8903_VMID_IO_ENA
| WM8903_VMID_RES_MASK
|
1208 WM8903_VMID_SOFT_MASK
|
1209 WM8903_VMID_BUF_ENA
, 0);
1211 snd_soc_update_bits(codec
, WM8903_BIAS_CONTROL_0
,
1212 WM8903_STARTUP_BIAS_ENA
, 0);
1216 codec
->dapm
.bias_level
= level
;
1221 static int wm8903_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1222 int clk_id
, unsigned int freq
, int dir
)
1224 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1225 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1227 wm8903
->sysclk
= freq
;
1232 static int wm8903_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1235 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1236 u16 aif1
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_1
);
1238 aif1
&= ~(WM8903_LRCLK_DIR
| WM8903_BCLK_DIR
| WM8903_AIF_FMT_MASK
|
1239 WM8903_AIF_LRCLK_INV
| WM8903_AIF_BCLK_INV
);
1241 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1242 case SND_SOC_DAIFMT_CBS_CFS
:
1244 case SND_SOC_DAIFMT_CBS_CFM
:
1245 aif1
|= WM8903_LRCLK_DIR
;
1247 case SND_SOC_DAIFMT_CBM_CFM
:
1248 aif1
|= WM8903_LRCLK_DIR
| WM8903_BCLK_DIR
;
1250 case SND_SOC_DAIFMT_CBM_CFS
:
1251 aif1
|= WM8903_BCLK_DIR
;
1257 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1258 case SND_SOC_DAIFMT_DSP_A
:
1261 case SND_SOC_DAIFMT_DSP_B
:
1262 aif1
|= 0x3 | WM8903_AIF_LRCLK_INV
;
1264 case SND_SOC_DAIFMT_I2S
:
1267 case SND_SOC_DAIFMT_RIGHT_J
:
1270 case SND_SOC_DAIFMT_LEFT_J
:
1276 /* Clock inversion */
1277 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1278 case SND_SOC_DAIFMT_DSP_A
:
1279 case SND_SOC_DAIFMT_DSP_B
:
1280 /* frame inversion not valid for DSP modes */
1281 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1282 case SND_SOC_DAIFMT_NB_NF
:
1284 case SND_SOC_DAIFMT_IB_NF
:
1285 aif1
|= WM8903_AIF_BCLK_INV
;
1291 case SND_SOC_DAIFMT_I2S
:
1292 case SND_SOC_DAIFMT_RIGHT_J
:
1293 case SND_SOC_DAIFMT_LEFT_J
:
1294 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
1295 case SND_SOC_DAIFMT_NB_NF
:
1297 case SND_SOC_DAIFMT_IB_IF
:
1298 aif1
|= WM8903_AIF_BCLK_INV
| WM8903_AIF_LRCLK_INV
;
1300 case SND_SOC_DAIFMT_IB_NF
:
1301 aif1
|= WM8903_AIF_BCLK_INV
;
1303 case SND_SOC_DAIFMT_NB_IF
:
1304 aif1
|= WM8903_AIF_LRCLK_INV
;
1314 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_1
, aif1
);
1319 static int wm8903_digital_mute(struct snd_soc_dai
*codec_dai
, int mute
)
1321 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1324 reg
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_1
);
1327 reg
|= WM8903_DAC_MUTE
;
1329 reg
&= ~WM8903_DAC_MUTE
;
1331 snd_soc_write(codec
, WM8903_DAC_DIGITAL_1
, reg
);
1336 /* Lookup table for CLK_SYS/fs ratio. 256fs or more is recommended
1337 * for optimal performance so we list the lower rates first and match
1338 * on the last match we find. */
1344 } clk_sys_ratios
[] = {
1345 { 64, 0x0, 0x0, 1 },
1346 { 68, 0x0, 0x1, 1 },
1347 { 125, 0x0, 0x2, 1 },
1348 { 128, 0x1, 0x0, 1 },
1349 { 136, 0x1, 0x1, 1 },
1350 { 192, 0x2, 0x0, 1 },
1351 { 204, 0x2, 0x1, 1 },
1353 { 64, 0x0, 0x0, 2 },
1354 { 68, 0x0, 0x1, 2 },
1355 { 125, 0x0, 0x2, 2 },
1356 { 128, 0x1, 0x0, 2 },
1357 { 136, 0x1, 0x1, 2 },
1358 { 192, 0x2, 0x0, 2 },
1359 { 204, 0x2, 0x1, 2 },
1361 { 250, 0x2, 0x2, 1 },
1362 { 256, 0x3, 0x0, 1 },
1363 { 272, 0x3, 0x1, 1 },
1364 { 384, 0x4, 0x0, 1 },
1365 { 408, 0x4, 0x1, 1 },
1366 { 375, 0x4, 0x2, 1 },
1367 { 512, 0x5, 0x0, 1 },
1368 { 544, 0x5, 0x1, 1 },
1369 { 500, 0x5, 0x2, 1 },
1370 { 768, 0x6, 0x0, 1 },
1371 { 816, 0x6, 0x1, 1 },
1372 { 750, 0x6, 0x2, 1 },
1373 { 1024, 0x7, 0x0, 1 },
1374 { 1088, 0x7, 0x1, 1 },
1375 { 1000, 0x7, 0x2, 1 },
1376 { 1408, 0x8, 0x0, 1 },
1377 { 1496, 0x8, 0x1, 1 },
1378 { 1536, 0x9, 0x0, 1 },
1379 { 1632, 0x9, 0x1, 1 },
1380 { 1500, 0x9, 0x2, 1 },
1382 { 250, 0x2, 0x2, 2 },
1383 { 256, 0x3, 0x0, 2 },
1384 { 272, 0x3, 0x1, 2 },
1385 { 384, 0x4, 0x0, 2 },
1386 { 408, 0x4, 0x1, 2 },
1387 { 375, 0x4, 0x2, 2 },
1388 { 512, 0x5, 0x0, 2 },
1389 { 544, 0x5, 0x1, 2 },
1390 { 500, 0x5, 0x2, 2 },
1391 { 768, 0x6, 0x0, 2 },
1392 { 816, 0x6, 0x1, 2 },
1393 { 750, 0x6, 0x2, 2 },
1394 { 1024, 0x7, 0x0, 2 },
1395 { 1088, 0x7, 0x1, 2 },
1396 { 1000, 0x7, 0x2, 2 },
1397 { 1408, 0x8, 0x0, 2 },
1398 { 1496, 0x8, 0x1, 2 },
1399 { 1536, 0x9, 0x0, 2 },
1400 { 1632, 0x9, 0x1, 2 },
1401 { 1500, 0x9, 0x2, 2 },
1404 /* CLK_SYS/BCLK ratios - multiplied by 10 due to .5s */
1428 /* Sample rates for DSP */
1432 } sample_rates
[] = {
1447 static int wm8903_hw_params(struct snd_pcm_substream
*substream
,
1448 struct snd_pcm_hw_params
*params
,
1449 struct snd_soc_dai
*dai
)
1451 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1452 struct snd_soc_codec
*codec
=rtd
->codec
;
1453 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1454 int fs
= params_rate(params
);
1464 u16 aif1
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_1
);
1465 u16 aif2
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_2
);
1466 u16 aif3
= snd_soc_read(codec
, WM8903_AUDIO_INTERFACE_3
);
1467 u16 clock0
= snd_soc_read(codec
, WM8903_CLOCK_RATES_0
);
1468 u16 clock1
= snd_soc_read(codec
, WM8903_CLOCK_RATES_1
);
1469 u16 dac_digital1
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_1
);
1471 /* Enable sloping stopband filter for low sample rates */
1473 dac_digital1
|= WM8903_DAC_SB_FILT
;
1475 dac_digital1
&= ~WM8903_DAC_SB_FILT
;
1477 /* Configure sample rate logic for DSP - choose nearest rate */
1479 best_val
= abs(sample_rates
[dsp_config
].rate
- fs
);
1480 for (i
= 1; i
< ARRAY_SIZE(sample_rates
); i
++) {
1481 cur_val
= abs(sample_rates
[i
].rate
- fs
);
1482 if (cur_val
<= best_val
) {
1488 dev_dbg(codec
->dev
, "DSP fs = %dHz\n", sample_rates
[dsp_config
].rate
);
1489 clock1
&= ~WM8903_SAMPLE_RATE_MASK
;
1490 clock1
|= sample_rates
[dsp_config
].value
;
1492 aif1
&= ~WM8903_AIF_WL_MASK
;
1494 switch (params_format(params
)) {
1495 case SNDRV_PCM_FORMAT_S16_LE
:
1498 case SNDRV_PCM_FORMAT_S20_3LE
:
1502 case SNDRV_PCM_FORMAT_S24_LE
:
1506 case SNDRV_PCM_FORMAT_S32_LE
:
1514 dev_dbg(codec
->dev
, "MCLK = %dHz, target sample rate = %dHz\n",
1515 wm8903
->sysclk
, fs
);
1517 /* We may not have an MCLK which allows us to generate exactly
1518 * the clock we want, particularly with USB derived inputs, so
1522 best_val
= abs((wm8903
->sysclk
/
1523 (clk_sys_ratios
[0].mclk_div
*
1524 clk_sys_ratios
[0].div
)) - fs
);
1525 for (i
= 1; i
< ARRAY_SIZE(clk_sys_ratios
); i
++) {
1526 cur_val
= abs((wm8903
->sysclk
/
1527 (clk_sys_ratios
[i
].mclk_div
*
1528 clk_sys_ratios
[i
].div
)) - fs
);
1530 if (cur_val
<= best_val
) {
1536 if (clk_sys_ratios
[clk_config
].mclk_div
== 2) {
1537 clock0
|= WM8903_MCLKDIV2
;
1538 clk_sys
= wm8903
->sysclk
/ 2;
1540 clock0
&= ~WM8903_MCLKDIV2
;
1541 clk_sys
= wm8903
->sysclk
;
1544 clock1
&= ~(WM8903_CLK_SYS_RATE_MASK
|
1545 WM8903_CLK_SYS_MODE_MASK
);
1546 clock1
|= clk_sys_ratios
[clk_config
].rate
<< WM8903_CLK_SYS_RATE_SHIFT
;
1547 clock1
|= clk_sys_ratios
[clk_config
].mode
<< WM8903_CLK_SYS_MODE_SHIFT
;
1549 dev_dbg(codec
->dev
, "CLK_SYS_RATE=%x, CLK_SYS_MODE=%x div=%d\n",
1550 clk_sys_ratios
[clk_config
].rate
,
1551 clk_sys_ratios
[clk_config
].mode
,
1552 clk_sys_ratios
[clk_config
].div
);
1554 dev_dbg(codec
->dev
, "Actual CLK_SYS = %dHz\n", clk_sys
);
1556 /* We may not get quite the right frequency if using
1557 * approximate clocks so look for the closest match that is
1558 * higher than the target (we need to ensure that there enough
1559 * BCLKs to clock out the samples).
1562 best_val
= ((clk_sys
* 10) / bclk_divs
[0].ratio
) - bclk
;
1564 while (i
< ARRAY_SIZE(bclk_divs
)) {
1565 cur_val
= ((clk_sys
* 10) / bclk_divs
[i
].ratio
) - bclk
;
1566 if (cur_val
< 0) /* BCLK table is sorted */
1573 aif2
&= ~WM8903_BCLK_DIV_MASK
;
1574 aif3
&= ~WM8903_LRCLK_RATE_MASK
;
1576 dev_dbg(codec
->dev
, "BCLK ratio %d for %dHz - actual BCLK = %dHz\n",
1577 bclk_divs
[bclk_div
].ratio
/ 10, bclk
,
1578 (clk_sys
* 10) / bclk_divs
[bclk_div
].ratio
);
1580 aif2
|= bclk_divs
[bclk_div
].div
;
1583 wm8903
->fs
= params_rate(params
);
1584 wm8903_set_deemph(codec
);
1586 snd_soc_write(codec
, WM8903_CLOCK_RATES_0
, clock0
);
1587 snd_soc_write(codec
, WM8903_CLOCK_RATES_1
, clock1
);
1588 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_1
, aif1
);
1589 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_2
, aif2
);
1590 snd_soc_write(codec
, WM8903_AUDIO_INTERFACE_3
, aif3
);
1591 snd_soc_write(codec
, WM8903_DAC_DIGITAL_1
, dac_digital1
);
1597 * wm8903_mic_detect - Enable microphone detection via the WM8903 IRQ
1599 * @codec: WM8903 codec
1600 * @jack: jack to report detection events on
1601 * @det: value to report for presence detection
1602 * @shrt: value to report for short detection
1604 * Enable microphone detection via IRQ on the WM8903. If GPIOs are
1605 * being used to bring out signals to the processor then only platform
1606 * data configuration is needed for WM8903 and processor GPIOs should
1607 * be configured using snd_soc_jack_add_gpios() instead.
1609 * The current threasholds for detection should be configured using
1610 * micdet_cfg in the platform data. Using this function will force on
1611 * the microphone bias for the device.
1613 int wm8903_mic_detect(struct snd_soc_codec
*codec
, struct snd_soc_jack
*jack
,
1616 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1617 int irq_mask
= WM8903_MICDET_EINT
| WM8903_MICSHRT_EINT
;
1619 dev_dbg(codec
->dev
, "Enabling microphone detection: %x %x\n",
1622 /* Store the configuration */
1623 wm8903
->mic_jack
= jack
;
1624 wm8903
->mic_det
= det
;
1625 wm8903
->mic_short
= shrt
;
1627 /* Enable interrupts we've got a report configured for */
1629 irq_mask
&= ~WM8903_MICDET_EINT
;
1631 irq_mask
&= ~WM8903_MICSHRT_EINT
;
1633 snd_soc_update_bits(codec
, WM8903_INTERRUPT_STATUS_1_MASK
,
1634 WM8903_MICDET_EINT
| WM8903_MICSHRT_EINT
,
1638 /* Enable mic detection, this may not have been set through
1639 * platform data (eg, if the defaults are OK). */
1640 snd_soc_update_bits(codec
, WM8903_WRITE_SEQUENCER_0
,
1641 WM8903_WSEQ_ENA
, WM8903_WSEQ_ENA
);
1642 snd_soc_update_bits(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1643 WM8903_MICDET_ENA
, WM8903_MICDET_ENA
);
1645 snd_soc_update_bits(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1646 WM8903_MICDET_ENA
, 0);
1651 EXPORT_SYMBOL_GPL(wm8903_mic_detect
);
1653 static irqreturn_t
wm8903_irq(int irq
, void *data
)
1655 struct snd_soc_codec
*codec
= data
;
1656 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1660 int mask
= ~snd_soc_read(codec
, WM8903_INTERRUPT_STATUS_1_MASK
);
1662 int_val
= snd_soc_read(codec
, WM8903_INTERRUPT_STATUS_1
) & mask
;
1664 if (int_val
& WM8903_WSEQ_BUSY_EINT
) {
1665 dev_warn(codec
->dev
, "Write sequencer done\n");
1669 * The rest is microphone jack detection. We need to manually
1670 * invert the polarity of the interrupt after each event - to
1671 * simplify the code keep track of the last state we reported
1672 * and just invert the relevant bits in both the report and
1673 * the polarity register.
1675 mic_report
= wm8903
->mic_last_report
;
1676 int_pol
= snd_soc_read(codec
, WM8903_INTERRUPT_POLARITY_1
);
1678 #ifndef CONFIG_SND_SOC_WM8903_MODULE
1679 if (int_val
& (WM8903_MICSHRT_EINT
| WM8903_MICDET_EINT
))
1680 trace_snd_soc_jack_irq(dev_name(codec
->dev
));
1683 if (int_val
& WM8903_MICSHRT_EINT
) {
1684 dev_dbg(codec
->dev
, "Microphone short (pol=%x)\n", int_pol
);
1686 mic_report
^= wm8903
->mic_short
;
1687 int_pol
^= WM8903_MICSHRT_INV
;
1690 if (int_val
& WM8903_MICDET_EINT
) {
1691 dev_dbg(codec
->dev
, "Microphone detect (pol=%x)\n", int_pol
);
1693 mic_report
^= wm8903
->mic_det
;
1694 int_pol
^= WM8903_MICDET_INV
;
1696 msleep(wm8903
->mic_delay
);
1699 snd_soc_update_bits(codec
, WM8903_INTERRUPT_POLARITY_1
,
1700 WM8903_MICSHRT_INV
| WM8903_MICDET_INV
, int_pol
);
1702 snd_soc_jack_report(wm8903
->mic_jack
, mic_report
,
1703 wm8903
->mic_short
| wm8903
->mic_det
);
1705 wm8903
->mic_last_report
= mic_report
;
1710 #define WM8903_PLAYBACK_RATES (SNDRV_PCM_RATE_8000 |\
1711 SNDRV_PCM_RATE_11025 | \
1712 SNDRV_PCM_RATE_16000 | \
1713 SNDRV_PCM_RATE_22050 | \
1714 SNDRV_PCM_RATE_32000 | \
1715 SNDRV_PCM_RATE_44100 | \
1716 SNDRV_PCM_RATE_48000 | \
1717 SNDRV_PCM_RATE_88200 | \
1718 SNDRV_PCM_RATE_96000)
1720 #define WM8903_CAPTURE_RATES (SNDRV_PCM_RATE_8000 |\
1721 SNDRV_PCM_RATE_11025 | \
1722 SNDRV_PCM_RATE_16000 | \
1723 SNDRV_PCM_RATE_22050 | \
1724 SNDRV_PCM_RATE_32000 | \
1725 SNDRV_PCM_RATE_44100 | \
1726 SNDRV_PCM_RATE_48000)
1728 #define WM8903_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
1729 SNDRV_PCM_FMTBIT_S20_3LE |\
1730 SNDRV_PCM_FMTBIT_S24_LE)
1732 static const struct snd_soc_dai_ops wm8903_dai_ops
= {
1733 .hw_params
= wm8903_hw_params
,
1734 .digital_mute
= wm8903_digital_mute
,
1735 .set_fmt
= wm8903_set_dai_fmt
,
1736 .set_sysclk
= wm8903_set_dai_sysclk
,
1739 static struct snd_soc_dai_driver wm8903_dai
= {
1740 .name
= "wm8903-hifi",
1742 .stream_name
= "Playback",
1745 .rates
= WM8903_PLAYBACK_RATES
,
1746 .formats
= WM8903_FORMATS
,
1749 .stream_name
= "Capture",
1752 .rates
= WM8903_CAPTURE_RATES
,
1753 .formats
= WM8903_FORMATS
,
1755 .ops
= &wm8903_dai_ops
,
1756 .symmetric_rates
= 1,
1759 static int wm8903_suspend(struct snd_soc_codec
*codec
)
1761 wm8903_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1766 static int wm8903_resume(struct snd_soc_codec
*codec
)
1768 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1770 snd_soc_cache_sync(codec
);
1772 wm8903_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1777 #ifdef CONFIG_GPIOLIB
1778 static inline struct wm8903_priv
*gpio_to_wm8903(struct gpio_chip
*chip
)
1780 return container_of(chip
, struct wm8903_priv
, gpio_chip
);
1783 static int wm8903_gpio_request(struct gpio_chip
*chip
, unsigned offset
)
1785 if (offset
>= WM8903_NUM_GPIO
)
1791 static int wm8903_gpio_direction_in(struct gpio_chip
*chip
, unsigned offset
)
1793 struct wm8903_priv
*wm8903
= gpio_to_wm8903(chip
);
1794 struct snd_soc_codec
*codec
= wm8903
->codec
;
1795 unsigned int mask
, val
;
1797 mask
= WM8903_GP1_FN_MASK
| WM8903_GP1_DIR_MASK
;
1798 val
= (WM8903_GPn_FN_GPIO_INPUT
<< WM8903_GP1_FN_SHIFT
) |
1801 return snd_soc_update_bits(codec
, WM8903_GPIO_CONTROL_1
+ offset
,
1805 static int wm8903_gpio_get(struct gpio_chip
*chip
, unsigned offset
)
1807 struct wm8903_priv
*wm8903
= gpio_to_wm8903(chip
);
1808 struct snd_soc_codec
*codec
= wm8903
->codec
;
1811 reg
= snd_soc_read(codec
, WM8903_GPIO_CONTROL_1
+ offset
);
1813 return (reg
& WM8903_GP1_LVL_MASK
) >> WM8903_GP1_LVL_SHIFT
;
1816 static int wm8903_gpio_direction_out(struct gpio_chip
*chip
,
1817 unsigned offset
, int value
)
1819 struct wm8903_priv
*wm8903
= gpio_to_wm8903(chip
);
1820 struct snd_soc_codec
*codec
= wm8903
->codec
;
1821 unsigned int mask
, val
;
1823 mask
= WM8903_GP1_FN_MASK
| WM8903_GP1_DIR_MASK
| WM8903_GP1_LVL_MASK
;
1824 val
= (WM8903_GPn_FN_GPIO_OUTPUT
<< WM8903_GP1_FN_SHIFT
) |
1825 (value
<< WM8903_GP2_LVL_SHIFT
);
1827 return snd_soc_update_bits(codec
, WM8903_GPIO_CONTROL_1
+ offset
,
1831 static void wm8903_gpio_set(struct gpio_chip
*chip
, unsigned offset
, int value
)
1833 struct wm8903_priv
*wm8903
= gpio_to_wm8903(chip
);
1834 struct snd_soc_codec
*codec
= wm8903
->codec
;
1836 snd_soc_update_bits(codec
, WM8903_GPIO_CONTROL_1
+ offset
,
1837 WM8903_GP1_LVL_MASK
,
1838 !!value
<< WM8903_GP1_LVL_SHIFT
);
1841 static struct gpio_chip wm8903_template_chip
= {
1843 .owner
= THIS_MODULE
,
1844 .request
= wm8903_gpio_request
,
1845 .direction_input
= wm8903_gpio_direction_in
,
1846 .get
= wm8903_gpio_get
,
1847 .direction_output
= wm8903_gpio_direction_out
,
1848 .set
= wm8903_gpio_set
,
1852 static void wm8903_init_gpio(struct snd_soc_codec
*codec
)
1854 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1855 struct wm8903_platform_data
*pdata
= dev_get_platdata(codec
->dev
);
1858 wm8903
->gpio_chip
= wm8903_template_chip
;
1859 wm8903
->gpio_chip
.ngpio
= WM8903_NUM_GPIO
;
1860 wm8903
->gpio_chip
.dev
= codec
->dev
;
1862 if (pdata
&& pdata
->gpio_base
)
1863 wm8903
->gpio_chip
.base
= pdata
->gpio_base
;
1865 wm8903
->gpio_chip
.base
= -1;
1867 ret
= gpiochip_add(&wm8903
->gpio_chip
);
1869 dev_err(codec
->dev
, "Failed to add GPIOs: %d\n", ret
);
1872 static void wm8903_free_gpio(struct snd_soc_codec
*codec
)
1874 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1877 ret
= gpiochip_remove(&wm8903
->gpio_chip
);
1879 dev_err(codec
->dev
, "Failed to remove GPIOs: %d\n", ret
);
1882 static void wm8903_init_gpio(struct snd_soc_codec
*codec
)
1886 static void wm8903_free_gpio(struct snd_soc_codec
*codec
)
1891 static int wm8903_probe(struct snd_soc_codec
*codec
)
1893 struct wm8903_platform_data
*pdata
= dev_get_platdata(codec
->dev
);
1894 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
1896 int trigger
, irq_pol
;
1899 wm8903
->codec
= codec
;
1901 ret
= snd_soc_codec_set_cache_io(codec
, 8, 16, SND_SOC_I2C
);
1903 dev_err(codec
->dev
, "Failed to set cache I/O: %d\n", ret
);
1907 val
= snd_soc_read(codec
, WM8903_SW_RESET_AND_ID
);
1908 if (val
!= wm8903_reg_defaults
[WM8903_SW_RESET_AND_ID
]) {
1910 "Device with ID register %x is not a WM8903\n", val
);
1914 val
= snd_soc_read(codec
, WM8903_REVISION_NUMBER
);
1915 dev_info(codec
->dev
, "WM8903 revision %c\n",
1916 (val
& WM8903_CHIP_REV_MASK
) + 'A');
1918 wm8903_reset(codec
);
1920 /* Set up GPIOs and microphone detection */
1922 bool mic_gpio
= false;
1924 for (i
= 0; i
< ARRAY_SIZE(pdata
->gpio_cfg
); i
++) {
1925 if (pdata
->gpio_cfg
[i
] > 0x7fff)
1928 snd_soc_write(codec
, WM8903_GPIO_CONTROL_1
+ i
,
1929 pdata
->gpio_cfg
[i
] & 0x7fff);
1931 val
= (pdata
->gpio_cfg
[i
] & WM8903_GP1_FN_MASK
)
1932 >> WM8903_GP1_FN_SHIFT
;
1935 case WM8903_GPn_FN_MICBIAS_CURRENT_DETECT
:
1936 case WM8903_GPn_FN_MICBIAS_SHORT_DETECT
:
1944 snd_soc_write(codec
, WM8903_MIC_BIAS_CONTROL_0
,
1947 /* Microphone detection needs the WSEQ clock */
1948 if (pdata
->micdet_cfg
)
1949 snd_soc_update_bits(codec
, WM8903_WRITE_SEQUENCER_0
,
1950 WM8903_WSEQ_ENA
, WM8903_WSEQ_ENA
);
1952 /* If microphone detection is enabled by pdata but
1953 * detected via IRQ then interrupts can be lost before
1954 * the machine driver has set up microphone detection
1955 * IRQs as the IRQs are clear on read. The detection
1956 * will be enabled when the machine driver configures.
1958 WARN_ON(!mic_gpio
&& (pdata
->micdet_cfg
& WM8903_MICDET_ENA
));
1960 wm8903
->mic_delay
= pdata
->micdet_delay
;
1964 if (pdata
&& pdata
->irq_active_low
) {
1965 trigger
= IRQF_TRIGGER_LOW
;
1966 irq_pol
= WM8903_IRQ_POL
;
1968 trigger
= IRQF_TRIGGER_HIGH
;
1972 snd_soc_update_bits(codec
, WM8903_INTERRUPT_CONTROL
,
1973 WM8903_IRQ_POL
, irq_pol
);
1975 ret
= request_threaded_irq(wm8903
->irq
, NULL
, wm8903_irq
,
1976 trigger
| IRQF_ONESHOT
,
1979 dev_err(codec
->dev
, "Failed to request IRQ: %d\n",
1984 /* Enable write sequencer interrupts */
1985 snd_soc_update_bits(codec
, WM8903_INTERRUPT_STATUS_1_MASK
,
1986 WM8903_IM_WSEQ_BUSY_EINT
, 0);
1989 /* power on device */
1990 wm8903_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1992 /* Latch volume update bits */
1993 val
= snd_soc_read(codec
, WM8903_ADC_DIGITAL_VOLUME_LEFT
);
1994 val
|= WM8903_ADCVU
;
1995 snd_soc_write(codec
, WM8903_ADC_DIGITAL_VOLUME_LEFT
, val
);
1996 snd_soc_write(codec
, WM8903_ADC_DIGITAL_VOLUME_RIGHT
, val
);
1998 val
= snd_soc_read(codec
, WM8903_DAC_DIGITAL_VOLUME_LEFT
);
1999 val
|= WM8903_DACVU
;
2000 snd_soc_write(codec
, WM8903_DAC_DIGITAL_VOLUME_LEFT
, val
);
2001 snd_soc_write(codec
, WM8903_DAC_DIGITAL_VOLUME_RIGHT
, val
);
2003 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT1_LEFT
);
2004 val
|= WM8903_HPOUTVU
;
2005 snd_soc_write(codec
, WM8903_ANALOGUE_OUT1_LEFT
, val
);
2006 snd_soc_write(codec
, WM8903_ANALOGUE_OUT1_RIGHT
, val
);
2008 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT2_LEFT
);
2009 val
|= WM8903_LINEOUTVU
;
2010 snd_soc_write(codec
, WM8903_ANALOGUE_OUT2_LEFT
, val
);
2011 snd_soc_write(codec
, WM8903_ANALOGUE_OUT2_RIGHT
, val
);
2013 val
= snd_soc_read(codec
, WM8903_ANALOGUE_OUT3_LEFT
);
2014 val
|= WM8903_SPKVU
;
2015 snd_soc_write(codec
, WM8903_ANALOGUE_OUT3_LEFT
, val
);
2016 snd_soc_write(codec
, WM8903_ANALOGUE_OUT3_RIGHT
, val
);
2018 /* Enable DAC soft mute by default */
2019 snd_soc_update_bits(codec
, WM8903_DAC_DIGITAL_1
,
2020 WM8903_DAC_MUTEMODE
| WM8903_DAC_MUTE
,
2021 WM8903_DAC_MUTEMODE
| WM8903_DAC_MUTE
);
2023 wm8903_init_gpio(codec
);
2028 /* power down chip */
2029 static int wm8903_remove(struct snd_soc_codec
*codec
)
2031 struct wm8903_priv
*wm8903
= snd_soc_codec_get_drvdata(codec
);
2033 wm8903_free_gpio(codec
);
2034 wm8903_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
2036 free_irq(wm8903
->irq
, codec
);
2041 static struct snd_soc_codec_driver soc_codec_dev_wm8903
= {
2042 .probe
= wm8903_probe
,
2043 .remove
= wm8903_remove
,
2044 .suspend
= wm8903_suspend
,
2045 .resume
= wm8903_resume
,
2046 .set_bias_level
= wm8903_set_bias_level
,
2047 .reg_cache_size
= ARRAY_SIZE(wm8903_reg_defaults
),
2048 .reg_word_size
= sizeof(u16
),
2049 .reg_cache_default
= wm8903_reg_defaults
,
2050 .volatile_register
= wm8903_volatile_register
,
2051 .seq_notifier
= wm8903_seq_notifier
,
2052 .controls
= wm8903_snd_controls
,
2053 .num_controls
= ARRAY_SIZE(wm8903_snd_controls
),
2054 .dapm_widgets
= wm8903_dapm_widgets
,
2055 .num_dapm_widgets
= ARRAY_SIZE(wm8903_dapm_widgets
),
2056 .dapm_routes
= wm8903_intercon
,
2057 .num_dapm_routes
= ARRAY_SIZE(wm8903_intercon
),
2060 static __devinit
int wm8903_i2c_probe(struct i2c_client
*i2c
,
2061 const struct i2c_device_id
*id
)
2063 struct wm8903_priv
*wm8903
;
2066 wm8903
= devm_kzalloc(&i2c
->dev
, sizeof(struct wm8903_priv
),
2071 i2c_set_clientdata(i2c
, wm8903
);
2072 wm8903
->irq
= i2c
->irq
;
2074 ret
= snd_soc_register_codec(&i2c
->dev
,
2075 &soc_codec_dev_wm8903
, &wm8903_dai
, 1);
2080 static __devexit
int wm8903_i2c_remove(struct i2c_client
*client
)
2082 snd_soc_unregister_codec(&client
->dev
);
2086 static const struct i2c_device_id wm8903_i2c_id
[] = {
2090 MODULE_DEVICE_TABLE(i2c
, wm8903_i2c_id
);
2092 static struct i2c_driver wm8903_i2c_driver
= {
2095 .owner
= THIS_MODULE
,
2097 .probe
= wm8903_i2c_probe
,
2098 .remove
= __devexit_p(wm8903_i2c_remove
),
2099 .id_table
= wm8903_i2c_id
,
2102 static int __init
wm8903_modinit(void)
2105 ret
= i2c_add_driver(&wm8903_i2c_driver
);
2107 printk(KERN_ERR
"Failed to register wm8903 I2C driver: %d\n",
2112 module_init(wm8903_modinit
);
2114 static void __exit
wm8903_exit(void)
2116 i2c_del_driver(&wm8903_i2c_driver
);
2118 module_exit(wm8903_exit
);
2120 MODULE_DESCRIPTION("ASoC WM8903 driver");
2121 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.cm>");
2122 MODULE_LICENSE("GPL");