2 * wm8990.c -- WM8990 ALSA Soc Audio driver
4 * Copyright 2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood <lrg@slimlogic.co.uk>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
13 #include <linux/module.h>
14 #include <linux/moduleparam.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/delay.h>
19 #include <linux/i2c.h>
20 #include <linux/platform_device.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/soc.h>
25 #include <sound/soc-dapm.h>
26 #include <sound/initval.h>
27 #include <sound/tlv.h>
28 #include <asm/div64.h>
32 #define WM8990_VERSION "0.2"
34 /* codec private data */
41 * wm8990 register cache. Note that register 0 is not included in the
44 static const u16 wm8990_reg
[] = {
45 0x8990, /* R0 - Reset */
46 0x0000, /* R1 - Power Management (1) */
47 0x6000, /* R2 - Power Management (2) */
48 0x0000, /* R3 - Power Management (3) */
49 0x4050, /* R4 - Audio Interface (1) */
50 0x4000, /* R5 - Audio Interface (2) */
51 0x01C8, /* R6 - Clocking (1) */
52 0x0000, /* R7 - Clocking (2) */
53 0x0040, /* R8 - Audio Interface (3) */
54 0x0040, /* R9 - Audio Interface (4) */
55 0x0004, /* R10 - DAC CTRL */
56 0x00C0, /* R11 - Left DAC Digital Volume */
57 0x00C0, /* R12 - Right DAC Digital Volume */
58 0x0000, /* R13 - Digital Side Tone */
59 0x0100, /* R14 - ADC CTRL */
60 0x00C0, /* R15 - Left ADC Digital Volume */
61 0x00C0, /* R16 - Right ADC Digital Volume */
63 0x0000, /* R18 - GPIO CTRL 1 */
64 0x1000, /* R19 - GPIO1 & GPIO2 */
65 0x1010, /* R20 - GPIO3 & GPIO4 */
66 0x1010, /* R21 - GPIO5 & GPIO6 */
67 0x8000, /* R22 - GPIOCTRL 2 */
68 0x0800, /* R23 - GPIO_POL */
69 0x008B, /* R24 - Left Line Input 1&2 Volume */
70 0x008B, /* R25 - Left Line Input 3&4 Volume */
71 0x008B, /* R26 - Right Line Input 1&2 Volume */
72 0x008B, /* R27 - Right Line Input 3&4 Volume */
73 0x0000, /* R28 - Left Output Volume */
74 0x0000, /* R29 - Right Output Volume */
75 0x0066, /* R30 - Line Outputs Volume */
76 0x0022, /* R31 - Out3/4 Volume */
77 0x0079, /* R32 - Left OPGA Volume */
78 0x0079, /* R33 - Right OPGA Volume */
79 0x0003, /* R34 - Speaker Volume */
80 0x0003, /* R35 - ClassD1 */
82 0x0100, /* R37 - ClassD3 */
83 0x0079, /* R38 - ClassD4 */
84 0x0000, /* R39 - Input Mixer1 */
85 0x0000, /* R40 - Input Mixer2 */
86 0x0000, /* R41 - Input Mixer3 */
87 0x0000, /* R42 - Input Mixer4 */
88 0x0000, /* R43 - Input Mixer5 */
89 0x0000, /* R44 - Input Mixer6 */
90 0x0000, /* R45 - Output Mixer1 */
91 0x0000, /* R46 - Output Mixer2 */
92 0x0000, /* R47 - Output Mixer3 */
93 0x0000, /* R48 - Output Mixer4 */
94 0x0000, /* R49 - Output Mixer5 */
95 0x0000, /* R50 - Output Mixer6 */
96 0x0180, /* R51 - Out3/4 Mixer */
97 0x0000, /* R52 - Line Mixer1 */
98 0x0000, /* R53 - Line Mixer2 */
99 0x0000, /* R54 - Speaker Mixer */
100 0x0000, /* R55 - Additional Control */
101 0x0000, /* R56 - AntiPOP1 */
102 0x0000, /* R57 - AntiPOP2 */
103 0x0000, /* R58 - MICBIAS */
105 0x0008, /* R60 - PLL1 */
106 0x0031, /* R61 - PLL2 */
107 0x0026, /* R62 - PLL3 */
108 0x0000, /* R63 - Driver internal */
112 * read wm8990 register cache
114 static inline unsigned int wm8990_read_reg_cache(struct snd_soc_codec
*codec
,
117 u16
*cache
= codec
->reg_cache
;
118 BUG_ON(reg
> (ARRAY_SIZE(wm8990_reg
)) - 1);
123 * write wm8990 register cache
125 static inline void wm8990_write_reg_cache(struct snd_soc_codec
*codec
,
126 unsigned int reg
, unsigned int value
)
128 u16
*cache
= codec
->reg_cache
;
130 /* Reset register and reserved registers are uncached */
131 if (reg
== 0 || reg
> ARRAY_SIZE(wm8990_reg
) - 1)
138 * write to the wm8990 register space
140 static int wm8990_write(struct snd_soc_codec
*codec
, unsigned int reg
,
145 data
[0] = reg
& 0xFF;
146 data
[1] = (value
>> 8) & 0xFF;
147 data
[2] = value
& 0xFF;
149 wm8990_write_reg_cache(codec
, reg
, value
);
151 if (codec
->hw_write(codec
->control_data
, data
, 3) == 2)
157 #define wm8990_reset(c) wm8990_write(c, WM8990_RESET, 0)
159 static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv
, -1500, 600);
161 static const DECLARE_TLV_DB_LINEAR(in_pga_tlv
, -1650, 3000);
163 static const DECLARE_TLV_DB_LINEAR(out_mix_tlv
, 0, -2100);
165 static const DECLARE_TLV_DB_LINEAR(out_pga_tlv
, -7300, 600);
167 static const DECLARE_TLV_DB_LINEAR(out_omix_tlv
, -600, 0);
169 static const DECLARE_TLV_DB_LINEAR(out_dac_tlv
, -7163, 0);
171 static const DECLARE_TLV_DB_LINEAR(in_adc_tlv
, -7163, 1763);
173 static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv
, -3600, 0);
175 static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol
*kcontrol
,
176 struct snd_ctl_elem_value
*ucontrol
)
178 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
179 int reg
= kcontrol
->private_value
& 0xff;
183 ret
= snd_soc_put_volsw(kcontrol
, ucontrol
);
187 /* now hit the volume update bits (always bit 8) */
188 val
= wm8990_read_reg_cache(codec
, reg
);
189 return wm8990_write(codec
, reg
, val
| 0x0100);
192 #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\
194 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
195 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
196 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
197 .tlv.p = (tlv_array), \
198 .info = snd_soc_info_volsw, \
199 .get = snd_soc_get_volsw, .put = wm899x_outpga_put_volsw_vu, \
200 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
203 static const char *wm8990_digital_sidetone
[] =
204 {"None", "Left ADC", "Right ADC", "Reserved"};
206 static const struct soc_enum wm8990_left_digital_sidetone_enum
=
207 SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE
,
208 WM8990_ADC_TO_DACL_SHIFT
,
209 WM8990_ADC_TO_DACL_MASK
,
210 wm8990_digital_sidetone
);
212 static const struct soc_enum wm8990_right_digital_sidetone_enum
=
213 SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE
,
214 WM8990_ADC_TO_DACR_SHIFT
,
215 WM8990_ADC_TO_DACR_MASK
,
216 wm8990_digital_sidetone
);
218 static const char *wm8990_adcmode
[] =
219 {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
221 static const struct soc_enum wm8990_right_adcmode_enum
=
222 SOC_ENUM_SINGLE(WM8990_ADC_CTRL
,
223 WM8990_ADC_HPF_CUT_SHIFT
,
224 WM8990_ADC_HPF_CUT_MASK
,
227 static const struct snd_kcontrol_new wm8990_snd_controls
[] = {
229 SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3
, WM8990_L12MNBST_BIT
, 1, 0),
230 SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3
, WM8990_L34MNBST_BIT
, 1, 0),
232 SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3
, WM8990_R12MNBST_BIT
, 1, 0),
233 SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3
, WM8990_R34MNBST_BIT
, 1, 0),
236 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3
,
237 WM8990_LLI3LOVOL_SHIFT
, WM8990_LLI3LOVOL_MASK
, 1, out_mix_tlv
),
238 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3
,
239 WM8990_LR12LOVOL_SHIFT
, WM8990_LR12LOVOL_MASK
, 1, out_mix_tlv
),
240 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3
,
241 WM8990_LL12LOVOL_SHIFT
, WM8990_LL12LOVOL_MASK
, 1, out_mix_tlv
),
242 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5
,
243 WM8990_LRI3LOVOL_SHIFT
, WM8990_LRI3LOVOL_MASK
, 1, out_mix_tlv
),
244 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5
,
245 WM8990_LRBLOVOL_SHIFT
, WM8990_LRBLOVOL_MASK
, 1, out_mix_tlv
),
246 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5
,
247 WM8990_LRBLOVOL_SHIFT
, WM8990_LRBLOVOL_MASK
, 1, out_mix_tlv
),
250 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4
,
251 WM8990_RRI3ROVOL_SHIFT
, WM8990_RRI3ROVOL_MASK
, 1, out_mix_tlv
),
252 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4
,
253 WM8990_RL12ROVOL_SHIFT
, WM8990_RL12ROVOL_MASK
, 1, out_mix_tlv
),
254 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4
,
255 WM8990_RR12ROVOL_SHIFT
, WM8990_RR12ROVOL_MASK
, 1, out_mix_tlv
),
256 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6
,
257 WM8990_RLI3ROVOL_SHIFT
, WM8990_RLI3ROVOL_MASK
, 1, out_mix_tlv
),
258 SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6
,
259 WM8990_RLBROVOL_SHIFT
, WM8990_RLBROVOL_MASK
, 1, out_mix_tlv
),
260 SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6
,
261 WM8990_RRBROVOL_SHIFT
, WM8990_RRBROVOL_MASK
, 1, out_mix_tlv
),
264 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME
,
265 WM8990_LOUTVOL_SHIFT
, WM8990_LOUTVOL_MASK
, 0, out_pga_tlv
),
266 SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME
, WM8990_LOZC_BIT
, 1, 0),
269 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME
,
270 WM8990_ROUTVOL_SHIFT
, WM8990_ROUTVOL_MASK
, 0, out_pga_tlv
),
271 SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME
, WM8990_ROZC_BIT
, 1, 0),
274 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME
,
275 WM8990_LOPGAVOL_SHIFT
, WM8990_LOPGAVOL_MASK
, 0, out_pga_tlv
),
276 SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME
,
277 WM8990_LOPGAZC_BIT
, 1, 0),
280 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME
,
281 WM8990_ROPGAVOL_SHIFT
, WM8990_ROPGAVOL_MASK
, 0, out_pga_tlv
),
282 SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME
,
283 WM8990_ROPGAZC_BIT
, 1, 0),
285 SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME
,
286 WM8990_LONMUTE_BIT
, 1, 0),
287 SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME
,
288 WM8990_LOPMUTE_BIT
, 1, 0),
289 SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME
,
290 WM8990_LOATTN_BIT
, 1, 0),
291 SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME
,
292 WM8990_RONMUTE_BIT
, 1, 0),
293 SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME
,
294 WM8990_ROPMUTE_BIT
, 1, 0),
295 SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME
,
296 WM8990_ROATTN_BIT
, 1, 0),
298 SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME
,
299 WM8990_OUT3MUTE_BIT
, 1, 0),
300 SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME
,
301 WM8990_OUT3ATTN_BIT
, 1, 0),
303 SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME
,
304 WM8990_OUT4MUTE_BIT
, 1, 0),
305 SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME
,
306 WM8990_OUT4ATTN_BIT
, 1, 0),
308 SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1
,
309 WM8990_CDMODE_BIT
, 1, 0),
311 SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME
,
312 WM8990_SPKATTN_SHIFT
, WM8990_SPKATTN_MASK
, 0),
313 SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3
,
314 WM8990_DCGAIN_SHIFT
, WM8990_DCGAIN_MASK
, 0),
315 SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3
,
316 WM8990_ACGAIN_SHIFT
, WM8990_ACGAIN_MASK
, 0),
317 SOC_SINGLE_TLV("Speaker Volume", WM8990_CLASSD4
,
318 WM8990_SPKVOL_SHIFT
, WM8990_SPKVOL_MASK
, 0, out_pga_tlv
),
319 SOC_SINGLE("Speaker ZC Switch", WM8990_CLASSD4
,
320 WM8990_SPKZC_SHIFT
, WM8990_SPKZC_MASK
, 0),
322 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
323 WM8990_LEFT_DAC_DIGITAL_VOLUME
,
324 WM8990_DACL_VOL_SHIFT
,
325 WM8990_DACL_VOL_MASK
,
329 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
330 WM8990_RIGHT_DAC_DIGITAL_VOLUME
,
331 WM8990_DACR_VOL_SHIFT
,
332 WM8990_DACR_VOL_MASK
,
336 SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum
),
337 SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum
),
339 SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE
,
340 WM8990_ADCL_DAC_SVOL_SHIFT
, WM8990_ADCL_DAC_SVOL_MASK
, 0,
342 SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE
,
343 WM8990_ADCR_DAC_SVOL_SHIFT
, WM8990_ADCR_DAC_SVOL_MASK
, 0,
346 SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL
,
347 WM8990_ADC_HPF_ENA_BIT
, 1, 0),
349 SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum
),
351 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
352 WM8990_LEFT_ADC_DIGITAL_VOLUME
,
353 WM8990_ADCL_VOL_SHIFT
,
354 WM8990_ADCL_VOL_MASK
,
358 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
359 WM8990_RIGHT_ADC_DIGITAL_VOLUME
,
360 WM8990_ADCR_VOL_SHIFT
,
361 WM8990_ADCR_VOL_MASK
,
365 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
366 WM8990_LEFT_LINE_INPUT_1_2_VOLUME
,
367 WM8990_LIN12VOL_SHIFT
,
368 WM8990_LIN12VOL_MASK
,
372 SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME
,
373 WM8990_LI12ZC_BIT
, 1, 0),
375 SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME
,
376 WM8990_LI12MUTE_BIT
, 1, 0),
378 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
379 WM8990_LEFT_LINE_INPUT_3_4_VOLUME
,
380 WM8990_LIN34VOL_SHIFT
,
381 WM8990_LIN34VOL_MASK
,
385 SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME
,
386 WM8990_LI34ZC_BIT
, 1, 0),
388 SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME
,
389 WM8990_LI34MUTE_BIT
, 1, 0),
391 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
392 WM8990_RIGHT_LINE_INPUT_1_2_VOLUME
,
393 WM8990_RIN12VOL_SHIFT
,
394 WM8990_RIN12VOL_MASK
,
398 SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME
,
399 WM8990_RI12ZC_BIT
, 1, 0),
401 SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME
,
402 WM8990_RI12MUTE_BIT
, 1, 0),
404 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
405 WM8990_RIGHT_LINE_INPUT_3_4_VOLUME
,
406 WM8990_RIN34VOL_SHIFT
,
407 WM8990_RIN34VOL_MASK
,
411 SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME
,
412 WM8990_RI34ZC_BIT
, 1, 0),
414 SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME
,
415 WM8990_RI34MUTE_BIT
, 1, 0),
419 /* add non dapm controls */
420 static int wm8990_add_controls(struct snd_soc_codec
*codec
)
424 for (i
= 0; i
< ARRAY_SIZE(wm8990_snd_controls
); i
++) {
425 err
= snd_ctl_add(codec
->card
,
426 snd_soc_cnew(&wm8990_snd_controls
[i
], codec
,
438 static int inmixer_event(struct snd_soc_dapm_widget
*w
,
439 struct snd_kcontrol
*kcontrol
, int event
)
443 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_POWER_MANAGEMENT_2
);
444 fakepower
= wm8990_read_reg_cache(w
->codec
, WM8990_INTDRIVBITS
);
446 if (fakepower
& ((1 << WM8990_INMIXL_PWR_BIT
) |
447 (1 << WM8990_AINLMUX_PWR_BIT
))) {
448 reg
|= WM8990_AINL_ENA
;
450 reg
&= ~WM8990_AINL_ENA
;
453 if (fakepower
& ((1 << WM8990_INMIXR_PWR_BIT
) |
454 (1 << WM8990_AINRMUX_PWR_BIT
))) {
455 reg
|= WM8990_AINR_ENA
;
457 reg
&= ~WM8990_AINL_ENA
;
459 wm8990_write(w
->codec
, WM8990_POWER_MANAGEMENT_2
, reg
);
464 static int outmixer_event(struct snd_soc_dapm_widget
*w
,
465 struct snd_kcontrol
*kcontrol
, int event
)
467 u32 reg_shift
= kcontrol
->private_value
& 0xfff;
472 case WM8990_SPEAKER_MIXER
| (WM8990_LDSPK_BIT
<< 8) :
473 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_OUTPUT_MIXER1
);
474 if (reg
& WM8990_LDLO
) {
476 "Cannot set as Output Mixer 1 LDLO Set\n");
480 case WM8990_SPEAKER_MIXER
| (WM8990_RDSPK_BIT
<< 8):
481 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_OUTPUT_MIXER2
);
482 if (reg
& WM8990_RDRO
) {
484 "Cannot set as Output Mixer 2 RDRO Set\n");
488 case WM8990_OUTPUT_MIXER1
| (WM8990_LDLO_BIT
<< 8):
489 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_SPEAKER_MIXER
);
490 if (reg
& WM8990_LDSPK
) {
492 "Cannot set as Speaker Mixer LDSPK Set\n");
496 case WM8990_OUTPUT_MIXER2
| (WM8990_RDRO_BIT
<< 8):
497 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_SPEAKER_MIXER
);
498 if (reg
& WM8990_RDSPK
) {
500 "Cannot set as Speaker Mixer RDSPK Set\n");
509 /* INMIX dB values */
510 static const unsigned int in_mix_tlv
[] = {
511 TLV_DB_RANGE_HEAD(1),
512 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
515 /* Left In PGA Connections */
516 static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls
[] = {
517 SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2
, WM8990_LMN1_BIT
, 1, 0),
518 SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2
, WM8990_LMP2_BIT
, 1, 0),
521 static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls
[] = {
522 SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2
, WM8990_LMN3_BIT
, 1, 0),
523 SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2
, WM8990_LMP4_BIT
, 1, 0),
526 /* Right In PGA Connections */
527 static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls
[] = {
528 SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2
, WM8990_RMN1_BIT
, 1, 0),
529 SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2
, WM8990_RMP2_BIT
, 1, 0),
532 static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls
[] = {
533 SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2
, WM8990_RMN3_BIT
, 1, 0),
534 SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2
, WM8990_RMP4_BIT
, 1, 0),
538 static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls
[] = {
539 SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3
,
540 WM8990_LDBVOL_SHIFT
, WM8990_LDBVOL_MASK
, 0, in_mix_tlv
),
541 SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5
, WM8990_LI2BVOL_SHIFT
,
543 SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3
, WM8990_L12MNB_BIT
,
545 SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3
, WM8990_L34MNB_BIT
,
550 static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls
[] = {
551 SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4
,
552 WM8990_RDBVOL_SHIFT
, WM8990_RDBVOL_MASK
, 0, in_mix_tlv
),
553 SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6
, WM8990_RI2BVOL_SHIFT
,
555 SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3
, WM8990_L12MNB_BIT
,
557 SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3
, WM8990_L34MNB_BIT
,
562 static const char *wm8990_ainlmux
[] =
563 {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
565 static const struct soc_enum wm8990_ainlmux_enum
=
566 SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1
, WM8990_AINLMODE_SHIFT
,
567 ARRAY_SIZE(wm8990_ainlmux
), wm8990_ainlmux
);
569 static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls
=
570 SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum
);
575 static const char *wm8990_ainrmux
[] =
576 {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
578 static const struct soc_enum wm8990_ainrmux_enum
=
579 SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1
, WM8990_AINRMODE_SHIFT
,
580 ARRAY_SIZE(wm8990_ainrmux
), wm8990_ainrmux
);
582 static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls
=
583 SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum
);
586 static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls
[] = {
587 SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5
, WM8990_LR4BVOL_SHIFT
,
588 WM8990_LR4BVOL_MASK
, 0, in_mix_tlv
),
589 SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6
, WM8990_RL4BVOL_SHIFT
,
590 WM8990_RL4BVOL_MASK
, 0, in_mix_tlv
),
594 static const struct snd_kcontrol_new wm8990_dapm_lomix_controls
[] = {
595 SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1
,
596 WM8990_LRBLO_BIT
, 1, 0),
597 SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1
,
598 WM8990_LLBLO_BIT
, 1, 0),
599 SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1
,
600 WM8990_LRI3LO_BIT
, 1, 0),
601 SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1
,
602 WM8990_LLI3LO_BIT
, 1, 0),
603 SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1
,
604 WM8990_LR12LO_BIT
, 1, 0),
605 SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1
,
606 WM8990_LL12LO_BIT
, 1, 0),
607 SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1
,
608 WM8990_LDLO_BIT
, 1, 0),
612 static const struct snd_kcontrol_new wm8990_dapm_romix_controls
[] = {
613 SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2
,
614 WM8990_RLBRO_BIT
, 1, 0),
615 SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2
,
616 WM8990_RRBRO_BIT
, 1, 0),
617 SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2
,
618 WM8990_RLI3RO_BIT
, 1, 0),
619 SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2
,
620 WM8990_RRI3RO_BIT
, 1, 0),
621 SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2
,
622 WM8990_RL12RO_BIT
, 1, 0),
623 SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2
,
624 WM8990_RR12RO_BIT
, 1, 0),
625 SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2
,
626 WM8990_RDRO_BIT
, 1, 0),
630 static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls
[] = {
631 SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1
,
632 WM8990_LLOPGALON_BIT
, 1, 0),
633 SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1
,
634 WM8990_LROPGALON_BIT
, 1, 0),
635 SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1
,
636 WM8990_LOPLON_BIT
, 1, 0),
640 static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls
[] = {
641 SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1
,
642 WM8990_LR12LOP_BIT
, 1, 0),
643 SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1
,
644 WM8990_LL12LOP_BIT
, 1, 0),
645 SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1
,
646 WM8990_LLOPGALOP_BIT
, 1, 0),
650 static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls
[] = {
651 SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2
,
652 WM8990_RROPGARON_BIT
, 1, 0),
653 SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2
,
654 WM8990_RLOPGARON_BIT
, 1, 0),
655 SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2
,
656 WM8990_ROPRON_BIT
, 1, 0),
660 static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls
[] = {
661 SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2
,
662 WM8990_RL12ROP_BIT
, 1, 0),
663 SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2
,
664 WM8990_RR12ROP_BIT
, 1, 0),
665 SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2
,
666 WM8990_RROPGAROP_BIT
, 1, 0),
670 static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls
[] = {
671 SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER
,
672 WM8990_LI4O3_BIT
, 1, 0),
673 SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER
,
674 WM8990_LPGAO3_BIT
, 1, 0),
678 static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls
[] = {
679 SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER
,
680 WM8990_RPGAO4_BIT
, 1, 0),
681 SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER
,
682 WM8990_RI4O4_BIT
, 1, 0),
686 static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls
[] = {
687 SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER
,
688 WM8990_LI2SPK_BIT
, 1, 0),
689 SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER
,
690 WM8990_LB2SPK_BIT
, 1, 0),
691 SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER
,
692 WM8990_LOPGASPK_BIT
, 1, 0),
693 SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER
,
694 WM8990_LDSPK_BIT
, 1, 0),
695 SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER
,
696 WM8990_RDSPK_BIT
, 1, 0),
697 SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER
,
698 WM8990_ROPGASPK_BIT
, 1, 0),
699 SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER
,
700 WM8990_RL12ROP_BIT
, 1, 0),
701 SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER
,
702 WM8990_RI2SPK_BIT
, 1, 0),
705 static const struct snd_soc_dapm_widget wm8990_dapm_widgets
[] = {
708 SND_SOC_DAPM_INPUT("LIN1"),
709 SND_SOC_DAPM_INPUT("LIN2"),
710 SND_SOC_DAPM_INPUT("LIN3"),
711 SND_SOC_DAPM_INPUT("LIN4/RXN"),
712 SND_SOC_DAPM_INPUT("RIN3"),
713 SND_SOC_DAPM_INPUT("RIN4/RXP"),
714 SND_SOC_DAPM_INPUT("RIN1"),
715 SND_SOC_DAPM_INPUT("RIN2"),
716 SND_SOC_DAPM_INPUT("Internal ADC Source"),
719 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2
,
720 WM8990_ADCL_ENA_BIT
, 0),
721 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2
,
722 WM8990_ADCR_ENA_BIT
, 0),
725 SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2
, WM8990_LIN12_ENA_BIT
,
726 0, &wm8990_dapm_lin12_pga_controls
[0],
727 ARRAY_SIZE(wm8990_dapm_lin12_pga_controls
)),
728 SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2
, WM8990_LIN34_ENA_BIT
,
729 0, &wm8990_dapm_lin34_pga_controls
[0],
730 ARRAY_SIZE(wm8990_dapm_lin34_pga_controls
)),
731 SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2
, WM8990_RIN12_ENA_BIT
,
732 0, &wm8990_dapm_rin12_pga_controls
[0],
733 ARRAY_SIZE(wm8990_dapm_rin12_pga_controls
)),
734 SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2
, WM8990_RIN34_ENA_BIT
,
735 0, &wm8990_dapm_rin34_pga_controls
[0],
736 ARRAY_SIZE(wm8990_dapm_rin34_pga_controls
)),
739 SND_SOC_DAPM_MIXER_E("INMIXL", WM8990_INTDRIVBITS
, WM8990_INMIXL_PWR_BIT
, 0,
740 &wm8990_dapm_inmixl_controls
[0],
741 ARRAY_SIZE(wm8990_dapm_inmixl_controls
),
742 inmixer_event
, SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
745 SND_SOC_DAPM_MUX_E("AILNMUX", WM8990_INTDRIVBITS
, WM8990_AINLMUX_PWR_BIT
, 0,
746 &wm8990_dapm_ainlmux_controls
, inmixer_event
,
747 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
750 SND_SOC_DAPM_MIXER_E("INMIXR", WM8990_INTDRIVBITS
, WM8990_INMIXR_PWR_BIT
, 0,
751 &wm8990_dapm_inmixr_controls
[0],
752 ARRAY_SIZE(wm8990_dapm_inmixr_controls
),
753 inmixer_event
, SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
756 SND_SOC_DAPM_MUX_E("AIRNMUX", WM8990_INTDRIVBITS
, WM8990_AINRMUX_PWR_BIT
, 0,
757 &wm8990_dapm_ainrmux_controls
, inmixer_event
,
758 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
762 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3
,
763 WM8990_DACL_ENA_BIT
, 0),
764 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3
,
765 WM8990_DACR_ENA_BIT
, 0),
768 SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_LOMIX_ENA_BIT
,
769 0, &wm8990_dapm_lomix_controls
[0],
770 ARRAY_SIZE(wm8990_dapm_lomix_controls
),
771 outmixer_event
, SND_SOC_DAPM_PRE_REG
),
774 SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_LON_ENA_BIT
, 0,
775 &wm8990_dapm_lonmix_controls
[0],
776 ARRAY_SIZE(wm8990_dapm_lonmix_controls
)),
779 SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_LOP_ENA_BIT
, 0,
780 &wm8990_dapm_lopmix_controls
[0],
781 ARRAY_SIZE(wm8990_dapm_lopmix_controls
)),
784 SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1
, WM8990_OUT3_ENA_BIT
, 0,
785 &wm8990_dapm_out3mix_controls
[0],
786 ARRAY_SIZE(wm8990_dapm_out3mix_controls
)),
789 SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1
, WM8990_SPK_ENA_BIT
, 0,
790 &wm8990_dapm_spkmix_controls
[0],
791 ARRAY_SIZE(wm8990_dapm_spkmix_controls
), outmixer_event
,
792 SND_SOC_DAPM_PRE_REG
),
795 SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1
, WM8990_OUT4_ENA_BIT
, 0,
796 &wm8990_dapm_out4mix_controls
[0],
797 ARRAY_SIZE(wm8990_dapm_out4mix_controls
)),
800 SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_ROP_ENA_BIT
, 0,
801 &wm8990_dapm_ropmix_controls
[0],
802 ARRAY_SIZE(wm8990_dapm_ropmix_controls
)),
805 SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_RON_ENA_BIT
, 0,
806 &wm8990_dapm_ronmix_controls
[0],
807 ARRAY_SIZE(wm8990_dapm_ronmix_controls
)),
810 SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_ROMIX_ENA_BIT
,
811 0, &wm8990_dapm_romix_controls
[0],
812 ARRAY_SIZE(wm8990_dapm_romix_controls
),
813 outmixer_event
, SND_SOC_DAPM_PRE_REG
),
816 SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1
, WM8990_LOUT_ENA_BIT
, 0,
820 SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1
, WM8990_ROUT_ENA_BIT
, 0,
824 SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3
, WM8990_LOPGA_ENA_BIT
, 0,
828 SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3
, WM8990_ROPGA_ENA_BIT
, 0,
832 SND_SOC_DAPM_MICBIAS("MICBIAS", WM8990_POWER_MANAGEMENT_1
,
833 WM8990_MICBIAS_ENA_BIT
, 0),
835 SND_SOC_DAPM_OUTPUT("LON"),
836 SND_SOC_DAPM_OUTPUT("LOP"),
837 SND_SOC_DAPM_OUTPUT("OUT3"),
838 SND_SOC_DAPM_OUTPUT("LOUT"),
839 SND_SOC_DAPM_OUTPUT("SPKN"),
840 SND_SOC_DAPM_OUTPUT("SPKP"),
841 SND_SOC_DAPM_OUTPUT("ROUT"),
842 SND_SOC_DAPM_OUTPUT("OUT4"),
843 SND_SOC_DAPM_OUTPUT("ROP"),
844 SND_SOC_DAPM_OUTPUT("RON"),
846 SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
849 static const struct snd_soc_dapm_route audio_map
[] = {
850 /* Make DACs turn on when playing even if not mixed into any outputs */
851 {"Internal DAC Sink", NULL
, "Left DAC"},
852 {"Internal DAC Sink", NULL
, "Right DAC"},
854 /* Make ADCs turn on when recording even if not mixed from any inputs */
855 {"Left ADC", NULL
, "Internal ADC Source"},
856 {"Right ADC", NULL
, "Internal ADC Source"},
860 {"LIN12 PGA", "LIN1 Switch", "LIN1"},
861 {"LIN12 PGA", "LIN2 Switch", "LIN2"},
863 {"LIN34 PGA", "LIN3 Switch", "LIN3"},
864 {"LIN34 PGA", "LIN4 Switch", "LIN4"},
866 {"INMIXL", "Record Left Volume", "LOMIX"},
867 {"INMIXL", "LIN2 Volume", "LIN2"},
868 {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
869 {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
871 {"AILNMUX", "INMIXL Mix", "INMIXL"},
872 {"AILNMUX", "DIFFINL Mix", "LIN12PGA"},
873 {"AILNMUX", "DIFFINL Mix", "LIN34PGA"},
874 {"AILNMUX", "RXVOICE Mix", "LIN4/RXN"},
875 {"AILNMUX", "RXVOICE Mix", "RIN4/RXP"},
877 {"Left ADC", NULL
, "AILNMUX"},
880 {"RIN12 PGA", "RIN1 Switch", "RIN1"},
881 {"RIN12 PGA", "RIN2 Switch", "RIN2"},
883 {"RIN34 PGA", "RIN3 Switch", "RIN3"},
884 {"RIN34 PGA", "RIN4 Switch", "RIN4"},
886 {"INMIXR", "Record Right Volume", "ROMIX"},
887 {"INMIXR", "RIN2 Volume", "RIN2"},
888 {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
889 {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
891 {"AIRNMUX", "INMIXR Mix", "INMIXR"},
892 {"AIRNMUX", "DIFFINR Mix", "RIN12PGA"},
893 {"AIRNMUX", "DIFFINR Mix", "RIN34PGA"},
894 {"AIRNMUX", "RXVOICE Mix", "RIN4/RXN"},
895 {"AIRNMUX", "RXVOICE Mix", "RIN4/RXP"},
897 {"Right ADC", NULL
, "AIRNMUX"},
900 {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
901 {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
902 {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
903 {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
904 {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
905 {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
906 {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
909 {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
910 {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
911 {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
912 {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
913 {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
914 {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
915 {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
918 {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
919 {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
920 {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
921 {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
922 {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
923 {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
924 {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
925 {"SPKMIX", "SPKMIX Left DAC Switch", "Left DAC"},
928 {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
929 {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
930 {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
933 {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
934 {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
935 {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
938 {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXP"},
939 {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
942 {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
943 {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"},
946 {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
947 {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
948 {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
951 {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
952 {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
953 {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
956 {"LOPGA", NULL
, "LOMIX"},
957 {"ROPGA", NULL
, "ROMIX"},
959 {"LOUT PGA", NULL
, "LOMIX"},
960 {"ROUT PGA", NULL
, "ROMIX"},
963 {"LON", NULL
, "LONMIX"},
964 {"LOP", NULL
, "LOPMIX"},
965 {"OUT", NULL
, "OUT3MIX"},
966 {"LOUT", NULL
, "LOUT PGA"},
967 {"SPKN", NULL
, "SPKMIX"},
968 {"ROUT", NULL
, "ROUT PGA"},
969 {"OUT4", NULL
, "OUT4MIX"},
970 {"ROP", NULL
, "ROPMIX"},
971 {"RON", NULL
, "RONMIX"},
974 static int wm8990_add_widgets(struct snd_soc_codec
*codec
)
976 snd_soc_dapm_new_controls(codec
, wm8990_dapm_widgets
,
977 ARRAY_SIZE(wm8990_dapm_widgets
));
979 /* set up the WM8990 audio map */
980 snd_soc_dapm_add_routes(codec
, audio_map
, ARRAY_SIZE(audio_map
));
982 snd_soc_dapm_new_widgets(codec
);
993 /* The size in bits of the pll divide multiplied by 10
994 * to allow rounding later */
995 #define FIXED_PLL_SIZE ((1 << 16) * 10)
997 static void pll_factors(struct _pll_div
*pll_div
, unsigned int target
,
1001 unsigned int K
, Ndiv
, Nmod
;
1004 Ndiv
= target
/ source
;
1008 Ndiv
= target
/ source
;
1012 if ((Ndiv
< 6) || (Ndiv
> 12))
1014 "WM8990 N value outwith recommended range! N = %d\n", Ndiv
);
1017 Nmod
= target
% source
;
1018 Kpart
= FIXED_PLL_SIZE
* (long long)Nmod
;
1020 do_div(Kpart
, source
);
1022 K
= Kpart
& 0xFFFFFFFF;
1024 /* Check if we need to round */
1028 /* Move down to proper range now rounding is done */
1034 static int wm8990_set_dai_pll(struct snd_soc_dai
*codec_dai
,
1035 int pll_id
, unsigned int freq_in
, unsigned int freq_out
)
1038 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1039 struct _pll_div pll_div
;
1041 if (freq_in
&& freq_out
) {
1042 pll_factors(&pll_div
, freq_out
* 4, freq_in
);
1045 reg
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_2
);
1046 reg
|= WM8990_PLL_ENA
;
1047 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_2
, reg
);
1049 /* sysclk comes from PLL */
1050 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_2
);
1051 wm8990_write(codec
, WM8990_CLOCKING_2
, reg
| WM8990_SYSCLK_SRC
);
1053 /* set up N , fractional mode and pre-divisor if neccessary */
1054 wm8990_write(codec
, WM8990_PLL1
, pll_div
.n
| WM8990_SDM
|
1055 (pll_div
.div2
?WM8990_PRESCALE
:0));
1056 wm8990_write(codec
, WM8990_PLL2
, (u8
)(pll_div
.k
>>8));
1057 wm8990_write(codec
, WM8990_PLL3
, (u8
)(pll_div
.k
& 0xFF));
1060 reg
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_2
);
1061 reg
&= ~WM8990_PLL_ENA
;
1062 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_2
, reg
);
1068 * Clock after PLL and dividers
1070 static int wm8990_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1071 int clk_id
, unsigned int freq
, int dir
)
1073 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1074 struct wm8990_priv
*wm8990
= codec
->private_data
;
1076 wm8990
->sysclk
= freq
;
1081 * Set's ADC and Voice DAC format.
1083 static int wm8990_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1086 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1089 audio1
= wm8990_read_reg_cache(codec
, WM8990_AUDIO_INTERFACE_1
);
1090 audio3
= wm8990_read_reg_cache(codec
, WM8990_AUDIO_INTERFACE_3
);
1092 /* set master/slave audio interface */
1093 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1094 case SND_SOC_DAIFMT_CBS_CFS
:
1095 audio3
&= ~WM8990_AIF_MSTR1
;
1097 case SND_SOC_DAIFMT_CBM_CFM
:
1098 audio3
|= WM8990_AIF_MSTR1
;
1104 audio1
&= ~WM8990_AIF_FMT_MASK
;
1106 /* interface format */
1107 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1108 case SND_SOC_DAIFMT_I2S
:
1109 audio1
|= WM8990_AIF_TMF_I2S
;
1110 audio1
&= ~WM8990_AIF_LRCLK_INV
;
1112 case SND_SOC_DAIFMT_RIGHT_J
:
1113 audio1
|= WM8990_AIF_TMF_RIGHTJ
;
1114 audio1
&= ~WM8990_AIF_LRCLK_INV
;
1116 case SND_SOC_DAIFMT_LEFT_J
:
1117 audio1
|= WM8990_AIF_TMF_LEFTJ
;
1118 audio1
&= ~WM8990_AIF_LRCLK_INV
;
1120 case SND_SOC_DAIFMT_DSP_A
:
1121 audio1
|= WM8990_AIF_TMF_DSP
;
1122 audio1
&= ~WM8990_AIF_LRCLK_INV
;
1124 case SND_SOC_DAIFMT_DSP_B
:
1125 audio1
|= WM8990_AIF_TMF_DSP
| WM8990_AIF_LRCLK_INV
;
1131 wm8990_write(codec
, WM8990_AUDIO_INTERFACE_1
, audio1
);
1132 wm8990_write(codec
, WM8990_AUDIO_INTERFACE_3
, audio3
);
1136 static int wm8990_set_dai_clkdiv(struct snd_soc_dai
*codec_dai
,
1137 int div_id
, int div
)
1139 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1143 case WM8990_MCLK_DIV
:
1144 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_2
) &
1145 ~WM8990_MCLK_DIV_MASK
;
1146 wm8990_write(codec
, WM8990_CLOCKING_2
, reg
| div
);
1148 case WM8990_DACCLK_DIV
:
1149 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_2
) &
1150 ~WM8990_DAC_CLKDIV_MASK
;
1151 wm8990_write(codec
, WM8990_CLOCKING_2
, reg
| div
);
1153 case WM8990_ADCCLK_DIV
:
1154 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_2
) &
1155 ~WM8990_ADC_CLKDIV_MASK
;
1156 wm8990_write(codec
, WM8990_CLOCKING_2
, reg
| div
);
1158 case WM8990_BCLK_DIV
:
1159 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_1
) &
1160 ~WM8990_BCLK_DIV_MASK
;
1161 wm8990_write(codec
, WM8990_CLOCKING_1
, reg
| div
);
1171 * Set PCM DAI bit size and sample rate.
1173 static int wm8990_hw_params(struct snd_pcm_substream
*substream
,
1174 struct snd_pcm_hw_params
*params
,
1175 struct snd_soc_dai
*dai
)
1177 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1178 struct snd_soc_device
*socdev
= rtd
->socdev
;
1179 struct snd_soc_codec
*codec
= socdev
->codec
;
1180 u16 audio1
= wm8990_read_reg_cache(codec
, WM8990_AUDIO_INTERFACE_1
);
1182 audio1
&= ~WM8990_AIF_WL_MASK
;
1184 switch (params_format(params
)) {
1185 case SNDRV_PCM_FORMAT_S16_LE
:
1187 case SNDRV_PCM_FORMAT_S20_3LE
:
1188 audio1
|= WM8990_AIF_WL_20BITS
;
1190 case SNDRV_PCM_FORMAT_S24_LE
:
1191 audio1
|= WM8990_AIF_WL_24BITS
;
1193 case SNDRV_PCM_FORMAT_S32_LE
:
1194 audio1
|= WM8990_AIF_WL_32BITS
;
1198 wm8990_write(codec
, WM8990_AUDIO_INTERFACE_1
, audio1
);
1202 static int wm8990_mute(struct snd_soc_dai
*dai
, int mute
)
1204 struct snd_soc_codec
*codec
= dai
->codec
;
1207 val
= wm8990_read_reg_cache(codec
, WM8990_DAC_CTRL
) & ~WM8990_DAC_MUTE
;
1210 wm8990_write(codec
, WM8990_DAC_CTRL
, val
| WM8990_DAC_MUTE
);
1212 wm8990_write(codec
, WM8990_DAC_CTRL
, val
);
1217 static int wm8990_set_bias_level(struct snd_soc_codec
*codec
,
1218 enum snd_soc_bias_level level
)
1223 case SND_SOC_BIAS_ON
:
1226 case SND_SOC_BIAS_PREPARE
:
1228 val
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_1
) &
1229 ~WM8990_VMID_MODE_MASK
;
1230 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, val
| 0x2);
1233 case SND_SOC_BIAS_STANDBY
:
1234 if (codec
->bias_level
== SND_SOC_BIAS_OFF
) {
1235 /* Enable all output discharge bits */
1236 wm8990_write(codec
, WM8990_ANTIPOP1
, WM8990_DIS_LLINE
|
1237 WM8990_DIS_RLINE
| WM8990_DIS_OUT3
|
1238 WM8990_DIS_OUT4
| WM8990_DIS_LOUT
|
1241 /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1242 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1243 WM8990_BUFDCOPEN
| WM8990_POBCTRL
|
1246 /* Delay to allow output caps to discharge */
1247 msleep(msecs_to_jiffies(300));
1249 /* Disable VMIDTOG */
1250 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1251 WM8990_BUFDCOPEN
| WM8990_POBCTRL
);
1253 /* disable all output discharge bits */
1254 wm8990_write(codec
, WM8990_ANTIPOP1
, 0);
1256 /* Enable outputs */
1257 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1b00);
1259 msleep(msecs_to_jiffies(50));
1261 /* Enable VMID at 2x50k */
1262 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1f02);
1264 msleep(msecs_to_jiffies(100));
1267 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1f03);
1269 msleep(msecs_to_jiffies(600));
1271 /* Enable BUFIOEN */
1272 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1273 WM8990_BUFDCOPEN
| WM8990_POBCTRL
|
1276 /* Disable outputs */
1277 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x3);
1279 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1280 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_BUFIOEN
);
1282 /* Enable workaround for ADC clocking issue. */
1283 wm8990_write(codec
, WM8990_EXT_ACCESS_ENA
, 0x2);
1284 wm8990_write(codec
, WM8990_EXT_CTL1
, 0xa003);
1285 wm8990_write(codec
, WM8990_EXT_ACCESS_ENA
, 0);
1289 val
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_1
) &
1290 ~WM8990_VMID_MODE_MASK
;
1291 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, val
| 0x4);
1294 case SND_SOC_BIAS_OFF
:
1295 /* Enable POBCTRL and SOFT_ST */
1296 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1297 WM8990_POBCTRL
| WM8990_BUFIOEN
);
1299 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1300 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1301 WM8990_BUFDCOPEN
| WM8990_POBCTRL
|
1305 val
= wm8990_read_reg_cache(codec
, WM8990_DAC_CTRL
);
1306 wm8990_write(codec
, WM8990_DAC_CTRL
, val
| WM8990_DAC_MUTE
);
1308 /* Enable any disabled outputs */
1309 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1f03);
1312 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1f01);
1314 msleep(msecs_to_jiffies(300));
1316 /* Enable all output discharge bits */
1317 wm8990_write(codec
, WM8990_ANTIPOP1
, WM8990_DIS_LLINE
|
1318 WM8990_DIS_RLINE
| WM8990_DIS_OUT3
|
1319 WM8990_DIS_OUT4
| WM8990_DIS_LOUT
|
1323 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x0);
1325 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1326 wm8990_write(codec
, WM8990_ANTIPOP2
, 0x0);
1330 codec
->bias_level
= level
;
1334 #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
1335 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
1336 SNDRV_PCM_RATE_48000)
1338 #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1339 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1342 * The WM8990 supports 2 different and mutually exclusive DAI
1345 * 1. ADC/DAC on Primary Interface
1346 * 2. ADC on Primary Interface/DAC on secondary
1348 struct snd_soc_dai wm8990_dai
= {
1349 /* ADC/DAC on primary */
1350 .name
= "WM8990 ADC/DAC Primary",
1353 .stream_name
= "Playback",
1356 .rates
= WM8990_RATES
,
1357 .formats
= WM8990_FORMATS
,},
1359 .stream_name
= "Capture",
1362 .rates
= WM8990_RATES
,
1363 .formats
= WM8990_FORMATS
,},
1365 .hw_params
= wm8990_hw_params
,
1366 .digital_mute
= wm8990_mute
,
1367 .set_fmt
= wm8990_set_dai_fmt
,
1368 .set_clkdiv
= wm8990_set_dai_clkdiv
,
1369 .set_pll
= wm8990_set_dai_pll
,
1370 .set_sysclk
= wm8990_set_dai_sysclk
,
1373 EXPORT_SYMBOL_GPL(wm8990_dai
);
1375 static int wm8990_suspend(struct platform_device
*pdev
, pm_message_t state
)
1377 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1378 struct snd_soc_codec
*codec
= socdev
->codec
;
1380 /* we only need to suspend if we are a valid card */
1384 wm8990_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1388 static int wm8990_resume(struct platform_device
*pdev
)
1390 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1391 struct snd_soc_codec
*codec
= socdev
->codec
;
1394 u16
*cache
= codec
->reg_cache
;
1396 /* we only need to resume if we are a valid card */
1400 /* Sync reg_cache with the hardware */
1401 for (i
= 0; i
< ARRAY_SIZE(wm8990_reg
); i
++) {
1402 if (i
+ 1 == WM8990_RESET
)
1404 data
[0] = ((i
+ 1) << 1) | ((cache
[i
] >> 8) & 0x0001);
1405 data
[1] = cache
[i
] & 0x00ff;
1406 codec
->hw_write(codec
->control_data
, data
, 2);
1409 wm8990_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1414 * initialise the WM8990 driver
1415 * register the mixer and dsp interfaces with the kernel
1417 static int wm8990_init(struct snd_soc_device
*socdev
)
1419 struct snd_soc_codec
*codec
= socdev
->codec
;
1423 codec
->name
= "WM8990";
1424 codec
->owner
= THIS_MODULE
;
1425 codec
->read
= wm8990_read_reg_cache
;
1426 codec
->write
= wm8990_write
;
1427 codec
->set_bias_level
= wm8990_set_bias_level
;
1428 codec
->dai
= &wm8990_dai
;
1430 codec
->reg_cache_size
= ARRAY_SIZE(wm8990_reg
);
1431 codec
->reg_cache
= kmemdup(wm8990_reg
, sizeof(wm8990_reg
), GFP_KERNEL
);
1433 if (codec
->reg_cache
== NULL
)
1436 wm8990_reset(codec
);
1439 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1441 printk(KERN_ERR
"wm8990: failed to create pcms\n");
1445 /* charge output caps */
1446 codec
->bias_level
= SND_SOC_BIAS_OFF
;
1447 wm8990_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1449 reg
= wm8990_read_reg_cache(codec
, WM8990_AUDIO_INTERFACE_4
);
1450 wm8990_write(codec
, WM8990_AUDIO_INTERFACE_4
, reg
| WM8990_ALRCGPIO1
);
1452 reg
= wm8990_read_reg_cache(codec
, WM8990_GPIO1_GPIO2
) &
1453 ~WM8990_GPIO1_SEL_MASK
;
1454 wm8990_write(codec
, WM8990_GPIO1_GPIO2
, reg
| 1);
1456 reg
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_2
);
1457 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_2
, reg
| WM8990_OPCLK_ENA
);
1459 wm8990_write(codec
, WM8990_LEFT_OUTPUT_VOLUME
, 0x50 | (1<<8));
1460 wm8990_write(codec
, WM8990_RIGHT_OUTPUT_VOLUME
, 0x50 | (1<<8));
1462 wm8990_add_controls(codec
);
1463 wm8990_add_widgets(codec
);
1464 ret
= snd_soc_init_card(socdev
);
1466 printk(KERN_ERR
"wm8990: failed to register card\n");
1472 snd_soc_free_pcms(socdev
);
1473 snd_soc_dapm_free(socdev
);
1475 kfree(codec
->reg_cache
);
1479 /* If the i2c layer weren't so broken, we could pass this kind of data
1481 static struct snd_soc_device
*wm8990_socdev
;
1483 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1486 * WM891 2 wire address is determined by GPIO5
1487 * state during powerup.
1492 static int wm8990_i2c_probe(struct i2c_client
*i2c
,
1493 const struct i2c_device_id
*id
)
1495 struct snd_soc_device
*socdev
= wm8990_socdev
;
1496 struct snd_soc_codec
*codec
= socdev
->codec
;
1499 i2c_set_clientdata(i2c
, codec
);
1500 codec
->control_data
= i2c
;
1502 ret
= wm8990_init(socdev
);
1504 pr_err("failed to initialise WM8990\n");
1509 static int wm8990_i2c_remove(struct i2c_client
*client
)
1511 struct snd_soc_codec
*codec
= i2c_get_clientdata(client
);
1512 kfree(codec
->reg_cache
);
1516 static const struct i2c_device_id wm8990_i2c_id
[] = {
1520 MODULE_DEVICE_TABLE(i2c
, wm8990_i2c_id
);
1522 static struct i2c_driver wm8990_i2c_driver
= {
1524 .name
= "WM8990 I2C Codec",
1525 .owner
= THIS_MODULE
,
1527 .probe
= wm8990_i2c_probe
,
1528 .remove
= wm8990_i2c_remove
,
1529 .id_table
= wm8990_i2c_id
,
1532 static int wm8990_add_i2c_device(struct platform_device
*pdev
,
1533 const struct wm8990_setup_data
*setup
)
1535 struct i2c_board_info info
;
1536 struct i2c_adapter
*adapter
;
1537 struct i2c_client
*client
;
1540 ret
= i2c_add_driver(&wm8990_i2c_driver
);
1542 dev_err(&pdev
->dev
, "can't add i2c driver\n");
1546 memset(&info
, 0, sizeof(struct i2c_board_info
));
1547 info
.addr
= setup
->i2c_address
;
1548 strlcpy(info
.type
, "wm8990", I2C_NAME_SIZE
);
1550 adapter
= i2c_get_adapter(setup
->i2c_bus
);
1552 dev_err(&pdev
->dev
, "can't get i2c adapter %d\n",
1557 client
= i2c_new_device(adapter
, &info
);
1558 i2c_put_adapter(adapter
);
1560 dev_err(&pdev
->dev
, "can't add i2c device at 0x%x\n",
1561 (unsigned int)info
.addr
);
1568 i2c_del_driver(&wm8990_i2c_driver
);
1573 static int wm8990_probe(struct platform_device
*pdev
)
1575 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1576 struct wm8990_setup_data
*setup
;
1577 struct snd_soc_codec
*codec
;
1578 struct wm8990_priv
*wm8990
;
1581 pr_info("WM8990 Audio Codec %s\n", WM8990_VERSION
);
1583 setup
= socdev
->codec_data
;
1584 codec
= kzalloc(sizeof(struct snd_soc_codec
), GFP_KERNEL
);
1588 wm8990
= kzalloc(sizeof(struct wm8990_priv
), GFP_KERNEL
);
1589 if (wm8990
== NULL
) {
1594 codec
->private_data
= wm8990
;
1595 socdev
->codec
= codec
;
1596 mutex_init(&codec
->mutex
);
1597 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1598 INIT_LIST_HEAD(&codec
->dapm_paths
);
1599 wm8990_socdev
= socdev
;
1603 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1604 if (setup
->i2c_address
) {
1605 codec
->hw_write
= (hw_write_t
)i2c_master_send
;
1606 ret
= wm8990_add_i2c_device(pdev
, setup
);
1611 kfree(codec
->private_data
);
1617 /* power down chip */
1618 static int wm8990_remove(struct platform_device
*pdev
)
1620 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1621 struct snd_soc_codec
*codec
= socdev
->codec
;
1623 if (codec
->control_data
)
1624 wm8990_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1625 snd_soc_free_pcms(socdev
);
1626 snd_soc_dapm_free(socdev
);
1627 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1628 i2c_unregister_device(codec
->control_data
);
1629 i2c_del_driver(&wm8990_i2c_driver
);
1631 kfree(codec
->private_data
);
1637 struct snd_soc_codec_device soc_codec_dev_wm8990
= {
1638 .probe
= wm8990_probe
,
1639 .remove
= wm8990_remove
,
1640 .suspend
= wm8990_suspend
,
1641 .resume
= wm8990_resume
,
1643 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8990
);
1645 static int __init
wm8990_modinit(void)
1647 return snd_soc_register_dai(&wm8990_dai
);
1649 module_init(wm8990_modinit
);
1651 static void __exit
wm8990_exit(void)
1653 snd_soc_unregister_dai(&wm8990_dai
);
1655 module_exit(wm8990_exit
);
1657 MODULE_DESCRIPTION("ASoC WM8990 driver");
1658 MODULE_AUTHOR("Liam Girdwood");
1659 MODULE_LICENSE("GPL");