2 * wm8990.c -- WM8990 ALSA Soc Audio driver
4 * Copyright 2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * lg@opensource.wolfsonmicro.com or linux@wolfsonmicro.com
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 #include <sound/tlv.h>
29 #include <asm/div64.h>
33 #define WM8990_VERSION "0.2"
35 /* codec private data */
42 * wm8990 register cache. Note that register 0 is not included in the
45 static const u16 wm8990_reg
[] = {
46 0x8990, /* R0 - Reset */
47 0x0000, /* R1 - Power Management (1) */
48 0x6000, /* R2 - Power Management (2) */
49 0x0000, /* R3 - Power Management (3) */
50 0x4050, /* R4 - Audio Interface (1) */
51 0x4000, /* R5 - Audio Interface (2) */
52 0x01C8, /* R6 - Clocking (1) */
53 0x0000, /* R7 - Clocking (2) */
54 0x0040, /* R8 - Audio Interface (3) */
55 0x0040, /* R9 - Audio Interface (4) */
56 0x0004, /* R10 - DAC CTRL */
57 0x00C0, /* R11 - Left DAC Digital Volume */
58 0x00C0, /* R12 - Right DAC Digital Volume */
59 0x0000, /* R13 - Digital Side Tone */
60 0x0100, /* R14 - ADC CTRL */
61 0x00C0, /* R15 - Left ADC Digital Volume */
62 0x00C0, /* R16 - Right ADC Digital Volume */
64 0x0000, /* R18 - GPIO CTRL 1 */
65 0x1000, /* R19 - GPIO1 & GPIO2 */
66 0x1010, /* R20 - GPIO3 & GPIO4 */
67 0x1010, /* R21 - GPIO5 & GPIO6 */
68 0x8000, /* R22 - GPIOCTRL 2 */
69 0x0800, /* R23 - GPIO_POL */
70 0x008B, /* R24 - Left Line Input 1&2 Volume */
71 0x008B, /* R25 - Left Line Input 3&4 Volume */
72 0x008B, /* R26 - Right Line Input 1&2 Volume */
73 0x008B, /* R27 - Right Line Input 3&4 Volume */
74 0x0000, /* R28 - Left Output Volume */
75 0x0000, /* R29 - Right Output Volume */
76 0x0066, /* R30 - Line Outputs Volume */
77 0x0022, /* R31 - Out3/4 Volume */
78 0x0079, /* R32 - Left OPGA Volume */
79 0x0079, /* R33 - Right OPGA Volume */
80 0x0003, /* R34 - Speaker Volume */
81 0x0003, /* R35 - ClassD1 */
83 0x0100, /* R37 - ClassD3 */
84 0x0079, /* R38 - ClassD4 */
85 0x0000, /* R39 - Input Mixer1 */
86 0x0000, /* R40 - Input Mixer2 */
87 0x0000, /* R41 - Input Mixer3 */
88 0x0000, /* R42 - Input Mixer4 */
89 0x0000, /* R43 - Input Mixer5 */
90 0x0000, /* R44 - Input Mixer6 */
91 0x0000, /* R45 - Output Mixer1 */
92 0x0000, /* R46 - Output Mixer2 */
93 0x0000, /* R47 - Output Mixer3 */
94 0x0000, /* R48 - Output Mixer4 */
95 0x0000, /* R49 - Output Mixer5 */
96 0x0000, /* R50 - Output Mixer6 */
97 0x0180, /* R51 - Out3/4 Mixer */
98 0x0000, /* R52 - Line Mixer1 */
99 0x0000, /* R53 - Line Mixer2 */
100 0x0000, /* R54 - Speaker Mixer */
101 0x0000, /* R55 - Additional Control */
102 0x0000, /* R56 - AntiPOP1 */
103 0x0000, /* R57 - AntiPOP2 */
104 0x0000, /* R58 - MICBIAS */
106 0x0008, /* R60 - PLL1 */
107 0x0031, /* R61 - PLL2 */
108 0x0026, /* R62 - PLL3 */
109 0x0000, /* R63 - Driver internal */
113 * read wm8990 register cache
115 static inline unsigned int wm8990_read_reg_cache(struct snd_soc_codec
*codec
,
118 u16
*cache
= codec
->reg_cache
;
119 BUG_ON(reg
>= ARRAY_SIZE(wm8990_reg
));
124 * write wm8990 register cache
126 static inline void wm8990_write_reg_cache(struct snd_soc_codec
*codec
,
127 unsigned int reg
, unsigned int value
)
129 u16
*cache
= codec
->reg_cache
;
131 /* Reset register and reserved registers are uncached */
132 if (reg
== 0 || reg
>= ARRAY_SIZE(wm8990_reg
))
139 * write to the wm8990 register space
141 static int wm8990_write(struct snd_soc_codec
*codec
, unsigned int reg
,
146 data
[0] = reg
& 0xFF;
147 data
[1] = (value
>> 8) & 0xFF;
148 data
[2] = value
& 0xFF;
150 wm8990_write_reg_cache(codec
, reg
, value
);
152 if (codec
->hw_write(codec
->control_data
, data
, 3) == 2)
158 #define wm8990_reset(c) wm8990_write(c, WM8990_RESET, 0)
160 static const DECLARE_TLV_DB_LINEAR(rec_mix_tlv
, -1500, 600);
162 static const DECLARE_TLV_DB_LINEAR(in_pga_tlv
, -1650, 3000);
164 static const DECLARE_TLV_DB_LINEAR(out_mix_tlv
, 0, -2100);
166 static const DECLARE_TLV_DB_LINEAR(out_pga_tlv
, -7300, 600);
168 static const DECLARE_TLV_DB_LINEAR(out_omix_tlv
, -600, 0);
170 static const DECLARE_TLV_DB_LINEAR(out_dac_tlv
, -7163, 0);
172 static const DECLARE_TLV_DB_LINEAR(in_adc_tlv
, -7163, 1763);
174 static const DECLARE_TLV_DB_LINEAR(out_sidetone_tlv
, -3600, 0);
176 static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol
*kcontrol
,
177 struct snd_ctl_elem_value
*ucontrol
)
179 struct snd_soc_codec
*codec
= snd_kcontrol_chip(kcontrol
);
180 int reg
= kcontrol
->private_value
& 0xff;
184 ret
= snd_soc_put_volsw(kcontrol
, ucontrol
);
188 /* now hit the volume update bits (always bit 8) */
189 val
= wm8990_read_reg_cache(codec
, reg
);
190 return wm8990_write(codec
, reg
, val
| 0x0100);
193 #define SOC_WM899X_OUTPGA_SINGLE_R_TLV(xname, reg, shift, max, invert,\
195 .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = (xname), \
196 .access = SNDRV_CTL_ELEM_ACCESS_TLV_READ |\
197 SNDRV_CTL_ELEM_ACCESS_READWRITE,\
198 .tlv.p = (tlv_array), \
199 .info = snd_soc_info_volsw, \
200 .get = snd_soc_get_volsw, .put = wm899x_outpga_put_volsw_vu, \
201 .private_value = SOC_SINGLE_VALUE(reg, shift, max, invert) }
204 static const char *wm8990_digital_sidetone
[] =
205 {"None", "Left ADC", "Right ADC", "Reserved"};
207 static const struct soc_enum wm8990_left_digital_sidetone_enum
=
208 SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE
,
209 WM8990_ADC_TO_DACL_SHIFT
,
210 WM8990_ADC_TO_DACL_MASK
,
211 wm8990_digital_sidetone
);
213 static const struct soc_enum wm8990_right_digital_sidetone_enum
=
214 SOC_ENUM_SINGLE(WM8990_DIGITAL_SIDE_TONE
,
215 WM8990_ADC_TO_DACR_SHIFT
,
216 WM8990_ADC_TO_DACR_MASK
,
217 wm8990_digital_sidetone
);
219 static const char *wm8990_adcmode
[] =
220 {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"};
222 static const struct soc_enum wm8990_right_adcmode_enum
=
223 SOC_ENUM_SINGLE(WM8990_ADC_CTRL
,
224 WM8990_ADC_HPF_CUT_SHIFT
,
225 WM8990_ADC_HPF_CUT_MASK
,
228 static const struct snd_kcontrol_new wm8990_snd_controls
[] = {
230 SOC_SINGLE("LIN12 PGA Boost", WM8990_INPUT_MIXER3
, WM8990_L12MNBST_BIT
, 1, 0),
231 SOC_SINGLE("LIN34 PGA Boost", WM8990_INPUT_MIXER3
, WM8990_L34MNBST_BIT
, 1, 0),
233 SOC_SINGLE("RIN12 PGA Boost", WM8990_INPUT_MIXER3
, WM8990_R12MNBST_BIT
, 1, 0),
234 SOC_SINGLE("RIN34 PGA Boost", WM8990_INPUT_MIXER3
, WM8990_R34MNBST_BIT
, 1, 0),
237 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER3
,
238 WM8990_LLI3LOVOL_SHIFT
, WM8990_LLI3LOVOL_MASK
, 1, out_mix_tlv
),
239 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3
,
240 WM8990_LR12LOVOL_SHIFT
, WM8990_LR12LOVOL_MASK
, 1, out_mix_tlv
),
241 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER3
,
242 WM8990_LL12LOVOL_SHIFT
, WM8990_LL12LOVOL_MASK
, 1, out_mix_tlv
),
243 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER5
,
244 WM8990_LRI3LOVOL_SHIFT
, WM8990_LRI3LOVOL_MASK
, 1, out_mix_tlv
),
245 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER5
,
246 WM8990_LRBLOVOL_SHIFT
, WM8990_LRBLOVOL_MASK
, 1, out_mix_tlv
),
247 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER5
,
248 WM8990_LRBLOVOL_SHIFT
, WM8990_LRBLOVOL_MASK
, 1, out_mix_tlv
),
251 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8990_OUTPUT_MIXER4
,
252 WM8990_RRI3ROVOL_SHIFT
, WM8990_RRI3ROVOL_MASK
, 1, out_mix_tlv
),
253 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4
,
254 WM8990_RL12ROVOL_SHIFT
, WM8990_RL12ROVOL_MASK
, 1, out_mix_tlv
),
255 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8990_OUTPUT_MIXER4
,
256 WM8990_RR12ROVOL_SHIFT
, WM8990_RR12ROVOL_MASK
, 1, out_mix_tlv
),
257 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8990_OUTPUT_MIXER6
,
258 WM8990_RLI3ROVOL_SHIFT
, WM8990_RLI3ROVOL_MASK
, 1, out_mix_tlv
),
259 SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8990_OUTPUT_MIXER6
,
260 WM8990_RLBROVOL_SHIFT
, WM8990_RLBROVOL_MASK
, 1, out_mix_tlv
),
261 SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8990_OUTPUT_MIXER6
,
262 WM8990_RRBROVOL_SHIFT
, WM8990_RRBROVOL_MASK
, 1, out_mix_tlv
),
265 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8990_LEFT_OUTPUT_VOLUME
,
266 WM8990_LOUTVOL_SHIFT
, WM8990_LOUTVOL_MASK
, 0, out_pga_tlv
),
267 SOC_SINGLE("LOUT ZC", WM8990_LEFT_OUTPUT_VOLUME
, WM8990_LOZC_BIT
, 1, 0),
270 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8990_RIGHT_OUTPUT_VOLUME
,
271 WM8990_ROUTVOL_SHIFT
, WM8990_ROUTVOL_MASK
, 0, out_pga_tlv
),
272 SOC_SINGLE("ROUT ZC", WM8990_RIGHT_OUTPUT_VOLUME
, WM8990_ROZC_BIT
, 1, 0),
275 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8990_LEFT_OPGA_VOLUME
,
276 WM8990_LOPGAVOL_SHIFT
, WM8990_LOPGAVOL_MASK
, 0, out_pga_tlv
),
277 SOC_SINGLE("LOPGA ZC Switch", WM8990_LEFT_OPGA_VOLUME
,
278 WM8990_LOPGAZC_BIT
, 1, 0),
281 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8990_RIGHT_OPGA_VOLUME
,
282 WM8990_ROPGAVOL_SHIFT
, WM8990_ROPGAVOL_MASK
, 0, out_pga_tlv
),
283 SOC_SINGLE("ROPGA ZC Switch", WM8990_RIGHT_OPGA_VOLUME
,
284 WM8990_ROPGAZC_BIT
, 1, 0),
286 SOC_SINGLE("LON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME
,
287 WM8990_LONMUTE_BIT
, 1, 0),
288 SOC_SINGLE("LOP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME
,
289 WM8990_LOPMUTE_BIT
, 1, 0),
290 SOC_SINGLE("LOP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME
,
291 WM8990_LOATTN_BIT
, 1, 0),
292 SOC_SINGLE("RON Mute Switch", WM8990_LINE_OUTPUTS_VOLUME
,
293 WM8990_RONMUTE_BIT
, 1, 0),
294 SOC_SINGLE("ROP Mute Switch", WM8990_LINE_OUTPUTS_VOLUME
,
295 WM8990_ROPMUTE_BIT
, 1, 0),
296 SOC_SINGLE("ROP Attenuation Switch", WM8990_LINE_OUTPUTS_VOLUME
,
297 WM8990_ROATTN_BIT
, 1, 0),
299 SOC_SINGLE("OUT3 Mute Switch", WM8990_OUT3_4_VOLUME
,
300 WM8990_OUT3MUTE_BIT
, 1, 0),
301 SOC_SINGLE("OUT3 Attenuation Switch", WM8990_OUT3_4_VOLUME
,
302 WM8990_OUT3ATTN_BIT
, 1, 0),
304 SOC_SINGLE("OUT4 Mute Switch", WM8990_OUT3_4_VOLUME
,
305 WM8990_OUT4MUTE_BIT
, 1, 0),
306 SOC_SINGLE("OUT4 Attenuation Switch", WM8990_OUT3_4_VOLUME
,
307 WM8990_OUT4ATTN_BIT
, 1, 0),
309 SOC_SINGLE("Speaker Mode Switch", WM8990_CLASSD1
,
310 WM8990_CDMODE_BIT
, 1, 0),
312 SOC_SINGLE("Speaker Output Attenuation Volume", WM8990_SPEAKER_VOLUME
,
313 WM8990_SPKATTN_SHIFT
, WM8990_SPKATTN_MASK
, 0),
314 SOC_SINGLE("Speaker DC Boost Volume", WM8990_CLASSD3
,
315 WM8990_DCGAIN_SHIFT
, WM8990_DCGAIN_MASK
, 0),
316 SOC_SINGLE("Speaker AC Boost Volume", WM8990_CLASSD3
,
317 WM8990_ACGAIN_SHIFT
, WM8990_ACGAIN_MASK
, 0),
318 SOC_SINGLE_TLV("Speaker Volume", WM8990_CLASSD4
,
319 WM8990_SPKVOL_SHIFT
, WM8990_SPKVOL_MASK
, 0, out_pga_tlv
),
320 SOC_SINGLE("Speaker ZC Switch", WM8990_CLASSD4
,
321 WM8990_SPKZC_SHIFT
, WM8990_SPKZC_MASK
, 0),
323 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume",
324 WM8990_LEFT_DAC_DIGITAL_VOLUME
,
325 WM8990_DACL_VOL_SHIFT
,
326 WM8990_DACL_VOL_MASK
,
330 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume",
331 WM8990_RIGHT_DAC_DIGITAL_VOLUME
,
332 WM8990_DACR_VOL_SHIFT
,
333 WM8990_DACR_VOL_MASK
,
337 SOC_ENUM("Left Digital Sidetone", wm8990_left_digital_sidetone_enum
),
338 SOC_ENUM("Right Digital Sidetone", wm8990_right_digital_sidetone_enum
),
340 SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE
,
341 WM8990_ADCL_DAC_SVOL_SHIFT
, WM8990_ADCL_DAC_SVOL_MASK
, 0,
343 SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8990_DIGITAL_SIDE_TONE
,
344 WM8990_ADCR_DAC_SVOL_SHIFT
, WM8990_ADCR_DAC_SVOL_MASK
, 0,
347 SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8990_ADC_CTRL
,
348 WM8990_ADC_HPF_ENA_BIT
, 1, 0),
350 SOC_ENUM("ADC HPF Mode", wm8990_right_adcmode_enum
),
352 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume",
353 WM8990_LEFT_ADC_DIGITAL_VOLUME
,
354 WM8990_ADCL_VOL_SHIFT
,
355 WM8990_ADCL_VOL_MASK
,
359 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume",
360 WM8990_RIGHT_ADC_DIGITAL_VOLUME
,
361 WM8990_ADCR_VOL_SHIFT
,
362 WM8990_ADCR_VOL_MASK
,
366 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume",
367 WM8990_LEFT_LINE_INPUT_1_2_VOLUME
,
368 WM8990_LIN12VOL_SHIFT
,
369 WM8990_LIN12VOL_MASK
,
373 SOC_SINGLE("LIN12 ZC Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME
,
374 WM8990_LI12ZC_BIT
, 1, 0),
376 SOC_SINGLE("LIN12 Mute Switch", WM8990_LEFT_LINE_INPUT_1_2_VOLUME
,
377 WM8990_LI12MUTE_BIT
, 1, 0),
379 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume",
380 WM8990_LEFT_LINE_INPUT_3_4_VOLUME
,
381 WM8990_LIN34VOL_SHIFT
,
382 WM8990_LIN34VOL_MASK
,
386 SOC_SINGLE("LIN34 ZC Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME
,
387 WM8990_LI34ZC_BIT
, 1, 0),
389 SOC_SINGLE("LIN34 Mute Switch", WM8990_LEFT_LINE_INPUT_3_4_VOLUME
,
390 WM8990_LI34MUTE_BIT
, 1, 0),
392 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume",
393 WM8990_RIGHT_LINE_INPUT_1_2_VOLUME
,
394 WM8990_RIN12VOL_SHIFT
,
395 WM8990_RIN12VOL_MASK
,
399 SOC_SINGLE("RIN12 ZC Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME
,
400 WM8990_RI12ZC_BIT
, 1, 0),
402 SOC_SINGLE("RIN12 Mute Switch", WM8990_RIGHT_LINE_INPUT_1_2_VOLUME
,
403 WM8990_RI12MUTE_BIT
, 1, 0),
405 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume",
406 WM8990_RIGHT_LINE_INPUT_3_4_VOLUME
,
407 WM8990_RIN34VOL_SHIFT
,
408 WM8990_RIN34VOL_MASK
,
412 SOC_SINGLE("RIN34 ZC Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME
,
413 WM8990_RI34ZC_BIT
, 1, 0),
415 SOC_SINGLE("RIN34 Mute Switch", WM8990_RIGHT_LINE_INPUT_3_4_VOLUME
,
416 WM8990_RI34MUTE_BIT
, 1, 0),
424 static int inmixer_event(struct snd_soc_dapm_widget
*w
,
425 struct snd_kcontrol
*kcontrol
, int event
)
429 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_POWER_MANAGEMENT_2
);
430 fakepower
= wm8990_read_reg_cache(w
->codec
, WM8990_INTDRIVBITS
);
432 if (fakepower
& ((1 << WM8990_INMIXL_PWR_BIT
) |
433 (1 << WM8990_AINLMUX_PWR_BIT
))) {
434 reg
|= WM8990_AINL_ENA
;
436 reg
&= ~WM8990_AINL_ENA
;
439 if (fakepower
& ((1 << WM8990_INMIXR_PWR_BIT
) |
440 (1 << WM8990_AINRMUX_PWR_BIT
))) {
441 reg
|= WM8990_AINR_ENA
;
443 reg
&= ~WM8990_AINL_ENA
;
445 wm8990_write(w
->codec
, WM8990_POWER_MANAGEMENT_2
, reg
);
450 static int outmixer_event(struct snd_soc_dapm_widget
*w
,
451 struct snd_kcontrol
*kcontrol
, int event
)
453 u32 reg_shift
= kcontrol
->private_value
& 0xfff;
458 case WM8990_SPEAKER_MIXER
| (WM8990_LDSPK_BIT
<< 8) :
459 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_OUTPUT_MIXER1
);
460 if (reg
& WM8990_LDLO
) {
462 "Cannot set as Output Mixer 1 LDLO Set\n");
466 case WM8990_SPEAKER_MIXER
| (WM8990_RDSPK_BIT
<< 8):
467 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_OUTPUT_MIXER2
);
468 if (reg
& WM8990_RDRO
) {
470 "Cannot set as Output Mixer 2 RDRO Set\n");
474 case WM8990_OUTPUT_MIXER1
| (WM8990_LDLO_BIT
<< 8):
475 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_SPEAKER_MIXER
);
476 if (reg
& WM8990_LDSPK
) {
478 "Cannot set as Speaker Mixer LDSPK Set\n");
482 case WM8990_OUTPUT_MIXER2
| (WM8990_RDRO_BIT
<< 8):
483 reg
= wm8990_read_reg_cache(w
->codec
, WM8990_SPEAKER_MIXER
);
484 if (reg
& WM8990_RDSPK
) {
486 "Cannot set as Speaker Mixer RDSPK Set\n");
495 /* INMIX dB values */
496 static const unsigned int in_mix_tlv
[] = {
497 TLV_DB_RANGE_HEAD(1),
498 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600),
501 /* Left In PGA Connections */
502 static const struct snd_kcontrol_new wm8990_dapm_lin12_pga_controls
[] = {
503 SOC_DAPM_SINGLE("LIN1 Switch", WM8990_INPUT_MIXER2
, WM8990_LMN1_BIT
, 1, 0),
504 SOC_DAPM_SINGLE("LIN2 Switch", WM8990_INPUT_MIXER2
, WM8990_LMP2_BIT
, 1, 0),
507 static const struct snd_kcontrol_new wm8990_dapm_lin34_pga_controls
[] = {
508 SOC_DAPM_SINGLE("LIN3 Switch", WM8990_INPUT_MIXER2
, WM8990_LMN3_BIT
, 1, 0),
509 SOC_DAPM_SINGLE("LIN4 Switch", WM8990_INPUT_MIXER2
, WM8990_LMP4_BIT
, 1, 0),
512 /* Right In PGA Connections */
513 static const struct snd_kcontrol_new wm8990_dapm_rin12_pga_controls
[] = {
514 SOC_DAPM_SINGLE("RIN1 Switch", WM8990_INPUT_MIXER2
, WM8990_RMN1_BIT
, 1, 0),
515 SOC_DAPM_SINGLE("RIN2 Switch", WM8990_INPUT_MIXER2
, WM8990_RMP2_BIT
, 1, 0),
518 static const struct snd_kcontrol_new wm8990_dapm_rin34_pga_controls
[] = {
519 SOC_DAPM_SINGLE("RIN3 Switch", WM8990_INPUT_MIXER2
, WM8990_RMN3_BIT
, 1, 0),
520 SOC_DAPM_SINGLE("RIN4 Switch", WM8990_INPUT_MIXER2
, WM8990_RMP4_BIT
, 1, 0),
524 static const struct snd_kcontrol_new wm8990_dapm_inmixl_controls
[] = {
525 SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8990_INPUT_MIXER3
,
526 WM8990_LDBVOL_SHIFT
, WM8990_LDBVOL_MASK
, 0, in_mix_tlv
),
527 SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8990_INPUT_MIXER5
, WM8990_LI2BVOL_SHIFT
,
529 SOC_DAPM_SINGLE("LINPGA12 Switch", WM8990_INPUT_MIXER3
, WM8990_L12MNB_BIT
,
531 SOC_DAPM_SINGLE("LINPGA34 Switch", WM8990_INPUT_MIXER3
, WM8990_L34MNB_BIT
,
536 static const struct snd_kcontrol_new wm8990_dapm_inmixr_controls
[] = {
537 SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8990_INPUT_MIXER4
,
538 WM8990_RDBVOL_SHIFT
, WM8990_RDBVOL_MASK
, 0, in_mix_tlv
),
539 SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8990_INPUT_MIXER6
, WM8990_RI2BVOL_SHIFT
,
541 SOC_DAPM_SINGLE("RINPGA12 Switch", WM8990_INPUT_MIXER3
, WM8990_L12MNB_BIT
,
543 SOC_DAPM_SINGLE("RINPGA34 Switch", WM8990_INPUT_MIXER3
, WM8990_L34MNB_BIT
,
548 static const char *wm8990_ainlmux
[] =
549 {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"};
551 static const struct soc_enum wm8990_ainlmux_enum
=
552 SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1
, WM8990_AINLMODE_SHIFT
,
553 ARRAY_SIZE(wm8990_ainlmux
), wm8990_ainlmux
);
555 static const struct snd_kcontrol_new wm8990_dapm_ainlmux_controls
=
556 SOC_DAPM_ENUM("Route", wm8990_ainlmux_enum
);
561 static const char *wm8990_ainrmux
[] =
562 {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"};
564 static const struct soc_enum wm8990_ainrmux_enum
=
565 SOC_ENUM_SINGLE(WM8990_INPUT_MIXER1
, WM8990_AINRMODE_SHIFT
,
566 ARRAY_SIZE(wm8990_ainrmux
), wm8990_ainrmux
);
568 static const struct snd_kcontrol_new wm8990_dapm_ainrmux_controls
=
569 SOC_DAPM_ENUM("Route", wm8990_ainrmux_enum
);
572 static const struct snd_kcontrol_new wm8990_dapm_rxvoice_controls
[] = {
573 SOC_DAPM_SINGLE_TLV("LIN4/RXN", WM8990_INPUT_MIXER5
, WM8990_LR4BVOL_SHIFT
,
574 WM8990_LR4BVOL_MASK
, 0, in_mix_tlv
),
575 SOC_DAPM_SINGLE_TLV("RIN4/RXP", WM8990_INPUT_MIXER6
, WM8990_RL4BVOL_SHIFT
,
576 WM8990_RL4BVOL_MASK
, 0, in_mix_tlv
),
580 static const struct snd_kcontrol_new wm8990_dapm_lomix_controls
[] = {
581 SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER1
,
582 WM8990_LRBLO_BIT
, 1, 0),
583 SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER1
,
584 WM8990_LLBLO_BIT
, 1, 0),
585 SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER1
,
586 WM8990_LRI3LO_BIT
, 1, 0),
587 SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER1
,
588 WM8990_LLI3LO_BIT
, 1, 0),
589 SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1
,
590 WM8990_LR12LO_BIT
, 1, 0),
591 SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER1
,
592 WM8990_LL12LO_BIT
, 1, 0),
593 SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8990_OUTPUT_MIXER1
,
594 WM8990_LDLO_BIT
, 1, 0),
598 static const struct snd_kcontrol_new wm8990_dapm_romix_controls
[] = {
599 SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8990_OUTPUT_MIXER2
,
600 WM8990_RLBRO_BIT
, 1, 0),
601 SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8990_OUTPUT_MIXER2
,
602 WM8990_RRBRO_BIT
, 1, 0),
603 SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8990_OUTPUT_MIXER2
,
604 WM8990_RLI3RO_BIT
, 1, 0),
605 SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8990_OUTPUT_MIXER2
,
606 WM8990_RRI3RO_BIT
, 1, 0),
607 SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2
,
608 WM8990_RL12RO_BIT
, 1, 0),
609 SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8990_OUTPUT_MIXER2
,
610 WM8990_RR12RO_BIT
, 1, 0),
611 SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8990_OUTPUT_MIXER2
,
612 WM8990_RDRO_BIT
, 1, 0),
616 static const struct snd_kcontrol_new wm8990_dapm_lonmix_controls
[] = {
617 SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1
,
618 WM8990_LLOPGALON_BIT
, 1, 0),
619 SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER1
,
620 WM8990_LROPGALON_BIT
, 1, 0),
621 SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8990_LINE_MIXER1
,
622 WM8990_LOPLON_BIT
, 1, 0),
626 static const struct snd_kcontrol_new wm8990_dapm_lopmix_controls
[] = {
627 SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER1
,
628 WM8990_LR12LOP_BIT
, 1, 0),
629 SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER1
,
630 WM8990_LL12LOP_BIT
, 1, 0),
631 SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8990_LINE_MIXER1
,
632 WM8990_LLOPGALOP_BIT
, 1, 0),
636 static const struct snd_kcontrol_new wm8990_dapm_ronmix_controls
[] = {
637 SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2
,
638 WM8990_RROPGARON_BIT
, 1, 0),
639 SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8990_LINE_MIXER2
,
640 WM8990_RLOPGARON_BIT
, 1, 0),
641 SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8990_LINE_MIXER2
,
642 WM8990_ROPRON_BIT
, 1, 0),
646 static const struct snd_kcontrol_new wm8990_dapm_ropmix_controls
[] = {
647 SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8990_LINE_MIXER2
,
648 WM8990_RL12ROP_BIT
, 1, 0),
649 SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8990_LINE_MIXER2
,
650 WM8990_RR12ROP_BIT
, 1, 0),
651 SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8990_LINE_MIXER2
,
652 WM8990_RROPGAROP_BIT
, 1, 0),
656 static const struct snd_kcontrol_new wm8990_dapm_out3mix_controls
[] = {
657 SOC_DAPM_SINGLE("OUT3MIX LIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER
,
658 WM8990_LI4O3_BIT
, 1, 0),
659 SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8990_OUT3_4_MIXER
,
660 WM8990_LPGAO3_BIT
, 1, 0),
664 static const struct snd_kcontrol_new wm8990_dapm_out4mix_controls
[] = {
665 SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8990_OUT3_4_MIXER
,
666 WM8990_RPGAO4_BIT
, 1, 0),
667 SOC_DAPM_SINGLE("OUT4MIX RIN4/RXP Bypass Switch", WM8990_OUT3_4_MIXER
,
668 WM8990_RI4O4_BIT
, 1, 0),
672 static const struct snd_kcontrol_new wm8990_dapm_spkmix_controls
[] = {
673 SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8990_SPEAKER_MIXER
,
674 WM8990_LI2SPK_BIT
, 1, 0),
675 SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8990_SPEAKER_MIXER
,
676 WM8990_LB2SPK_BIT
, 1, 0),
677 SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8990_SPEAKER_MIXER
,
678 WM8990_LOPGASPK_BIT
, 1, 0),
679 SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8990_SPEAKER_MIXER
,
680 WM8990_LDSPK_BIT
, 1, 0),
681 SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8990_SPEAKER_MIXER
,
682 WM8990_RDSPK_BIT
, 1, 0),
683 SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8990_SPEAKER_MIXER
,
684 WM8990_ROPGASPK_BIT
, 1, 0),
685 SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8990_SPEAKER_MIXER
,
686 WM8990_RL12ROP_BIT
, 1, 0),
687 SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8990_SPEAKER_MIXER
,
688 WM8990_RI2SPK_BIT
, 1, 0),
691 static const struct snd_soc_dapm_widget wm8990_dapm_widgets
[] = {
694 SND_SOC_DAPM_INPUT("LIN1"),
695 SND_SOC_DAPM_INPUT("LIN2"),
696 SND_SOC_DAPM_INPUT("LIN3"),
697 SND_SOC_DAPM_INPUT("LIN4/RXN"),
698 SND_SOC_DAPM_INPUT("RIN3"),
699 SND_SOC_DAPM_INPUT("RIN4/RXP"),
700 SND_SOC_DAPM_INPUT("RIN1"),
701 SND_SOC_DAPM_INPUT("RIN2"),
702 SND_SOC_DAPM_INPUT("Internal ADC Source"),
705 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8990_POWER_MANAGEMENT_2
,
706 WM8990_ADCL_ENA_BIT
, 0),
707 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8990_POWER_MANAGEMENT_2
,
708 WM8990_ADCR_ENA_BIT
, 0),
711 SND_SOC_DAPM_MIXER("LIN12 PGA", WM8990_POWER_MANAGEMENT_2
, WM8990_LIN12_ENA_BIT
,
712 0, &wm8990_dapm_lin12_pga_controls
[0],
713 ARRAY_SIZE(wm8990_dapm_lin12_pga_controls
)),
714 SND_SOC_DAPM_MIXER("LIN34 PGA", WM8990_POWER_MANAGEMENT_2
, WM8990_LIN34_ENA_BIT
,
715 0, &wm8990_dapm_lin34_pga_controls
[0],
716 ARRAY_SIZE(wm8990_dapm_lin34_pga_controls
)),
717 SND_SOC_DAPM_MIXER("RIN12 PGA", WM8990_POWER_MANAGEMENT_2
, WM8990_RIN12_ENA_BIT
,
718 0, &wm8990_dapm_rin12_pga_controls
[0],
719 ARRAY_SIZE(wm8990_dapm_rin12_pga_controls
)),
720 SND_SOC_DAPM_MIXER("RIN34 PGA", WM8990_POWER_MANAGEMENT_2
, WM8990_RIN34_ENA_BIT
,
721 0, &wm8990_dapm_rin34_pga_controls
[0],
722 ARRAY_SIZE(wm8990_dapm_rin34_pga_controls
)),
725 SND_SOC_DAPM_MIXER_E("INMIXL", WM8990_INTDRIVBITS
, WM8990_INMIXL_PWR_BIT
, 0,
726 &wm8990_dapm_inmixl_controls
[0],
727 ARRAY_SIZE(wm8990_dapm_inmixl_controls
),
728 inmixer_event
, SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
731 SND_SOC_DAPM_MUX_E("AILNMUX", WM8990_INTDRIVBITS
, WM8990_AINLMUX_PWR_BIT
, 0,
732 &wm8990_dapm_ainlmux_controls
, inmixer_event
,
733 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
736 SND_SOC_DAPM_MIXER_E("INMIXR", WM8990_INTDRIVBITS
, WM8990_INMIXR_PWR_BIT
, 0,
737 &wm8990_dapm_inmixr_controls
[0],
738 ARRAY_SIZE(wm8990_dapm_inmixr_controls
),
739 inmixer_event
, SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
742 SND_SOC_DAPM_MUX_E("AIRNMUX", WM8990_INTDRIVBITS
, WM8990_AINRMUX_PWR_BIT
, 0,
743 &wm8990_dapm_ainrmux_controls
, inmixer_event
,
744 SND_SOC_DAPM_POST_PMU
| SND_SOC_DAPM_POST_PMD
),
748 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8990_POWER_MANAGEMENT_3
,
749 WM8990_DACL_ENA_BIT
, 0),
750 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8990_POWER_MANAGEMENT_3
,
751 WM8990_DACR_ENA_BIT
, 0),
754 SND_SOC_DAPM_MIXER_E("LOMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_LOMIX_ENA_BIT
,
755 0, &wm8990_dapm_lomix_controls
[0],
756 ARRAY_SIZE(wm8990_dapm_lomix_controls
),
757 outmixer_event
, SND_SOC_DAPM_PRE_REG
),
760 SND_SOC_DAPM_MIXER("LONMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_LON_ENA_BIT
, 0,
761 &wm8990_dapm_lonmix_controls
[0],
762 ARRAY_SIZE(wm8990_dapm_lonmix_controls
)),
765 SND_SOC_DAPM_MIXER("LOPMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_LOP_ENA_BIT
, 0,
766 &wm8990_dapm_lopmix_controls
[0],
767 ARRAY_SIZE(wm8990_dapm_lopmix_controls
)),
770 SND_SOC_DAPM_MIXER("OUT3MIX", WM8990_POWER_MANAGEMENT_1
, WM8990_OUT3_ENA_BIT
, 0,
771 &wm8990_dapm_out3mix_controls
[0],
772 ARRAY_SIZE(wm8990_dapm_out3mix_controls
)),
775 SND_SOC_DAPM_MIXER_E("SPKMIX", WM8990_POWER_MANAGEMENT_1
, WM8990_SPK_ENA_BIT
, 0,
776 &wm8990_dapm_spkmix_controls
[0],
777 ARRAY_SIZE(wm8990_dapm_spkmix_controls
), outmixer_event
,
778 SND_SOC_DAPM_PRE_REG
),
781 SND_SOC_DAPM_MIXER("OUT4MIX", WM8990_POWER_MANAGEMENT_1
, WM8990_OUT4_ENA_BIT
, 0,
782 &wm8990_dapm_out4mix_controls
[0],
783 ARRAY_SIZE(wm8990_dapm_out4mix_controls
)),
786 SND_SOC_DAPM_MIXER("ROPMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_ROP_ENA_BIT
, 0,
787 &wm8990_dapm_ropmix_controls
[0],
788 ARRAY_SIZE(wm8990_dapm_ropmix_controls
)),
791 SND_SOC_DAPM_MIXER("RONMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_RON_ENA_BIT
, 0,
792 &wm8990_dapm_ronmix_controls
[0],
793 ARRAY_SIZE(wm8990_dapm_ronmix_controls
)),
796 SND_SOC_DAPM_MIXER_E("ROMIX", WM8990_POWER_MANAGEMENT_3
, WM8990_ROMIX_ENA_BIT
,
797 0, &wm8990_dapm_romix_controls
[0],
798 ARRAY_SIZE(wm8990_dapm_romix_controls
),
799 outmixer_event
, SND_SOC_DAPM_PRE_REG
),
802 SND_SOC_DAPM_PGA("LOUT PGA", WM8990_POWER_MANAGEMENT_1
, WM8990_LOUT_ENA_BIT
, 0,
806 SND_SOC_DAPM_PGA("ROUT PGA", WM8990_POWER_MANAGEMENT_1
, WM8990_ROUT_ENA_BIT
, 0,
810 SND_SOC_DAPM_PGA("LOPGA", WM8990_POWER_MANAGEMENT_3
, WM8990_LOPGA_ENA_BIT
, 0,
814 SND_SOC_DAPM_PGA("ROPGA", WM8990_POWER_MANAGEMENT_3
, WM8990_ROPGA_ENA_BIT
, 0,
818 SND_SOC_DAPM_MICBIAS("MICBIAS", WM8990_POWER_MANAGEMENT_1
,
819 WM8990_MICBIAS_ENA_BIT
, 0),
821 SND_SOC_DAPM_OUTPUT("LON"),
822 SND_SOC_DAPM_OUTPUT("LOP"),
823 SND_SOC_DAPM_OUTPUT("OUT3"),
824 SND_SOC_DAPM_OUTPUT("LOUT"),
825 SND_SOC_DAPM_OUTPUT("SPKN"),
826 SND_SOC_DAPM_OUTPUT("SPKP"),
827 SND_SOC_DAPM_OUTPUT("ROUT"),
828 SND_SOC_DAPM_OUTPUT("OUT4"),
829 SND_SOC_DAPM_OUTPUT("ROP"),
830 SND_SOC_DAPM_OUTPUT("RON"),
832 SND_SOC_DAPM_OUTPUT("Internal DAC Sink"),
835 static const struct snd_soc_dapm_route audio_map
[] = {
836 /* Make DACs turn on when playing even if not mixed into any outputs */
837 {"Internal DAC Sink", NULL
, "Left DAC"},
838 {"Internal DAC Sink", NULL
, "Right DAC"},
840 /* Make ADCs turn on when recording even if not mixed from any inputs */
841 {"Left ADC", NULL
, "Internal ADC Source"},
842 {"Right ADC", NULL
, "Internal ADC Source"},
846 {"LIN12 PGA", "LIN1 Switch", "LIN1"},
847 {"LIN12 PGA", "LIN2 Switch", "LIN2"},
849 {"LIN34 PGA", "LIN3 Switch", "LIN3"},
850 {"LIN34 PGA", "LIN4 Switch", "LIN4"},
852 {"INMIXL", "Record Left Volume", "LOMIX"},
853 {"INMIXL", "LIN2 Volume", "LIN2"},
854 {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"},
855 {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"},
857 {"AILNMUX", "INMIXL Mix", "INMIXL"},
858 {"AILNMUX", "DIFFINL Mix", "LIN12PGA"},
859 {"AILNMUX", "DIFFINL Mix", "LIN34PGA"},
860 {"AILNMUX", "RXVOICE Mix", "LIN4/RXN"},
861 {"AILNMUX", "RXVOICE Mix", "RIN4/RXP"},
863 {"Left ADC", NULL
, "AILNMUX"},
866 {"RIN12 PGA", "RIN1 Switch", "RIN1"},
867 {"RIN12 PGA", "RIN2 Switch", "RIN2"},
869 {"RIN34 PGA", "RIN3 Switch", "RIN3"},
870 {"RIN34 PGA", "RIN4 Switch", "RIN4"},
872 {"INMIXR", "Record Right Volume", "ROMIX"},
873 {"INMIXR", "RIN2 Volume", "RIN2"},
874 {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"},
875 {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"},
877 {"AIRNMUX", "INMIXR Mix", "INMIXR"},
878 {"AIRNMUX", "DIFFINR Mix", "RIN12PGA"},
879 {"AIRNMUX", "DIFFINR Mix", "RIN34PGA"},
880 {"AIRNMUX", "RXVOICE Mix", "RIN4/RXN"},
881 {"AIRNMUX", "RXVOICE Mix", "RIN4/RXP"},
883 {"Right ADC", NULL
, "AIRNMUX"},
886 {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"},
887 {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"},
888 {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
889 {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
890 {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"},
891 {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"},
892 {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"},
895 {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"},
896 {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"},
897 {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"},
898 {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"},
899 {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"},
900 {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"},
901 {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"},
904 {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"},
905 {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"},
906 {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"},
907 {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"},
908 {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"},
909 {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"},
910 {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"},
911 {"SPKMIX", "SPKMIX Left DAC Switch", "Left DAC"},
914 {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"},
915 {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"},
916 {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"},
919 {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"},
920 {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"},
921 {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"},
924 {"OUT3MIX", "OUT3MIX LIN4/RXP Bypass Switch", "LIN4/RXP"},
925 {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"},
928 {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"},
929 {"OUT4MIX", "OUT4MIX RIN4/RXP Bypass Switch", "RIN4/RXP"},
932 {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"},
933 {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"},
934 {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"},
937 {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"},
938 {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"},
939 {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"},
942 {"LOPGA", NULL
, "LOMIX"},
943 {"ROPGA", NULL
, "ROMIX"},
945 {"LOUT PGA", NULL
, "LOMIX"},
946 {"ROUT PGA", NULL
, "ROMIX"},
949 {"LON", NULL
, "LONMIX"},
950 {"LOP", NULL
, "LOPMIX"},
951 {"OUT", NULL
, "OUT3MIX"},
952 {"LOUT", NULL
, "LOUT PGA"},
953 {"SPKN", NULL
, "SPKMIX"},
954 {"ROUT", NULL
, "ROUT PGA"},
955 {"OUT4", NULL
, "OUT4MIX"},
956 {"ROP", NULL
, "ROPMIX"},
957 {"RON", NULL
, "RONMIX"},
960 static int wm8990_add_widgets(struct snd_soc_codec
*codec
)
962 snd_soc_dapm_new_controls(codec
, wm8990_dapm_widgets
,
963 ARRAY_SIZE(wm8990_dapm_widgets
));
965 /* set up the WM8990 audio map */
966 snd_soc_dapm_add_routes(codec
, audio_map
, ARRAY_SIZE(audio_map
));
968 snd_soc_dapm_new_widgets(codec
);
979 /* The size in bits of the pll divide multiplied by 10
980 * to allow rounding later */
981 #define FIXED_PLL_SIZE ((1 << 16) * 10)
983 static void pll_factors(struct _pll_div
*pll_div
, unsigned int target
,
987 unsigned int K
, Ndiv
, Nmod
;
990 Ndiv
= target
/ source
;
994 Ndiv
= target
/ source
;
998 if ((Ndiv
< 6) || (Ndiv
> 12))
1000 "WM8990 N value outwith recommended range! N = %d\n", Ndiv
);
1003 Nmod
= target
% source
;
1004 Kpart
= FIXED_PLL_SIZE
* (long long)Nmod
;
1006 do_div(Kpart
, source
);
1008 K
= Kpart
& 0xFFFFFFFF;
1010 /* Check if we need to round */
1014 /* Move down to proper range now rounding is done */
1020 static int wm8990_set_dai_pll(struct snd_soc_dai
*codec_dai
,
1021 int pll_id
, unsigned int freq_in
, unsigned int freq_out
)
1024 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1025 struct _pll_div pll_div
;
1027 if (freq_in
&& freq_out
) {
1028 pll_factors(&pll_div
, freq_out
* 4, freq_in
);
1031 reg
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_2
);
1032 reg
|= WM8990_PLL_ENA
;
1033 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_2
, reg
);
1035 /* sysclk comes from PLL */
1036 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_2
);
1037 wm8990_write(codec
, WM8990_CLOCKING_2
, reg
| WM8990_SYSCLK_SRC
);
1039 /* set up N , fractional mode and pre-divisor if neccessary */
1040 wm8990_write(codec
, WM8990_PLL1
, pll_div
.n
| WM8990_SDM
|
1041 (pll_div
.div2
?WM8990_PRESCALE
:0));
1042 wm8990_write(codec
, WM8990_PLL2
, (u8
)(pll_div
.k
>>8));
1043 wm8990_write(codec
, WM8990_PLL3
, (u8
)(pll_div
.k
& 0xFF));
1046 reg
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_2
);
1047 reg
&= ~WM8990_PLL_ENA
;
1048 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_2
, reg
);
1054 * Clock after PLL and dividers
1056 static int wm8990_set_dai_sysclk(struct snd_soc_dai
*codec_dai
,
1057 int clk_id
, unsigned int freq
, int dir
)
1059 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1060 struct wm8990_priv
*wm8990
= codec
->private_data
;
1062 wm8990
->sysclk
= freq
;
1067 * Set's ADC and Voice DAC format.
1069 static int wm8990_set_dai_fmt(struct snd_soc_dai
*codec_dai
,
1072 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1075 audio1
= wm8990_read_reg_cache(codec
, WM8990_AUDIO_INTERFACE_1
);
1076 audio3
= wm8990_read_reg_cache(codec
, WM8990_AUDIO_INTERFACE_3
);
1078 /* set master/slave audio interface */
1079 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
1080 case SND_SOC_DAIFMT_CBS_CFS
:
1081 audio3
&= ~WM8990_AIF_MSTR1
;
1083 case SND_SOC_DAIFMT_CBM_CFM
:
1084 audio3
|= WM8990_AIF_MSTR1
;
1090 audio1
&= ~WM8990_AIF_FMT_MASK
;
1092 /* interface format */
1093 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
1094 case SND_SOC_DAIFMT_I2S
:
1095 audio1
|= WM8990_AIF_TMF_I2S
;
1096 audio1
&= ~WM8990_AIF_LRCLK_INV
;
1098 case SND_SOC_DAIFMT_RIGHT_J
:
1099 audio1
|= WM8990_AIF_TMF_RIGHTJ
;
1100 audio1
&= ~WM8990_AIF_LRCLK_INV
;
1102 case SND_SOC_DAIFMT_LEFT_J
:
1103 audio1
|= WM8990_AIF_TMF_LEFTJ
;
1104 audio1
&= ~WM8990_AIF_LRCLK_INV
;
1106 case SND_SOC_DAIFMT_DSP_A
:
1107 audio1
|= WM8990_AIF_TMF_DSP
;
1108 audio1
&= ~WM8990_AIF_LRCLK_INV
;
1110 case SND_SOC_DAIFMT_DSP_B
:
1111 audio1
|= WM8990_AIF_TMF_DSP
| WM8990_AIF_LRCLK_INV
;
1117 wm8990_write(codec
, WM8990_AUDIO_INTERFACE_1
, audio1
);
1118 wm8990_write(codec
, WM8990_AUDIO_INTERFACE_3
, audio3
);
1122 static int wm8990_set_dai_clkdiv(struct snd_soc_dai
*codec_dai
,
1123 int div_id
, int div
)
1125 struct snd_soc_codec
*codec
= codec_dai
->codec
;
1129 case WM8990_MCLK_DIV
:
1130 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_2
) &
1131 ~WM8990_MCLK_DIV_MASK
;
1132 wm8990_write(codec
, WM8990_CLOCKING_2
, reg
| div
);
1134 case WM8990_DACCLK_DIV
:
1135 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_2
) &
1136 ~WM8990_DAC_CLKDIV_MASK
;
1137 wm8990_write(codec
, WM8990_CLOCKING_2
, reg
| div
);
1139 case WM8990_ADCCLK_DIV
:
1140 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_2
) &
1141 ~WM8990_ADC_CLKDIV_MASK
;
1142 wm8990_write(codec
, WM8990_CLOCKING_2
, reg
| div
);
1144 case WM8990_BCLK_DIV
:
1145 reg
= wm8990_read_reg_cache(codec
, WM8990_CLOCKING_1
) &
1146 ~WM8990_BCLK_DIV_MASK
;
1147 wm8990_write(codec
, WM8990_CLOCKING_1
, reg
| div
);
1157 * Set PCM DAI bit size and sample rate.
1159 static int wm8990_hw_params(struct snd_pcm_substream
*substream
,
1160 struct snd_pcm_hw_params
*params
,
1161 struct snd_soc_dai
*dai
)
1163 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
1164 struct snd_soc_device
*socdev
= rtd
->socdev
;
1165 struct snd_soc_codec
*codec
= socdev
->codec
;
1166 u16 audio1
= wm8990_read_reg_cache(codec
, WM8990_AUDIO_INTERFACE_1
);
1168 audio1
&= ~WM8990_AIF_WL_MASK
;
1170 switch (params_format(params
)) {
1171 case SNDRV_PCM_FORMAT_S16_LE
:
1173 case SNDRV_PCM_FORMAT_S20_3LE
:
1174 audio1
|= WM8990_AIF_WL_20BITS
;
1176 case SNDRV_PCM_FORMAT_S24_LE
:
1177 audio1
|= WM8990_AIF_WL_24BITS
;
1179 case SNDRV_PCM_FORMAT_S32_LE
:
1180 audio1
|= WM8990_AIF_WL_32BITS
;
1184 wm8990_write(codec
, WM8990_AUDIO_INTERFACE_1
, audio1
);
1188 static int wm8990_mute(struct snd_soc_dai
*dai
, int mute
)
1190 struct snd_soc_codec
*codec
= dai
->codec
;
1193 val
= wm8990_read_reg_cache(codec
, WM8990_DAC_CTRL
) & ~WM8990_DAC_MUTE
;
1196 wm8990_write(codec
, WM8990_DAC_CTRL
, val
| WM8990_DAC_MUTE
);
1198 wm8990_write(codec
, WM8990_DAC_CTRL
, val
);
1203 static int wm8990_set_bias_level(struct snd_soc_codec
*codec
,
1204 enum snd_soc_bias_level level
)
1209 case SND_SOC_BIAS_ON
:
1212 case SND_SOC_BIAS_PREPARE
:
1214 val
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_1
) &
1215 ~WM8990_VMID_MODE_MASK
;
1216 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, val
| 0x2);
1219 case SND_SOC_BIAS_STANDBY
:
1220 if (codec
->bias_level
== SND_SOC_BIAS_OFF
) {
1221 /* Enable all output discharge bits */
1222 wm8990_write(codec
, WM8990_ANTIPOP1
, WM8990_DIS_LLINE
|
1223 WM8990_DIS_RLINE
| WM8990_DIS_OUT3
|
1224 WM8990_DIS_OUT4
| WM8990_DIS_LOUT
|
1227 /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */
1228 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1229 WM8990_BUFDCOPEN
| WM8990_POBCTRL
|
1232 /* Delay to allow output caps to discharge */
1233 msleep(msecs_to_jiffies(300));
1235 /* Disable VMIDTOG */
1236 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1237 WM8990_BUFDCOPEN
| WM8990_POBCTRL
);
1239 /* disable all output discharge bits */
1240 wm8990_write(codec
, WM8990_ANTIPOP1
, 0);
1242 /* Enable outputs */
1243 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1b00);
1245 msleep(msecs_to_jiffies(50));
1247 /* Enable VMID at 2x50k */
1248 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1f02);
1250 msleep(msecs_to_jiffies(100));
1253 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1f03);
1255 msleep(msecs_to_jiffies(600));
1257 /* Enable BUFIOEN */
1258 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1259 WM8990_BUFDCOPEN
| WM8990_POBCTRL
|
1262 /* Disable outputs */
1263 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x3);
1265 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1266 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_BUFIOEN
);
1268 /* Enable workaround for ADC clocking issue. */
1269 wm8990_write(codec
, WM8990_EXT_ACCESS_ENA
, 0x2);
1270 wm8990_write(codec
, WM8990_EXT_CTL1
, 0xa003);
1271 wm8990_write(codec
, WM8990_EXT_ACCESS_ENA
, 0);
1275 val
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_1
) &
1276 ~WM8990_VMID_MODE_MASK
;
1277 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, val
| 0x4);
1280 case SND_SOC_BIAS_OFF
:
1281 /* Enable POBCTRL and SOFT_ST */
1282 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1283 WM8990_POBCTRL
| WM8990_BUFIOEN
);
1285 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */
1286 wm8990_write(codec
, WM8990_ANTIPOP2
, WM8990_SOFTST
|
1287 WM8990_BUFDCOPEN
| WM8990_POBCTRL
|
1291 val
= wm8990_read_reg_cache(codec
, WM8990_DAC_CTRL
);
1292 wm8990_write(codec
, WM8990_DAC_CTRL
, val
| WM8990_DAC_MUTE
);
1294 /* Enable any disabled outputs */
1295 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1f03);
1298 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x1f01);
1300 msleep(msecs_to_jiffies(300));
1302 /* Enable all output discharge bits */
1303 wm8990_write(codec
, WM8990_ANTIPOP1
, WM8990_DIS_LLINE
|
1304 WM8990_DIS_RLINE
| WM8990_DIS_OUT3
|
1305 WM8990_DIS_OUT4
| WM8990_DIS_LOUT
|
1309 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_1
, 0x0);
1311 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */
1312 wm8990_write(codec
, WM8990_ANTIPOP2
, 0x0);
1316 codec
->bias_level
= level
;
1320 #define WM8990_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
1321 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
1322 SNDRV_PCM_RATE_48000)
1324 #define WM8990_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
1325 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1328 * The WM8990 supports 2 different and mutually exclusive DAI
1331 * 1. ADC/DAC on Primary Interface
1332 * 2. ADC on Primary Interface/DAC on secondary
1334 struct snd_soc_dai wm8990_dai
= {
1335 /* ADC/DAC on primary */
1336 .name
= "WM8990 ADC/DAC Primary",
1339 .stream_name
= "Playback",
1342 .rates
= WM8990_RATES
,
1343 .formats
= WM8990_FORMATS
,},
1345 .stream_name
= "Capture",
1348 .rates
= WM8990_RATES
,
1349 .formats
= WM8990_FORMATS
,},
1351 .hw_params
= wm8990_hw_params
,
1352 .digital_mute
= wm8990_mute
,
1353 .set_fmt
= wm8990_set_dai_fmt
,
1354 .set_clkdiv
= wm8990_set_dai_clkdiv
,
1355 .set_pll
= wm8990_set_dai_pll
,
1356 .set_sysclk
= wm8990_set_dai_sysclk
,
1359 EXPORT_SYMBOL_GPL(wm8990_dai
);
1361 static int wm8990_suspend(struct platform_device
*pdev
, pm_message_t state
)
1363 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1364 struct snd_soc_codec
*codec
= socdev
->codec
;
1366 /* we only need to suspend if we are a valid card */
1370 wm8990_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1374 static int wm8990_resume(struct platform_device
*pdev
)
1376 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1377 struct snd_soc_codec
*codec
= socdev
->codec
;
1380 u16
*cache
= codec
->reg_cache
;
1382 /* we only need to resume if we are a valid card */
1386 /* Sync reg_cache with the hardware */
1387 for (i
= 0; i
< ARRAY_SIZE(wm8990_reg
); i
++) {
1388 if (i
+ 1 == WM8990_RESET
)
1390 data
[0] = ((i
+ 1) << 1) | ((cache
[i
] >> 8) & 0x0001);
1391 data
[1] = cache
[i
] & 0x00ff;
1392 codec
->hw_write(codec
->control_data
, data
, 2);
1395 wm8990_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1400 * initialise the WM8990 driver
1401 * register the mixer and dsp interfaces with the kernel
1403 static int wm8990_init(struct snd_soc_device
*socdev
)
1405 struct snd_soc_codec
*codec
= socdev
->codec
;
1409 codec
->name
= "WM8990";
1410 codec
->owner
= THIS_MODULE
;
1411 codec
->read
= wm8990_read_reg_cache
;
1412 codec
->write
= wm8990_write
;
1413 codec
->set_bias_level
= wm8990_set_bias_level
;
1414 codec
->dai
= &wm8990_dai
;
1416 codec
->reg_cache_size
= ARRAY_SIZE(wm8990_reg
);
1417 codec
->reg_cache
= kmemdup(wm8990_reg
, sizeof(wm8990_reg
), GFP_KERNEL
);
1419 if (codec
->reg_cache
== NULL
)
1422 wm8990_reset(codec
);
1425 ret
= snd_soc_new_pcms(socdev
, SNDRV_DEFAULT_IDX1
, SNDRV_DEFAULT_STR1
);
1427 printk(KERN_ERR
"wm8990: failed to create pcms\n");
1431 /* charge output caps */
1432 codec
->bias_level
= SND_SOC_BIAS_OFF
;
1433 wm8990_set_bias_level(codec
, SND_SOC_BIAS_STANDBY
);
1435 reg
= wm8990_read_reg_cache(codec
, WM8990_AUDIO_INTERFACE_4
);
1436 wm8990_write(codec
, WM8990_AUDIO_INTERFACE_4
, reg
| WM8990_ALRCGPIO1
);
1438 reg
= wm8990_read_reg_cache(codec
, WM8990_GPIO1_GPIO2
) &
1439 ~WM8990_GPIO1_SEL_MASK
;
1440 wm8990_write(codec
, WM8990_GPIO1_GPIO2
, reg
| 1);
1442 reg
= wm8990_read_reg_cache(codec
, WM8990_POWER_MANAGEMENT_2
);
1443 wm8990_write(codec
, WM8990_POWER_MANAGEMENT_2
, reg
| WM8990_OPCLK_ENA
);
1445 wm8990_write(codec
, WM8990_LEFT_OUTPUT_VOLUME
, 0x50 | (1<<8));
1446 wm8990_write(codec
, WM8990_RIGHT_OUTPUT_VOLUME
, 0x50 | (1<<8));
1448 snd_soc_add_controls(codec
, wm8990_snd_controls
,
1449 ARRAY_SIZE(wm8990_snd_controls
));
1450 wm8990_add_widgets(codec
);
1451 ret
= snd_soc_init_card(socdev
);
1453 printk(KERN_ERR
"wm8990: failed to register card\n");
1459 snd_soc_free_pcms(socdev
);
1460 snd_soc_dapm_free(socdev
);
1462 kfree(codec
->reg_cache
);
1466 /* If the i2c layer weren't so broken, we could pass this kind of data
1468 static struct snd_soc_device
*wm8990_socdev
;
1470 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1473 * WM891 2 wire address is determined by GPIO5
1474 * state during powerup.
1479 static int wm8990_i2c_probe(struct i2c_client
*i2c
,
1480 const struct i2c_device_id
*id
)
1482 struct snd_soc_device
*socdev
= wm8990_socdev
;
1483 struct snd_soc_codec
*codec
= socdev
->codec
;
1486 i2c_set_clientdata(i2c
, codec
);
1487 codec
->control_data
= i2c
;
1489 ret
= wm8990_init(socdev
);
1491 pr_err("failed to initialise WM8990\n");
1496 static int wm8990_i2c_remove(struct i2c_client
*client
)
1498 struct snd_soc_codec
*codec
= i2c_get_clientdata(client
);
1499 kfree(codec
->reg_cache
);
1503 static const struct i2c_device_id wm8990_i2c_id
[] = {
1507 MODULE_DEVICE_TABLE(i2c
, wm8990_i2c_id
);
1509 static struct i2c_driver wm8990_i2c_driver
= {
1511 .name
= "WM8990 I2C Codec",
1512 .owner
= THIS_MODULE
,
1514 .probe
= wm8990_i2c_probe
,
1515 .remove
= wm8990_i2c_remove
,
1516 .id_table
= wm8990_i2c_id
,
1519 static int wm8990_add_i2c_device(struct platform_device
*pdev
,
1520 const struct wm8990_setup_data
*setup
)
1522 struct i2c_board_info info
;
1523 struct i2c_adapter
*adapter
;
1524 struct i2c_client
*client
;
1527 ret
= i2c_add_driver(&wm8990_i2c_driver
);
1529 dev_err(&pdev
->dev
, "can't add i2c driver\n");
1533 memset(&info
, 0, sizeof(struct i2c_board_info
));
1534 info
.addr
= setup
->i2c_address
;
1535 strlcpy(info
.type
, "wm8990", I2C_NAME_SIZE
);
1537 adapter
= i2c_get_adapter(setup
->i2c_bus
);
1539 dev_err(&pdev
->dev
, "can't get i2c adapter %d\n",
1544 client
= i2c_new_device(adapter
, &info
);
1545 i2c_put_adapter(adapter
);
1547 dev_err(&pdev
->dev
, "can't add i2c device at 0x%x\n",
1548 (unsigned int)info
.addr
);
1555 i2c_del_driver(&wm8990_i2c_driver
);
1560 static int wm8990_probe(struct platform_device
*pdev
)
1562 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1563 struct wm8990_setup_data
*setup
;
1564 struct snd_soc_codec
*codec
;
1565 struct wm8990_priv
*wm8990
;
1568 pr_info("WM8990 Audio Codec %s\n", WM8990_VERSION
);
1570 setup
= socdev
->codec_data
;
1571 codec
= kzalloc(sizeof(struct snd_soc_codec
), GFP_KERNEL
);
1575 wm8990
= kzalloc(sizeof(struct wm8990_priv
), GFP_KERNEL
);
1576 if (wm8990
== NULL
) {
1581 codec
->private_data
= wm8990
;
1582 socdev
->codec
= codec
;
1583 mutex_init(&codec
->mutex
);
1584 INIT_LIST_HEAD(&codec
->dapm_widgets
);
1585 INIT_LIST_HEAD(&codec
->dapm_paths
);
1586 wm8990_socdev
= socdev
;
1590 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1591 if (setup
->i2c_address
) {
1592 codec
->hw_write
= (hw_write_t
)i2c_master_send
;
1593 ret
= wm8990_add_i2c_device(pdev
, setup
);
1598 kfree(codec
->private_data
);
1604 /* power down chip */
1605 static int wm8990_remove(struct platform_device
*pdev
)
1607 struct snd_soc_device
*socdev
= platform_get_drvdata(pdev
);
1608 struct snd_soc_codec
*codec
= socdev
->codec
;
1610 if (codec
->control_data
)
1611 wm8990_set_bias_level(codec
, SND_SOC_BIAS_OFF
);
1612 snd_soc_free_pcms(socdev
);
1613 snd_soc_dapm_free(socdev
);
1614 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
1615 i2c_unregister_device(codec
->control_data
);
1616 i2c_del_driver(&wm8990_i2c_driver
);
1618 kfree(codec
->private_data
);
1624 struct snd_soc_codec_device soc_codec_dev_wm8990
= {
1625 .probe
= wm8990_probe
,
1626 .remove
= wm8990_remove
,
1627 .suspend
= wm8990_suspend
,
1628 .resume
= wm8990_resume
,
1630 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8990
);
1632 static int __init
wm8990_modinit(void)
1634 return snd_soc_register_dai(&wm8990_dai
);
1636 module_init(wm8990_modinit
);
1638 static void __exit
wm8990_exit(void)
1640 snd_soc_unregister_dai(&wm8990_dai
);
1642 module_exit(wm8990_exit
);
1644 MODULE_DESCRIPTION("ASoC WM8990 driver");
1645 MODULE_AUTHOR("Liam Girdwood");
1646 MODULE_LICENSE("GPL");