Merge branch 'for-2.6.36' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...
[deliverable/linux.git] / sound / soc / fsl / mpc5200_psc_ac97.c
1 /*
2 * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip.
3 *
4 * Copyright (C) 2009 Jon Smirl, Digispeaker
5 * Author: Jon Smirl <jonsmirl@gmail.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12 #include <linux/module.h>
13 #include <linux/of_device.h>
14 #include <linux/of_platform.h>
15 #include <linux/delay.h>
16
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/soc.h>
20
21 #include <asm/time.h>
22 #include <asm/delay.h>
23 #include <asm/mpc52xx_psc.h>
24
25 #include "mpc5200_dma.h"
26 #include "mpc5200_psc_ac97.h"
27
28 #define DRV_NAME "mpc5200-psc-ac97"
29
30 /* ALSA only supports a single AC97 device so static is recommend here */
31 static struct psc_dma *psc_dma;
32
33 static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
34 {
35 int status;
36 unsigned int val;
37
38 mutex_lock(&psc_dma->mutex);
39
40 /* Wait for command send status zero = ready */
41 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
42 MPC52xx_PSC_SR_CMDSEND), 100, 0);
43 if (status == 0) {
44 pr_err("timeout on ac97 bus (rdy)\n");
45 mutex_unlock(&psc_dma->mutex);
46 return -ENODEV;
47 }
48
49 /* Force clear the data valid bit */
50 in_be32(&psc_dma->psc_regs->ac97_data);
51
52 /* Send the read */
53 out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24));
54
55 /* Wait for the answer */
56 status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) &
57 MPC52xx_PSC_SR_DATA_VAL), 100, 0);
58 if (status == 0) {
59 pr_err("timeout on ac97 read (val) %x\n",
60 in_be16(&psc_dma->psc_regs->sr_csr.status));
61 mutex_unlock(&psc_dma->mutex);
62 return -ENODEV;
63 }
64 /* Get the data */
65 val = in_be32(&psc_dma->psc_regs->ac97_data);
66 if (((val >> 24) & 0x7f) != reg) {
67 pr_err("reg echo error on ac97 read\n");
68 mutex_unlock(&psc_dma->mutex);
69 return -ENODEV;
70 }
71 val = (val >> 8) & 0xffff;
72
73 mutex_unlock(&psc_dma->mutex);
74 return (unsigned short) val;
75 }
76
77 static void psc_ac97_write(struct snd_ac97 *ac97,
78 unsigned short reg, unsigned short val)
79 {
80 int status;
81
82 mutex_lock(&psc_dma->mutex);
83
84 /* Wait for command status zero = ready */
85 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) &
86 MPC52xx_PSC_SR_CMDSEND), 100, 0);
87 if (status == 0) {
88 pr_err("timeout on ac97 bus (write)\n");
89 goto out;
90 }
91 /* Write data */
92 out_be32(&psc_dma->psc_regs->ac97_cmd,
93 ((reg & 0x7f) << 24) | (val << 8));
94
95 out:
96 mutex_unlock(&psc_dma->mutex);
97 }
98
99 static void psc_ac97_warm_reset(struct snd_ac97 *ac97)
100 {
101 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
102
103 out_be32(&regs->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR);
104 udelay(3);
105 out_be32(&regs->sicr, psc_dma->sicr);
106 }
107
108 static void psc_ac97_cold_reset(struct snd_ac97 *ac97)
109 {
110 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
111
112 /* Do a cold reset */
113 out_8(&regs->op1, MPC52xx_PSC_OP_RES);
114 udelay(10);
115 out_8(&regs->op0, MPC52xx_PSC_OP_RES);
116 msleep(1);
117 psc_ac97_warm_reset(ac97);
118 }
119
120 struct snd_ac97_bus_ops soc_ac97_ops = {
121 .read = psc_ac97_read,
122 .write = psc_ac97_write,
123 .reset = psc_ac97_cold_reset,
124 .warm_reset = psc_ac97_warm_reset,
125 };
126 EXPORT_SYMBOL_GPL(soc_ac97_ops);
127
128 static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream,
129 struct snd_pcm_hw_params *params,
130 struct snd_soc_dai *cpu_dai)
131 {
132 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
133 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
134
135 dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i"
136 " periods=%i buffer_size=%i buffer_bytes=%i channels=%i"
137 " rate=%i format=%i\n",
138 __func__, substream, params_period_size(params),
139 params_period_bytes(params), params_periods(params),
140 params_buffer_size(params), params_buffer_bytes(params),
141 params_channels(params), params_rate(params),
142 params_format(params));
143
144 /* Determine the set of enable bits to turn on */
145 s->ac97_slot_bits = (params_channels(params) == 1) ? 0x100 : 0x300;
146 if (substream->pstr->stream != SNDRV_PCM_STREAM_CAPTURE)
147 s->ac97_slot_bits <<= 16;
148 return 0;
149 }
150
151 static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream,
152 struct snd_pcm_hw_params *params,
153 struct snd_soc_dai *cpu_dai)
154 {
155 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
156
157 dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream);
158
159 if (params_channels(params) == 1)
160 out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000);
161 else
162 out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000);
163
164 return 0;
165 }
166
167 static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd,
168 struct snd_soc_dai *dai)
169 {
170 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(dai);
171 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
172
173 switch (cmd) {
174 case SNDRV_PCM_TRIGGER_START:
175 dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n",
176 substream->pstr->stream);
177
178 /* Set the slot enable bits */
179 psc_dma->slots |= s->ac97_slot_bits;
180 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
181 break;
182
183 case SNDRV_PCM_TRIGGER_STOP:
184 dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n",
185 substream->pstr->stream);
186
187 /* Clear the slot enable bits */
188 psc_dma->slots &= ~(s->ac97_slot_bits);
189 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots);
190 break;
191 }
192 return 0;
193 }
194
195 static int psc_ac97_probe(struct snd_soc_dai *cpu_dai)
196 {
197 struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(cpu_dai);
198 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
199
200 /* Go */
201 out_8(&regs->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE);
202 return 0;
203 }
204
205 /* ---------------------------------------------------------------------
206 * ALSA SoC Bindings
207 *
208 * - Digital Audio Interface (DAI) template
209 * - create/destroy dai hooks
210 */
211
212 /**
213 * psc_ac97_dai_template: template CPU Digital Audio Interface
214 */
215 static struct snd_soc_dai_ops psc_ac97_analog_ops = {
216 .hw_params = psc_ac97_hw_analog_params,
217 .trigger = psc_ac97_trigger,
218 };
219
220 static struct snd_soc_dai_ops psc_ac97_digital_ops = {
221 .hw_params = psc_ac97_hw_digital_params,
222 };
223
224 static struct snd_soc_dai_driver psc_ac97_dai[] = {
225 {
226 .ac97_control = 1,
227 .probe = psc_ac97_probe,
228 .playback = {
229 .channels_min = 1,
230 .channels_max = 6,
231 .rates = SNDRV_PCM_RATE_8000_48000,
232 .formats = SNDRV_PCM_FMTBIT_S32_BE,
233 },
234 .capture = {
235 .channels_min = 1,
236 .channels_max = 2,
237 .rates = SNDRV_PCM_RATE_8000_48000,
238 .formats = SNDRV_PCM_FMTBIT_S32_BE,
239 },
240 .ops = &psc_ac97_analog_ops,
241 },
242 {
243 .ac97_control = 1,
244 .playback = {
245 .channels_min = 1,
246 .channels_max = 2,
247 .rates = SNDRV_PCM_RATE_32000 | \
248 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000,
249 .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE,
250 },
251 .ops = &psc_ac97_digital_ops,
252 } };
253
254
255
256 /* ---------------------------------------------------------------------
257 * OF platform bus binding code:
258 * - Probe/remove operations
259 * - OF device match table
260 */
261 static int __devinit psc_ac97_of_probe(struct of_device *op,
262 const struct of_device_id *match)
263 {
264 int rc;
265 struct snd_ac97 ac97;
266 struct mpc52xx_psc __iomem *regs;
267
268 rc = snd_soc_register_dais(&op->dev, psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai));
269 if (rc != 0) {
270 dev_err(&op->dev, "Failed to register DAI\n");
271 return rc;
272 }
273
274 psc_dma = dev_get_drvdata(&op->dev);
275 regs = psc_dma->psc_regs;
276 ac97.private_data = psc_dma;
277
278 psc_dma->imr = 0;
279 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
280
281 /* Configure the serial interface mode to AC97 */
282 psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97;
283 out_be32(&regs->sicr, psc_dma->sicr);
284
285 /* No slots active */
286 out_be32(&regs->ac97_slots, 0x00000000);
287
288 return 0;
289 }
290
291 static int __devexit psc_ac97_of_remove(struct of_device *op)
292 {
293 snd_soc_unregister_dais(&op->dev, ARRAY_SIZE(psc_ac97_dai));
294 return 0;
295 }
296
297 /* Match table for of_platform binding */
298 static struct of_device_id psc_ac97_match[] __devinitdata = {
299 { .compatible = "fsl,mpc5200-psc-ac97", },
300 { .compatible = "fsl,mpc5200b-psc-ac97", },
301 {}
302 };
303 MODULE_DEVICE_TABLE(of, psc_ac97_match);
304
305 static struct of_platform_driver psc_ac97_driver = {
306 .probe = psc_ac97_of_probe,
307 .remove = __devexit_p(psc_ac97_of_remove),
308 .driver = {
309 .name = "mpc5200-psc-ac97",
310 .owner = THIS_MODULE,
311 .of_match_table = psc_ac97_match,
312 },
313 };
314
315 /* ---------------------------------------------------------------------
316 * Module setup and teardown; simply register the of_platform driver
317 * for the PSC in AC97 mode.
318 */
319 static int __init psc_ac97_init(void)
320 {
321 return of_register_platform_driver(&psc_ac97_driver);
322 }
323 module_init(psc_ac97_init);
324
325 static void __exit psc_ac97_exit(void)
326 {
327 of_unregister_platform_driver(&psc_ac97_driver);
328 }
329 module_exit(psc_ac97_exit);
330
331 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>");
332 MODULE_DESCRIPTION("mpc5200 AC97 module");
333 MODULE_LICENSE("GPL");
334
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