sound/soc/intel/skylake/skl-messages.c

   1 /*
   2  *  skl-message.c - HDA DSP interface for FW registration, Pipe and Module
   3  *  configurations
   4  *
   5  *  Copyright (C) 2015 Intel Corp
   6  *  Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
   7  *         Jeeja KP <jeeja.kp@intel.com>
   8  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as version 2, as
  12  * published by the Free Software Foundation.
  13  *
  14  * This program is distributed in the hope that it will be useful, but
  15  * WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  17  * General Public License for more details.
  18  */
  19
  20 #include <linux/slab.h>
  21 #include <linux/pci.h>
  22 #include <sound/core.h>
  23 #include <sound/pcm.h>
  24 #include "skl-sst-dsp.h"
  25 #include "skl-sst-ipc.h"
  26 #include "skl.h"
  27 #include "../common/sst-dsp.h"
  28 #include "../common/sst-dsp-priv.h"
  29 #include "skl-topology.h"
  30 #include "skl-tplg-interface.h"
  31
  32 static int skl_alloc_dma_buf(struct device *dev,
  33                 struct snd_dma_buffer *dmab, size_t size)
  34 {
  35         struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
  36         struct hdac_bus *bus = ebus_to_hbus(ebus);
  37
  38         if (!bus)
  39                 return -ENODEV;
  40
  41         return  bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
  42 }
  43
  44 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
  45 {
  46         struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
  47         struct hdac_bus *bus = ebus_to_hbus(ebus);
  48
  49         if (!bus)
  50                 return -ENODEV;
  51
  52         bus->io_ops->dma_free_pages(bus, dmab);
  53
  54         return 0;
  55 }
  56
  57 int skl_init_dsp(struct skl *skl)
  58 {
  59         void __iomem *mmio_base;
  60         struct hdac_ext_bus *ebus = &skl->ebus;
  61         struct hdac_bus *bus = ebus_to_hbus(ebus);
  62         int irq = bus->irq;
  63         struct skl_dsp_loader_ops loader_ops;
  64         int ret;
  65
  66         loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
  67         loader_ops.free_dma_buf = skl_free_dma_buf;
  68
  69         /* enable ppcap interrupt */
  70         snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
  71         snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
  72
  73         /* read the BAR of the ADSP MMIO */
  74         mmio_base = pci_ioremap_bar(skl->pci, 4);
  75         if (mmio_base == NULL) {
  76                 dev_err(bus->dev, "ioremap error\n");
  77                 return -ENXIO;
  78         }
  79
  80         ret = skl_sst_dsp_init(bus->dev, mmio_base, irq,
  81                         loader_ops, &skl->skl_sst);
  82
  83         dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
  84
  85         return ret;
  86 }
  87
  88 void skl_free_dsp(struct skl *skl)
  89 {
  90         struct hdac_ext_bus *ebus = &skl->ebus;
  91         struct hdac_bus *bus = ebus_to_hbus(ebus);
  92         struct skl_sst *ctx =  skl->skl_sst;
  93
  94         /* disable  ppcap interrupt */
  95         snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
  96
  97         skl_sst_dsp_cleanup(bus->dev, ctx);
  98         if (ctx->dsp->addr.lpe)
  99                 iounmap(ctx->dsp->addr.lpe);
 100 }
 101
 102 int skl_suspend_dsp(struct skl *skl)
 103 {
 104         struct skl_sst *ctx = skl->skl_sst;
 105         int ret;
 106
 107         /* if ppcap is not supported return 0 */
 108         if (!skl->ebus.ppcap)
 109                 return 0;
 110
 111         ret = skl_dsp_sleep(ctx->dsp);
 112         if (ret < 0)
 113                 return ret;
 114
 115         /* disable ppcap interrupt */
 116         snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false);
 117         snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false);
 118
 119         return 0;
 120 }
 121
 122 int skl_resume_dsp(struct skl *skl)
 123 {
 124         struct skl_sst *ctx = skl->skl_sst;
 125
 126         /* if ppcap is not supported return 0 */
 127         if (!skl->ebus.ppcap)
 128                 return 0;
 129
 130         /* enable ppcap interrupt */
 131         snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true);
 132         snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true);
 133
 134         return skl_dsp_wake(ctx->dsp);
 135 }
 136
 137 enum skl_bitdepth skl_get_bit_depth(int params)
 138 {
 139         switch (params) {
 140         case 8:
 141                 return SKL_DEPTH_8BIT;
 142
 143         case 16:
 144                 return SKL_DEPTH_16BIT;
 145
 146         case 24:
 147                 return SKL_DEPTH_24BIT;
 148
 149         case 32:
 150                 return SKL_DEPTH_32BIT;
 151
 152         default:
 153                 return SKL_DEPTH_INVALID;
 154
 155         }
 156 }
 157
 158 static u32 skl_create_channel_map(enum skl_ch_cfg ch_cfg)
 159 {
 160         u32 config;
 161
 162         switch (ch_cfg) {
 163         case SKL_CH_CFG_MONO:
 164                 config =  (0xFFFFFFF0 | SKL_CHANNEL_LEFT);
 165                 break;
 166
 167         case SKL_CH_CFG_STEREO:
 168                 config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
 169                         | (SKL_CHANNEL_RIGHT << 4));
 170                 break;
 171
 172         case SKL_CH_CFG_2_1:
 173                 config = (0xFFFFF000 | SKL_CHANNEL_LEFT
 174                         | (SKL_CHANNEL_RIGHT << 4)
 175                         | (SKL_CHANNEL_LFE << 8));
 176                 break;
 177
 178         case SKL_CH_CFG_3_0:
 179                 config =  (0xFFFFF000 | SKL_CHANNEL_LEFT
 180                         | (SKL_CHANNEL_CENTER << 4)
 181                         | (SKL_CHANNEL_RIGHT << 8));
 182                 break;
 183
 184         case SKL_CH_CFG_3_1:
 185                 config = (0xFFFF0000 | SKL_CHANNEL_LEFT
 186                         | (SKL_CHANNEL_CENTER << 4)
 187                         | (SKL_CHANNEL_RIGHT << 8)
 188                         | (SKL_CHANNEL_LFE << 12));
 189                 break;
 190
 191         case SKL_CH_CFG_QUATRO:
 192                 config = (0xFFFF0000 | SKL_CHANNEL_LEFT
 193                         | (SKL_CHANNEL_RIGHT << 4)
 194                         | (SKL_CHANNEL_LEFT_SURROUND << 8)
 195                         | (SKL_CHANNEL_RIGHT_SURROUND << 12));
 196                 break;
 197
 198         case SKL_CH_CFG_4_0:
 199                 config = (0xFFFF0000 | SKL_CHANNEL_LEFT
 200                         | (SKL_CHANNEL_CENTER << 4)
 201                         | (SKL_CHANNEL_RIGHT << 8)
 202                         | (SKL_CHANNEL_CENTER_SURROUND << 12));
 203                 break;
 204
 205         case SKL_CH_CFG_5_0:
 206                 config = (0xFFF00000 | SKL_CHANNEL_LEFT
 207                         | (SKL_CHANNEL_CENTER << 4)
 208                         | (SKL_CHANNEL_RIGHT << 8)
 209                         | (SKL_CHANNEL_LEFT_SURROUND << 12)
 210                         | (SKL_CHANNEL_RIGHT_SURROUND << 16));
 211                 break;
 212
 213         case SKL_CH_CFG_5_1:
 214                 config = (0xFF000000 | SKL_CHANNEL_CENTER
 215                         | (SKL_CHANNEL_LEFT << 4)
 216                         | (SKL_CHANNEL_RIGHT << 8)
 217                         | (SKL_CHANNEL_LEFT_SURROUND << 12)
 218                         | (SKL_CHANNEL_RIGHT_SURROUND << 16)
 219                         | (SKL_CHANNEL_LFE << 20));
 220                 break;
 221
 222         case SKL_CH_CFG_DUAL_MONO:
 223                 config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
 224                         | (SKL_CHANNEL_LEFT << 4));
 225                 break;
 226
 227         case SKL_CH_CFG_I2S_DUAL_STEREO_0:
 228                 config = (0xFFFFFF00 | SKL_CHANNEL_LEFT
 229                         | (SKL_CHANNEL_RIGHT << 4));
 230                 break;
 231
 232         case SKL_CH_CFG_I2S_DUAL_STEREO_1:
 233                 config = (0xFFFF00FF | (SKL_CHANNEL_LEFT << 8)
 234                         | (SKL_CHANNEL_RIGHT << 12));
 235                 break;
 236
 237         default:
 238                 config =  0xFFFFFFFF;
 239                 break;
 240
 241         }
 242
 243         return config;
 244 }
 245
 246 /*
 247  * Each module in DSP expects a base module configuration, which consists of
 248  * PCM format information, which we calculate in driver and resource values
 249  * which are read from widget information passed through topology binary
 250  * This is send when we create a module with INIT_INSTANCE IPC msg
 251  */
 252 static void skl_set_base_module_format(struct skl_sst *ctx,
 253                         struct skl_module_cfg *mconfig,
 254                         struct skl_base_cfg *base_cfg)
 255 {
 256         struct skl_module_fmt *format = &mconfig->in_fmt;
 257
 258         base_cfg->audio_fmt.number_of_channels = (u8)format->channels;
 259
 260         base_cfg->audio_fmt.s_freq = format->s_freq;
 261         base_cfg->audio_fmt.bit_depth = format->bit_depth;
 262         base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
 263         base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
 264
 265         dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
 266                         format->bit_depth, format->valid_bit_depth,
 267                         format->ch_cfg);
 268
 269         base_cfg->audio_fmt.channel_map = skl_create_channel_map(
 270                                         base_cfg->audio_fmt.ch_cfg);
 271
 272         base_cfg->audio_fmt.interleaving = SKL_INTERLEAVING_PER_CHANNEL;
 273
 274         base_cfg->cps = mconfig->mcps;
 275         base_cfg->ibs = mconfig->ibs;
 276         base_cfg->obs = mconfig->obs;
 277 }
 278
 279 /*
 280  * Copies copier capabilities into copier module and updates copier module
 281  * config size.
 282  */
 283 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
 284                                 struct skl_cpr_cfg *cpr_mconfig)
 285 {
 286         if (mconfig->formats_config.caps_size == 0)
 287                 return;
 288
 289         memcpy(cpr_mconfig->gtw_cfg.config_data,
 290                         mconfig->formats_config.caps,
 291                         mconfig->formats_config.caps_size);
 292
 293         cpr_mconfig->gtw_cfg.config_length =
 294                         (mconfig->formats_config.caps_size) / 4;
 295 }
 296
 297 /*
 298  * Calculate the gatewat settings required for copier module, type of
 299  * gateway and index of gateway to use
 300  */
 301 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx,
 302                         struct skl_module_cfg *mconfig,
 303                         struct skl_cpr_cfg *cpr_mconfig)
 304 {
 305         union skl_connector_node_id node_id = {0};
 306         struct skl_pipe_params *params = mconfig->pipe->p_params;
 307
 308         switch (mconfig->dev_type) {
 309         case SKL_DEVICE_BT:
 310                 node_id.node.dma_type =
 311                         (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
 312                         SKL_DMA_I2S_LINK_OUTPUT_CLASS :
 313                         SKL_DMA_I2S_LINK_INPUT_CLASS;
 314                 node_id.node.vindex = params->host_dma_id +
 315                                         (mconfig->vbus_id << 3);
 316                 break;
 317
 318         case SKL_DEVICE_I2S:
 319                 node_id.node.dma_type =
 320                         (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
 321                         SKL_DMA_I2S_LINK_OUTPUT_CLASS :
 322                         SKL_DMA_I2S_LINK_INPUT_CLASS;
 323                 node_id.node.vindex = params->host_dma_id +
 324                                          (mconfig->time_slot << 1) +
 325                                          (mconfig->vbus_id << 3);
 326                 break;
 327
 328         case SKL_DEVICE_DMIC:
 329                 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
 330                 node_id.node.vindex = mconfig->vbus_id +
 331                                          (mconfig->time_slot);
 332                 break;
 333
 334         case SKL_DEVICE_HDALINK:
 335                 node_id.node.dma_type =
 336                         (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
 337                         SKL_DMA_HDA_LINK_OUTPUT_CLASS :
 338                         SKL_DMA_HDA_LINK_INPUT_CLASS;
 339                 node_id.node.vindex = params->link_dma_id;
 340                 break;
 341
 342         default:
 343                 node_id.node.dma_type =
 344                         (SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
 345                         SKL_DMA_HDA_HOST_OUTPUT_CLASS :
 346                         SKL_DMA_HDA_HOST_INPUT_CLASS;
 347                 node_id.node.vindex = params->host_dma_id;
 348                 break;
 349         }
 350
 351         cpr_mconfig->gtw_cfg.node_id = node_id.val;
 352
 353         if (SKL_CONN_SOURCE == mconfig->hw_conn_type)
 354                 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs;
 355         else
 356                 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs;
 357
 358         cpr_mconfig->cpr_feature_mask = 0;
 359         cpr_mconfig->gtw_cfg.config_length  = 0;
 360
 361         skl_copy_copier_caps(mconfig, cpr_mconfig);
 362 }
 363
 364 static void skl_setup_out_format(struct skl_sst *ctx,
 365                         struct skl_module_cfg *mconfig,
 366                         struct skl_audio_data_format *out_fmt)
 367 {
 368         struct skl_module_fmt *format = &mconfig->out_fmt;
 369
 370         out_fmt->number_of_channels = (u8)format->channels;
 371         out_fmt->s_freq = format->s_freq;
 372         out_fmt->bit_depth = format->bit_depth;
 373         out_fmt->valid_bit_depth = format->valid_bit_depth;
 374         out_fmt->ch_cfg = format->ch_cfg;
 375
 376         out_fmt->channel_map = skl_create_channel_map(out_fmt->ch_cfg);
 377         out_fmt->interleaving = SKL_INTERLEAVING_PER_CHANNEL;
 378
 379         dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
 380                 out_fmt->number_of_channels, format->s_freq, format->bit_depth);
 381 }
 382
 383 /*
 384  * 'copier' is DSP internal module which copies data from Host DMA (HDA host
 385  * dma) or link (hda link, SSP, PDM)
 386  * Here we calculate the copier module parameters, like PCM format, output
 387  * format, gateway settings
 388  * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
 389  */
 390 static void skl_set_copier_format(struct skl_sst *ctx,
 391                         struct skl_module_cfg *mconfig,
 392                         struct skl_cpr_cfg *cpr_mconfig)
 393 {
 394         struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
 395         struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
 396
 397         skl_set_base_module_format(ctx, mconfig, base_cfg);
 398
 399         skl_setup_out_format(ctx, mconfig, out_fmt);
 400         skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig);
 401 }
 402
 403 static u16 skl_get_module_param_size(struct skl_sst *ctx,
 404                         struct skl_module_cfg *mconfig)
 405 {
 406         u16 param_size;
 407
 408         switch (mconfig->m_type) {
 409         case SKL_MODULE_TYPE_COPIER:
 410                 param_size = sizeof(struct skl_cpr_cfg);
 411                 param_size += mconfig->formats_config.caps_size;
 412                 return param_size;
 413
 414         default:
 415                 /*
 416                  * return only base cfg when no specific module type is
 417                  * specified
 418                  */
 419                 return sizeof(struct skl_base_cfg);
 420         }
 421
 422         return 0;
 423 }
 424
 425 /*
 426  * DSP firmware supports various modules like copier etc. These modules
 427  * required various parameters to be calculated and sent for the module
 428  * initialization to DSP. By default a generic module needs only base module
 429  * format configuration
 430  */
 431 static int skl_set_module_format(struct skl_sst *ctx,
 432                         struct skl_module_cfg *module_config,
 433                         u16 *module_config_size,
 434                         void **param_data)
 435 {
 436         u16 param_size;
 437
 438         param_size  = skl_get_module_param_size(ctx, module_config);
 439
 440         *param_data = kzalloc(param_size, GFP_KERNEL);
 441         if (NULL == *param_data)
 442                 return -ENOMEM;
 443
 444         *module_config_size = param_size;
 445
 446         switch (module_config->m_type) {
 447         case SKL_MODULE_TYPE_COPIER:
 448                 skl_set_copier_format(ctx, module_config, *param_data);
 449                 break;
 450
 451         default:
 452                 skl_set_base_module_format(ctx, module_config, *param_data);
 453                 break;
 454
 455         }
 456
 457         dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n",
 458                         module_config->id.module_id, param_size);
 459         print_hex_dump(KERN_DEBUG, "Module params:", DUMP_PREFIX_OFFSET, 8, 4,
 460                         *param_data, param_size, false);
 461         return 0;
 462 }
 463
 464 static int skl_get_queue_index(struct skl_module_pin *mpin,
 465                                 struct skl_module_inst_id id, int max)
 466 {
 467         int i;
 468
 469         for (i = 0; i < max; i++)  {
 470                 if (mpin[i].id.module_id == id.module_id &&
 471                         mpin[i].id.instance_id == id.instance_id)
 472                         return i;
 473         }
 474
 475         return -EINVAL;
 476 }
 477
 478 /*
 479  * Allocates queue for each module.
 480  * if dynamic, the pin_index is allocated 0 to max_pin.
 481  * In static, the pin_index is fixed based on module_id and instance id
 482  */
 483 static int skl_alloc_queue(struct skl_module_pin *mpin,
 484                         struct skl_module_inst_id id, int max)
 485 {
 486         int i;
 487
 488         /*
 489          * if pin in dynamic, find first free pin
 490          * otherwise find match module and instance id pin as topology will
 491          * ensure a unique pin is assigned to this so no need to
 492          * allocate/free
 493          */
 494         for (i = 0; i < max; i++)  {
 495                 if (mpin[i].is_dynamic) {
 496                         if (!mpin[i].in_use) {
 497                                 mpin[i].in_use = true;
 498                                 mpin[i].id.module_id = id.module_id;
 499                                 mpin[i].id.instance_id = id.instance_id;
 500                                 return i;
 501                         }
 502                 } else {
 503                         if (mpin[i].id.module_id == id.module_id &&
 504                                 mpin[i].id.instance_id == id.instance_id)
 505                                 return i;
 506                 }
 507         }
 508
 509         return -EINVAL;
 510 }
 511
 512 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
 513 {
 514         if (mpin[q_index].is_dynamic) {
 515                 mpin[q_index].in_use = false;
 516                 mpin[q_index].id.module_id = 0;
 517                 mpin[q_index].id.instance_id = 0;
 518         }
 519 }