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ASoC: Intel: Skylake: modify snd_skl_get_module_info args
[deliverable/linux.git] / sound / soc / intel / skylake / skl-topology.c
1 /*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <linux/firmware.h>
22 #include <sound/soc.h>
23 #include <sound/soc-topology.h>
24 #include "skl-sst-dsp.h"
25 #include "skl-sst-ipc.h"
26 #include "skl-topology.h"
27 #include "skl.h"
28 #include "skl-tplg-interface.h"
29 #include "../common/sst-dsp.h"
30 #include "../common/sst-dsp-priv.h"
31
32 #define SKL_CH_FIXUP_MASK (1 << 0)
33 #define SKL_RATE_FIXUP_MASK (1 << 1)
34 #define SKL_FMT_FIXUP_MASK (1 << 2)
35
36 /*
37 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
38 * ignore. This helpers checks if the SKL driver handles this widget type
39 */
40 static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
41 {
42 switch (w->id) {
43 case snd_soc_dapm_dai_link:
44 case snd_soc_dapm_dai_in:
45 case snd_soc_dapm_aif_in:
46 case snd_soc_dapm_aif_out:
47 case snd_soc_dapm_dai_out:
48 case snd_soc_dapm_switch:
49 return false;
50 default:
51 return true;
52 }
53 }
54
55 /*
56 * Each pipelines needs memory to be allocated. Check if we have free memory
57 * from available pool.
58 */
59 static bool skl_is_pipe_mem_avail(struct skl *skl,
60 struct skl_module_cfg *mconfig)
61 {
62 struct skl_sst *ctx = skl->skl_sst;
63
64 if (skl->resource.mem + mconfig->pipe->memory_pages >
65 skl->resource.max_mem) {
66 dev_err(ctx->dev,
67 "%s: module_id %d instance %d\n", __func__,
68 mconfig->id.module_id,
69 mconfig->id.instance_id);
70 dev_err(ctx->dev,
71 "exceeds ppl memory available %d mem %d\n",
72 skl->resource.max_mem, skl->resource.mem);
73 return false;
74 } else {
75 return true;
76 }
77 }
78
79 /*
80 * Add the mem to the mem pool. This is freed when pipe is deleted.
81 * Note: DSP does actual memory management we only keep track for complete
82 * pool
83 */
84 static void skl_tplg_alloc_pipe_mem(struct skl *skl,
85 struct skl_module_cfg *mconfig)
86 {
87 skl->resource.mem += mconfig->pipe->memory_pages;
88 }
89
90 /*
91 * Pipeline needs needs DSP CPU resources for computation, this is
92 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
93 *
94 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
95 * pipe.
96 */
97
98 static bool skl_is_pipe_mcps_avail(struct skl *skl,
99 struct skl_module_cfg *mconfig)
100 {
101 struct skl_sst *ctx = skl->skl_sst;
102
103 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
104 dev_err(ctx->dev,
105 "%s: module_id %d instance %d\n", __func__,
106 mconfig->id.module_id, mconfig->id.instance_id);
107 dev_err(ctx->dev,
108 "exceeds ppl mcps available %d > mem %d\n",
109 skl->resource.max_mcps, skl->resource.mcps);
110 return false;
111 } else {
112 return true;
113 }
114 }
115
116 static void skl_tplg_alloc_pipe_mcps(struct skl *skl,
117 struct skl_module_cfg *mconfig)
118 {
119 skl->resource.mcps += mconfig->mcps;
120 }
121
122 /*
123 * Free the mcps when tearing down
124 */
125 static void
126 skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
127 {
128 skl->resource.mcps -= mconfig->mcps;
129 }
130
131 /*
132 * Free the memory when tearing down
133 */
134 static void
135 skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
136 {
137 skl->resource.mem -= mconfig->pipe->memory_pages;
138 }
139
140
141 static void skl_dump_mconfig(struct skl_sst *ctx,
142 struct skl_module_cfg *mcfg)
143 {
144 dev_dbg(ctx->dev, "Dumping config\n");
145 dev_dbg(ctx->dev, "Input Format:\n");
146 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels);
147 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq);
148 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg);
149 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth);
150 dev_dbg(ctx->dev, "Output Format:\n");
151 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels);
152 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq);
153 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth);
154 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg);
155 }
156
157 static void skl_tplg_update_chmap(struct skl_module_fmt *fmt, int chs)
158 {
159 int slot_map = 0xFFFFFFFF;
160 int start_slot = 0;
161 int i;
162
163 for (i = 0; i < chs; i++) {
164 /*
165 * For 2 channels with starting slot as 0, slot map will
166 * look like 0xFFFFFF10.
167 */
168 slot_map &= (~(0xF << (4 * i)) | (start_slot << (4 * i)));
169 start_slot++;
170 }
171 fmt->ch_map = slot_map;
172 }
173
174 static void skl_tplg_update_params(struct skl_module_fmt *fmt,
175 struct skl_pipe_params *params, int fixup)
176 {
177 if (fixup & SKL_RATE_FIXUP_MASK)
178 fmt->s_freq = params->s_freq;
179 if (fixup & SKL_CH_FIXUP_MASK) {
180 fmt->channels = params->ch;
181 skl_tplg_update_chmap(fmt, fmt->channels);
182 }
183 if (fixup & SKL_FMT_FIXUP_MASK) {
184 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
185
186 /*
187 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
188 * container so update bit depth accordingly
189 */
190 switch (fmt->valid_bit_depth) {
191 case SKL_DEPTH_16BIT:
192 fmt->bit_depth = fmt->valid_bit_depth;
193 break;
194
195 default:
196 fmt->bit_depth = SKL_DEPTH_32BIT;
197 break;
198 }
199 }
200
201 }
202
203 /*
204 * A pipeline may have modules which impact the pcm parameters, like SRC,
205 * channel converter, format converter.
206 * We need to calculate the output params by applying the 'fixup'
207 * Topology will tell driver which type of fixup is to be applied by
208 * supplying the fixup mask, so based on that we calculate the output
209 *
210 * Now In FE the pcm hw_params is source/target format. Same is applicable
211 * for BE with its hw_params invoked.
212 * here based on FE, BE pipeline and direction we calculate the input and
213 * outfix and then apply that for a module
214 */
215 static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
216 struct skl_pipe_params *params, bool is_fe)
217 {
218 int in_fixup, out_fixup;
219 struct skl_module_fmt *in_fmt, *out_fmt;
220
221 /* Fixups will be applied to pin 0 only */
222 in_fmt = &m_cfg->in_fmt[0];
223 out_fmt = &m_cfg->out_fmt[0];
224
225 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
226 if (is_fe) {
227 in_fixup = m_cfg->params_fixup;
228 out_fixup = (~m_cfg->converter) &
229 m_cfg->params_fixup;
230 } else {
231 out_fixup = m_cfg->params_fixup;
232 in_fixup = (~m_cfg->converter) &
233 m_cfg->params_fixup;
234 }
235 } else {
236 if (is_fe) {
237 out_fixup = m_cfg->params_fixup;
238 in_fixup = (~m_cfg->converter) &
239 m_cfg->params_fixup;
240 } else {
241 in_fixup = m_cfg->params_fixup;
242 out_fixup = (~m_cfg->converter) &
243 m_cfg->params_fixup;
244 }
245 }
246
247 skl_tplg_update_params(in_fmt, params, in_fixup);
248 skl_tplg_update_params(out_fmt, params, out_fixup);
249 }
250
251 /*
252 * A module needs input and output buffers, which are dependent upon pcm
253 * params, so once we have calculate params, we need buffer calculation as
254 * well.
255 */
256 static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
257 struct skl_module_cfg *mcfg)
258 {
259 int multiplier = 1;
260 struct skl_module_fmt *in_fmt, *out_fmt;
261 int in_rate, out_rate;
262
263
264 /* Since fixups is applied to pin 0 only, ibs, obs needs
265 * change for pin 0 only
266 */
267 in_fmt = &mcfg->in_fmt[0];
268 out_fmt = &mcfg->out_fmt[0];
269
270 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
271 multiplier = 5;
272
273 if (in_fmt->s_freq % 1000)
274 in_rate = (in_fmt->s_freq / 1000) + 1;
275 else
276 in_rate = (in_fmt->s_freq / 1000);
277
278 mcfg->ibs = in_rate * (mcfg->in_fmt->channels) *
279 (mcfg->in_fmt->bit_depth >> 3) *
280 multiplier;
281
282 if (mcfg->out_fmt->s_freq % 1000)
283 out_rate = (mcfg->out_fmt->s_freq / 1000) + 1;
284 else
285 out_rate = (mcfg->out_fmt->s_freq / 1000);
286
287 mcfg->obs = out_rate * (mcfg->out_fmt->channels) *
288 (mcfg->out_fmt->bit_depth >> 3) *
289 multiplier;
290 }
291
292 static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
293 struct skl_sst *ctx)
294 {
295 struct skl_module_cfg *m_cfg = w->priv;
296 int link_type, dir;
297 u32 ch, s_freq, s_fmt;
298 struct nhlt_specific_cfg *cfg;
299 struct skl *skl = get_skl_ctx(ctx->dev);
300
301 /* check if we already have blob */
302 if (m_cfg->formats_config.caps_size > 0)
303 return 0;
304
305 dev_dbg(ctx->dev, "Applying default cfg blob\n");
306 switch (m_cfg->dev_type) {
307 case SKL_DEVICE_DMIC:
308 link_type = NHLT_LINK_DMIC;
309 dir = SNDRV_PCM_STREAM_CAPTURE;
310 s_freq = m_cfg->in_fmt[0].s_freq;
311 s_fmt = m_cfg->in_fmt[0].bit_depth;
312 ch = m_cfg->in_fmt[0].channels;
313 break;
314
315 case SKL_DEVICE_I2S:
316 link_type = NHLT_LINK_SSP;
317 if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) {
318 dir = SNDRV_PCM_STREAM_PLAYBACK;
319 s_freq = m_cfg->out_fmt[0].s_freq;
320 s_fmt = m_cfg->out_fmt[0].bit_depth;
321 ch = m_cfg->out_fmt[0].channels;
322 } else {
323 dir = SNDRV_PCM_STREAM_CAPTURE;
324 s_freq = m_cfg->in_fmt[0].s_freq;
325 s_fmt = m_cfg->in_fmt[0].bit_depth;
326 ch = m_cfg->in_fmt[0].channels;
327 }
328 break;
329
330 default:
331 return -EINVAL;
332 }
333
334 /* update the blob based on virtual bus_id and default params */
335 cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type,
336 s_fmt, ch, s_freq, dir);
337 if (cfg) {
338 m_cfg->formats_config.caps_size = cfg->size;
339 m_cfg->formats_config.caps = (u32 *) &cfg->caps;
340 } else {
341 dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n",
342 m_cfg->vbus_id, link_type, dir);
343 dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n",
344 ch, s_freq, s_fmt);
345 return -EIO;
346 }
347
348 return 0;
349 }
350
351 static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
352 struct skl_sst *ctx)
353 {
354 struct skl_module_cfg *m_cfg = w->priv;
355 struct skl_pipe_params *params = m_cfg->pipe->p_params;
356 int p_conn_type = m_cfg->pipe->conn_type;
357 bool is_fe;
358
359 if (!m_cfg->params_fixup)
360 return;
361
362 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
363 w->name);
364
365 skl_dump_mconfig(ctx, m_cfg);
366
367 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
368 is_fe = true;
369 else
370 is_fe = false;
371
372 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
373 skl_tplg_update_buffer_size(ctx, m_cfg);
374
375 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
376 w->name);
377
378 skl_dump_mconfig(ctx, m_cfg);
379 }
380
381 /*
382 * some modules can have multiple params set from user control and
383 * need to be set after module is initialized. If set_param flag is
384 * set module params will be done after module is initialised.
385 */
386 static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w,
387 struct skl_sst *ctx)
388 {
389 int i, ret;
390 struct skl_module_cfg *mconfig = w->priv;
391 const struct snd_kcontrol_new *k;
392 struct soc_bytes_ext *sb;
393 struct skl_algo_data *bc;
394 struct skl_specific_cfg *sp_cfg;
395
396 if (mconfig->formats_config.caps_size > 0 &&
397 mconfig->formats_config.set_params == SKL_PARAM_SET) {
398 sp_cfg = &mconfig->formats_config;
399 ret = skl_set_module_params(ctx, sp_cfg->caps,
400 sp_cfg->caps_size,
401 sp_cfg->param_id, mconfig);
402 if (ret < 0)
403 return ret;
404 }
405
406 for (i = 0; i < w->num_kcontrols; i++) {
407 k = &w->kcontrol_news[i];
408 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
409 sb = (void *) k->private_value;
410 bc = (struct skl_algo_data *)sb->dobj.private;
411
412 if (bc->set_params == SKL_PARAM_SET) {
413 ret = skl_set_module_params(ctx,
414 (u32 *)bc->params, bc->size,
415 bc->param_id, mconfig);
416 if (ret < 0)
417 return ret;
418 }
419 }
420 }
421
422 return 0;
423 }
424
425 /*
426 * some module param can set from user control and this is required as
427 * when module is initailzed. if module param is required in init it is
428 * identifed by set_param flag. if set_param flag is not set, then this
429 * parameter needs to set as part of module init.
430 */
431 static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w)
432 {
433 const struct snd_kcontrol_new *k;
434 struct soc_bytes_ext *sb;
435 struct skl_algo_data *bc;
436 struct skl_module_cfg *mconfig = w->priv;
437 int i;
438
439 for (i = 0; i < w->num_kcontrols; i++) {
440 k = &w->kcontrol_news[i];
441 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
442 sb = (struct soc_bytes_ext *)k->private_value;
443 bc = (struct skl_algo_data *)sb->dobj.private;
444
445 if (bc->set_params != SKL_PARAM_INIT)
446 continue;
447
448 mconfig->formats_config.caps = (u32 *)&bc->params;
449 mconfig->formats_config.caps_size = bc->size;
450
451 break;
452 }
453 }
454
455 return 0;
456 }
457
458 /*
459 * Inside a pipe instance, we can have various modules. These modules need
460 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
461 * skl_init_module() routine, so invoke that for all modules in a pipeline
462 */
463 static int
464 skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
465 {
466 struct skl_pipe_module *w_module;
467 struct snd_soc_dapm_widget *w;
468 struct skl_module_cfg *mconfig;
469 struct skl_sst *ctx = skl->skl_sst;
470 int ret = 0;
471
472 list_for_each_entry(w_module, &pipe->w_list, node) {
473 w = w_module->w;
474 mconfig = w->priv;
475
476 /* check if module ids are populated */
477 if (mconfig->id.module_id < 0) {
478 ret = snd_skl_get_module_info(skl->skl_sst, mconfig);
479 if (ret < 0) {
480 dev_err(skl->skl_sst->dev,
481 "query module info failed: %d\n", ret);
482 return ret;
483 }
484 }
485
486 /* check resource available */
487 if (!skl_is_pipe_mcps_avail(skl, mconfig))
488 return -ENOMEM;
489
490 if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {
491 ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
492 mconfig->id.module_id, mconfig->guid);
493 if (ret < 0)
494 return ret;
495
496 mconfig->m_state = SKL_MODULE_LOADED;
497 }
498
499 /* update blob if blob is null for be with default value */
500 skl_tplg_update_be_blob(w, ctx);
501
502 /*
503 * apply fix/conversion to module params based on
504 * FE/BE params
505 */
506 skl_tplg_update_module_params(w, ctx);
507
508 skl_tplg_set_module_init_data(w);
509 ret = skl_init_module(ctx, mconfig);
510 if (ret < 0)
511 return ret;
512
513 skl_tplg_alloc_pipe_mcps(skl, mconfig);
514 ret = skl_tplg_set_module_params(w, ctx);
515 if (ret < 0)
516 return ret;
517 }
518
519 return 0;
520 }
521
522 static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx,
523 struct skl_pipe *pipe)
524 {
525 struct skl_pipe_module *w_module = NULL;
526 struct skl_module_cfg *mconfig = NULL;
527
528 list_for_each_entry(w_module, &pipe->w_list, node) {
529 mconfig = w_module->w->priv;
530
531 if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod &&
532 mconfig->m_state > SKL_MODULE_UNINIT)
533 return ctx->dsp->fw_ops.unload_mod(ctx->dsp,
534 mconfig->id.module_id);
535 }
536
537 /* no modules to unload in this path, so return */
538 return 0;
539 }
540
541 /*
542 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
543 * need create the pipeline. So we do following:
544 * - check the resources
545 * - Create the pipeline
546 * - Initialize the modules in pipeline
547 * - finally bind all modules together
548 */
549 static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
550 struct skl *skl)
551 {
552 int ret;
553 struct skl_module_cfg *mconfig = w->priv;
554 struct skl_pipe_module *w_module;
555 struct skl_pipe *s_pipe = mconfig->pipe;
556 struct skl_module_cfg *src_module = NULL, *dst_module;
557 struct skl_sst *ctx = skl->skl_sst;
558
559 /* check resource available */
560 if (!skl_is_pipe_mcps_avail(skl, mconfig))
561 return -EBUSY;
562
563 if (!skl_is_pipe_mem_avail(skl, mconfig))
564 return -ENOMEM;
565
566 /*
567 * Create a list of modules for pipe.
568 * This list contains modules from source to sink
569 */
570 ret = skl_create_pipeline(ctx, mconfig->pipe);
571 if (ret < 0)
572 return ret;
573
574 skl_tplg_alloc_pipe_mem(skl, mconfig);
575 skl_tplg_alloc_pipe_mcps(skl, mconfig);
576
577 /* Init all pipe modules from source to sink */
578 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
579 if (ret < 0)
580 return ret;
581
582 /* Bind modules from source to sink */
583 list_for_each_entry(w_module, &s_pipe->w_list, node) {
584 dst_module = w_module->w->priv;
585
586 if (src_module == NULL) {
587 src_module = dst_module;
588 continue;
589 }
590
591 ret = skl_bind_modules(ctx, src_module, dst_module);
592 if (ret < 0)
593 return ret;
594
595 src_module = dst_module;
596 }
597
598 return 0;
599 }
600
601 /*
602 * Some modules require params to be set after the module is bound to
603 * all pins connected.
604 *
605 * The module provider initializes set_param flag for such modules and we
606 * send params after binding
607 */
608 static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w,
609 struct skl_module_cfg *mcfg, struct skl_sst *ctx)
610 {
611 int i, ret;
612 struct skl_module_cfg *mconfig = w->priv;
613 const struct snd_kcontrol_new *k;
614 struct soc_bytes_ext *sb;
615 struct skl_algo_data *bc;
616 struct skl_specific_cfg *sp_cfg;
617
618 /*
619 * check all out/in pins are in bind state.
620 * if so set the module param
621 */
622 for (i = 0; i < mcfg->max_out_queue; i++) {
623 if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE)
624 return 0;
625 }
626
627 for (i = 0; i < mcfg->max_in_queue; i++) {
628 if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE)
629 return 0;
630 }
631
632 if (mconfig->formats_config.caps_size > 0 &&
633 mconfig->formats_config.set_params == SKL_PARAM_BIND) {
634 sp_cfg = &mconfig->formats_config;
635 ret = skl_set_module_params(ctx, sp_cfg->caps,
636 sp_cfg->caps_size,
637 sp_cfg->param_id, mconfig);
638 if (ret < 0)
639 return ret;
640 }
641
642 for (i = 0; i < w->num_kcontrols; i++) {
643 k = &w->kcontrol_news[i];
644 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
645 sb = (void *) k->private_value;
646 bc = (struct skl_algo_data *)sb->dobj.private;
647
648 if (bc->set_params == SKL_PARAM_BIND) {
649 ret = skl_set_module_params(ctx,
650 (u32 *)bc->params, bc->max,
651 bc->param_id, mconfig);
652 if (ret < 0)
653 return ret;
654 }
655 }
656 }
657
658 return 0;
659 }
660
661 static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
662 struct skl *skl,
663 struct snd_soc_dapm_widget *src_w,
664 struct skl_module_cfg *src_mconfig)
665 {
666 struct snd_soc_dapm_path *p;
667 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
668 struct skl_module_cfg *sink_mconfig;
669 struct skl_sst *ctx = skl->skl_sst;
670 int ret;
671
672 snd_soc_dapm_widget_for_each_sink_path(w, p) {
673 if (!p->connect)
674 continue;
675
676 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
677 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
678
679 next_sink = p->sink;
680
681 if (!is_skl_dsp_widget_type(p->sink))
682 return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig);
683
684 /*
685 * here we will check widgets in sink pipelines, so that
686 * can be any widgets type and we are only interested if
687 * they are ones used for SKL so check that first
688 */
689 if ((p->sink->priv != NULL) &&
690 is_skl_dsp_widget_type(p->sink)) {
691
692 sink = p->sink;
693 sink_mconfig = sink->priv;
694
695 if (src_mconfig->m_state == SKL_MODULE_UNINIT ||
696 sink_mconfig->m_state == SKL_MODULE_UNINIT)
697 continue;
698
699 /* Bind source to sink, mixin is always source */
700 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
701 if (ret)
702 return ret;
703
704 /* set module params after bind */
705 skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx);
706 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
707
708 /* Start sinks pipe first */
709 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
710 if (sink_mconfig->pipe->conn_type !=
711 SKL_PIPE_CONN_TYPE_FE)
712 ret = skl_run_pipe(ctx,
713 sink_mconfig->pipe);
714 if (ret)
715 return ret;
716 }
717 }
718 }
719
720 if (!sink)
721 return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig);
722
723 return 0;
724 }
725
726 /*
727 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
728 * we need to do following:
729 * - Bind to sink pipeline
730 * Since the sink pipes can be running and we don't get mixer event on
731 * connect for already running mixer, we need to find the sink pipes
732 * here and bind to them. This way dynamic connect works.
733 * - Start sink pipeline, if not running
734 * - Then run current pipe
735 */
736 static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
737 struct skl *skl)
738 {
739 struct skl_module_cfg *src_mconfig;
740 struct skl_sst *ctx = skl->skl_sst;
741 int ret = 0;
742
743 src_mconfig = w->priv;
744
745 /*
746 * find which sink it is connected to, bind with the sink,
747 * if sink is not started, start sink pipe first, then start
748 * this pipe
749 */
750 ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig);
751 if (ret)
752 return ret;
753
754 /* Start source pipe last after starting all sinks */
755 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
756 return skl_run_pipe(ctx, src_mconfig->pipe);
757
758 return 0;
759 }
760
761 static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
762 struct snd_soc_dapm_widget *w, struct skl *skl)
763 {
764 struct snd_soc_dapm_path *p;
765 struct snd_soc_dapm_widget *src_w = NULL;
766 struct skl_sst *ctx = skl->skl_sst;
767
768 snd_soc_dapm_widget_for_each_source_path(w, p) {
769 src_w = p->source;
770 if (!p->connect)
771 continue;
772
773 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
774 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
775
776 /*
777 * here we will check widgets in sink pipelines, so that can
778 * be any widgets type and we are only interested if they are
779 * ones used for SKL so check that first
780 */
781 if ((p->source->priv != NULL) &&
782 is_skl_dsp_widget_type(p->source)) {
783 return p->source;
784 }
785 }
786
787 if (src_w != NULL)
788 return skl_get_src_dsp_widget(src_w, skl);
789
790 return NULL;
791 }
792
793 /*
794 * in the Post-PMU event of mixer we need to do following:
795 * - Check if this pipe is running
796 * - if not, then
797 * - bind this pipeline to its source pipeline
798 * if source pipe is already running, this means it is a dynamic
799 * connection and we need to bind only to that pipe
800 * - start this pipeline
801 */
802 static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
803 struct skl *skl)
804 {
805 int ret = 0;
806 struct snd_soc_dapm_widget *source, *sink;
807 struct skl_module_cfg *src_mconfig, *sink_mconfig;
808 struct skl_sst *ctx = skl->skl_sst;
809 int src_pipe_started = 0;
810
811 sink = w;
812 sink_mconfig = sink->priv;
813
814 /*
815 * If source pipe is already started, that means source is driving
816 * one more sink before this sink got connected, Since source is
817 * started, bind this sink to source and start this pipe.
818 */
819 source = skl_get_src_dsp_widget(w, skl);
820 if (source != NULL) {
821 src_mconfig = source->priv;
822 sink_mconfig = sink->priv;
823 src_pipe_started = 1;
824
825 /*
826 * check pipe state, then no need to bind or start the
827 * pipe
828 */
829 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
830 src_pipe_started = 0;
831 }
832
833 if (src_pipe_started) {
834 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
835 if (ret)
836 return ret;
837
838 /* set module params after bind */
839 skl_tplg_set_module_bind_params(source, src_mconfig, ctx);
840 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
841
842 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
843 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
844 }
845
846 return ret;
847 }
848
849 /*
850 * in the Pre-PMD event of mixer we need to do following:
851 * - Stop the pipe
852 * - find the source connections and remove that from dapm_path_list
853 * - unbind with source pipelines if still connected
854 */
855 static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
856 struct skl *skl)
857 {
858 struct skl_module_cfg *src_mconfig, *sink_mconfig;
859 int ret = 0, i;
860 struct skl_sst *ctx = skl->skl_sst;
861
862 sink_mconfig = w->priv;
863
864 /* Stop the pipe */
865 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
866 if (ret)
867 return ret;
868
869 for (i = 0; i < sink_mconfig->max_in_queue; i++) {
870 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
871 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
872 if (!src_mconfig)
873 continue;
874 /*
875 * If path_found == 1, that means pmd for source
876 * pipe has not occurred, source is connected to
877 * some other sink. so its responsibility of sink
878 * to unbind itself from source.
879 */
880 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
881 if (ret < 0)
882 return ret;
883
884 ret = skl_unbind_modules(ctx,
885 src_mconfig, sink_mconfig);
886 }
887 }
888
889 return ret;
890 }
891
892 /*
893 * in the Post-PMD event of mixer we need to do following:
894 * - Free the mcps used
895 * - Free the mem used
896 * - Unbind the modules within the pipeline
897 * - Delete the pipeline (modules are not required to be explicitly
898 * deleted, pipeline delete is enough here
899 */
900 static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
901 struct skl *skl)
902 {
903 struct skl_module_cfg *mconfig = w->priv;
904 struct skl_pipe_module *w_module;
905 struct skl_module_cfg *src_module = NULL, *dst_module;
906 struct skl_sst *ctx = skl->skl_sst;
907 struct skl_pipe *s_pipe = mconfig->pipe;
908 int ret = 0;
909
910 if (s_pipe->state == SKL_PIPE_INVALID)
911 return -EINVAL;
912
913 skl_tplg_free_pipe_mcps(skl, mconfig);
914 skl_tplg_free_pipe_mem(skl, mconfig);
915
916 list_for_each_entry(w_module, &s_pipe->w_list, node) {
917 dst_module = w_module->w->priv;
918
919 if (mconfig->m_state >= SKL_MODULE_INIT_DONE)
920 skl_tplg_free_pipe_mcps(skl, dst_module);
921 if (src_module == NULL) {
922 src_module = dst_module;
923 continue;
924 }
925
926 skl_unbind_modules(ctx, src_module, dst_module);
927 src_module = dst_module;
928 }
929
930 ret = skl_delete_pipe(ctx, mconfig->pipe);
931
932 return skl_tplg_unload_pipe_modules(ctx, s_pipe);
933 }
934
935 /*
936 * in the Post-PMD event of PGA we need to do following:
937 * - Free the mcps used
938 * - Stop the pipeline
939 * - In source pipe is connected, unbind with source pipelines
940 */
941 static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
942 struct skl *skl)
943 {
944 struct skl_module_cfg *src_mconfig, *sink_mconfig;
945 int ret = 0, i;
946 struct skl_sst *ctx = skl->skl_sst;
947
948 src_mconfig = w->priv;
949
950 /* Stop the pipe since this is a mixin module */
951 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
952 if (ret)
953 return ret;
954
955 for (i = 0; i < src_mconfig->max_out_queue; i++) {
956 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
957 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
958 if (!sink_mconfig)
959 continue;
960 /*
961 * This is a connecter and if path is found that means
962 * unbind between source and sink has not happened yet
963 */
964 ret = skl_unbind_modules(ctx, src_mconfig,
965 sink_mconfig);
966 }
967 }
968
969 return ret;
970 }
971
972 /*
973 * In modelling, we assume there will be ONLY one mixer in a pipeline. If
974 * mixer is not required then it is treated as static mixer aka vmixer with
975 * a hard path to source module
976 * So we don't need to check if source is started or not as hard path puts
977 * dependency on each other
978 */
979 static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
980 struct snd_kcontrol *k, int event)
981 {
982 struct snd_soc_dapm_context *dapm = w->dapm;
983 struct skl *skl = get_skl_ctx(dapm->dev);
984
985 switch (event) {
986 case SND_SOC_DAPM_PRE_PMU:
987 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
988
989 case SND_SOC_DAPM_POST_PMU:
990 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
991
992 case SND_SOC_DAPM_PRE_PMD:
993 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
994
995 case SND_SOC_DAPM_POST_PMD:
996 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
997 }
998
999 return 0;
1000 }
1001
1002 /*
1003 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
1004 * second one is required that is created as another pipe entity.
1005 * The mixer is responsible for pipe management and represent a pipeline
1006 * instance
1007 */
1008 static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
1009 struct snd_kcontrol *k, int event)
1010 {
1011 struct snd_soc_dapm_context *dapm = w->dapm;
1012 struct skl *skl = get_skl_ctx(dapm->dev);
1013
1014 switch (event) {
1015 case SND_SOC_DAPM_PRE_PMU:
1016 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1017
1018 case SND_SOC_DAPM_POST_PMU:
1019 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1020
1021 case SND_SOC_DAPM_PRE_PMD:
1022 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1023
1024 case SND_SOC_DAPM_POST_PMD:
1025 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1026 }
1027
1028 return 0;
1029 }
1030
1031 /*
1032 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
1033 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
1034 * the sink when it is running (two FE to one BE or one FE to two BE)
1035 * scenarios
1036 */
1037 static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
1038 struct snd_kcontrol *k, int event)
1039
1040 {
1041 struct snd_soc_dapm_context *dapm = w->dapm;
1042 struct skl *skl = get_skl_ctx(dapm->dev);
1043
1044 switch (event) {
1045 case SND_SOC_DAPM_PRE_PMU:
1046 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
1047
1048 case SND_SOC_DAPM_POST_PMD:
1049 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
1050 }
1051
1052 return 0;
1053 }
1054
1055 static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
1056 unsigned int __user *data, unsigned int size)
1057 {
1058 struct soc_bytes_ext *sb =
1059 (struct soc_bytes_ext *)kcontrol->private_value;
1060 struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private;
1061 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1062 struct skl_module_cfg *mconfig = w->priv;
1063 struct skl *skl = get_skl_ctx(w->dapm->dev);
1064
1065 if (w->power)
1066 skl_get_module_params(skl->skl_sst, (u32 *)bc->params,
1067 bc->size, bc->param_id, mconfig);
1068
1069 /* decrement size for TLV header */
1070 size -= 2 * sizeof(u32);
1071
1072 /* check size as we don't want to send kernel data */
1073 if (size > bc->max)
1074 size = bc->max;
1075
1076 if (bc->params) {
1077 if (copy_to_user(data, &bc->param_id, sizeof(u32)))
1078 return -EFAULT;
1079 if (copy_to_user(data + 1, &size, sizeof(u32)))
1080 return -EFAULT;
1081 if (copy_to_user(data + 2, bc->params, size))
1082 return -EFAULT;
1083 }
1084
1085 return 0;
1086 }
1087
1088 #define SKL_PARAM_VENDOR_ID 0xff
1089
1090 static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
1091 const unsigned int __user *data, unsigned int size)
1092 {
1093 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1094 struct skl_module_cfg *mconfig = w->priv;
1095 struct soc_bytes_ext *sb =
1096 (struct soc_bytes_ext *)kcontrol->private_value;
1097 struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private;
1098 struct skl *skl = get_skl_ctx(w->dapm->dev);
1099
1100 if (ac->params) {
1101 if (size > ac->max)
1102 return -EINVAL;
1103
1104 ac->size = size;
1105 /*
1106 * if the param_is is of type Vendor, firmware expects actual
1107 * parameter id and size from the control.
1108 */
1109 if (ac->param_id == SKL_PARAM_VENDOR_ID) {
1110 if (copy_from_user(ac->params, data, size))
1111 return -EFAULT;
1112 } else {
1113 if (copy_from_user(ac->params,
1114 data + 2, size))
1115 return -EFAULT;
1116 }
1117
1118 if (w->power)
1119 return skl_set_module_params(skl->skl_sst,
1120 (u32 *)ac->params, ac->size,
1121 ac->param_id, mconfig);
1122 }
1123
1124 return 0;
1125 }
1126
1127 /*
1128 * Fill the dma id for host and link. In case of passthrough
1129 * pipeline, this will both host and link in the same
1130 * pipeline, so need to copy the link and host based on dev_type
1131 */
1132 static void skl_tplg_fill_dma_id(struct skl_module_cfg *mcfg,
1133 struct skl_pipe_params *params)
1134 {
1135 struct skl_pipe *pipe = mcfg->pipe;
1136
1137 if (pipe->passthru) {
1138 switch (mcfg->dev_type) {
1139 case SKL_DEVICE_HDALINK:
1140 pipe->p_params->link_dma_id = params->link_dma_id;
1141 break;
1142
1143 case SKL_DEVICE_HDAHOST:
1144 pipe->p_params->host_dma_id = params->host_dma_id;
1145 break;
1146
1147 default:
1148 break;
1149 }
1150 pipe->p_params->s_fmt = params->s_fmt;
1151 pipe->p_params->ch = params->ch;
1152 pipe->p_params->s_freq = params->s_freq;
1153 pipe->p_params->stream = params->stream;
1154
1155 } else {
1156 memcpy(pipe->p_params, params, sizeof(*params));
1157 }
1158 }
1159
1160 /*
1161 * The FE params are passed by hw_params of the DAI.
1162 * On hw_params, the params are stored in Gateway module of the FE and we
1163 * need to calculate the format in DSP module configuration, that
1164 * conversion is done here
1165 */
1166 int skl_tplg_update_pipe_params(struct device *dev,
1167 struct skl_module_cfg *mconfig,
1168 struct skl_pipe_params *params)
1169 {
1170 struct skl_module_fmt *format = NULL;
1171
1172 skl_tplg_fill_dma_id(mconfig, params);
1173
1174 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
1175 format = &mconfig->in_fmt[0];
1176 else
1177 format = &mconfig->out_fmt[0];
1178
1179 /* set the hw_params */
1180 format->s_freq = params->s_freq;
1181 format->channels = params->ch;
1182 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
1183
1184 /*
1185 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
1186 * container so update bit depth accordingly
1187 */
1188 switch (format->valid_bit_depth) {
1189 case SKL_DEPTH_16BIT:
1190 format->bit_depth = format->valid_bit_depth;
1191 break;
1192
1193 case SKL_DEPTH_24BIT:
1194 case SKL_DEPTH_32BIT:
1195 format->bit_depth = SKL_DEPTH_32BIT;
1196 break;
1197
1198 default:
1199 dev_err(dev, "Invalid bit depth %x for pipe\n",
1200 format->valid_bit_depth);
1201 return -EINVAL;
1202 }
1203
1204 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1205 mconfig->ibs = (format->s_freq / 1000) *
1206 (format->channels) *
1207 (format->bit_depth >> 3);
1208 } else {
1209 mconfig->obs = (format->s_freq / 1000) *
1210 (format->channels) *
1211 (format->bit_depth >> 3);
1212 }
1213
1214 return 0;
1215 }
1216
1217 /*
1218 * Query the module config for the FE DAI
1219 * This is used to find the hw_params set for that DAI and apply to FE
1220 * pipeline
1221 */
1222 struct skl_module_cfg *
1223 skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
1224 {
1225 struct snd_soc_dapm_widget *w;
1226 struct snd_soc_dapm_path *p = NULL;
1227
1228 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1229 w = dai->playback_widget;
1230 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1231 if (p->connect && p->sink->power &&
1232 !is_skl_dsp_widget_type(p->sink))
1233 continue;
1234
1235 if (p->sink->priv) {
1236 dev_dbg(dai->dev, "set params for %s\n",
1237 p->sink->name);
1238 return p->sink->priv;
1239 }
1240 }
1241 } else {
1242 w = dai->capture_widget;
1243 snd_soc_dapm_widget_for_each_source_path(w, p) {
1244 if (p->connect && p->source->power &&
1245 !is_skl_dsp_widget_type(p->source))
1246 continue;
1247
1248 if (p->source->priv) {
1249 dev_dbg(dai->dev, "set params for %s\n",
1250 p->source->name);
1251 return p->source->priv;
1252 }
1253 }
1254 }
1255
1256 return NULL;
1257 }
1258
1259 static struct skl_module_cfg *skl_get_mconfig_pb_cpr(
1260 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1261 {
1262 struct snd_soc_dapm_path *p;
1263 struct skl_module_cfg *mconfig = NULL;
1264
1265 snd_soc_dapm_widget_for_each_source_path(w, p) {
1266 if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) {
1267 if (p->connect &&
1268 (p->sink->id == snd_soc_dapm_aif_out) &&
1269 p->source->priv) {
1270 mconfig = p->source->priv;
1271 return mconfig;
1272 }
1273 mconfig = skl_get_mconfig_pb_cpr(dai, p->source);
1274 if (mconfig)
1275 return mconfig;
1276 }
1277 }
1278 return mconfig;
1279 }
1280
1281 static struct skl_module_cfg *skl_get_mconfig_cap_cpr(
1282 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1283 {
1284 struct snd_soc_dapm_path *p;
1285 struct skl_module_cfg *mconfig = NULL;
1286
1287 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1288 if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) {
1289 if (p->connect &&
1290 (p->source->id == snd_soc_dapm_aif_in) &&
1291 p->sink->priv) {
1292 mconfig = p->sink->priv;
1293 return mconfig;
1294 }
1295 mconfig = skl_get_mconfig_cap_cpr(dai, p->sink);
1296 if (mconfig)
1297 return mconfig;
1298 }
1299 }
1300 return mconfig;
1301 }
1302
1303 struct skl_module_cfg *
1304 skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream)
1305 {
1306 struct snd_soc_dapm_widget *w;
1307 struct skl_module_cfg *mconfig;
1308
1309 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1310 w = dai->playback_widget;
1311 mconfig = skl_get_mconfig_pb_cpr(dai, w);
1312 } else {
1313 w = dai->capture_widget;
1314 mconfig = skl_get_mconfig_cap_cpr(dai, w);
1315 }
1316 return mconfig;
1317 }
1318
1319 static u8 skl_tplg_be_link_type(int dev_type)
1320 {
1321 int ret;
1322
1323 switch (dev_type) {
1324 case SKL_DEVICE_BT:
1325 ret = NHLT_LINK_SSP;
1326 break;
1327
1328 case SKL_DEVICE_DMIC:
1329 ret = NHLT_LINK_DMIC;
1330 break;
1331
1332 case SKL_DEVICE_I2S:
1333 ret = NHLT_LINK_SSP;
1334 break;
1335
1336 case SKL_DEVICE_HDALINK:
1337 ret = NHLT_LINK_HDA;
1338 break;
1339
1340 default:
1341 ret = NHLT_LINK_INVALID;
1342 break;
1343 }
1344
1345 return ret;
1346 }
1347
1348 /*
1349 * Fill the BE gateway parameters
1350 * The BE gateway expects a blob of parameters which are kept in the ACPI
1351 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
1352 * The port can have multiple settings so pick based on the PCM
1353 * parameters
1354 */
1355 static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
1356 struct skl_module_cfg *mconfig,
1357 struct skl_pipe_params *params)
1358 {
1359 struct nhlt_specific_cfg *cfg;
1360 struct skl *skl = get_skl_ctx(dai->dev);
1361 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
1362
1363 skl_tplg_fill_dma_id(mconfig, params);
1364
1365 if (link_type == NHLT_LINK_HDA)
1366 return 0;
1367
1368 /* update the blob based on virtual bus_id*/
1369 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
1370 params->s_fmt, params->ch,
1371 params->s_freq, params->stream);
1372 if (cfg) {
1373 mconfig->formats_config.caps_size = cfg->size;
1374 mconfig->formats_config.caps = (u32 *) &cfg->caps;
1375 } else {
1376 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
1377 mconfig->vbus_id, link_type,
1378 params->stream);
1379 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
1380 params->ch, params->s_freq, params->s_fmt);
1381 return -EINVAL;
1382 }
1383
1384 return 0;
1385 }
1386
1387 static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
1388 struct snd_soc_dapm_widget *w,
1389 struct skl_pipe_params *params)
1390 {
1391 struct snd_soc_dapm_path *p;
1392 int ret = -EIO;
1393
1394 snd_soc_dapm_widget_for_each_source_path(w, p) {
1395 if (p->connect && is_skl_dsp_widget_type(p->source) &&
1396 p->source->priv) {
1397
1398 ret = skl_tplg_be_fill_pipe_params(dai,
1399 p->source->priv, params);
1400 if (ret < 0)
1401 return ret;
1402 } else {
1403 ret = skl_tplg_be_set_src_pipe_params(dai,
1404 p->source, params);
1405 if (ret < 0)
1406 return ret;
1407 }
1408 }
1409
1410 return ret;
1411 }
1412
1413 static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
1414 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
1415 {
1416 struct snd_soc_dapm_path *p = NULL;
1417 int ret = -EIO;
1418
1419 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1420 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
1421 p->sink->priv) {
1422
1423 ret = skl_tplg_be_fill_pipe_params(dai,
1424 p->sink->priv, params);
1425 if (ret < 0)
1426 return ret;
1427 } else {
1428 ret = skl_tplg_be_set_sink_pipe_params(
1429 dai, p->sink, params);
1430 if (ret < 0)
1431 return ret;
1432 }
1433 }
1434
1435 return ret;
1436 }
1437
1438 /*
1439 * BE hw_params can be a source parameters (capture) or sink parameters
1440 * (playback). Based on sink and source we need to either find the source
1441 * list or the sink list and set the pipeline parameters
1442 */
1443 int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1444 struct skl_pipe_params *params)
1445 {
1446 struct snd_soc_dapm_widget *w;
1447
1448 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1449 w = dai->playback_widget;
1450
1451 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1452
1453 } else {
1454 w = dai->capture_widget;
1455
1456 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1457 }
1458
1459 return 0;
1460 }
1461
1462 static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1463 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1464 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
1465 {SKL_PGA_EVENT, skl_tplg_pga_event},
1466 };
1467
1468 static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = {
1469 {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get,
1470 skl_tplg_tlv_control_set},
1471 };
1472
1473 /*
1474 * The topology binary passes the pin info for a module so initialize the pin
1475 * info passed into module instance
1476 */
1477 static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin,
1478 struct skl_module_pin *m_pin,
1479 bool is_dynamic, int max_pin)
1480 {
1481 int i;
1482
1483 for (i = 0; i < max_pin; i++) {
1484 m_pin[i].id.module_id = dfw_pin[i].module_id;
1485 m_pin[i].id.instance_id = dfw_pin[i].instance_id;
1486 m_pin[i].in_use = false;
1487 m_pin[i].is_dynamic = is_dynamic;
1488 m_pin[i].pin_state = SKL_PIN_UNBIND;
1489 }
1490 }
1491
1492 /*
1493 * Add pipeline from topology binary into driver pipeline list
1494 *
1495 * If already added we return that instance
1496 * Otherwise we create a new instance and add into driver list
1497 */
1498 static struct skl_pipe *skl_tplg_add_pipe(struct device *dev,
1499 struct skl *skl, struct skl_dfw_pipe *dfw_pipe)
1500 {
1501 struct skl_pipeline *ppl;
1502 struct skl_pipe *pipe;
1503 struct skl_pipe_params *params;
1504
1505 list_for_each_entry(ppl, &skl->ppl_list, node) {
1506 if (ppl->pipe->ppl_id == dfw_pipe->pipe_id)
1507 return ppl->pipe;
1508 }
1509
1510 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
1511 if (!ppl)
1512 return NULL;
1513
1514 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
1515 if (!pipe)
1516 return NULL;
1517
1518 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
1519 if (!params)
1520 return NULL;
1521
1522 pipe->ppl_id = dfw_pipe->pipe_id;
1523 pipe->memory_pages = dfw_pipe->memory_pages;
1524 pipe->pipe_priority = dfw_pipe->pipe_priority;
1525 pipe->conn_type = dfw_pipe->conn_type;
1526 pipe->state = SKL_PIPE_INVALID;
1527 pipe->p_params = params;
1528 INIT_LIST_HEAD(&pipe->w_list);
1529
1530 ppl->pipe = pipe;
1531 list_add(&ppl->node, &skl->ppl_list);
1532
1533 return ppl->pipe;
1534 }
1535
1536 static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt,
1537 struct skl_dfw_module_fmt *src_fmt,
1538 int pins)
1539 {
1540 int i;
1541
1542 for (i = 0; i < pins; i++) {
1543 dst_fmt[i].channels = src_fmt[i].channels;
1544 dst_fmt[i].s_freq = src_fmt[i].freq;
1545 dst_fmt[i].bit_depth = src_fmt[i].bit_depth;
1546 dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth;
1547 dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg;
1548 dst_fmt[i].ch_map = src_fmt[i].ch_map;
1549 dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style;
1550 dst_fmt[i].sample_type = src_fmt[i].sample_type;
1551 }
1552 }
1553
1554 static void skl_clear_pin_config(struct snd_soc_platform *platform,
1555 struct snd_soc_dapm_widget *w)
1556 {
1557 int i;
1558 struct skl_module_cfg *mconfig;
1559 struct skl_pipe *pipe;
1560
1561 if (!strncmp(w->dapm->component->name, platform->component.name,
1562 strlen(platform->component.name))) {
1563 mconfig = w->priv;
1564 pipe = mconfig->pipe;
1565 for (i = 0; i < mconfig->max_in_queue; i++) {
1566 mconfig->m_in_pin[i].in_use = false;
1567 mconfig->m_in_pin[i].pin_state = SKL_PIN_UNBIND;
1568 }
1569 for (i = 0; i < mconfig->max_out_queue; i++) {
1570 mconfig->m_out_pin[i].in_use = false;
1571 mconfig->m_out_pin[i].pin_state = SKL_PIN_UNBIND;
1572 }
1573 pipe->state = SKL_PIPE_INVALID;
1574 mconfig->m_state = SKL_MODULE_UNINIT;
1575 }
1576 }
1577
1578 void skl_cleanup_resources(struct skl *skl)
1579 {
1580 struct skl_sst *ctx = skl->skl_sst;
1581 struct snd_soc_platform *soc_platform = skl->platform;
1582 struct snd_soc_dapm_widget *w;
1583 struct snd_soc_card *card;
1584
1585 if (soc_platform == NULL)
1586 return;
1587
1588 card = soc_platform->component.card;
1589 if (!card || !card->instantiated)
1590 return;
1591
1592 skl->resource.mem = 0;
1593 skl->resource.mcps = 0;
1594
1595 list_for_each_entry(w, &card->widgets, list) {
1596 if (is_skl_dsp_widget_type(w) && (w->priv != NULL))
1597 skl_clear_pin_config(soc_platform, w);
1598 }
1599
1600 skl_clear_module_cnt(ctx->dsp);
1601 }
1602
1603 /*
1604 * Topology core widget load callback
1605 *
1606 * This is used to save the private data for each widget which gives
1607 * information to the driver about module and pipeline parameters which DSP
1608 * FW expects like ids, resource values, formats etc
1609 */
1610 static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
1611 struct snd_soc_dapm_widget *w,
1612 struct snd_soc_tplg_dapm_widget *tplg_w)
1613 {
1614 int ret;
1615 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1616 struct skl *skl = ebus_to_skl(ebus);
1617 struct hdac_bus *bus = ebus_to_hbus(ebus);
1618 struct skl_module_cfg *mconfig;
1619 struct skl_pipe *pipe;
1620 struct skl_dfw_module *dfw_config =
1621 (struct skl_dfw_module *)tplg_w->priv.data;
1622
1623 if (!tplg_w->priv.size)
1624 goto bind_event;
1625
1626 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
1627
1628 if (!mconfig)
1629 return -ENOMEM;
1630
1631 w->priv = mconfig;
1632 memcpy(&mconfig->guid, &dfw_config->uuid, 16);
1633
1634 /*
1635 * module binary can be loaded later, so set it to query when
1636 * module is load for a use case
1637 */
1638 mconfig->id.module_id = -1;
1639 mconfig->id.instance_id = dfw_config->instance_id;
1640 mconfig->mcps = dfw_config->max_mcps;
1641 mconfig->ibs = dfw_config->ibs;
1642 mconfig->obs = dfw_config->obs;
1643 mconfig->core_id = dfw_config->core_id;
1644 mconfig->max_in_queue = dfw_config->max_in_queue;
1645 mconfig->max_out_queue = dfw_config->max_out_queue;
1646 mconfig->is_loadable = dfw_config->is_loadable;
1647 mconfig->domain = dfw_config->proc_domain;
1648 skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt,
1649 MODULE_MAX_IN_PINS);
1650 skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt,
1651 MODULE_MAX_OUT_PINS);
1652
1653 mconfig->params_fixup = dfw_config->params_fixup;
1654 mconfig->converter = dfw_config->converter;
1655 mconfig->m_type = dfw_config->module_type;
1656 mconfig->vbus_id = dfw_config->vbus_id;
1657 mconfig->mem_pages = dfw_config->mem_pages;
1658
1659 pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe);
1660 if (pipe)
1661 mconfig->pipe = pipe;
1662
1663 mconfig->dev_type = dfw_config->dev_type;
1664 mconfig->hw_conn_type = dfw_config->hw_conn_type;
1665 mconfig->time_slot = dfw_config->time_slot;
1666 mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
1667
1668 mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) *
1669 sizeof(*mconfig->m_in_pin),
1670 GFP_KERNEL);
1671 if (!mconfig->m_in_pin)
1672 return -ENOMEM;
1673
1674 mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) *
1675 sizeof(*mconfig->m_out_pin),
1676 GFP_KERNEL);
1677 if (!mconfig->m_out_pin)
1678 return -ENOMEM;
1679
1680 skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin,
1681 dfw_config->is_dynamic_in_pin,
1682 mconfig->max_in_queue);
1683
1684 skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin,
1685 dfw_config->is_dynamic_out_pin,
1686 mconfig->max_out_queue);
1687
1688
1689 if (mconfig->formats_config.caps_size == 0)
1690 goto bind_event;
1691
1692 mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev,
1693 mconfig->formats_config.caps_size, GFP_KERNEL);
1694
1695 if (mconfig->formats_config.caps == NULL)
1696 return -ENOMEM;
1697
1698 memcpy(mconfig->formats_config.caps, dfw_config->caps.caps,
1699 dfw_config->caps.caps_size);
1700 mconfig->formats_config.param_id = dfw_config->caps.param_id;
1701 mconfig->formats_config.set_params = dfw_config->caps.set_params;
1702
1703 bind_event:
1704 if (tplg_w->event_type == 0) {
1705 dev_dbg(bus->dev, "ASoC: No event handler required\n");
1706 return 0;
1707 }
1708
1709 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
1710 ARRAY_SIZE(skl_tplg_widget_ops),
1711 tplg_w->event_type);
1712
1713 if (ret) {
1714 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
1715 __func__, tplg_w->event_type);
1716 return -EINVAL;
1717 }
1718
1719 return 0;
1720 }
1721
1722 static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be,
1723 struct snd_soc_tplg_bytes_control *bc)
1724 {
1725 struct skl_algo_data *ac;
1726 struct skl_dfw_algo_data *dfw_ac =
1727 (struct skl_dfw_algo_data *)bc->priv.data;
1728
1729 ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL);
1730 if (!ac)
1731 return -ENOMEM;
1732
1733 /* Fill private data */
1734 ac->max = dfw_ac->max;
1735 ac->param_id = dfw_ac->param_id;
1736 ac->set_params = dfw_ac->set_params;
1737 ac->size = dfw_ac->max;
1738
1739 if (ac->max) {
1740 ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL);
1741 if (!ac->params)
1742 return -ENOMEM;
1743
1744 memcpy(ac->params, dfw_ac->params, ac->max);
1745 }
1746
1747 be->dobj.private = ac;
1748 return 0;
1749 }
1750
1751 static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
1752 struct snd_kcontrol_new *kctl,
1753 struct snd_soc_tplg_ctl_hdr *hdr)
1754 {
1755 struct soc_bytes_ext *sb;
1756 struct snd_soc_tplg_bytes_control *tplg_bc;
1757 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1758 struct hdac_bus *bus = ebus_to_hbus(ebus);
1759
1760 switch (hdr->ops.info) {
1761 case SND_SOC_TPLG_CTL_BYTES:
1762 tplg_bc = container_of(hdr,
1763 struct snd_soc_tplg_bytes_control, hdr);
1764 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
1765 sb = (struct soc_bytes_ext *)kctl->private_value;
1766 if (tplg_bc->priv.size)
1767 return skl_init_algo_data(
1768 bus->dev, sb, tplg_bc);
1769 }
1770 break;
1771
1772 default:
1773 dev_warn(bus->dev, "Control load not supported %d:%d:%d\n",
1774 hdr->ops.get, hdr->ops.put, hdr->ops.info);
1775 break;
1776 }
1777
1778 return 0;
1779 }
1780
1781 static int skl_manifest_load(struct snd_soc_component *cmpnt,
1782 struct snd_soc_tplg_manifest *manifest)
1783 {
1784 struct skl_dfw_manifest *minfo;
1785 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1786 struct hdac_bus *bus = ebus_to_hbus(ebus);
1787 struct skl *skl = ebus_to_skl(ebus);
1788 int ret = 0;
1789
1790 minfo = &skl->skl_sst->manifest;
1791 memcpy(minfo, manifest->priv.data, sizeof(struct skl_dfw_manifest));
1792
1793 if (minfo->lib_count > HDA_MAX_LIB) {
1794 dev_err(bus->dev, "Exceeding max Library count. Got:%d\n",
1795 minfo->lib_count);
1796 ret = -EINVAL;
1797 }
1798
1799 return ret;
1800 }
1801
1802 static struct snd_soc_tplg_ops skl_tplg_ops = {
1803 .widget_load = skl_tplg_widget_load,
1804 .control_load = skl_tplg_control_load,
1805 .bytes_ext_ops = skl_tlv_ops,
1806 .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops),
1807 .manifest = skl_manifest_load,
1808 };
1809
1810 /*
1811 * A pipe can have multiple modules, each of them will be a DAPM widget as
1812 * well. While managing a pipeline we need to get the list of all the
1813 * widgets in a pipelines, so this helper - skl_tplg_create_pipe_widget_list()
1814 * helps to get the SKL type widgets in that pipeline
1815 */
1816 static int skl_tplg_create_pipe_widget_list(struct snd_soc_platform *platform)
1817 {
1818 struct snd_soc_dapm_widget *w;
1819 struct skl_module_cfg *mcfg = NULL;
1820 struct skl_pipe_module *p_module = NULL;
1821 struct skl_pipe *pipe;
1822
1823 list_for_each_entry(w, &platform->component.card->widgets, list) {
1824 if (is_skl_dsp_widget_type(w) && w->priv != NULL) {
1825 mcfg = w->priv;
1826 pipe = mcfg->pipe;
1827
1828 p_module = devm_kzalloc(platform->dev,
1829 sizeof(*p_module), GFP_KERNEL);
1830 if (!p_module)
1831 return -ENOMEM;
1832
1833 p_module->w = w;
1834 list_add_tail(&p_module->node, &pipe->w_list);
1835 }
1836 }
1837
1838 return 0;
1839 }
1840
1841 static void skl_tplg_set_pipe_type(struct skl *skl, struct skl_pipe *pipe)
1842 {
1843 struct skl_pipe_module *w_module;
1844 struct snd_soc_dapm_widget *w;
1845 struct skl_module_cfg *mconfig;
1846 bool host_found = false, link_found = false;
1847
1848 list_for_each_entry(w_module, &pipe->w_list, node) {
1849 w = w_module->w;
1850 mconfig = w->priv;
1851
1852 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
1853 host_found = true;
1854 else if (mconfig->dev_type != SKL_DEVICE_NONE)
1855 link_found = true;
1856 }
1857
1858 if (host_found && link_found)
1859 pipe->passthru = true;
1860 else
1861 pipe->passthru = false;
1862 }
1863
1864 /* This will be read from topology manifest, currently defined here */
1865 #define SKL_MAX_MCPS 30000000
1866 #define SKL_FW_MAX_MEM 1000000
1867
1868 /*
1869 * SKL topology init routine
1870 */
1871 int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
1872 {
1873 int ret;
1874 const struct firmware *fw;
1875 struct hdac_bus *bus = ebus_to_hbus(ebus);
1876 struct skl *skl = ebus_to_skl(ebus);
1877 struct skl_pipeline *ppl;
1878
1879 ret = request_firmware(&fw, skl->tplg_name, bus->dev);
1880 if (ret < 0) {
1881 dev_err(bus->dev, "tplg fw %s load failed with %d\n",
1882 skl->tplg_name, ret);
1883 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
1884 if (ret < 0) {
1885 dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n",
1886 "dfw_sst.bin", ret);
1887 return ret;
1888 }
1889 }
1890
1891 /*
1892 * The complete tplg for SKL is loaded as index 0, we don't use
1893 * any other index
1894 */
1895 ret = snd_soc_tplg_component_load(&platform->component,
1896 &skl_tplg_ops, fw, 0);
1897 if (ret < 0) {
1898 dev_err(bus->dev, "tplg component load failed%d\n", ret);
1899 release_firmware(fw);
1900 return -EINVAL;
1901 }
1902
1903 skl->resource.max_mcps = SKL_MAX_MCPS;
1904 skl->resource.max_mem = SKL_FW_MAX_MEM;
1905
1906 skl->tplg = fw;
1907 ret = skl_tplg_create_pipe_widget_list(platform);
1908 if (ret < 0)
1909 return ret;
1910
1911 list_for_each_entry(ppl, &skl->ppl_list, node)
1912 skl_tplg_set_pipe_type(skl, ppl->pipe);
1913
1914 return 0;
1915 }
Linux kernel - Deliverables
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