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Merge branch 'topic/rt5640' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie...
[deliverable/linux.git] / sound / soc / intel / skylake / skl-topology.c
1 /*
2 * skl-topology.c - Implements Platform component ALSA controls/widget
3 * handlers.
4 *
5 * Copyright (C) 2014-2015 Intel Corp
6 * Author: Jeeja KP <jeeja.kp@intel.com>
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 */
18
19 #include <linux/slab.h>
20 #include <linux/types.h>
21 #include <linux/firmware.h>
22 #include <sound/soc.h>
23 #include <sound/soc-topology.h>
24 #include "skl-sst-dsp.h"
25 #include "skl-sst-ipc.h"
26 #include "skl-topology.h"
27 #include "skl.h"
28 #include "skl-tplg-interface.h"
29 #include "../common/sst-dsp.h"
30 #include "../common/sst-dsp-priv.h"
31
32 #define SKL_CH_FIXUP_MASK (1 << 0)
33 #define SKL_RATE_FIXUP_MASK (1 << 1)
34 #define SKL_FMT_FIXUP_MASK (1 << 2)
35
36 /*
37 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
38 * ignore. This helpers checks if the SKL driver handles this widget type
39 */
40 static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
41 {
42 switch (w->id) {
43 case snd_soc_dapm_dai_link:
44 case snd_soc_dapm_dai_in:
45 case snd_soc_dapm_aif_in:
46 case snd_soc_dapm_aif_out:
47 case snd_soc_dapm_dai_out:
48 case snd_soc_dapm_switch:
49 return false;
50 default:
51 return true;
52 }
53 }
54
55 /*
56 * Each pipelines needs memory to be allocated. Check if we have free memory
57 * from available pool.
58 */
59 static bool skl_is_pipe_mem_avail(struct skl *skl,
60 struct skl_module_cfg *mconfig)
61 {
62 struct skl_sst *ctx = skl->skl_sst;
63
64 if (skl->resource.mem + mconfig->pipe->memory_pages >
65 skl->resource.max_mem) {
66 dev_err(ctx->dev,
67 "%s: module_id %d instance %d\n", __func__,
68 mconfig->id.module_id,
69 mconfig->id.instance_id);
70 dev_err(ctx->dev,
71 "exceeds ppl memory available %d mem %d\n",
72 skl->resource.max_mem, skl->resource.mem);
73 return false;
74 } else {
75 return true;
76 }
77 }
78
79 /*
80 * Add the mem to the mem pool. This is freed when pipe is deleted.
81 * Note: DSP does actual memory management we only keep track for complete
82 * pool
83 */
84 static void skl_tplg_alloc_pipe_mem(struct skl *skl,
85 struct skl_module_cfg *mconfig)
86 {
87 skl->resource.mem += mconfig->pipe->memory_pages;
88 }
89
90 /*
91 * Pipeline needs needs DSP CPU resources for computation, this is
92 * quantified in MCPS (Million Clocks Per Second) required for module/pipe
93 *
94 * Each pipelines needs mcps to be allocated. Check if we have mcps for this
95 * pipe.
96 */
97
98 static bool skl_is_pipe_mcps_avail(struct skl *skl,
99 struct skl_module_cfg *mconfig)
100 {
101 struct skl_sst *ctx = skl->skl_sst;
102
103 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
104 dev_err(ctx->dev,
105 "%s: module_id %d instance %d\n", __func__,
106 mconfig->id.module_id, mconfig->id.instance_id);
107 dev_err(ctx->dev,
108 "exceeds ppl mcps available %d > mem %d\n",
109 skl->resource.max_mcps, skl->resource.mcps);
110 return false;
111 } else {
112 return true;
113 }
114 }
115
116 static void skl_tplg_alloc_pipe_mcps(struct skl *skl,
117 struct skl_module_cfg *mconfig)
118 {
119 skl->resource.mcps += mconfig->mcps;
120 }
121
122 /*
123 * Free the mcps when tearing down
124 */
125 static void
126 skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
127 {
128 skl->resource.mcps -= mconfig->mcps;
129 }
130
131 /*
132 * Free the memory when tearing down
133 */
134 static void
135 skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
136 {
137 skl->resource.mem -= mconfig->pipe->memory_pages;
138 }
139
140
141 static void skl_dump_mconfig(struct skl_sst *ctx,
142 struct skl_module_cfg *mcfg)
143 {
144 dev_dbg(ctx->dev, "Dumping config\n");
145 dev_dbg(ctx->dev, "Input Format:\n");
146 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels);
147 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq);
148 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg);
149 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth);
150 dev_dbg(ctx->dev, "Output Format:\n");
151 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels);
152 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq);
153 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth);
154 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg);
155 }
156
157 static void skl_tplg_update_chmap(struct skl_module_fmt *fmt, int chs)
158 {
159 int slot_map = 0xFFFFFFFF;
160 int start_slot = 0;
161 int i;
162
163 for (i = 0; i < chs; i++) {
164 /*
165 * For 2 channels with starting slot as 0, slot map will
166 * look like 0xFFFFFF10.
167 */
168 slot_map &= (~(0xF << (4 * i)) | (start_slot << (4 * i)));
169 start_slot++;
170 }
171 fmt->ch_map = slot_map;
172 }
173
174 static void skl_tplg_update_params(struct skl_module_fmt *fmt,
175 struct skl_pipe_params *params, int fixup)
176 {
177 if (fixup & SKL_RATE_FIXUP_MASK)
178 fmt->s_freq = params->s_freq;
179 if (fixup & SKL_CH_FIXUP_MASK) {
180 fmt->channels = params->ch;
181 skl_tplg_update_chmap(fmt, fmt->channels);
182 }
183 if (fixup & SKL_FMT_FIXUP_MASK) {
184 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
185
186 /*
187 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
188 * container so update bit depth accordingly
189 */
190 switch (fmt->valid_bit_depth) {
191 case SKL_DEPTH_16BIT:
192 fmt->bit_depth = fmt->valid_bit_depth;
193 break;
194
195 default:
196 fmt->bit_depth = SKL_DEPTH_32BIT;
197 break;
198 }
199 }
200
201 }
202
203 /*
204 * A pipeline may have modules which impact the pcm parameters, like SRC,
205 * channel converter, format converter.
206 * We need to calculate the output params by applying the 'fixup'
207 * Topology will tell driver which type of fixup is to be applied by
208 * supplying the fixup mask, so based on that we calculate the output
209 *
210 * Now In FE the pcm hw_params is source/target format. Same is applicable
211 * for BE with its hw_params invoked.
212 * here based on FE, BE pipeline and direction we calculate the input and
213 * outfix and then apply that for a module
214 */
215 static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
216 struct skl_pipe_params *params, bool is_fe)
217 {
218 int in_fixup, out_fixup;
219 struct skl_module_fmt *in_fmt, *out_fmt;
220
221 /* Fixups will be applied to pin 0 only */
222 in_fmt = &m_cfg->in_fmt[0];
223 out_fmt = &m_cfg->out_fmt[0];
224
225 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
226 if (is_fe) {
227 in_fixup = m_cfg->params_fixup;
228 out_fixup = (~m_cfg->converter) &
229 m_cfg->params_fixup;
230 } else {
231 out_fixup = m_cfg->params_fixup;
232 in_fixup = (~m_cfg->converter) &
233 m_cfg->params_fixup;
234 }
235 } else {
236 if (is_fe) {
237 out_fixup = m_cfg->params_fixup;
238 in_fixup = (~m_cfg->converter) &
239 m_cfg->params_fixup;
240 } else {
241 in_fixup = m_cfg->params_fixup;
242 out_fixup = (~m_cfg->converter) &
243 m_cfg->params_fixup;
244 }
245 }
246
247 skl_tplg_update_params(in_fmt, params, in_fixup);
248 skl_tplg_update_params(out_fmt, params, out_fixup);
249 }
250
251 /*
252 * A module needs input and output buffers, which are dependent upon pcm
253 * params, so once we have calculate params, we need buffer calculation as
254 * well.
255 */
256 static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
257 struct skl_module_cfg *mcfg)
258 {
259 int multiplier = 1;
260 struct skl_module_fmt *in_fmt, *out_fmt;
261 int in_rate, out_rate;
262
263
264 /* Since fixups is applied to pin 0 only, ibs, obs needs
265 * change for pin 0 only
266 */
267 in_fmt = &mcfg->in_fmt[0];
268 out_fmt = &mcfg->out_fmt[0];
269
270 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
271 multiplier = 5;
272
273 if (in_fmt->s_freq % 1000)
274 in_rate = (in_fmt->s_freq / 1000) + 1;
275 else
276 in_rate = (in_fmt->s_freq / 1000);
277
278 mcfg->ibs = in_rate * (mcfg->in_fmt->channels) *
279 (mcfg->in_fmt->bit_depth >> 3) *
280 multiplier;
281
282 if (mcfg->out_fmt->s_freq % 1000)
283 out_rate = (mcfg->out_fmt->s_freq / 1000) + 1;
284 else
285 out_rate = (mcfg->out_fmt->s_freq / 1000);
286
287 mcfg->obs = out_rate * (mcfg->out_fmt->channels) *
288 (mcfg->out_fmt->bit_depth >> 3) *
289 multiplier;
290 }
291
292 static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w,
293 struct skl_sst *ctx)
294 {
295 struct skl_module_cfg *m_cfg = w->priv;
296 int link_type, dir;
297 u32 ch, s_freq, s_fmt;
298 struct nhlt_specific_cfg *cfg;
299 struct skl *skl = get_skl_ctx(ctx->dev);
300
301 /* check if we already have blob */
302 if (m_cfg->formats_config.caps_size > 0)
303 return 0;
304
305 dev_dbg(ctx->dev, "Applying default cfg blob\n");
306 switch (m_cfg->dev_type) {
307 case SKL_DEVICE_DMIC:
308 link_type = NHLT_LINK_DMIC;
309 dir = SNDRV_PCM_STREAM_CAPTURE;
310 s_freq = m_cfg->in_fmt[0].s_freq;
311 s_fmt = m_cfg->in_fmt[0].bit_depth;
312 ch = m_cfg->in_fmt[0].channels;
313 break;
314
315 case SKL_DEVICE_I2S:
316 link_type = NHLT_LINK_SSP;
317 if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) {
318 dir = SNDRV_PCM_STREAM_PLAYBACK;
319 s_freq = m_cfg->out_fmt[0].s_freq;
320 s_fmt = m_cfg->out_fmt[0].bit_depth;
321 ch = m_cfg->out_fmt[0].channels;
322 } else {
323 dir = SNDRV_PCM_STREAM_CAPTURE;
324 s_freq = m_cfg->in_fmt[0].s_freq;
325 s_fmt = m_cfg->in_fmt[0].bit_depth;
326 ch = m_cfg->in_fmt[0].channels;
327 }
328 break;
329
330 default:
331 return -EINVAL;
332 }
333
334 /* update the blob based on virtual bus_id and default params */
335 cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type,
336 s_fmt, ch, s_freq, dir);
337 if (cfg) {
338 m_cfg->formats_config.caps_size = cfg->size;
339 m_cfg->formats_config.caps = (u32 *) &cfg->caps;
340 } else {
341 dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n",
342 m_cfg->vbus_id, link_type, dir);
343 dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n",
344 ch, s_freq, s_fmt);
345 return -EIO;
346 }
347
348 return 0;
349 }
350
351 static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
352 struct skl_sst *ctx)
353 {
354 struct skl_module_cfg *m_cfg = w->priv;
355 struct skl_pipe_params *params = m_cfg->pipe->p_params;
356 int p_conn_type = m_cfg->pipe->conn_type;
357 bool is_fe;
358
359 if (!m_cfg->params_fixup)
360 return;
361
362 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
363 w->name);
364
365 skl_dump_mconfig(ctx, m_cfg);
366
367 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
368 is_fe = true;
369 else
370 is_fe = false;
371
372 skl_tplg_update_params_fixup(m_cfg, params, is_fe);
373 skl_tplg_update_buffer_size(ctx, m_cfg);
374
375 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
376 w->name);
377
378 skl_dump_mconfig(ctx, m_cfg);
379 }
380
381 /*
382 * some modules can have multiple params set from user control and
383 * need to be set after module is initialized. If set_param flag is
384 * set module params will be done after module is initialised.
385 */
386 static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w,
387 struct skl_sst *ctx)
388 {
389 int i, ret;
390 struct skl_module_cfg *mconfig = w->priv;
391 const struct snd_kcontrol_new *k;
392 struct soc_bytes_ext *sb;
393 struct skl_algo_data *bc;
394 struct skl_specific_cfg *sp_cfg;
395
396 if (mconfig->formats_config.caps_size > 0 &&
397 mconfig->formats_config.set_params == SKL_PARAM_SET) {
398 sp_cfg = &mconfig->formats_config;
399 ret = skl_set_module_params(ctx, sp_cfg->caps,
400 sp_cfg->caps_size,
401 sp_cfg->param_id, mconfig);
402 if (ret < 0)
403 return ret;
404 }
405
406 for (i = 0; i < w->num_kcontrols; i++) {
407 k = &w->kcontrol_news[i];
408 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
409 sb = (void *) k->private_value;
410 bc = (struct skl_algo_data *)sb->dobj.private;
411
412 if (bc->set_params == SKL_PARAM_SET) {
413 ret = skl_set_module_params(ctx,
414 (u32 *)bc->params, bc->size,
415 bc->param_id, mconfig);
416 if (ret < 0)
417 return ret;
418 }
419 }
420 }
421
422 return 0;
423 }
424
425 /*
426 * some module param can set from user control and this is required as
427 * when module is initailzed. if module param is required in init it is
428 * identifed by set_param flag. if set_param flag is not set, then this
429 * parameter needs to set as part of module init.
430 */
431 static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w)
432 {
433 const struct snd_kcontrol_new *k;
434 struct soc_bytes_ext *sb;
435 struct skl_algo_data *bc;
436 struct skl_module_cfg *mconfig = w->priv;
437 int i;
438
439 for (i = 0; i < w->num_kcontrols; i++) {
440 k = &w->kcontrol_news[i];
441 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
442 sb = (struct soc_bytes_ext *)k->private_value;
443 bc = (struct skl_algo_data *)sb->dobj.private;
444
445 if (bc->set_params != SKL_PARAM_INIT)
446 continue;
447
448 mconfig->formats_config.caps = (u32 *)&bc->params;
449 mconfig->formats_config.caps_size = bc->size;
450
451 break;
452 }
453 }
454
455 return 0;
456 }
457
458 /*
459 * Inside a pipe instance, we can have various modules. These modules need
460 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
461 * skl_init_module() routine, so invoke that for all modules in a pipeline
462 */
463 static int
464 skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
465 {
466 struct skl_pipe_module *w_module;
467 struct snd_soc_dapm_widget *w;
468 struct skl_module_cfg *mconfig;
469 struct skl_sst *ctx = skl->skl_sst;
470 int ret = 0;
471
472 list_for_each_entry(w_module, &pipe->w_list, node) {
473 w = w_module->w;
474 mconfig = w->priv;
475
476 /* check if module ids are populated */
477 if (mconfig->id.module_id < 0) {
478 dev_err(skl->skl_sst->dev,
479 "module %pUL id not populated\n",
480 (uuid_le *)mconfig->guid);
481 return -EIO;
482 }
483
484 /* check resource available */
485 if (!skl_is_pipe_mcps_avail(skl, mconfig))
486 return -ENOMEM;
487
488 if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {
489 ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
490 mconfig->id.module_id, mconfig->guid);
491 if (ret < 0)
492 return ret;
493
494 mconfig->m_state = SKL_MODULE_LOADED;
495 }
496
497 /* update blob if blob is null for be with default value */
498 skl_tplg_update_be_blob(w, ctx);
499
500 /*
501 * apply fix/conversion to module params based on
502 * FE/BE params
503 */
504 skl_tplg_update_module_params(w, ctx);
505
506 skl_tplg_set_module_init_data(w);
507 ret = skl_init_module(ctx, mconfig);
508 if (ret < 0)
509 return ret;
510
511 skl_tplg_alloc_pipe_mcps(skl, mconfig);
512 ret = skl_tplg_set_module_params(w, ctx);
513 if (ret < 0)
514 return ret;
515 }
516
517 return 0;
518 }
519
520 static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx,
521 struct skl_pipe *pipe)
522 {
523 struct skl_pipe_module *w_module = NULL;
524 struct skl_module_cfg *mconfig = NULL;
525
526 list_for_each_entry(w_module, &pipe->w_list, node) {
527 mconfig = w_module->w->priv;
528
529 if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod &&
530 mconfig->m_state > SKL_MODULE_UNINIT)
531 return ctx->dsp->fw_ops.unload_mod(ctx->dsp,
532 mconfig->id.module_id);
533 }
534
535 /* no modules to unload in this path, so return */
536 return 0;
537 }
538
539 /*
540 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
541 * need create the pipeline. So we do following:
542 * - check the resources
543 * - Create the pipeline
544 * - Initialize the modules in pipeline
545 * - finally bind all modules together
546 */
547 static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
548 struct skl *skl)
549 {
550 int ret;
551 struct skl_module_cfg *mconfig = w->priv;
552 struct skl_pipe_module *w_module;
553 struct skl_pipe *s_pipe = mconfig->pipe;
554 struct skl_module_cfg *src_module = NULL, *dst_module;
555 struct skl_sst *ctx = skl->skl_sst;
556
557 /* check resource available */
558 if (!skl_is_pipe_mcps_avail(skl, mconfig))
559 return -EBUSY;
560
561 if (!skl_is_pipe_mem_avail(skl, mconfig))
562 return -ENOMEM;
563
564 /*
565 * Create a list of modules for pipe.
566 * This list contains modules from source to sink
567 */
568 ret = skl_create_pipeline(ctx, mconfig->pipe);
569 if (ret < 0)
570 return ret;
571
572 skl_tplg_alloc_pipe_mem(skl, mconfig);
573 skl_tplg_alloc_pipe_mcps(skl, mconfig);
574
575 /* Init all pipe modules from source to sink */
576 ret = skl_tplg_init_pipe_modules(skl, s_pipe);
577 if (ret < 0)
578 return ret;
579
580 /* Bind modules from source to sink */
581 list_for_each_entry(w_module, &s_pipe->w_list, node) {
582 dst_module = w_module->w->priv;
583
584 if (src_module == NULL) {
585 src_module = dst_module;
586 continue;
587 }
588
589 ret = skl_bind_modules(ctx, src_module, dst_module);
590 if (ret < 0)
591 return ret;
592
593 src_module = dst_module;
594 }
595
596 return 0;
597 }
598
599 /*
600 * Some modules require params to be set after the module is bound to
601 * all pins connected.
602 *
603 * The module provider initializes set_param flag for such modules and we
604 * send params after binding
605 */
606 static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w,
607 struct skl_module_cfg *mcfg, struct skl_sst *ctx)
608 {
609 int i, ret;
610 struct skl_module_cfg *mconfig = w->priv;
611 const struct snd_kcontrol_new *k;
612 struct soc_bytes_ext *sb;
613 struct skl_algo_data *bc;
614 struct skl_specific_cfg *sp_cfg;
615
616 /*
617 * check all out/in pins are in bind state.
618 * if so set the module param
619 */
620 for (i = 0; i < mcfg->max_out_queue; i++) {
621 if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE)
622 return 0;
623 }
624
625 for (i = 0; i < mcfg->max_in_queue; i++) {
626 if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE)
627 return 0;
628 }
629
630 if (mconfig->formats_config.caps_size > 0 &&
631 mconfig->formats_config.set_params == SKL_PARAM_BIND) {
632 sp_cfg = &mconfig->formats_config;
633 ret = skl_set_module_params(ctx, sp_cfg->caps,
634 sp_cfg->caps_size,
635 sp_cfg->param_id, mconfig);
636 if (ret < 0)
637 return ret;
638 }
639
640 for (i = 0; i < w->num_kcontrols; i++) {
641 k = &w->kcontrol_news[i];
642 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
643 sb = (void *) k->private_value;
644 bc = (struct skl_algo_data *)sb->dobj.private;
645
646 if (bc->set_params == SKL_PARAM_BIND) {
647 ret = skl_set_module_params(ctx,
648 (u32 *)bc->params, bc->max,
649 bc->param_id, mconfig);
650 if (ret < 0)
651 return ret;
652 }
653 }
654 }
655
656 return 0;
657 }
658
659 static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
660 struct skl *skl,
661 struct snd_soc_dapm_widget *src_w,
662 struct skl_module_cfg *src_mconfig)
663 {
664 struct snd_soc_dapm_path *p;
665 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
666 struct skl_module_cfg *sink_mconfig;
667 struct skl_sst *ctx = skl->skl_sst;
668 int ret;
669
670 snd_soc_dapm_widget_for_each_sink_path(w, p) {
671 if (!p->connect)
672 continue;
673
674 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
675 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
676
677 next_sink = p->sink;
678
679 if (!is_skl_dsp_widget_type(p->sink))
680 return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig);
681
682 /*
683 * here we will check widgets in sink pipelines, so that
684 * can be any widgets type and we are only interested if
685 * they are ones used for SKL so check that first
686 */
687 if ((p->sink->priv != NULL) &&
688 is_skl_dsp_widget_type(p->sink)) {
689
690 sink = p->sink;
691 sink_mconfig = sink->priv;
692
693 if (src_mconfig->m_state == SKL_MODULE_UNINIT ||
694 sink_mconfig->m_state == SKL_MODULE_UNINIT)
695 continue;
696
697 /* Bind source to sink, mixin is always source */
698 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
699 if (ret)
700 return ret;
701
702 /* set module params after bind */
703 skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx);
704 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
705
706 /* Start sinks pipe first */
707 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
708 if (sink_mconfig->pipe->conn_type !=
709 SKL_PIPE_CONN_TYPE_FE)
710 ret = skl_run_pipe(ctx,
711 sink_mconfig->pipe);
712 if (ret)
713 return ret;
714 }
715 }
716 }
717
718 if (!sink)
719 return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig);
720
721 return 0;
722 }
723
724 /*
725 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
726 * we need to do following:
727 * - Bind to sink pipeline
728 * Since the sink pipes can be running and we don't get mixer event on
729 * connect for already running mixer, we need to find the sink pipes
730 * here and bind to them. This way dynamic connect works.
731 * - Start sink pipeline, if not running
732 * - Then run current pipe
733 */
734 static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
735 struct skl *skl)
736 {
737 struct skl_module_cfg *src_mconfig;
738 struct skl_sst *ctx = skl->skl_sst;
739 int ret = 0;
740
741 src_mconfig = w->priv;
742
743 /*
744 * find which sink it is connected to, bind with the sink,
745 * if sink is not started, start sink pipe first, then start
746 * this pipe
747 */
748 ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig);
749 if (ret)
750 return ret;
751
752 /* Start source pipe last after starting all sinks */
753 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
754 return skl_run_pipe(ctx, src_mconfig->pipe);
755
756 return 0;
757 }
758
759 static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
760 struct snd_soc_dapm_widget *w, struct skl *skl)
761 {
762 struct snd_soc_dapm_path *p;
763 struct snd_soc_dapm_widget *src_w = NULL;
764 struct skl_sst *ctx = skl->skl_sst;
765
766 snd_soc_dapm_widget_for_each_source_path(w, p) {
767 src_w = p->source;
768 if (!p->connect)
769 continue;
770
771 dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
772 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
773
774 /*
775 * here we will check widgets in sink pipelines, so that can
776 * be any widgets type and we are only interested if they are
777 * ones used for SKL so check that first
778 */
779 if ((p->source->priv != NULL) &&
780 is_skl_dsp_widget_type(p->source)) {
781 return p->source;
782 }
783 }
784
785 if (src_w != NULL)
786 return skl_get_src_dsp_widget(src_w, skl);
787
788 return NULL;
789 }
790
791 /*
792 * in the Post-PMU event of mixer we need to do following:
793 * - Check if this pipe is running
794 * - if not, then
795 * - bind this pipeline to its source pipeline
796 * if source pipe is already running, this means it is a dynamic
797 * connection and we need to bind only to that pipe
798 * - start this pipeline
799 */
800 static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
801 struct skl *skl)
802 {
803 int ret = 0;
804 struct snd_soc_dapm_widget *source, *sink;
805 struct skl_module_cfg *src_mconfig, *sink_mconfig;
806 struct skl_sst *ctx = skl->skl_sst;
807 int src_pipe_started = 0;
808
809 sink = w;
810 sink_mconfig = sink->priv;
811
812 /*
813 * If source pipe is already started, that means source is driving
814 * one more sink before this sink got connected, Since source is
815 * started, bind this sink to source and start this pipe.
816 */
817 source = skl_get_src_dsp_widget(w, skl);
818 if (source != NULL) {
819 src_mconfig = source->priv;
820 sink_mconfig = sink->priv;
821 src_pipe_started = 1;
822
823 /*
824 * check pipe state, then no need to bind or start the
825 * pipe
826 */
827 if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
828 src_pipe_started = 0;
829 }
830
831 if (src_pipe_started) {
832 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
833 if (ret)
834 return ret;
835
836 /* set module params after bind */
837 skl_tplg_set_module_bind_params(source, src_mconfig, ctx);
838 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx);
839
840 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
841 ret = skl_run_pipe(ctx, sink_mconfig->pipe);
842 }
843
844 return ret;
845 }
846
847 /*
848 * in the Pre-PMD event of mixer we need to do following:
849 * - Stop the pipe
850 * - find the source connections and remove that from dapm_path_list
851 * - unbind with source pipelines if still connected
852 */
853 static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
854 struct skl *skl)
855 {
856 struct skl_module_cfg *src_mconfig, *sink_mconfig;
857 int ret = 0, i;
858 struct skl_sst *ctx = skl->skl_sst;
859
860 sink_mconfig = w->priv;
861
862 /* Stop the pipe */
863 ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
864 if (ret)
865 return ret;
866
867 for (i = 0; i < sink_mconfig->max_in_queue; i++) {
868 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
869 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
870 if (!src_mconfig)
871 continue;
872 /*
873 * If path_found == 1, that means pmd for source
874 * pipe has not occurred, source is connected to
875 * some other sink. so its responsibility of sink
876 * to unbind itself from source.
877 */
878 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
879 if (ret < 0)
880 return ret;
881
882 ret = skl_unbind_modules(ctx,
883 src_mconfig, sink_mconfig);
884 }
885 }
886
887 return ret;
888 }
889
890 /*
891 * in the Post-PMD event of mixer we need to do following:
892 * - Free the mcps used
893 * - Free the mem used
894 * - Unbind the modules within the pipeline
895 * - Delete the pipeline (modules are not required to be explicitly
896 * deleted, pipeline delete is enough here
897 */
898 static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
899 struct skl *skl)
900 {
901 struct skl_module_cfg *mconfig = w->priv;
902 struct skl_pipe_module *w_module;
903 struct skl_module_cfg *src_module = NULL, *dst_module;
904 struct skl_sst *ctx = skl->skl_sst;
905 struct skl_pipe *s_pipe = mconfig->pipe;
906 int ret = 0;
907
908 if (s_pipe->state == SKL_PIPE_INVALID)
909 return -EINVAL;
910
911 skl_tplg_free_pipe_mcps(skl, mconfig);
912 skl_tplg_free_pipe_mem(skl, mconfig);
913
914 list_for_each_entry(w_module, &s_pipe->w_list, node) {
915 dst_module = w_module->w->priv;
916
917 if (mconfig->m_state >= SKL_MODULE_INIT_DONE)
918 skl_tplg_free_pipe_mcps(skl, dst_module);
919 if (src_module == NULL) {
920 src_module = dst_module;
921 continue;
922 }
923
924 skl_unbind_modules(ctx, src_module, dst_module);
925 src_module = dst_module;
926 }
927
928 ret = skl_delete_pipe(ctx, mconfig->pipe);
929
930 return skl_tplg_unload_pipe_modules(ctx, s_pipe);
931 }
932
933 /*
934 * in the Post-PMD event of PGA we need to do following:
935 * - Free the mcps used
936 * - Stop the pipeline
937 * - In source pipe is connected, unbind with source pipelines
938 */
939 static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
940 struct skl *skl)
941 {
942 struct skl_module_cfg *src_mconfig, *sink_mconfig;
943 int ret = 0, i;
944 struct skl_sst *ctx = skl->skl_sst;
945
946 src_mconfig = w->priv;
947
948 /* Stop the pipe since this is a mixin module */
949 ret = skl_stop_pipe(ctx, src_mconfig->pipe);
950 if (ret)
951 return ret;
952
953 for (i = 0; i < src_mconfig->max_out_queue; i++) {
954 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
955 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
956 if (!sink_mconfig)
957 continue;
958 /*
959 * This is a connecter and if path is found that means
960 * unbind between source and sink has not happened yet
961 */
962 ret = skl_unbind_modules(ctx, src_mconfig,
963 sink_mconfig);
964 }
965 }
966
967 return ret;
968 }
969
970 /*
971 * In modelling, we assume there will be ONLY one mixer in a pipeline. If
972 * mixer is not required then it is treated as static mixer aka vmixer with
973 * a hard path to source module
974 * So we don't need to check if source is started or not as hard path puts
975 * dependency on each other
976 */
977 static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
978 struct snd_kcontrol *k, int event)
979 {
980 struct snd_soc_dapm_context *dapm = w->dapm;
981 struct skl *skl = get_skl_ctx(dapm->dev);
982
983 switch (event) {
984 case SND_SOC_DAPM_PRE_PMU:
985 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
986
987 case SND_SOC_DAPM_POST_PMU:
988 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
989
990 case SND_SOC_DAPM_PRE_PMD:
991 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
992
993 case SND_SOC_DAPM_POST_PMD:
994 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
995 }
996
997 return 0;
998 }
999
1000 /*
1001 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
1002 * second one is required that is created as another pipe entity.
1003 * The mixer is responsible for pipe management and represent a pipeline
1004 * instance
1005 */
1006 static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
1007 struct snd_kcontrol *k, int event)
1008 {
1009 struct snd_soc_dapm_context *dapm = w->dapm;
1010 struct skl *skl = get_skl_ctx(dapm->dev);
1011
1012 switch (event) {
1013 case SND_SOC_DAPM_PRE_PMU:
1014 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
1015
1016 case SND_SOC_DAPM_POST_PMU:
1017 return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
1018
1019 case SND_SOC_DAPM_PRE_PMD:
1020 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
1021
1022 case SND_SOC_DAPM_POST_PMD:
1023 return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
1024 }
1025
1026 return 0;
1027 }
1028
1029 /*
1030 * In modelling, we assumed rest of the modules in pipeline are PGA. But we
1031 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
1032 * the sink when it is running (two FE to one BE or one FE to two BE)
1033 * scenarios
1034 */
1035 static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
1036 struct snd_kcontrol *k, int event)
1037
1038 {
1039 struct snd_soc_dapm_context *dapm = w->dapm;
1040 struct skl *skl = get_skl_ctx(dapm->dev);
1041
1042 switch (event) {
1043 case SND_SOC_DAPM_PRE_PMU:
1044 return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
1045
1046 case SND_SOC_DAPM_POST_PMD:
1047 return skl_tplg_pga_dapm_post_pmd_event(w, skl);
1048 }
1049
1050 return 0;
1051 }
1052
1053 static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
1054 unsigned int __user *data, unsigned int size)
1055 {
1056 struct soc_bytes_ext *sb =
1057 (struct soc_bytes_ext *)kcontrol->private_value;
1058 struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private;
1059 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1060 struct skl_module_cfg *mconfig = w->priv;
1061 struct skl *skl = get_skl_ctx(w->dapm->dev);
1062
1063 if (w->power)
1064 skl_get_module_params(skl->skl_sst, (u32 *)bc->params,
1065 bc->size, bc->param_id, mconfig);
1066
1067 /* decrement size for TLV header */
1068 size -= 2 * sizeof(u32);
1069
1070 /* check size as we don't want to send kernel data */
1071 if (size > bc->max)
1072 size = bc->max;
1073
1074 if (bc->params) {
1075 if (copy_to_user(data, &bc->param_id, sizeof(u32)))
1076 return -EFAULT;
1077 if (copy_to_user(data + 1, &size, sizeof(u32)))
1078 return -EFAULT;
1079 if (copy_to_user(data + 2, bc->params, size))
1080 return -EFAULT;
1081 }
1082
1083 return 0;
1084 }
1085
1086 #define SKL_PARAM_VENDOR_ID 0xff
1087
1088 static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
1089 const unsigned int __user *data, unsigned int size)
1090 {
1091 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
1092 struct skl_module_cfg *mconfig = w->priv;
1093 struct soc_bytes_ext *sb =
1094 (struct soc_bytes_ext *)kcontrol->private_value;
1095 struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private;
1096 struct skl *skl = get_skl_ctx(w->dapm->dev);
1097
1098 if (ac->params) {
1099 if (size > ac->max)
1100 return -EINVAL;
1101
1102 ac->size = size;
1103 /*
1104 * if the param_is is of type Vendor, firmware expects actual
1105 * parameter id and size from the control.
1106 */
1107 if (ac->param_id == SKL_PARAM_VENDOR_ID) {
1108 if (copy_from_user(ac->params, data, size))
1109 return -EFAULT;
1110 } else {
1111 if (copy_from_user(ac->params,
1112 data + 2, size))
1113 return -EFAULT;
1114 }
1115
1116 if (w->power)
1117 return skl_set_module_params(skl->skl_sst,
1118 (u32 *)ac->params, ac->size,
1119 ac->param_id, mconfig);
1120 }
1121
1122 return 0;
1123 }
1124
1125 /*
1126 * Fill the dma id for host and link. In case of passthrough
1127 * pipeline, this will both host and link in the same
1128 * pipeline, so need to copy the link and host based on dev_type
1129 */
1130 static void skl_tplg_fill_dma_id(struct skl_module_cfg *mcfg,
1131 struct skl_pipe_params *params)
1132 {
1133 struct skl_pipe *pipe = mcfg->pipe;
1134
1135 if (pipe->passthru) {
1136 switch (mcfg->dev_type) {
1137 case SKL_DEVICE_HDALINK:
1138 pipe->p_params->link_dma_id = params->link_dma_id;
1139 break;
1140
1141 case SKL_DEVICE_HDAHOST:
1142 pipe->p_params->host_dma_id = params->host_dma_id;
1143 break;
1144
1145 default:
1146 break;
1147 }
1148 pipe->p_params->s_fmt = params->s_fmt;
1149 pipe->p_params->ch = params->ch;
1150 pipe->p_params->s_freq = params->s_freq;
1151 pipe->p_params->stream = params->stream;
1152
1153 } else {
1154 memcpy(pipe->p_params, params, sizeof(*params));
1155 }
1156 }
1157
1158 /*
1159 * The FE params are passed by hw_params of the DAI.
1160 * On hw_params, the params are stored in Gateway module of the FE and we
1161 * need to calculate the format in DSP module configuration, that
1162 * conversion is done here
1163 */
1164 int skl_tplg_update_pipe_params(struct device *dev,
1165 struct skl_module_cfg *mconfig,
1166 struct skl_pipe_params *params)
1167 {
1168 struct skl_module_fmt *format = NULL;
1169
1170 skl_tplg_fill_dma_id(mconfig, params);
1171
1172 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
1173 format = &mconfig->in_fmt[0];
1174 else
1175 format = &mconfig->out_fmt[0];
1176
1177 /* set the hw_params */
1178 format->s_freq = params->s_freq;
1179 format->channels = params->ch;
1180 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
1181
1182 /*
1183 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
1184 * container so update bit depth accordingly
1185 */
1186 switch (format->valid_bit_depth) {
1187 case SKL_DEPTH_16BIT:
1188 format->bit_depth = format->valid_bit_depth;
1189 break;
1190
1191 case SKL_DEPTH_24BIT:
1192 case SKL_DEPTH_32BIT:
1193 format->bit_depth = SKL_DEPTH_32BIT;
1194 break;
1195
1196 default:
1197 dev_err(dev, "Invalid bit depth %x for pipe\n",
1198 format->valid_bit_depth);
1199 return -EINVAL;
1200 }
1201
1202 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1203 mconfig->ibs = (format->s_freq / 1000) *
1204 (format->channels) *
1205 (format->bit_depth >> 3);
1206 } else {
1207 mconfig->obs = (format->s_freq / 1000) *
1208 (format->channels) *
1209 (format->bit_depth >> 3);
1210 }
1211
1212 return 0;
1213 }
1214
1215 /*
1216 * Query the module config for the FE DAI
1217 * This is used to find the hw_params set for that DAI and apply to FE
1218 * pipeline
1219 */
1220 struct skl_module_cfg *
1221 skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
1222 {
1223 struct snd_soc_dapm_widget *w;
1224 struct snd_soc_dapm_path *p = NULL;
1225
1226 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1227 w = dai->playback_widget;
1228 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1229 if (p->connect && p->sink->power &&
1230 !is_skl_dsp_widget_type(p->sink))
1231 continue;
1232
1233 if (p->sink->priv) {
1234 dev_dbg(dai->dev, "set params for %s\n",
1235 p->sink->name);
1236 return p->sink->priv;
1237 }
1238 }
1239 } else {
1240 w = dai->capture_widget;
1241 snd_soc_dapm_widget_for_each_source_path(w, p) {
1242 if (p->connect && p->source->power &&
1243 !is_skl_dsp_widget_type(p->source))
1244 continue;
1245
1246 if (p->source->priv) {
1247 dev_dbg(dai->dev, "set params for %s\n",
1248 p->source->name);
1249 return p->source->priv;
1250 }
1251 }
1252 }
1253
1254 return NULL;
1255 }
1256
1257 static struct skl_module_cfg *skl_get_mconfig_pb_cpr(
1258 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1259 {
1260 struct snd_soc_dapm_path *p;
1261 struct skl_module_cfg *mconfig = NULL;
1262
1263 snd_soc_dapm_widget_for_each_source_path(w, p) {
1264 if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) {
1265 if (p->connect &&
1266 (p->sink->id == snd_soc_dapm_aif_out) &&
1267 p->source->priv) {
1268 mconfig = p->source->priv;
1269 return mconfig;
1270 }
1271 mconfig = skl_get_mconfig_pb_cpr(dai, p->source);
1272 if (mconfig)
1273 return mconfig;
1274 }
1275 }
1276 return mconfig;
1277 }
1278
1279 static struct skl_module_cfg *skl_get_mconfig_cap_cpr(
1280 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w)
1281 {
1282 struct snd_soc_dapm_path *p;
1283 struct skl_module_cfg *mconfig = NULL;
1284
1285 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1286 if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) {
1287 if (p->connect &&
1288 (p->source->id == snd_soc_dapm_aif_in) &&
1289 p->sink->priv) {
1290 mconfig = p->sink->priv;
1291 return mconfig;
1292 }
1293 mconfig = skl_get_mconfig_cap_cpr(dai, p->sink);
1294 if (mconfig)
1295 return mconfig;
1296 }
1297 }
1298 return mconfig;
1299 }
1300
1301 struct skl_module_cfg *
1302 skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream)
1303 {
1304 struct snd_soc_dapm_widget *w;
1305 struct skl_module_cfg *mconfig;
1306
1307 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1308 w = dai->playback_widget;
1309 mconfig = skl_get_mconfig_pb_cpr(dai, w);
1310 } else {
1311 w = dai->capture_widget;
1312 mconfig = skl_get_mconfig_cap_cpr(dai, w);
1313 }
1314 return mconfig;
1315 }
1316
1317 static u8 skl_tplg_be_link_type(int dev_type)
1318 {
1319 int ret;
1320
1321 switch (dev_type) {
1322 case SKL_DEVICE_BT:
1323 ret = NHLT_LINK_SSP;
1324 break;
1325
1326 case SKL_DEVICE_DMIC:
1327 ret = NHLT_LINK_DMIC;
1328 break;
1329
1330 case SKL_DEVICE_I2S:
1331 ret = NHLT_LINK_SSP;
1332 break;
1333
1334 case SKL_DEVICE_HDALINK:
1335 ret = NHLT_LINK_HDA;
1336 break;
1337
1338 default:
1339 ret = NHLT_LINK_INVALID;
1340 break;
1341 }
1342
1343 return ret;
1344 }
1345
1346 /*
1347 * Fill the BE gateway parameters
1348 * The BE gateway expects a blob of parameters which are kept in the ACPI
1349 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
1350 * The port can have multiple settings so pick based on the PCM
1351 * parameters
1352 */
1353 static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
1354 struct skl_module_cfg *mconfig,
1355 struct skl_pipe_params *params)
1356 {
1357 struct nhlt_specific_cfg *cfg;
1358 struct skl *skl = get_skl_ctx(dai->dev);
1359 int link_type = skl_tplg_be_link_type(mconfig->dev_type);
1360
1361 skl_tplg_fill_dma_id(mconfig, params);
1362
1363 if (link_type == NHLT_LINK_HDA)
1364 return 0;
1365
1366 /* update the blob based on virtual bus_id*/
1367 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
1368 params->s_fmt, params->ch,
1369 params->s_freq, params->stream);
1370 if (cfg) {
1371 mconfig->formats_config.caps_size = cfg->size;
1372 mconfig->formats_config.caps = (u32 *) &cfg->caps;
1373 } else {
1374 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
1375 mconfig->vbus_id, link_type,
1376 params->stream);
1377 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
1378 params->ch, params->s_freq, params->s_fmt);
1379 return -EINVAL;
1380 }
1381
1382 return 0;
1383 }
1384
1385 static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
1386 struct snd_soc_dapm_widget *w,
1387 struct skl_pipe_params *params)
1388 {
1389 struct snd_soc_dapm_path *p;
1390 int ret = -EIO;
1391
1392 snd_soc_dapm_widget_for_each_source_path(w, p) {
1393 if (p->connect && is_skl_dsp_widget_type(p->source) &&
1394 p->source->priv) {
1395
1396 ret = skl_tplg_be_fill_pipe_params(dai,
1397 p->source->priv, params);
1398 if (ret < 0)
1399 return ret;
1400 } else {
1401 ret = skl_tplg_be_set_src_pipe_params(dai,
1402 p->source, params);
1403 if (ret < 0)
1404 return ret;
1405 }
1406 }
1407
1408 return ret;
1409 }
1410
1411 static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
1412 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
1413 {
1414 struct snd_soc_dapm_path *p = NULL;
1415 int ret = -EIO;
1416
1417 snd_soc_dapm_widget_for_each_sink_path(w, p) {
1418 if (p->connect && is_skl_dsp_widget_type(p->sink) &&
1419 p->sink->priv) {
1420
1421 ret = skl_tplg_be_fill_pipe_params(dai,
1422 p->sink->priv, params);
1423 if (ret < 0)
1424 return ret;
1425 } else {
1426 ret = skl_tplg_be_set_sink_pipe_params(
1427 dai, p->sink, params);
1428 if (ret < 0)
1429 return ret;
1430 }
1431 }
1432
1433 return ret;
1434 }
1435
1436 /*
1437 * BE hw_params can be a source parameters (capture) or sink parameters
1438 * (playback). Based on sink and source we need to either find the source
1439 * list or the sink list and set the pipeline parameters
1440 */
1441 int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1442 struct skl_pipe_params *params)
1443 {
1444 struct snd_soc_dapm_widget *w;
1445
1446 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1447 w = dai->playback_widget;
1448
1449 return skl_tplg_be_set_src_pipe_params(dai, w, params);
1450
1451 } else {
1452 w = dai->capture_widget;
1453
1454 return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1455 }
1456
1457 return 0;
1458 }
1459
1460 static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
1461 {SKL_MIXER_EVENT, skl_tplg_mixer_event},
1462 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
1463 {SKL_PGA_EVENT, skl_tplg_pga_event},
1464 };
1465
1466 static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = {
1467 {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get,
1468 skl_tplg_tlv_control_set},
1469 };
1470
1471 /*
1472 * The topology binary passes the pin info for a module so initialize the pin
1473 * info passed into module instance
1474 */
1475 static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin,
1476 struct skl_module_pin *m_pin,
1477 bool is_dynamic, int max_pin)
1478 {
1479 int i;
1480
1481 for (i = 0; i < max_pin; i++) {
1482 m_pin[i].id.module_id = dfw_pin[i].module_id;
1483 m_pin[i].id.instance_id = dfw_pin[i].instance_id;
1484 m_pin[i].in_use = false;
1485 m_pin[i].is_dynamic = is_dynamic;
1486 m_pin[i].pin_state = SKL_PIN_UNBIND;
1487 }
1488 }
1489
1490 /*
1491 * Add pipeline from topology binary into driver pipeline list
1492 *
1493 * If already added we return that instance
1494 * Otherwise we create a new instance and add into driver list
1495 */
1496 static struct skl_pipe *skl_tplg_add_pipe(struct device *dev,
1497 struct skl *skl, struct skl_dfw_pipe *dfw_pipe)
1498 {
1499 struct skl_pipeline *ppl;
1500 struct skl_pipe *pipe;
1501 struct skl_pipe_params *params;
1502
1503 list_for_each_entry(ppl, &skl->ppl_list, node) {
1504 if (ppl->pipe->ppl_id == dfw_pipe->pipe_id)
1505 return ppl->pipe;
1506 }
1507
1508 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
1509 if (!ppl)
1510 return NULL;
1511
1512 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
1513 if (!pipe)
1514 return NULL;
1515
1516 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
1517 if (!params)
1518 return NULL;
1519
1520 pipe->ppl_id = dfw_pipe->pipe_id;
1521 pipe->memory_pages = dfw_pipe->memory_pages;
1522 pipe->pipe_priority = dfw_pipe->pipe_priority;
1523 pipe->conn_type = dfw_pipe->conn_type;
1524 pipe->state = SKL_PIPE_INVALID;
1525 pipe->p_params = params;
1526 INIT_LIST_HEAD(&pipe->w_list);
1527
1528 ppl->pipe = pipe;
1529 list_add(&ppl->node, &skl->ppl_list);
1530
1531 return ppl->pipe;
1532 }
1533
1534 static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt,
1535 struct skl_dfw_module_fmt *src_fmt,
1536 int pins)
1537 {
1538 int i;
1539
1540 for (i = 0; i < pins; i++) {
1541 dst_fmt[i].channels = src_fmt[i].channels;
1542 dst_fmt[i].s_freq = src_fmt[i].freq;
1543 dst_fmt[i].bit_depth = src_fmt[i].bit_depth;
1544 dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth;
1545 dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg;
1546 dst_fmt[i].ch_map = src_fmt[i].ch_map;
1547 dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style;
1548 dst_fmt[i].sample_type = src_fmt[i].sample_type;
1549 }
1550 }
1551
1552 static void skl_clear_pin_config(struct snd_soc_platform *platform,
1553 struct snd_soc_dapm_widget *w)
1554 {
1555 int i;
1556 struct skl_module_cfg *mconfig;
1557 struct skl_pipe *pipe;
1558
1559 if (!strncmp(w->dapm->component->name, platform->component.name,
1560 strlen(platform->component.name))) {
1561 mconfig = w->priv;
1562 pipe = mconfig->pipe;
1563 for (i = 0; i < mconfig->max_in_queue; i++) {
1564 mconfig->m_in_pin[i].in_use = false;
1565 mconfig->m_in_pin[i].pin_state = SKL_PIN_UNBIND;
1566 }
1567 for (i = 0; i < mconfig->max_out_queue; i++) {
1568 mconfig->m_out_pin[i].in_use = false;
1569 mconfig->m_out_pin[i].pin_state = SKL_PIN_UNBIND;
1570 }
1571 pipe->state = SKL_PIPE_INVALID;
1572 mconfig->m_state = SKL_MODULE_UNINIT;
1573 }
1574 }
1575
1576 void skl_cleanup_resources(struct skl *skl)
1577 {
1578 struct skl_sst *ctx = skl->skl_sst;
1579 struct snd_soc_platform *soc_platform = skl->platform;
1580 struct snd_soc_dapm_widget *w;
1581 struct snd_soc_card *card;
1582
1583 if (soc_platform == NULL)
1584 return;
1585
1586 card = soc_platform->component.card;
1587 if (!card || !card->instantiated)
1588 return;
1589
1590 skl->resource.mem = 0;
1591 skl->resource.mcps = 0;
1592
1593 list_for_each_entry(w, &card->widgets, list) {
1594 if (is_skl_dsp_widget_type(w) && (w->priv != NULL))
1595 skl_clear_pin_config(soc_platform, w);
1596 }
1597
1598 skl_clear_module_cnt(ctx->dsp);
1599 }
1600
1601 /*
1602 * Topology core widget load callback
1603 *
1604 * This is used to save the private data for each widget which gives
1605 * information to the driver about module and pipeline parameters which DSP
1606 * FW expects like ids, resource values, formats etc
1607 */
1608 static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
1609 struct snd_soc_dapm_widget *w,
1610 struct snd_soc_tplg_dapm_widget *tplg_w)
1611 {
1612 int ret;
1613 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1614 struct skl *skl = ebus_to_skl(ebus);
1615 struct hdac_bus *bus = ebus_to_hbus(ebus);
1616 struct skl_module_cfg *mconfig;
1617 struct skl_pipe *pipe;
1618 struct skl_dfw_module *dfw_config =
1619 (struct skl_dfw_module *)tplg_w->priv.data;
1620
1621 if (!tplg_w->priv.size)
1622 goto bind_event;
1623
1624 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
1625
1626 if (!mconfig)
1627 return -ENOMEM;
1628
1629 w->priv = mconfig;
1630 memcpy(&mconfig->guid, &dfw_config->uuid, 16);
1631
1632 /*
1633 * module binary can be loaded later, so set it to query when
1634 * module is load for a use case
1635 */
1636 mconfig->id.module_id = -1;
1637 mconfig->id.instance_id = dfw_config->instance_id;
1638 mconfig->mcps = dfw_config->max_mcps;
1639 mconfig->ibs = dfw_config->ibs;
1640 mconfig->obs = dfw_config->obs;
1641 mconfig->core_id = dfw_config->core_id;
1642 mconfig->max_in_queue = dfw_config->max_in_queue;
1643 mconfig->max_out_queue = dfw_config->max_out_queue;
1644 mconfig->is_loadable = dfw_config->is_loadable;
1645 mconfig->domain = dfw_config->proc_domain;
1646 skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt,
1647 MODULE_MAX_IN_PINS);
1648 skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt,
1649 MODULE_MAX_OUT_PINS);
1650
1651 mconfig->params_fixup = dfw_config->params_fixup;
1652 mconfig->converter = dfw_config->converter;
1653 mconfig->m_type = dfw_config->module_type;
1654 mconfig->vbus_id = dfw_config->vbus_id;
1655 mconfig->mem_pages = dfw_config->mem_pages;
1656
1657 pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe);
1658 if (pipe)
1659 mconfig->pipe = pipe;
1660
1661 mconfig->dev_type = dfw_config->dev_type;
1662 mconfig->hw_conn_type = dfw_config->hw_conn_type;
1663 mconfig->time_slot = dfw_config->time_slot;
1664 mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
1665
1666 mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) *
1667 sizeof(*mconfig->m_in_pin),
1668 GFP_KERNEL);
1669 if (!mconfig->m_in_pin)
1670 return -ENOMEM;
1671
1672 mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) *
1673 sizeof(*mconfig->m_out_pin),
1674 GFP_KERNEL);
1675 if (!mconfig->m_out_pin)
1676 return -ENOMEM;
1677
1678 skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin,
1679 dfw_config->is_dynamic_in_pin,
1680 mconfig->max_in_queue);
1681
1682 skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin,
1683 dfw_config->is_dynamic_out_pin,
1684 mconfig->max_out_queue);
1685
1686
1687 if (mconfig->formats_config.caps_size == 0)
1688 goto bind_event;
1689
1690 mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev,
1691 mconfig->formats_config.caps_size, GFP_KERNEL);
1692
1693 if (mconfig->formats_config.caps == NULL)
1694 return -ENOMEM;
1695
1696 memcpy(mconfig->formats_config.caps, dfw_config->caps.caps,
1697 dfw_config->caps.caps_size);
1698 mconfig->formats_config.param_id = dfw_config->caps.param_id;
1699 mconfig->formats_config.set_params = dfw_config->caps.set_params;
1700
1701 bind_event:
1702 if (tplg_w->event_type == 0) {
1703 dev_dbg(bus->dev, "ASoC: No event handler required\n");
1704 return 0;
1705 }
1706
1707 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
1708 ARRAY_SIZE(skl_tplg_widget_ops),
1709 tplg_w->event_type);
1710
1711 if (ret) {
1712 dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
1713 __func__, tplg_w->event_type);
1714 return -EINVAL;
1715 }
1716
1717 return 0;
1718 }
1719
1720 static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be,
1721 struct snd_soc_tplg_bytes_control *bc)
1722 {
1723 struct skl_algo_data *ac;
1724 struct skl_dfw_algo_data *dfw_ac =
1725 (struct skl_dfw_algo_data *)bc->priv.data;
1726
1727 ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL);
1728 if (!ac)
1729 return -ENOMEM;
1730
1731 /* Fill private data */
1732 ac->max = dfw_ac->max;
1733 ac->param_id = dfw_ac->param_id;
1734 ac->set_params = dfw_ac->set_params;
1735 ac->size = dfw_ac->max;
1736
1737 if (ac->max) {
1738 ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL);
1739 if (!ac->params)
1740 return -ENOMEM;
1741
1742 memcpy(ac->params, dfw_ac->params, ac->max);
1743 }
1744
1745 be->dobj.private = ac;
1746 return 0;
1747 }
1748
1749 static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
1750 struct snd_kcontrol_new *kctl,
1751 struct snd_soc_tplg_ctl_hdr *hdr)
1752 {
1753 struct soc_bytes_ext *sb;
1754 struct snd_soc_tplg_bytes_control *tplg_bc;
1755 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1756 struct hdac_bus *bus = ebus_to_hbus(ebus);
1757
1758 switch (hdr->ops.info) {
1759 case SND_SOC_TPLG_CTL_BYTES:
1760 tplg_bc = container_of(hdr,
1761 struct snd_soc_tplg_bytes_control, hdr);
1762 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
1763 sb = (struct soc_bytes_ext *)kctl->private_value;
1764 if (tplg_bc->priv.size)
1765 return skl_init_algo_data(
1766 bus->dev, sb, tplg_bc);
1767 }
1768 break;
1769
1770 default:
1771 dev_warn(bus->dev, "Control load not supported %d:%d:%d\n",
1772 hdr->ops.get, hdr->ops.put, hdr->ops.info);
1773 break;
1774 }
1775
1776 return 0;
1777 }
1778
1779 static int skl_manifest_load(struct snd_soc_component *cmpnt,
1780 struct snd_soc_tplg_manifest *manifest)
1781 {
1782 struct skl_dfw_manifest *minfo;
1783 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
1784 struct hdac_bus *bus = ebus_to_hbus(ebus);
1785 struct skl *skl = ebus_to_skl(ebus);
1786 int ret = 0;
1787
1788 minfo = &skl->skl_sst->manifest;
1789 memcpy(minfo, manifest->priv.data, sizeof(struct skl_dfw_manifest));
1790
1791 if (minfo->lib_count > HDA_MAX_LIB) {
1792 dev_err(bus->dev, "Exceeding max Library count. Got:%d\n",
1793 minfo->lib_count);
1794 ret = -EINVAL;
1795 }
1796
1797 return ret;
1798 }
1799
1800 static struct snd_soc_tplg_ops skl_tplg_ops = {
1801 .widget_load = skl_tplg_widget_load,
1802 .control_load = skl_tplg_control_load,
1803 .bytes_ext_ops = skl_tlv_ops,
1804 .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops),
1805 .manifest = skl_manifest_load,
1806 };
1807
1808 /*
1809 * A pipe can have multiple modules, each of them will be a DAPM widget as
1810 * well. While managing a pipeline we need to get the list of all the
1811 * widgets in a pipelines, so this helper - skl_tplg_create_pipe_widget_list()
1812 * helps to get the SKL type widgets in that pipeline
1813 */
1814 static int skl_tplg_create_pipe_widget_list(struct snd_soc_platform *platform)
1815 {
1816 struct snd_soc_dapm_widget *w;
1817 struct skl_module_cfg *mcfg = NULL;
1818 struct skl_pipe_module *p_module = NULL;
1819 struct skl_pipe *pipe;
1820
1821 list_for_each_entry(w, &platform->component.card->widgets, list) {
1822 if (is_skl_dsp_widget_type(w) && w->priv != NULL) {
1823 mcfg = w->priv;
1824 pipe = mcfg->pipe;
1825
1826 p_module = devm_kzalloc(platform->dev,
1827 sizeof(*p_module), GFP_KERNEL);
1828 if (!p_module)
1829 return -ENOMEM;
1830
1831 p_module->w = w;
1832 list_add_tail(&p_module->node, &pipe->w_list);
1833 }
1834 }
1835
1836 return 0;
1837 }
1838
1839 static void skl_tplg_set_pipe_type(struct skl *skl, struct skl_pipe *pipe)
1840 {
1841 struct skl_pipe_module *w_module;
1842 struct snd_soc_dapm_widget *w;
1843 struct skl_module_cfg *mconfig;
1844 bool host_found = false, link_found = false;
1845
1846 list_for_each_entry(w_module, &pipe->w_list, node) {
1847 w = w_module->w;
1848 mconfig = w->priv;
1849
1850 if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
1851 host_found = true;
1852 else if (mconfig->dev_type != SKL_DEVICE_NONE)
1853 link_found = true;
1854 }
1855
1856 if (host_found && link_found)
1857 pipe->passthru = true;
1858 else
1859 pipe->passthru = false;
1860 }
1861
1862 /* This will be read from topology manifest, currently defined here */
1863 #define SKL_MAX_MCPS 30000000
1864 #define SKL_FW_MAX_MEM 1000000
1865
1866 /*
1867 * SKL topology init routine
1868 */
1869 int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
1870 {
1871 int ret;
1872 const struct firmware *fw;
1873 struct hdac_bus *bus = ebus_to_hbus(ebus);
1874 struct skl *skl = ebus_to_skl(ebus);
1875 struct skl_pipeline *ppl;
1876
1877 ret = request_firmware(&fw, skl->tplg_name, bus->dev);
1878 if (ret < 0) {
1879 dev_err(bus->dev, "tplg fw %s load failed with %d\n",
1880 skl->tplg_name, ret);
1881 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
1882 if (ret < 0) {
1883 dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n",
1884 "dfw_sst.bin", ret);
1885 return ret;
1886 }
1887 }
1888
1889 /*
1890 * The complete tplg for SKL is loaded as index 0, we don't use
1891 * any other index
1892 */
1893 ret = snd_soc_tplg_component_load(&platform->component,
1894 &skl_tplg_ops, fw, 0);
1895 if (ret < 0) {
1896 dev_err(bus->dev, "tplg component load failed%d\n", ret);
1897 release_firmware(fw);
1898 return -EINVAL;
1899 }
1900
1901 skl->resource.max_mcps = SKL_MAX_MCPS;
1902 skl->resource.max_mem = SKL_FW_MAX_MEM;
1903
1904 skl->tplg = fw;
1905 ret = skl_tplg_create_pipe_widget_list(platform);
1906 if (ret < 0)
1907 return ret;
1908
1909 list_for_each_entry(ppl, &skl->ppl_list, node)
1910 skl_tplg_set_pipe_type(skl, ppl->pipe);
1911
1912 return 0;
1913 }
Linux kernel - Deliverables
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