sound/soc/intel/skylake/skl-topology.h

   1 /*
   2  *  skl_topology.h - Intel HDA Platform topology header file
   3  *
   4  *  Copyright (C) 2014-15 Intel Corp
   5  *  Author: Jeeja KP <jeeja.kp@intel.com>
   6  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   7  *
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation; version 2 of the License.
  11  *
  12  *  This program is distributed in the hope that it will be useful, but
  13  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  *  General Public License for more details.
  16  *
  17  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  18  *
  19  */
  20
  21 #ifndef __SKL_TOPOLOGY_H__
  22 #define __SKL_TOPOLOGY_H__
  23
  24 #include <linux/types.h>
  25
  26 #include <sound/hdaudio_ext.h>
  27 #include <sound/soc.h>
  28 #include "skl.h"
  29 #include "skl-tplg-interface.h"
  30
  31 #define BITS_PER_BYTE 8
  32 #define MAX_TS_GROUPS 8
  33 #define MAX_DMIC_TS_GROUPS 4
  34 #define MAX_FIXED_DMIC_PARAMS_SIZE 727
  35
  36 /* Maximum number of coefficients up down mixer module */
  37 #define UP_DOWN_MIXER_MAX_COEFF         6
  38
  39 #define MODULE_MAX_IN_PINS      8
  40 #define MODULE_MAX_OUT_PINS     8
  41
  42 enum skl_channel_index {
  43         SKL_CHANNEL_LEFT = 0,
  44         SKL_CHANNEL_RIGHT = 1,
  45         SKL_CHANNEL_CENTER = 2,
  46         SKL_CHANNEL_LEFT_SURROUND = 3,
  47         SKL_CHANNEL_CENTER_SURROUND = 3,
  48         SKL_CHANNEL_RIGHT_SURROUND = 4,
  49         SKL_CHANNEL_LFE = 7,
  50         SKL_CHANNEL_INVALID = 0xF,
  51 };
  52
  53 enum skl_bitdepth {
  54         SKL_DEPTH_8BIT = 8,
  55         SKL_DEPTH_16BIT = 16,
  56         SKL_DEPTH_24BIT = 24,
  57         SKL_DEPTH_32BIT = 32,
  58         SKL_DEPTH_INVALID
  59 };
  60
  61 enum skl_interleaving {
  62         /* [s1_ch1...s1_chN,...,sM_ch1...sM_chN] */
  63         SKL_INTERLEAVING_PER_CHANNEL = 0,
  64         /* [s1_ch1...sM_ch1,...,s1_chN...sM_chN] */
  65         SKL_INTERLEAVING_PER_SAMPLE = 1,
  66 };
  67
  68 enum skl_s_freq {
  69         SKL_FS_8000 = 8000,
  70         SKL_FS_11025 = 11025,
  71         SKL_FS_12000 = 12000,
  72         SKL_FS_16000 = 16000,
  73         SKL_FS_22050 = 22050,
  74         SKL_FS_24000 = 24000,
  75         SKL_FS_32000 = 32000,
  76         SKL_FS_44100 = 44100,
  77         SKL_FS_48000 = 48000,
  78         SKL_FS_64000 = 64000,
  79         SKL_FS_88200 = 88200,
  80         SKL_FS_96000 = 96000,
  81         SKL_FS_128000 = 128000,
  82         SKL_FS_176400 = 176400,
  83         SKL_FS_192000 = 192000,
  84         SKL_FS_INVALID
  85 };
  86
  87 enum skl_widget_type {
  88         SKL_WIDGET_VMIXER = 1,
  89         SKL_WIDGET_MIXER = 2,
  90         SKL_WIDGET_PGA = 3,
  91         SKL_WIDGET_MUX = 4
  92 };
  93
  94 struct skl_audio_data_format {
  95         enum skl_s_freq s_freq;
  96         enum skl_bitdepth bit_depth;
  97         u32 channel_map;
  98         enum skl_ch_cfg ch_cfg;
  99         enum skl_interleaving interleaving;
 100         u8 number_of_channels;
 101         u8 valid_bit_depth;
 102         u8 sample_type;
 103         u8 reserved[1];
 104 } __packed;
 105
 106 struct skl_base_cfg {
 107         u32 cps;
 108         u32 ibs;
 109         u32 obs;
 110         u32 is_pages;
 111         struct skl_audio_data_format audio_fmt;
 112 };
 113
 114 struct skl_cpr_gtw_cfg {
 115         u32 node_id;
 116         u32 dma_buffer_size;
 117         u32 config_length;
 118         /* not mandatory; required only for DMIC/I2S */
 119         u32 config_data[1];
 120 } __packed;
 121
 122 struct skl_cpr_cfg {
 123         struct skl_base_cfg base_cfg;
 124         struct skl_audio_data_format out_fmt;
 125         u32 cpr_feature_mask;
 126         struct skl_cpr_gtw_cfg gtw_cfg;
 127 } __packed;
 128
 129
 130 struct skl_src_module_cfg {
 131         struct skl_base_cfg base_cfg;
 132         enum skl_s_freq src_cfg;
 133 } __packed;
 134
 135 struct notification_mask {
 136         u32 notify;
 137         u32 enable;
 138 } __packed;
 139
 140 struct skl_up_down_mixer_cfg {
 141         struct skl_base_cfg base_cfg;
 142         enum skl_ch_cfg out_ch_cfg;
 143         /* This should be set to 1 if user coefficients are required */
 144         u32 coeff_sel;
 145         /* Pass the user coeff in this array */
 146         s32 coeff[UP_DOWN_MIXER_MAX_COEFF];
 147 } __packed;
 148
 149 enum skl_dma_type {
 150         SKL_DMA_HDA_HOST_OUTPUT_CLASS = 0,
 151         SKL_DMA_HDA_HOST_INPUT_CLASS = 1,
 152         SKL_DMA_HDA_HOST_INOUT_CLASS = 2,
 153         SKL_DMA_HDA_LINK_OUTPUT_CLASS = 8,
 154         SKL_DMA_HDA_LINK_INPUT_CLASS = 9,
 155         SKL_DMA_HDA_LINK_INOUT_CLASS = 0xA,
 156         SKL_DMA_DMIC_LINK_INPUT_CLASS = 0xB,
 157         SKL_DMA_I2S_LINK_OUTPUT_CLASS = 0xC,
 158         SKL_DMA_I2S_LINK_INPUT_CLASS = 0xD,
 159 };
 160
 161 union skl_ssp_dma_node {
 162         u8 val;
 163         struct {
 164                 u8 time_slot_index:4;
 165                 u8 i2s_instance:4;
 166         } dma_node;
 167 };
 168
 169 union skl_connector_node_id {
 170         u32 val;
 171         struct {
 172                 u32 vindex:8;
 173                 u32 dma_type:4;
 174                 u32 rsvd:20;
 175         } node;
 176 };
 177
 178 struct skl_module_fmt {
 179         u32 channels;
 180         u32 s_freq;
 181         u32 bit_depth;
 182         u32 valid_bit_depth;
 183         u32 ch_cfg;
 184         u32 interleaving_style;
 185         u32 sample_type;
 186         u32 ch_map;
 187 };
 188
 189 struct skl_module_cfg;
 190
 191 struct skl_module_inst_id {
 192         u32 module_id;
 193         u32 instance_id;
 194 };
 195
 196 enum skl_module_pin_state {
 197         SKL_PIN_UNBIND = 0,
 198         SKL_PIN_BIND_DONE = 1,
 199 };
 200
 201 struct skl_module_pin {
 202         struct skl_module_inst_id id;
 203         bool is_dynamic;
 204         bool in_use;
 205         enum skl_module_pin_state pin_state;
 206         struct skl_module_cfg *tgt_mcfg;
 207 };
 208
 209 struct skl_specific_cfg {
 210         u32 caps_size;
 211         u32 *caps;
 212 };
 213
 214 enum skl_pipe_state {
 215         SKL_PIPE_INVALID = 0,
 216         SKL_PIPE_CREATED = 1,
 217         SKL_PIPE_PAUSED = 2,
 218         SKL_PIPE_STARTED = 3
 219 };
 220
 221 struct skl_pipe_module {
 222         struct snd_soc_dapm_widget *w;
 223         struct list_head node;
 224 };
 225
 226 struct skl_pipe_params {
 227         u8 host_dma_id;
 228         u8 link_dma_id;
 229         u32 ch;
 230         u32 s_freq;
 231         u32 s_fmt;
 232         u8 linktype;
 233         int stream;
 234 };
 235
 236 struct skl_pipe {
 237         u8 ppl_id;
 238         u8 pipe_priority;
 239         u16 conn_type;
 240         u32 memory_pages;
 241         struct skl_pipe_params *p_params;
 242         enum skl_pipe_state state;
 243         struct list_head w_list;
 244 };
 245
 246 enum skl_module_state {
 247         SKL_MODULE_UNINIT = 0,
 248         SKL_MODULE_INIT_DONE = 1,
 249         SKL_MODULE_LOADED = 2,
 250         SKL_MODULE_UNLOADED = 3,
 251         SKL_MODULE_BIND_DONE = 4
 252 };
 253
 254 struct skl_module_cfg {
 255         struct skl_module_inst_id id;
 256         bool homogenous_inputs;
 257         bool homogenous_outputs;
 258         struct skl_module_fmt in_fmt[MODULE_MAX_IN_PINS];
 259         struct skl_module_fmt out_fmt[MODULE_MAX_OUT_PINS];
 260         u8 max_in_queue;
 261         u8 max_out_queue;
 262         u8 in_queue_mask;
 263         u8 out_queue_mask;
 264         u8 in_queue;
 265         u8 out_queue;
 266         u32 mcps;
 267         u32 ibs;
 268         u32 obs;
 269         u8 is_loadable;
 270         u8 core_id;
 271         u8 dev_type;
 272         u8 dma_id;
 273         u8 time_slot;
 274         u32 params_fixup;
 275         u32 converter;
 276         u32 vbus_id;
 277         struct skl_module_pin *m_in_pin;
 278         struct skl_module_pin *m_out_pin;
 279         enum skl_module_type m_type;
 280         enum skl_hw_conn_type  hw_conn_type;
 281         enum skl_module_state m_state;
 282         struct skl_pipe *pipe;
 283         struct skl_specific_cfg formats_config;
 284 };
 285
 286 struct skl_pipeline {
 287         struct skl_pipe *pipe;
 288         struct list_head node;
 289 };
 290
 291 static inline struct skl *get_skl_ctx(struct device *dev)
 292 {
 293         struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
 294
 295         return ebus_to_skl(ebus);
 296 }
 297
 298 int skl_tplg_be_update_params(struct snd_soc_dai *dai,
 299         struct skl_pipe_params *params);
 300 void skl_tplg_set_be_dmic_config(struct snd_soc_dai *dai,
 301         struct skl_pipe_params *params, int stream);
 302 int skl_tplg_init(struct snd_soc_platform *platform,
 303                                 struct hdac_ext_bus *ebus);
 304 struct skl_module_cfg *skl_tplg_fe_get_cpr_module(
 305                 struct snd_soc_dai *dai, int stream);
 306 int skl_tplg_update_pipe_params(struct device *dev,
 307                 struct skl_module_cfg *mconfig, struct skl_pipe_params *params);
 308
 309 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe);
 310
 311 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
 312
 313 int skl_pause_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
 314
 315 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
 316
 317 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe);
 318
 319 int skl_init_module(struct skl_sst *ctx, struct skl_module_cfg *module_config,
 320         char *param);
 321
 322 int skl_bind_modules(struct skl_sst *ctx, struct skl_module_cfg
 323         *src_module, struct skl_module_cfg *dst_module);
 324
 325 int skl_unbind_modules(struct skl_sst *ctx, struct skl_module_cfg
 326         *src_module, struct skl_module_cfg *dst_module);
 327
 328 enum skl_bitdepth skl_get_bit_depth(int params);
 329 #endif