2 * omap-dmic.c -- OMAP ASoC DMIC DAI driver
4 * Copyright (C) 2010 - 2011 Texas Instruments
6 * Author: David Lambert <dlambert@ti.com>
7 * Misael Lopez Cruz <misael.lopez@ti.com>
8 * Liam Girdwood <lrg@ti.com>
9 * Peter Ujfalusi <peter.ujfalusi@ti.com>
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * version 2 as published by the Free Software Foundation.
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/platform_device.h>
30 #include <linux/err.h>
31 #include <linux/clk.h>
33 #include <linux/slab.h>
34 #include <linux/pm_runtime.h>
35 #include <linux/of_device.h>
37 #include <sound/core.h>
38 #include <sound/pcm.h>
39 #include <sound/pcm_params.h>
40 #include <sound/initval.h>
41 #include <sound/soc.h>
44 #include "omap-dmic.h"
48 void __iomem
*io_base
;
61 * Stream DMA parameters
63 static struct omap_pcm_dma_data omap_dmic_dai_dma_params
= {
64 .name
= "DMIC capture",
67 static inline void omap_dmic_write(struct omap_dmic
*dmic
, u16 reg
, u32 val
)
69 __raw_writel(val
, dmic
->io_base
+ reg
);
72 static inline int omap_dmic_read(struct omap_dmic
*dmic
, u16 reg
)
74 return __raw_readl(dmic
->io_base
+ reg
);
77 static inline void omap_dmic_start(struct omap_dmic
*dmic
)
79 u32 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
81 /* Configure DMA controller */
82 omap_dmic_write(dmic
, OMAP_DMIC_DMAENABLE_SET_REG
,
83 OMAP_DMIC_DMA_ENABLE
);
85 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, ctrl
| dmic
->ch_enabled
);
88 static inline void omap_dmic_stop(struct omap_dmic
*dmic
)
90 u32 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
91 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
,
92 ctrl
& ~OMAP_DMIC_UP_ENABLE_MASK
);
94 /* Disable DMA request generation */
95 omap_dmic_write(dmic
, OMAP_DMIC_DMAENABLE_CLR_REG
,
96 OMAP_DMIC_DMA_ENABLE
);
100 static inline int dmic_is_enabled(struct omap_dmic
*dmic
)
102 return omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
) &
103 OMAP_DMIC_UP_ENABLE_MASK
;
106 static int omap_dmic_dai_startup(struct snd_pcm_substream
*substream
,
107 struct snd_soc_dai
*dai
)
109 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
112 mutex_lock(&dmic
->mutex
);
119 mutex_unlock(&dmic
->mutex
);
121 snd_soc_dai_set_dma_data(dai
, substream
, &omap_dmic_dai_dma_params
);
125 static void omap_dmic_dai_shutdown(struct snd_pcm_substream
*substream
,
126 struct snd_soc_dai
*dai
)
128 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
130 mutex_lock(&dmic
->mutex
);
135 mutex_unlock(&dmic
->mutex
);
138 static int omap_dmic_select_divider(struct omap_dmic
*dmic
, int sample_rate
)
140 int divider
= -EINVAL
;
143 * 192KHz rate is only supported with 19.2MHz/3.84MHz clock
146 if (sample_rate
== 192000) {
147 if (dmic
->fclk_freq
== 19200000 && dmic
->out_freq
== 3840000)
148 divider
= 0x6; /* Divider: 5 (192KHz sampling rate) */
151 "invalid clock configuration for 192KHz\n");
156 switch (dmic
->out_freq
) {
158 if (dmic
->fclk_freq
!= 24576000)
160 divider
= 0x4; /* Divider: 16 */
163 switch (dmic
->fclk_freq
) {
165 divider
= 0x5; /* Divider: 5 */
168 divider
= 0x0; /* Divider: 8 */
171 divider
= 0x2; /* Divider: 10 */
178 if (dmic
->fclk_freq
!= 24576000)
180 divider
= 0x3; /* Divider: 8 */
183 if (dmic
->fclk_freq
!= 19200000)
185 divider
= 0x1; /* Divider: 5 (96KHz sampling rate) */
188 dev_err(dmic
->dev
, "invalid out frequency: %dHz\n",
196 dev_err(dmic
->dev
, "invalid out frequency %dHz for %dHz input\n",
197 dmic
->out_freq
, dmic
->fclk_freq
);
201 static int omap_dmic_dai_hw_params(struct snd_pcm_substream
*substream
,
202 struct snd_pcm_hw_params
*params
,
203 struct snd_soc_dai
*dai
)
205 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
206 struct omap_pcm_dma_data
*dma_data
;
209 dmic
->clk_div
= omap_dmic_select_divider(dmic
, params_rate(params
));
210 if (dmic
->clk_div
< 0) {
211 dev_err(dmic
->dev
, "no valid divider for %dHz from %dHz\n",
212 dmic
->out_freq
, dmic
->fclk_freq
);
216 dmic
->ch_enabled
= 0;
217 channels
= params_channels(params
);
220 dmic
->ch_enabled
|= OMAP_DMIC_UP3_ENABLE
;
222 dmic
->ch_enabled
|= OMAP_DMIC_UP2_ENABLE
;
224 dmic
->ch_enabled
|= OMAP_DMIC_UP1_ENABLE
;
227 dev_err(dmic
->dev
, "invalid number of legacy channels\n");
231 /* packet size is threshold * channels */
232 dma_data
= snd_soc_dai_get_dma_data(dai
, substream
);
233 dma_data
->packet_size
= dmic
->threshold
* channels
;
238 static int omap_dmic_dai_prepare(struct snd_pcm_substream
*substream
,
239 struct snd_soc_dai
*dai
)
241 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
244 /* Configure uplink threshold */
245 omap_dmic_write(dmic
, OMAP_DMIC_FIFO_CTRL_REG
, dmic
->threshold
);
247 ctrl
= omap_dmic_read(dmic
, OMAP_DMIC_CTRL_REG
);
249 /* Set dmic out format */
250 ctrl
&= ~(OMAP_DMIC_FORMAT
| OMAP_DMIC_POLAR_MASK
);
251 ctrl
|= (OMAP_DMICOUTFORMAT_LJUST
| OMAP_DMIC_POLAR1
|
252 OMAP_DMIC_POLAR2
| OMAP_DMIC_POLAR3
);
254 /* Configure dmic clock divider */
255 ctrl
&= ~OMAP_DMIC_CLK_DIV_MASK
;
256 ctrl
|= OMAP_DMIC_CLK_DIV(dmic
->clk_div
);
258 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, ctrl
);
260 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
,
261 ctrl
| OMAP_DMICOUTFORMAT_LJUST
| OMAP_DMIC_POLAR1
|
262 OMAP_DMIC_POLAR2
| OMAP_DMIC_POLAR3
);
267 static int omap_dmic_dai_trigger(struct snd_pcm_substream
*substream
,
268 int cmd
, struct snd_soc_dai
*dai
)
270 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
273 case SNDRV_PCM_TRIGGER_START
:
274 omap_dmic_start(dmic
);
276 case SNDRV_PCM_TRIGGER_STOP
:
277 omap_dmic_stop(dmic
);
286 static int omap_dmic_select_fclk(struct omap_dmic
*dmic
, int clk_id
,
289 struct clk
*parent_clk
;
290 char *parent_clk_name
;
300 dev_err(dmic
->dev
, "invalid input frequency: %dHz\n", freq
);
305 if (dmic
->sysclk
== clk_id
) {
306 dmic
->fclk_freq
= freq
;
310 /* re-parent not allowed if a stream is ongoing */
311 if (dmic
->active
&& dmic_is_enabled(dmic
)) {
312 dev_err(dmic
->dev
, "can't re-parent when DMIC active\n");
317 case OMAP_DMIC_SYSCLK_PAD_CLKS
:
318 parent_clk_name
= "pad_clks_ck";
320 case OMAP_DMIC_SYSCLK_SLIMBLUS_CLKS
:
321 parent_clk_name
= "slimbus_clk";
323 case OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS
:
324 parent_clk_name
= "dmic_sync_mux_ck";
327 dev_err(dmic
->dev
, "fclk clk_id (%d) not supported\n", clk_id
);
331 parent_clk
= clk_get(dmic
->dev
, parent_clk_name
);
332 if (IS_ERR(parent_clk
)) {
333 dev_err(dmic
->dev
, "can't get %s\n", parent_clk_name
);
337 mutex_lock(&dmic
->mutex
);
339 /* disable clock while reparenting */
340 pm_runtime_put_sync(dmic
->dev
);
341 ret
= clk_set_parent(dmic
->fclk
, parent_clk
);
342 pm_runtime_get_sync(dmic
->dev
);
344 ret
= clk_set_parent(dmic
->fclk
, parent_clk
);
346 mutex_unlock(&dmic
->mutex
);
349 dev_err(dmic
->dev
, "re-parent failed\n");
353 dmic
->sysclk
= clk_id
;
354 dmic
->fclk_freq
= freq
;
362 static int omap_dmic_select_outclk(struct omap_dmic
*dmic
, int clk_id
,
367 if (clk_id
!= OMAP_DMIC_ABE_DMIC_CLK
) {
368 dev_err(dmic
->dev
, "output clk_id (%d) not supported\n",
378 dmic
->out_freq
= freq
;
381 dev_err(dmic
->dev
, "invalid out frequency: %dHz\n", freq
);
389 static int omap_dmic_set_dai_sysclk(struct snd_soc_dai
*dai
, int clk_id
,
390 unsigned int freq
, int dir
)
392 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
394 if (dir
== SND_SOC_CLOCK_IN
)
395 return omap_dmic_select_fclk(dmic
, clk_id
, freq
);
396 else if (dir
== SND_SOC_CLOCK_OUT
)
397 return omap_dmic_select_outclk(dmic
, clk_id
, freq
);
399 dev_err(dmic
->dev
, "invalid clock direction (%d)\n", dir
);
403 static const struct snd_soc_dai_ops omap_dmic_dai_ops
= {
404 .startup
= omap_dmic_dai_startup
,
405 .shutdown
= omap_dmic_dai_shutdown
,
406 .hw_params
= omap_dmic_dai_hw_params
,
407 .prepare
= omap_dmic_dai_prepare
,
408 .trigger
= omap_dmic_dai_trigger
,
409 .set_sysclk
= omap_dmic_set_dai_sysclk
,
412 static int omap_dmic_probe(struct snd_soc_dai
*dai
)
414 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
416 pm_runtime_enable(dmic
->dev
);
418 /* Disable lines while request is ongoing */
419 pm_runtime_get_sync(dmic
->dev
);
420 omap_dmic_write(dmic
, OMAP_DMIC_CTRL_REG
, 0x00);
421 pm_runtime_put_sync(dmic
->dev
);
423 /* Configure DMIC threshold value */
424 dmic
->threshold
= OMAP_DMIC_THRES_MAX
- 3;
428 static int omap_dmic_remove(struct snd_soc_dai
*dai
)
430 struct omap_dmic
*dmic
= snd_soc_dai_get_drvdata(dai
);
432 pm_runtime_disable(dmic
->dev
);
437 static struct snd_soc_dai_driver omap_dmic_dai
= {
439 .probe
= omap_dmic_probe
,
440 .remove
= omap_dmic_remove
,
444 .rates
= SNDRV_PCM_RATE_96000
| SNDRV_PCM_RATE_192000
,
445 .formats
= SNDRV_PCM_FMTBIT_S32_LE
,
448 .ops
= &omap_dmic_dai_ops
,
451 static int asoc_dmic_probe(struct platform_device
*pdev
)
453 struct omap_dmic
*dmic
;
454 struct resource
*res
;
457 dmic
= devm_kzalloc(&pdev
->dev
, sizeof(struct omap_dmic
), GFP_KERNEL
);
461 platform_set_drvdata(pdev
, dmic
);
462 dmic
->dev
= &pdev
->dev
;
463 dmic
->sysclk
= OMAP_DMIC_SYSCLK_SYNC_MUX_CLKS
;
465 mutex_init(&dmic
->mutex
);
467 dmic
->fclk
= clk_get(dmic
->dev
, "fck");
468 if (IS_ERR(dmic
->fclk
)) {
469 dev_err(dmic
->dev
, "cant get fck\n");
473 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "dma");
475 dev_err(dmic
->dev
, "invalid dma memory resource\n");
479 omap_dmic_dai_dma_params
.port_addr
= res
->start
+ OMAP_DMIC_DATA_REG
;
481 res
= platform_get_resource(pdev
, IORESOURCE_DMA
, 0);
483 dev_err(dmic
->dev
, "invalid dma resource\n");
487 omap_dmic_dai_dma_params
.dma_req
= res
->start
;
489 res
= platform_get_resource_byname(pdev
, IORESOURCE_MEM
, "mpu");
491 dev_err(dmic
->dev
, "invalid memory resource\n");
496 if (!devm_request_mem_region(&pdev
->dev
, res
->start
,
497 resource_size(res
), pdev
->name
)) {
498 dev_err(dmic
->dev
, "memory region already claimed\n");
503 dmic
->io_base
= devm_ioremap(&pdev
->dev
, res
->start
,
505 if (!dmic
->io_base
) {
510 ret
= snd_soc_register_dai(&pdev
->dev
, &omap_dmic_dai
);
521 static int asoc_dmic_remove(struct platform_device
*pdev
)
523 struct omap_dmic
*dmic
= platform_get_drvdata(pdev
);
525 snd_soc_unregister_dai(&pdev
->dev
);
531 static const struct of_device_id omap_dmic_of_match
[] = {
532 { .compatible
= "ti,omap4-dmic", },
535 MODULE_DEVICE_TABLE(of
, omap_dmic_of_match
);
537 static struct platform_driver asoc_dmic_driver
= {
540 .owner
= THIS_MODULE
,
541 .of_match_table
= omap_dmic_of_match
,
543 .probe
= asoc_dmic_probe
,
544 .remove
= asoc_dmic_remove
,
547 module_platform_driver(asoc_dmic_driver
);
549 MODULE_ALIAS("platform:omap-dmic");
550 MODULE_AUTHOR("Peter Ujfalusi <peter.ujfalusi@ti.com>");
551 MODULE_DESCRIPTION("OMAP DMIC ASoC Interface");
552 MODULE_LICENSE("GPL");