2 * omap-mcbsp.c -- OMAP ALSA SoC DAI driver using McBSP port
4 * Copyright (C) 2008 Nokia Corporation
6 * Contact: Jarkko Nikula <jarkko.nikula@nokia.com>
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24 #include <linux/init.h>
25 #include <linux/module.h>
26 #include <linux/device.h>
27 #include <sound/core.h>
28 #include <sound/pcm.h>
29 #include <sound/pcm_params.h>
30 #include <sound/initval.h>
31 #include <sound/soc.h>
33 #include <mach/control.h>
35 #include <mach/mcbsp.h>
36 #include "omap-mcbsp.h"
39 #define OMAP_MCBSP_RATES (SNDRV_PCM_RATE_44100 | \
40 SNDRV_PCM_RATE_48000 | \
43 struct omap_mcbsp_data
{
45 struct omap_mcbsp_reg_cfg regs
;
47 * Flags indicating is the bus already activated and configured by
54 #define to_mcbsp(priv) container_of((priv), struct omap_mcbsp_data, bus_id)
56 static struct omap_mcbsp_data mcbsp_data
[NUM_LINKS
];
59 * Stream DMA parameters. DMA request line and port address are set runtime
60 * since they are different between OMAP1 and later OMAPs
62 static struct omap_pcm_dma_data omap_mcbsp_dai_dma_params
[NUM_LINKS
][2] = {
64 { .name
= "I2S PCM Stereo out", },
65 { .name
= "I2S PCM Stereo in", },
69 #if defined(CONFIG_ARCH_OMAP15XX) || defined(CONFIG_ARCH_OMAP16XX)
70 static const int omap1_dma_reqs
[][2] = {
71 { OMAP_DMA_MCBSP1_TX
, OMAP_DMA_MCBSP1_RX
},
72 { OMAP_DMA_MCBSP2_TX
, OMAP_DMA_MCBSP2_RX
},
73 { OMAP_DMA_MCBSP3_TX
, OMAP_DMA_MCBSP3_RX
},
75 static const unsigned long omap1_mcbsp_port
[][2] = {
76 { OMAP1510_MCBSP1_BASE
+ OMAP_MCBSP_REG_DXR1
,
77 OMAP1510_MCBSP1_BASE
+ OMAP_MCBSP_REG_DRR1
},
78 { OMAP1510_MCBSP2_BASE
+ OMAP_MCBSP_REG_DXR1
,
79 OMAP1510_MCBSP2_BASE
+ OMAP_MCBSP_REG_DRR1
},
80 { OMAP1510_MCBSP3_BASE
+ OMAP_MCBSP_REG_DXR1
,
81 OMAP1510_MCBSP3_BASE
+ OMAP_MCBSP_REG_DRR1
},
84 static const int omap1_dma_reqs
[][2] = {};
85 static const unsigned long omap1_mcbsp_port
[][2] = {};
88 #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX)
89 static const int omap24xx_dma_reqs
[][2] = {
90 { OMAP24XX_DMA_MCBSP1_TX
, OMAP24XX_DMA_MCBSP1_RX
},
91 { OMAP24XX_DMA_MCBSP2_TX
, OMAP24XX_DMA_MCBSP2_RX
},
92 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX)
93 { OMAP24XX_DMA_MCBSP3_TX
, OMAP24XX_DMA_MCBSP3_RX
},
94 { OMAP24XX_DMA_MCBSP4_TX
, OMAP24XX_DMA_MCBSP4_RX
},
95 { OMAP24XX_DMA_MCBSP5_TX
, OMAP24XX_DMA_MCBSP5_RX
},
99 static const int omap24xx_dma_reqs
[][2] = {};
102 #if defined(CONFIG_ARCH_OMAP2420)
103 static const unsigned long omap2420_mcbsp_port
[][2] = {
104 { OMAP24XX_MCBSP1_BASE
+ OMAP_MCBSP_REG_DXR1
,
105 OMAP24XX_MCBSP1_BASE
+ OMAP_MCBSP_REG_DRR1
},
106 { OMAP24XX_MCBSP2_BASE
+ OMAP_MCBSP_REG_DXR1
,
107 OMAP24XX_MCBSP2_BASE
+ OMAP_MCBSP_REG_DRR1
},
110 static const unsigned long omap2420_mcbsp_port
[][2] = {};
113 #if defined(CONFIG_ARCH_OMAP2430)
114 static const unsigned long omap2430_mcbsp_port
[][2] = {
115 { OMAP24XX_MCBSP1_BASE
+ OMAP_MCBSP_REG_DXR
,
116 OMAP24XX_MCBSP1_BASE
+ OMAP_MCBSP_REG_DRR
},
117 { OMAP24XX_MCBSP2_BASE
+ OMAP_MCBSP_REG_DXR
,
118 OMAP24XX_MCBSP2_BASE
+ OMAP_MCBSP_REG_DRR
},
119 { OMAP2430_MCBSP3_BASE
+ OMAP_MCBSP_REG_DXR
,
120 OMAP2430_MCBSP3_BASE
+ OMAP_MCBSP_REG_DRR
},
121 { OMAP2430_MCBSP4_BASE
+ OMAP_MCBSP_REG_DXR
,
122 OMAP2430_MCBSP4_BASE
+ OMAP_MCBSP_REG_DRR
},
123 { OMAP2430_MCBSP5_BASE
+ OMAP_MCBSP_REG_DXR
,
124 OMAP2430_MCBSP5_BASE
+ OMAP_MCBSP_REG_DRR
},
127 static const unsigned long omap2430_mcbsp_port
[][2] = {};
130 #if defined(CONFIG_ARCH_OMAP34XX)
131 static const unsigned long omap34xx_mcbsp_port
[][2] = {
132 { OMAP34XX_MCBSP1_BASE
+ OMAP_MCBSP_REG_DXR
,
133 OMAP34XX_MCBSP1_BASE
+ OMAP_MCBSP_REG_DRR
},
134 { OMAP34XX_MCBSP2_BASE
+ OMAP_MCBSP_REG_DXR
,
135 OMAP34XX_MCBSP2_BASE
+ OMAP_MCBSP_REG_DRR
},
136 { OMAP34XX_MCBSP3_BASE
+ OMAP_MCBSP_REG_DXR
,
137 OMAP34XX_MCBSP3_BASE
+ OMAP_MCBSP_REG_DRR
},
138 { OMAP34XX_MCBSP4_BASE
+ OMAP_MCBSP_REG_DXR
,
139 OMAP34XX_MCBSP4_BASE
+ OMAP_MCBSP_REG_DRR
},
140 { OMAP34XX_MCBSP5_BASE
+ OMAP_MCBSP_REG_DXR
,
141 OMAP34XX_MCBSP5_BASE
+ OMAP_MCBSP_REG_DRR
},
144 static const unsigned long omap34xx_mcbsp_port
[][2] = {};
147 static int omap_mcbsp_dai_startup(struct snd_pcm_substream
*substream
)
149 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
150 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
151 struct omap_mcbsp_data
*mcbsp_data
= to_mcbsp(cpu_dai
->private_data
);
154 if (!cpu_dai
->active
)
155 err
= omap_mcbsp_request(mcbsp_data
->bus_id
);
160 static void omap_mcbsp_dai_shutdown(struct snd_pcm_substream
*substream
)
162 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
163 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
164 struct omap_mcbsp_data
*mcbsp_data
= to_mcbsp(cpu_dai
->private_data
);
166 if (!cpu_dai
->active
) {
167 omap_mcbsp_free(mcbsp_data
->bus_id
);
168 mcbsp_data
->configured
= 0;
172 static int omap_mcbsp_dai_trigger(struct snd_pcm_substream
*substream
, int cmd
)
174 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
175 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
176 struct omap_mcbsp_data
*mcbsp_data
= to_mcbsp(cpu_dai
->private_data
);
180 case SNDRV_PCM_TRIGGER_START
:
181 case SNDRV_PCM_TRIGGER_RESUME
:
182 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
183 if (!mcbsp_data
->active
++)
184 omap_mcbsp_start(mcbsp_data
->bus_id
);
187 case SNDRV_PCM_TRIGGER_STOP
:
188 case SNDRV_PCM_TRIGGER_SUSPEND
:
189 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
190 if (!--mcbsp_data
->active
)
191 omap_mcbsp_stop(mcbsp_data
->bus_id
);
200 static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream
*substream
,
201 struct snd_pcm_hw_params
*params
)
203 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
204 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
205 struct omap_mcbsp_data
*mcbsp_data
= to_mcbsp(cpu_dai
->private_data
);
206 struct omap_mcbsp_reg_cfg
*regs
= &mcbsp_data
->regs
;
207 int dma
, bus_id
= mcbsp_data
->bus_id
, id
= cpu_dai
->id
;
210 if (cpu_class_is_omap1()) {
211 dma
= omap1_dma_reqs
[bus_id
][substream
->stream
];
212 port
= omap1_mcbsp_port
[bus_id
][substream
->stream
];
213 } else if (cpu_is_omap2420()) {
214 dma
= omap24xx_dma_reqs
[bus_id
][substream
->stream
];
215 port
= omap2420_mcbsp_port
[bus_id
][substream
->stream
];
216 } else if (cpu_is_omap2430()) {
217 dma
= omap24xx_dma_reqs
[bus_id
][substream
->stream
];
218 port
= omap2430_mcbsp_port
[bus_id
][substream
->stream
];
219 } else if (cpu_is_omap343x()) {
220 dma
= omap24xx_dma_reqs
[bus_id
][substream
->stream
];
221 port
= omap34xx_mcbsp_port
[bus_id
][substream
->stream
];
225 omap_mcbsp_dai_dma_params
[id
][substream
->stream
].dma_req
= dma
;
226 omap_mcbsp_dai_dma_params
[id
][substream
->stream
].port_addr
= port
;
227 cpu_dai
->dma_data
= &omap_mcbsp_dai_dma_params
[id
][substream
->stream
];
229 if (mcbsp_data
->configured
) {
230 /* McBSP already configured by another stream */
234 switch (params_channels(params
)) {
236 /* Set 1 word per (McBPSP) frame and use dual-phase frames */
237 regs
->rcr2
|= RFRLEN2(1 - 1) | RPHASE
;
238 regs
->rcr1
|= RFRLEN1(1 - 1);
239 regs
->xcr2
|= XFRLEN2(1 - 1) | XPHASE
;
240 regs
->xcr1
|= XFRLEN1(1 - 1);
243 /* Unsupported number of channels */
247 switch (params_format(params
)) {
248 case SNDRV_PCM_FORMAT_S16_LE
:
249 /* Set word lengths */
250 regs
->rcr2
|= RWDLEN2(OMAP_MCBSP_WORD_16
);
251 regs
->rcr1
|= RWDLEN1(OMAP_MCBSP_WORD_16
);
252 regs
->xcr2
|= XWDLEN2(OMAP_MCBSP_WORD_16
);
253 regs
->xcr1
|= XWDLEN1(OMAP_MCBSP_WORD_16
);
254 /* Set FS period and length in terms of bit clock periods */
255 regs
->srgr2
|= FPER(16 * 2 - 1);
256 regs
->srgr1
|= FWID(16 - 1);
259 /* Unsupported PCM format */
263 omap_mcbsp_config(bus_id
, &mcbsp_data
->regs
);
264 mcbsp_data
->configured
= 1;
270 * This must be called before _set_clkdiv and _set_sysclk since McBSP register
271 * cache is initialized here
273 static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai
*cpu_dai
,
276 struct omap_mcbsp_data
*mcbsp_data
= to_mcbsp(cpu_dai
->private_data
);
277 struct omap_mcbsp_reg_cfg
*regs
= &mcbsp_data
->regs
;
279 if (mcbsp_data
->configured
)
282 memset(regs
, 0, sizeof(*regs
));
283 /* Generic McBSP register settings */
284 regs
->spcr2
|= XINTM(3) | FREE
;
285 regs
->spcr1
|= RINTM(3);
289 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
290 case SND_SOC_DAIFMT_I2S
:
291 /* 1-bit data delay */
292 regs
->rcr2
|= RDATDLY(1);
293 regs
->xcr2
|= XDATDLY(1);
295 case SND_SOC_DAIFMT_DSP_A
:
296 /* 0-bit data delay */
297 regs
->rcr2
|= RDATDLY(0);
298 regs
->xcr2
|= XDATDLY(0);
301 /* Unsupported data format */
305 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
306 case SND_SOC_DAIFMT_CBS_CFS
:
307 /* McBSP master. Set FS and bit clocks as outputs */
308 regs
->pcr0
|= FSXM
| FSRM
|
310 /* Sample rate generator drives the FS */
313 case SND_SOC_DAIFMT_CBM_CFM
:
317 /* Unsupported master/slave configuration */
321 /* Set bit clock (CLKX/CLKR) and FS polarities */
322 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
323 case SND_SOC_DAIFMT_NB_NF
:
326 * FS active low. TX data driven on falling edge of bit clock
327 * and RX data sampled on rising edge of bit clock.
329 regs
->pcr0
|= FSXP
| FSRP
|
332 case SND_SOC_DAIFMT_NB_IF
:
333 regs
->pcr0
|= CLKXP
| CLKRP
;
335 case SND_SOC_DAIFMT_IB_NF
:
336 regs
->pcr0
|= FSXP
| FSRP
;
338 case SND_SOC_DAIFMT_IB_IF
:
347 static int omap_mcbsp_dai_set_clkdiv(struct snd_soc_dai
*cpu_dai
,
350 struct omap_mcbsp_data
*mcbsp_data
= to_mcbsp(cpu_dai
->private_data
);
351 struct omap_mcbsp_reg_cfg
*regs
= &mcbsp_data
->regs
;
353 if (div_id
!= OMAP_MCBSP_CLKGDV
)
356 regs
->srgr1
|= CLKGDV(div
- 1);
361 static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data
*mcbsp_data
,
365 u16 reg
, reg_devconf1
= OMAP243X_CONTROL_DEVCONF1
;
367 if (cpu_class_is_omap1()) {
368 /* OMAP1's can use only external source clock */
369 if (unlikely(clk_id
== OMAP_MCBSP_SYSCLK_CLKS_FCLK
))
375 if (cpu_is_omap2420() && mcbsp_data
->bus_id
> 1)
378 if (cpu_is_omap343x())
379 reg_devconf1
= OMAP343X_CONTROL_DEVCONF1
;
381 switch (mcbsp_data
->bus_id
) {
383 reg
= OMAP2_CONTROL_DEVCONF0
;
387 reg
= OMAP2_CONTROL_DEVCONF0
;
406 if (clk_id
== OMAP_MCBSP_SYSCLK_CLKS_FCLK
)
407 omap_ctrl_writel(omap_ctrl_readl(reg
) & ~(1 << sel_bit
), reg
);
409 omap_ctrl_writel(omap_ctrl_readl(reg
) | (1 << sel_bit
), reg
);
414 static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai
*cpu_dai
,
415 int clk_id
, unsigned int freq
,
418 struct omap_mcbsp_data
*mcbsp_data
= to_mcbsp(cpu_dai
->private_data
);
419 struct omap_mcbsp_reg_cfg
*regs
= &mcbsp_data
->regs
;
423 case OMAP_MCBSP_SYSCLK_CLK
:
424 regs
->srgr2
|= CLKSM
;
426 case OMAP_MCBSP_SYSCLK_CLKS_FCLK
:
427 case OMAP_MCBSP_SYSCLK_CLKS_EXT
:
428 err
= omap_mcbsp_dai_set_clks_src(mcbsp_data
, clk_id
);
431 case OMAP_MCBSP_SYSCLK_CLKX_EXT
:
432 regs
->srgr2
|= CLKSM
;
433 case OMAP_MCBSP_SYSCLK_CLKR_EXT
:
434 regs
->pcr0
|= SCLKME
;
443 #define OMAP_MCBSP_DAI_BUILDER(link_id) \
445 .name = "omap-mcbsp-dai-(link_id)", \
447 .type = SND_SOC_DAI_I2S, \
451 .rates = OMAP_MCBSP_RATES, \
452 .formats = SNDRV_PCM_FMTBIT_S16_LE, \
457 .rates = OMAP_MCBSP_RATES, \
458 .formats = SNDRV_PCM_FMTBIT_S16_LE, \
461 .startup = omap_mcbsp_dai_startup, \
462 .shutdown = omap_mcbsp_dai_shutdown, \
463 .trigger = omap_mcbsp_dai_trigger, \
464 .hw_params = omap_mcbsp_dai_hw_params, \
467 .set_fmt = omap_mcbsp_dai_set_dai_fmt, \
468 .set_clkdiv = omap_mcbsp_dai_set_clkdiv, \
469 .set_sysclk = omap_mcbsp_dai_set_dai_sysclk, \
471 .private_data = &mcbsp_data[(link_id)].bus_id, \
474 struct snd_soc_dai omap_mcbsp_dai
[] = {
475 OMAP_MCBSP_DAI_BUILDER(0),
476 OMAP_MCBSP_DAI_BUILDER(1),
478 OMAP_MCBSP_DAI_BUILDER(2),
481 OMAP_MCBSP_DAI_BUILDER(3),
482 OMAP_MCBSP_DAI_BUILDER(4),
486 EXPORT_SYMBOL_GPL(omap_mcbsp_dai
);
488 MODULE_AUTHOR("Jarkko Nikula <jarkko.nikula@nokia.com>");
489 MODULE_DESCRIPTION("OMAP I2S SoC Interface");
490 MODULE_LICENSE("GPL");