sound/soc/omap/omap-mcpdm.c

   1 /*
   2  * omap-mcpdm.c  --  OMAP ALSA SoC DAI driver using McPDM port
   3  *
   4  * Copyright (C) 2009 - 2011 Texas Instruments
   5  *
   6  * Author: Misael Lopez Cruz <misael.lopez@ti.com>
   7  * Contact: Jorge Eduardo Candelaria <x0107209@ti.com>
   8  *          Margarita Olaya <magi.olaya@ti.com>
   9  *          Peter Ujfalusi <peter.ujfalusi@ti.com>
  10  *
  11  * This program is free software; you can redistribute it and/or
  12  * modify it under the terms of the GNU General Public License
  13  * version 2 as published by the Free Software Foundation.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18  * General Public License for more details.
  19  *
  20  * You should have received a copy of the GNU General Public License
  21  * along with this program; if not, write to the Free Software
  22  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  23  * 02110-1301 USA
  24  *
  25  */
  26
  27 #include <linux/init.h>
  28 #include <linux/module.h>
  29 #include <linux/platform_device.h>
  30 #include <linux/interrupt.h>
  31 #include <linux/err.h>
  32 #include <linux/io.h>
  33 #include <linux/irq.h>
  34 #include <linux/slab.h>
  35 #include <linux/pm_runtime.h>
  36 #include <linux/of_device.h>
  37
  38 #include <sound/core.h>
  39 #include <sound/pcm.h>
  40 #include <sound/pcm_params.h>
  41 #include <sound/soc.h>
  42
  43 #include <plat/dma.h>
  44 #include <plat/omap_hwmod.h>
  45 #include "omap-mcpdm.h"
  46 #include "omap-pcm.h"
  47
  48 #define OMAP44XX_MCPDM_L3_BASE          0x49032000
  49
  50 struct omap_mcpdm {
  51         struct device *dev;
  52         unsigned long phys_base;
  53         void __iomem *io_base;
  54         int irq;
  55
  56         struct mutex mutex;
  57
  58         /* channel data */
  59         u32 dn_channels;
  60         u32 up_channels;
  61
  62         /* McPDM FIFO thresholds */
  63         u32 dn_threshold;
  64         u32 up_threshold;
  65
  66         /* McPDM dn offsets for rx1, and 2 channels */
  67         u32 dn_rx_offset;
  68 };
  69
  70 /*
  71  * Stream DMA parameters
  72  */
  73 static struct omap_pcm_dma_data omap_mcpdm_dai_dma_params[] = {
  74         {
  75                 .name = "Audio playback",
  76                 .dma_req = OMAP44XX_DMA_MCPDM_DL,
  77                 .data_type = OMAP_DMA_DATA_TYPE_S32,
  78                 .sync_mode = OMAP_DMA_SYNC_PACKET,
  79                 .port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_REG_DN_DATA,
  80         },
  81         {
  82                 .name = "Audio capture",
  83                 .dma_req = OMAP44XX_DMA_MCPDM_UP,
  84                 .data_type = OMAP_DMA_DATA_TYPE_S32,
  85                 .sync_mode = OMAP_DMA_SYNC_PACKET,
  86                 .port_addr = OMAP44XX_MCPDM_L3_BASE + MCPDM_REG_UP_DATA,
  87         },
  88 };
  89
  90 static inline void omap_mcpdm_write(struct omap_mcpdm *mcpdm, u16 reg, u32 val)
  91 {
  92         __raw_writel(val, mcpdm->io_base + reg);
  93 }
  94
  95 static inline int omap_mcpdm_read(struct omap_mcpdm *mcpdm, u16 reg)
  96 {
  97         return __raw_readl(mcpdm->io_base + reg);
  98 }
  99
 100 #ifdef DEBUG
 101 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm)
 102 {
 103         dev_dbg(mcpdm->dev, "***********************\n");
 104         dev_dbg(mcpdm->dev, "IRQSTATUS_RAW:  0x%04x\n",
 105                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS_RAW));
 106         dev_dbg(mcpdm->dev, "IRQSTATUS:  0x%04x\n",
 107                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS));
 108         dev_dbg(mcpdm->dev, "IRQENABLE_SET:  0x%04x\n",
 109                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_SET));
 110         dev_dbg(mcpdm->dev, "IRQENABLE_CLR:  0x%04x\n",
 111                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQENABLE_CLR));
 112         dev_dbg(mcpdm->dev, "IRQWAKE_EN: 0x%04x\n",
 113                         omap_mcpdm_read(mcpdm, MCPDM_REG_IRQWAKE_EN));
 114         dev_dbg(mcpdm->dev, "DMAENABLE_SET: 0x%04x\n",
 115                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_SET));
 116         dev_dbg(mcpdm->dev, "DMAENABLE_CLR:  0x%04x\n",
 117                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAENABLE_CLR));
 118         dev_dbg(mcpdm->dev, "DMAWAKEEN:  0x%04x\n",
 119                         omap_mcpdm_read(mcpdm, MCPDM_REG_DMAWAKEEN));
 120         dev_dbg(mcpdm->dev, "CTRL:  0x%04x\n",
 121                         omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL));
 122         dev_dbg(mcpdm->dev, "DN_DATA:  0x%04x\n",
 123                         omap_mcpdm_read(mcpdm, MCPDM_REG_DN_DATA));
 124         dev_dbg(mcpdm->dev, "UP_DATA: 0x%04x\n",
 125                         omap_mcpdm_read(mcpdm, MCPDM_REG_UP_DATA));
 126         dev_dbg(mcpdm->dev, "FIFO_CTRL_DN: 0x%04x\n",
 127                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_DN));
 128         dev_dbg(mcpdm->dev, "FIFO_CTRL_UP:  0x%04x\n",
 129                         omap_mcpdm_read(mcpdm, MCPDM_REG_FIFO_CTRL_UP));
 130         dev_dbg(mcpdm->dev, "***********************\n");
 131 }
 132 #else
 133 static void omap_mcpdm_reg_dump(struct omap_mcpdm *mcpdm) {}
 134 #endif
 135
 136 /*
 137  * Enables the transfer through the PDM interface to/from the Phoenix
 138  * codec by enabling the corresponding UP or DN channels.
 139  */
 140 static void omap_mcpdm_start(struct omap_mcpdm *mcpdm)
 141 {
 142         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 143
 144         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 145         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 146
 147         ctrl |= mcpdm->dn_channels | mcpdm->up_channels;
 148         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 149
 150         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 151         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 152 }
 153
 154 /*
 155  * Disables the transfer through the PDM interface to/from the Phoenix
 156  * codec by disabling the corresponding UP or DN channels.
 157  */
 158 static void omap_mcpdm_stop(struct omap_mcpdm *mcpdm)
 159 {
 160         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 161
 162         ctrl |= (MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 163         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 164
 165         ctrl &= ~(mcpdm->dn_channels | mcpdm->up_channels);
 166         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 167
 168         ctrl &= ~(MCPDM_SW_DN_RST | MCPDM_SW_UP_RST);
 169         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, ctrl);
 170
 171 }
 172
 173 /*
 174  * Is the physical McPDM interface active.
 175  */
 176 static inline int omap_mcpdm_active(struct omap_mcpdm *mcpdm)
 177 {
 178         return omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL) &
 179                                         (MCPDM_PDM_DN_MASK | MCPDM_PDM_UP_MASK);
 180 }
 181
 182 /*
 183  * Configures McPDM uplink, and downlink for audio.
 184  * This function should be called before omap_mcpdm_start.
 185  */
 186 static void omap_mcpdm_open_streams(struct omap_mcpdm *mcpdm)
 187 {
 188         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_SET,
 189                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL |
 190                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 191
 192         /* Enable DN RX1/2 offset cancellation feature, if configured */
 193         if (mcpdm->dn_rx_offset) {
 194                 u32 dn_offset = mcpdm->dn_rx_offset;
 195
 196                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 197                 dn_offset |= (MCPDM_DN_OFST_RX1_EN | MCPDM_DN_OFST_RX2_EN);
 198                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, dn_offset);
 199         }
 200
 201         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_DN, mcpdm->dn_threshold);
 202         omap_mcpdm_write(mcpdm, MCPDM_REG_FIFO_CTRL_UP, mcpdm->up_threshold);
 203
 204         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_SET,
 205                         MCPDM_DMA_DN_ENABLE | MCPDM_DMA_UP_ENABLE);
 206 }
 207
 208 /*
 209  * Cleans McPDM uplink, and downlink configuration.
 210  * This function should be called when the stream is closed.
 211  */
 212 static void omap_mcpdm_close_streams(struct omap_mcpdm *mcpdm)
 213 {
 214         /* Disable irq request generation for downlink */
 215         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 216                         MCPDM_DN_IRQ_EMPTY | MCPDM_DN_IRQ_FULL);
 217
 218         /* Disable DMA request generation for downlink */
 219         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_DN_ENABLE);
 220
 221         /* Disable irq request generation for uplink */
 222         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQENABLE_CLR,
 223                         MCPDM_UP_IRQ_EMPTY | MCPDM_UP_IRQ_FULL);
 224
 225         /* Disable DMA request generation for uplink */
 226         omap_mcpdm_write(mcpdm, MCPDM_REG_DMAENABLE_CLR, MCPDM_DMA_UP_ENABLE);
 227
 228         /* Disable RX1/2 offset cancellation */
 229         if (mcpdm->dn_rx_offset)
 230                 omap_mcpdm_write(mcpdm, MCPDM_REG_DN_OFFSET, 0);
 231 }
 232
 233 static irqreturn_t omap_mcpdm_irq_handler(int irq, void *dev_id)
 234 {
 235         struct omap_mcpdm *mcpdm = dev_id;
 236         int irq_status;
 237
 238         irq_status = omap_mcpdm_read(mcpdm, MCPDM_REG_IRQSTATUS);
 239
 240         /* Acknowledge irq event */
 241         omap_mcpdm_write(mcpdm, MCPDM_REG_IRQSTATUS, irq_status);
 242
 243         if (irq_status & MCPDM_DN_IRQ_FULL)
 244                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Full\n");
 245
 246         if (irq_status & MCPDM_DN_IRQ_EMPTY)
 247                 dev_dbg(mcpdm->dev, "DN (playback) FIFO Empty\n");
 248
 249         if (irq_status & MCPDM_DN_IRQ)
 250                 dev_dbg(mcpdm->dev, "DN (playback) write request\n");
 251
 252         if (irq_status & MCPDM_UP_IRQ_FULL)
 253                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Full\n");
 254
 255         if (irq_status & MCPDM_UP_IRQ_EMPTY)
 256                 dev_dbg(mcpdm->dev, "UP (capture) FIFO Empty\n");
 257
 258         if (irq_status & MCPDM_UP_IRQ)
 259                 dev_dbg(mcpdm->dev, "UP (capture) write request\n");
 260
 261         return IRQ_HANDLED;
 262 }
 263
 264 static int omap_mcpdm_dai_startup(struct snd_pcm_substream *substream,
 265                                   struct snd_soc_dai *dai)
 266 {
 267         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 268
 269         mutex_lock(&mcpdm->mutex);
 270
 271         if (!dai->active) {
 272                 /* Enable watch dog for ES above ES 1.0 to avoid saturation */
 273                 if (omap_rev() != OMAP4430_REV_ES1_0) {
 274                         u32 ctrl = omap_mcpdm_read(mcpdm, MCPDM_REG_CTRL);
 275
 276                         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL,
 277                                          ctrl | MCPDM_WD_EN);
 278                 }
 279                 omap_mcpdm_open_streams(mcpdm);
 280         }
 281
 282         mutex_unlock(&mcpdm->mutex);
 283
 284         return 0;
 285 }
 286
 287 static void omap_mcpdm_dai_shutdown(struct snd_pcm_substream *substream,
 288                                   struct snd_soc_dai *dai)
 289 {
 290         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 291
 292         mutex_lock(&mcpdm->mutex);
 293
 294         if (!dai->active) {
 295                 if (omap_mcpdm_active(mcpdm)) {
 296                         omap_mcpdm_stop(mcpdm);
 297                         omap_mcpdm_close_streams(mcpdm);
 298                 }
 299         }
 300
 301         mutex_unlock(&mcpdm->mutex);
 302 }
 303
 304 static int omap_mcpdm_dai_hw_params(struct snd_pcm_substream *substream,
 305                                     struct snd_pcm_hw_params *params,
 306                                     struct snd_soc_dai *dai)
 307 {
 308         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 309         int stream = substream->stream;
 310         struct omap_pcm_dma_data *dma_data;
 311         int channels;
 312         int link_mask = 0;
 313
 314         channels = params_channels(params);
 315         switch (channels) {
 316         case 5:
 317                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 318                         /* up to 3 channels for capture */
 319                         return -EINVAL;
 320                 link_mask |= 1 << 4;
 321         case 4:
 322                 if (stream == SNDRV_PCM_STREAM_CAPTURE)
 323                         /* up to 3 channels for capture */
 324                         return -EINVAL;
 325                 link_mask |= 1 << 3;
 326         case 3:
 327                 link_mask |= 1 << 2;
 328         case 2:
 329                 link_mask |= 1 << 1;
 330         case 1:
 331                 link_mask |= 1 << 0;
 332                 break;
 333         default:
 334                 /* unsupported number of channels */
 335                 return -EINVAL;
 336         }
 337
 338         dma_data = &omap_mcpdm_dai_dma_params[stream];
 339
 340         /* Configure McPDM channels, and DMA packet size */
 341         if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
 342                 mcpdm->dn_channels = link_mask << 3;
 343                 dma_data->packet_size =
 344                         (MCPDM_DN_THRES_MAX - mcpdm->dn_threshold) * channels;
 345         } else {
 346                 mcpdm->up_channels = link_mask << 0;
 347                 dma_data->packet_size = mcpdm->up_threshold * channels;
 348         }
 349
 350         snd_soc_dai_set_dma_data(dai, substream, dma_data);
 351
 352         return 0;
 353 }
 354
 355 static int omap_mcpdm_prepare(struct snd_pcm_substream *substream,
 356                                   struct snd_soc_dai *dai)
 357 {
 358         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 359
 360         if (!omap_mcpdm_active(mcpdm)) {
 361                 omap_mcpdm_start(mcpdm);
 362                 omap_mcpdm_reg_dump(mcpdm);
 363         }
 364
 365         return 0;
 366 }
 367
 368 static const struct snd_soc_dai_ops omap_mcpdm_dai_ops = {
 369         .startup        = omap_mcpdm_dai_startup,
 370         .shutdown       = omap_mcpdm_dai_shutdown,
 371         .hw_params      = omap_mcpdm_dai_hw_params,
 372         .prepare        = omap_mcpdm_prepare,
 373 };
 374
 375 static int omap_mcpdm_probe(struct snd_soc_dai *dai)
 376 {
 377         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 378         int ret;
 379
 380         pm_runtime_enable(mcpdm->dev);
 381
 382         /* Disable lines while request is ongoing */
 383         pm_runtime_get_sync(mcpdm->dev);
 384         omap_mcpdm_write(mcpdm, MCPDM_REG_CTRL, 0x00);
 385
 386         ret = request_irq(mcpdm->irq, omap_mcpdm_irq_handler,
 387                                 0, "McPDM", (void *)mcpdm);
 388
 389         pm_runtime_put_sync(mcpdm->dev);
 390
 391         if (ret) {
 392                 dev_err(mcpdm->dev, "Request for IRQ failed\n");
 393                 pm_runtime_disable(mcpdm->dev);
 394         }
 395
 396         /* Configure McPDM threshold values */
 397         mcpdm->dn_threshold = 2;
 398         mcpdm->up_threshold = MCPDM_UP_THRES_MAX - 3;
 399         return ret;
 400 }
 401
 402 static int omap_mcpdm_remove(struct snd_soc_dai *dai)
 403 {
 404         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(dai);
 405
 406         free_irq(mcpdm->irq, (void *)mcpdm);
 407         pm_runtime_disable(mcpdm->dev);
 408
 409         return 0;
 410 }
 411
 412 #define OMAP_MCPDM_RATES        (SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
 413 #define OMAP_MCPDM_FORMATS      SNDRV_PCM_FMTBIT_S32_LE
 414
 415 static struct snd_soc_dai_driver omap_mcpdm_dai = {
 416         .probe = omap_mcpdm_probe,
 417         .remove = omap_mcpdm_remove,
 418         .probe_order = SND_SOC_COMP_ORDER_LATE,
 419         .remove_order = SND_SOC_COMP_ORDER_EARLY,
 420         .playback = {
 421                 .channels_min = 1,
 422                 .channels_max = 5,
 423                 .rates = OMAP_MCPDM_RATES,
 424                 .formats = OMAP_MCPDM_FORMATS,
 425                 .sig_bits = 24,
 426         },
 427         .capture = {
 428                 .channels_min = 1,
 429                 .channels_max = 3,
 430                 .rates = OMAP_MCPDM_RATES,
 431                 .formats = OMAP_MCPDM_FORMATS,
 432                 .sig_bits = 24,
 433         },
 434         .ops = &omap_mcpdm_dai_ops,
 435 };
 436
 437 void omap_mcpdm_configure_dn_offsets(struct snd_soc_pcm_runtime *rtd,
 438                                     u8 rx1, u8 rx2)
 439 {
 440         struct omap_mcpdm *mcpdm = snd_soc_dai_get_drvdata(rtd->cpu_dai);
 441
 442         mcpdm->dn_rx_offset = MCPDM_DNOFST_RX1(rx1) | MCPDM_DNOFST_RX2(rx2);
 443 }
 444 EXPORT_SYMBOL_GPL(omap_mcpdm_configure_dn_offsets);
 445
 446 static __devinit int asoc_mcpdm_probe(struct platform_device *pdev)
 447 {
 448         struct omap_mcpdm *mcpdm;
 449         struct resource *res;
 450         int ret = 0;
 451
 452         mcpdm = kzalloc(sizeof(struct omap_mcpdm), GFP_KERNEL);
 453         if (!mcpdm)
 454                 return -ENOMEM;
 455
 456         platform_set_drvdata(pdev, mcpdm);
 457
 458         mutex_init(&mcpdm->mutex);
 459
 460         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 461         if (res == NULL) {
 462                 dev_err(&pdev->dev, "no resource\n");
 463                 goto err_res;
 464         }
 465
 466         if (!request_mem_region(res->start, resource_size(res), "McPDM")) {
 467                 ret = -EBUSY;
 468                 goto err_res;
 469         }
 470
 471         mcpdm->io_base = ioremap(res->start, resource_size(res));
 472         if (!mcpdm->io_base) {
 473                 ret = -ENOMEM;
 474                 goto err_iomap;
 475         }
 476
 477         mcpdm->irq = platform_get_irq(pdev, 0);
 478         if (mcpdm->irq < 0) {
 479                 ret = mcpdm->irq;
 480                 goto err_irq;
 481         }
 482
 483         mcpdm->dev = &pdev->dev;
 484
 485         ret = snd_soc_register_dai(&pdev->dev, &omap_mcpdm_dai);
 486         if (!ret)
 487                 return 0;
 488
 489 err_irq:
 490         iounmap(mcpdm->io_base);
 491 err_iomap:
 492         release_mem_region(res->start, resource_size(res));
 493 err_res:
 494         kfree(mcpdm);
 495         return ret;
 496 }
 497
 498 static int __devexit asoc_mcpdm_remove(struct platform_device *pdev)
 499 {
 500         struct omap_mcpdm *mcpdm = platform_get_drvdata(pdev);
 501         struct resource *res;
 502
 503         snd_soc_unregister_dai(&pdev->dev);
 504
 505         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 506         iounmap(mcpdm->io_base);
 507         release_mem_region(res->start, resource_size(res));
 508
 509         kfree(mcpdm);
 510         return 0;
 511 }
 512
 513 static const struct of_device_id omap_mcpdm_of_match[] = {
 514         { .compatible = "ti,omap4-mcpdm", },
 515         { }
 516 };
 517 MODULE_DEVICE_TABLE(of, omap_mcpdm_of_match);
 518
 519 static struct platform_driver asoc_mcpdm_driver = {
 520         .driver = {
 521                 .name   = "omap-mcpdm",
 522                 .owner  = THIS_MODULE,
 523                 .of_match_table = omap_mcpdm_of_match,
 524         },
 525
 526         .probe  = asoc_mcpdm_probe,
 527         .remove = __devexit_p(asoc_mcpdm_remove),
 528 };
 529
 530 module_platform_driver(asoc_mcpdm_driver);
 531
 532 MODULE_ALIAS("platform:omap-mcpdm");
 533 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
 534 MODULE_DESCRIPTION("OMAP PDM SoC Interface");
 535 MODULE_LICENSE("GPL");