3 * pxa-ssp.c -- ALSA Soc Audio Layer
5 * Copyright 2005,2008 Wolfson Microelectronics PLC.
6 * Author: Liam Girdwood
7 * Mark Brown <broonie@opensource.wolfsonmicro.com>
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
15 * o Test network mode for > 16bit sample size
18 #include <linux/init.h>
19 #include <linux/module.h>
20 #include <linux/platform_device.h>
21 #include <linux/clk.h>
24 #include <sound/core.h>
25 #include <sound/pcm.h>
26 #include <sound/initval.h>
27 #include <sound/pcm_params.h>
28 #include <sound/soc.h>
29 #include <sound/pxa2xx-lib.h>
31 #include <mach/hardware.h>
32 #include <mach/pxa-regs.h>
33 #include <mach/regs-ssp.h>
34 #include <mach/audio.h>
37 #include "pxa2xx-pcm.h"
41 * SSP audio private data
48 struct ssp_state state
;
52 #define PXA2xx_SSP1_BASE 0x41000000
53 #define PXA27x_SSP2_BASE 0x41700000
54 #define PXA27x_SSP3_BASE 0x41900000
55 #define PXA3xx_SSP4_BASE 0x41a00000
57 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_mono_out
= {
58 .name
= "SSP1 PCM Mono out",
59 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
61 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
62 DCMD_BURST16
| DCMD_WIDTH2
,
65 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_mono_in
= {
66 .name
= "SSP1 PCM Mono in",
67 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
69 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
70 DCMD_BURST16
| DCMD_WIDTH2
,
73 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_stereo_out
= {
74 .name
= "SSP1 PCM Stereo out",
75 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
77 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
78 DCMD_BURST16
| DCMD_WIDTH4
,
81 static struct pxa2xx_pcm_dma_params pxa_ssp1_pcm_stereo_in
= {
82 .name
= "SSP1 PCM Stereo in",
83 .dev_addr
= PXA2xx_SSP1_BASE
+ SSDR
,
85 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
86 DCMD_BURST16
| DCMD_WIDTH4
,
89 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_mono_out
= {
90 .name
= "SSP2 PCM Mono out",
91 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
93 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
94 DCMD_BURST16
| DCMD_WIDTH2
,
97 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_mono_in
= {
98 .name
= "SSP2 PCM Mono in",
99 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
101 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
102 DCMD_BURST16
| DCMD_WIDTH2
,
105 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_stereo_out
= {
106 .name
= "SSP2 PCM Stereo out",
107 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
109 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
110 DCMD_BURST16
| DCMD_WIDTH4
,
113 static struct pxa2xx_pcm_dma_params pxa_ssp2_pcm_stereo_in
= {
114 .name
= "SSP2 PCM Stereo in",
115 .dev_addr
= PXA27x_SSP2_BASE
+ SSDR
,
117 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
118 DCMD_BURST16
| DCMD_WIDTH4
,
121 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_mono_out
= {
122 .name
= "SSP3 PCM Mono out",
123 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
125 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
126 DCMD_BURST16
| DCMD_WIDTH2
,
129 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_mono_in
= {
130 .name
= "SSP3 PCM Mono in",
131 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
133 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
134 DCMD_BURST16
| DCMD_WIDTH2
,
137 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_stereo_out
= {
138 .name
= "SSP3 PCM Stereo out",
139 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
141 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
142 DCMD_BURST16
| DCMD_WIDTH4
,
145 static struct pxa2xx_pcm_dma_params pxa_ssp3_pcm_stereo_in
= {
146 .name
= "SSP3 PCM Stereo in",
147 .dev_addr
= PXA27x_SSP3_BASE
+ SSDR
,
149 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
150 DCMD_BURST16
| DCMD_WIDTH4
,
153 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_mono_out
= {
154 .name
= "SSP4 PCM Mono out",
155 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
157 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
158 DCMD_BURST16
| DCMD_WIDTH2
,
161 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_mono_in
= {
162 .name
= "SSP4 PCM Mono in",
163 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
165 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
166 DCMD_BURST16
| DCMD_WIDTH2
,
169 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_stereo_out
= {
170 .name
= "SSP4 PCM Stereo out",
171 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
173 .dcmd
= DCMD_INCSRCADDR
| DCMD_FLOWTRG
|
174 DCMD_BURST16
| DCMD_WIDTH4
,
177 static struct pxa2xx_pcm_dma_params pxa_ssp4_pcm_stereo_in
= {
178 .name
= "SSP4 PCM Stereo in",
179 .dev_addr
= PXA3xx_SSP4_BASE
+ SSDR
,
181 .dcmd
= DCMD_INCTRGADDR
| DCMD_FLOWSRC
|
182 DCMD_BURST16
| DCMD_WIDTH4
,
185 static void dump_registers(struct ssp_device
*ssp
)
187 dev_dbg(&ssp
->pdev
->dev
, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
188 ssp_read_reg(ssp
, SSCR0
), ssp_read_reg(ssp
, SSCR1
),
189 ssp_read_reg(ssp
, SSTO
));
191 dev_dbg(&ssp
->pdev
->dev
, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
192 ssp_read_reg(ssp
, SSPSP
), ssp_read_reg(ssp
, SSSR
),
193 ssp_read_reg(ssp
, SSACD
));
196 static struct pxa2xx_pcm_dma_params
*ssp_dma_params
[4][4] = {
198 &pxa_ssp1_pcm_mono_out
, &pxa_ssp1_pcm_mono_in
,
199 &pxa_ssp1_pcm_stereo_out
, &pxa_ssp1_pcm_stereo_in
,
202 &pxa_ssp2_pcm_mono_out
, &pxa_ssp2_pcm_mono_in
,
203 &pxa_ssp2_pcm_stereo_out
, &pxa_ssp2_pcm_stereo_in
,
206 &pxa_ssp3_pcm_mono_out
, &pxa_ssp3_pcm_mono_in
,
207 &pxa_ssp3_pcm_stereo_out
, &pxa_ssp3_pcm_stereo_in
,
210 &pxa_ssp4_pcm_mono_out
, &pxa_ssp4_pcm_mono_in
,
211 &pxa_ssp4_pcm_stereo_out
, &pxa_ssp4_pcm_stereo_in
,
215 static int pxa_ssp_startup(struct snd_pcm_substream
*substream
,
216 struct snd_soc_dai
*dai
)
218 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
219 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
220 struct ssp_priv
*priv
= cpu_dai
->private_data
;
223 if (!cpu_dai
->active
) {
224 ret
= ssp_init(&priv
->dev
, cpu_dai
->id
+ 1, SSP_NO_IRQ
);
227 ssp_disable(&priv
->dev
);
232 static void pxa_ssp_shutdown(struct snd_pcm_substream
*substream
,
233 struct snd_soc_dai
*dai
)
235 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
236 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
237 struct ssp_priv
*priv
= cpu_dai
->private_data
;
239 if (!cpu_dai
->active
) {
240 ssp_disable(&priv
->dev
);
241 ssp_exit(&priv
->dev
);
247 static int pxa_ssp_suspend(struct platform_device
*pdev
,
248 struct snd_soc_dai
*cpu_dai
)
250 struct ssp_priv
*priv
= cpu_dai
->private_data
;
252 if (!cpu_dai
->active
)
255 ssp_save_state(&priv
->dev
, &priv
->state
);
256 clk_disable(priv
->dev
.ssp
->clk
);
260 static int pxa_ssp_resume(struct platform_device
*pdev
,
261 struct snd_soc_dai
*cpu_dai
)
263 struct ssp_priv
*priv
= cpu_dai
->private_data
;
265 if (!cpu_dai
->active
)
268 clk_enable(priv
->dev
.ssp
->clk
);
269 ssp_restore_state(&priv
->dev
, &priv
->state
);
270 ssp_enable(&priv
->dev
);
276 #define pxa_ssp_suspend NULL
277 #define pxa_ssp_resume NULL
281 * ssp_set_clkdiv - set SSP clock divider
282 * @div: serial clock rate divider
284 static void ssp_set_scr(struct ssp_dev
*dev
, u32 div
)
286 struct ssp_device
*ssp
= dev
->ssp
;
287 u32 sscr0
= ssp_read_reg(dev
->ssp
, SSCR0
) & ~SSCR0_SCR
;
289 ssp_write_reg(ssp
, SSCR0
, (sscr0
| SSCR0_SerClkDiv(div
)));
293 * Set the SSP ports SYSCLK.
295 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai
*cpu_dai
,
296 int clk_id
, unsigned int freq
, int dir
)
298 struct ssp_priv
*priv
= cpu_dai
->private_data
;
299 struct ssp_device
*ssp
= priv
->dev
.ssp
;
302 u32 sscr0
= ssp_read_reg(ssp
, SSCR0
) &
303 ~(SSCR0_ECS
| SSCR0_NCS
| SSCR0_MOD
| SSCR0_ADC
);
305 dev_dbg(&ssp
->pdev
->dev
,
306 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %d\n",
307 cpu_dai
->id
, clk_id
, freq
);
310 case PXA_SSP_CLK_NET_PLL
:
313 case PXA_SSP_CLK_PLL
:
314 /* Internal PLL is fixed */
316 priv
->sysclk
= 1843200;
318 priv
->sysclk
= 13000000;
320 case PXA_SSP_CLK_EXT
:
324 case PXA_SSP_CLK_NET
:
326 sscr0
|= SSCR0_NCS
| SSCR0_MOD
;
328 case PXA_SSP_CLK_AUDIO
:
330 ssp_set_scr(&priv
->dev
, 1);
337 /* The SSP clock must be disabled when changing SSP clock mode
338 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
339 if (!cpu_is_pxa3xx())
340 clk_disable(priv
->dev
.ssp
->clk
);
341 val
= ssp_read_reg(ssp
, SSCR0
) | sscr0
;
342 ssp_write_reg(ssp
, SSCR0
, val
);
343 if (!cpu_is_pxa3xx())
344 clk_enable(priv
->dev
.ssp
->clk
);
350 * Set the SSP clock dividers.
352 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai
*cpu_dai
,
355 struct ssp_priv
*priv
= cpu_dai
->private_data
;
356 struct ssp_device
*ssp
= priv
->dev
.ssp
;
360 case PXA_SSP_AUDIO_DIV_ACDS
:
361 val
= (ssp_read_reg(ssp
, SSACD
) & ~0x7) | SSACD_ACDS(div
);
362 ssp_write_reg(ssp
, SSACD
, val
);
364 case PXA_SSP_AUDIO_DIV_SCDB
:
365 val
= ssp_read_reg(ssp
, SSACD
);
367 #if defined(CONFIG_PXA3xx)
372 case PXA_SSP_CLK_SCDB_1
:
375 case PXA_SSP_CLK_SCDB_4
:
377 #if defined(CONFIG_PXA3xx)
378 case PXA_SSP_CLK_SCDB_8
:
388 ssp_write_reg(ssp
, SSACD
, val
);
390 case PXA_SSP_DIV_SCR
:
391 ssp_set_scr(&priv
->dev
, div
);
401 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
403 static int pxa_ssp_set_dai_pll(struct snd_soc_dai
*cpu_dai
,
404 int pll_id
, unsigned int freq_in
, unsigned int freq_out
)
406 struct ssp_priv
*priv
= cpu_dai
->private_data
;
407 struct ssp_device
*ssp
= priv
->dev
.ssp
;
408 u32 ssacd
= ssp_read_reg(ssp
, SSACD
) & ~0x70;
410 #if defined(CONFIG_PXA3xx)
412 ssp_write_reg(ssp
, SSACDD
, 0);
439 /* PXA3xx has a clock ditherer which can be used to generate
440 * a wider range of frequencies - calculate a value for it.
442 if (cpu_is_pxa3xx()) {
446 do_div(tmp
, freq_out
);
449 val
= (val
<< 16) | 64;;
450 ssp_write_reg(ssp
, SSACDD
, val
);
454 dev_dbg(&ssp
->pdev
->dev
,
455 "Using SSACDD %x to supply %dHz\n",
464 ssp_write_reg(ssp
, SSACD
, ssacd
);
470 * Set the active slots in TDM/Network mode
472 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai
*cpu_dai
,
473 unsigned int mask
, int slots
)
475 struct ssp_priv
*priv
= cpu_dai
->private_data
;
476 struct ssp_device
*ssp
= priv
->dev
.ssp
;
479 sscr0
= ssp_read_reg(ssp
, SSCR0
) & ~SSCR0_SlotsPerFrm(7);
481 /* set number of active slots */
482 sscr0
|= SSCR0_SlotsPerFrm(slots
);
483 ssp_write_reg(ssp
, SSCR0
, sscr0
);
485 /* set active slot mask */
486 ssp_write_reg(ssp
, SSTSA
, mask
);
487 ssp_write_reg(ssp
, SSRSA
, mask
);
492 * Tristate the SSP DAI lines
494 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai
*cpu_dai
,
497 struct ssp_priv
*priv
= cpu_dai
->private_data
;
498 struct ssp_device
*ssp
= priv
->dev
.ssp
;
501 sscr1
= ssp_read_reg(ssp
, SSCR1
);
506 ssp_write_reg(ssp
, SSCR1
, sscr1
);
512 * Set up the SSP DAI format.
513 * The SSP Port must be inactive before calling this function as the
514 * physical interface format is changed.
516 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai
*cpu_dai
,
519 struct ssp_priv
*priv
= cpu_dai
->private_data
;
520 struct ssp_device
*ssp
= priv
->dev
.ssp
;
525 /* reset port settings */
526 sscr0
= ssp_read_reg(ssp
, SSCR0
) &
527 (SSCR0_ECS
| SSCR0_NCS
| SSCR0_MOD
| SSCR0_ADC
);
528 sscr1
= SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
531 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
532 case SND_SOC_DAIFMT_CBM_CFM
:
533 sscr1
|= SSCR1_SCLKDIR
| SSCR1_SFRMDIR
;
535 case SND_SOC_DAIFMT_CBM_CFS
:
536 sscr1
|= SSCR1_SCLKDIR
;
538 case SND_SOC_DAIFMT_CBS_CFS
:
544 ssp_write_reg(ssp
, SSCR0
, sscr0
);
545 ssp_write_reg(ssp
, SSCR1
, sscr1
);
546 ssp_write_reg(ssp
, SSPSP
, sspsp
);
548 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
549 case SND_SOC_DAIFMT_I2S
:
550 sscr0
|= SSCR0_MOD
| SSCR0_PSP
;
551 sscr1
|= SSCR1_RWOT
| SSCR1_TRAIL
;
553 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
554 case SND_SOC_DAIFMT_NB_NF
:
557 case SND_SOC_DAIFMT_NB_IF
:
558 sspsp
|= SSPSP_SFRMP
| SSPSP_FSRT
;
560 case SND_SOC_DAIFMT_IB_IF
:
561 sspsp
|= SSPSP_SFRMP
;
568 case SND_SOC_DAIFMT_DSP_A
:
570 case SND_SOC_DAIFMT_DSP_B
:
571 sscr0
|= SSCR0_MOD
| SSCR0_PSP
;
572 sscr1
|= SSCR1_TRAIL
| SSCR1_RWOT
;
574 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
575 case SND_SOC_DAIFMT_NB_NF
:
576 sspsp
|= SSPSP_SFRMP
;
578 case SND_SOC_DAIFMT_IB_IF
:
589 ssp_write_reg(ssp
, SSCR0
, sscr0
);
590 ssp_write_reg(ssp
, SSCR1
, sscr1
);
591 ssp_write_reg(ssp
, SSPSP
, sspsp
);
595 /* Since we are configuring the timings for the format by hand
596 * we have to defer some things until hw_params() where we
597 * know parameters like the sample size.
605 * Set the SSP audio DMA parameters and sample size.
606 * Can be called multiple times by oss emulation.
608 static int pxa_ssp_hw_params(struct snd_pcm_substream
*substream
,
609 struct snd_pcm_hw_params
*params
,
610 struct snd_soc_dai
*dai
)
612 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
613 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
614 struct ssp_priv
*priv
= cpu_dai
->private_data
;
615 struct ssp_device
*ssp
= priv
->dev
.ssp
;
616 int dma
= 0, chn
= params_channels(params
);
619 int width
= snd_pcm_format_physical_width(params_format(params
));
621 /* select correct DMA params */
622 if (substream
->stream
!= SNDRV_PCM_STREAM_PLAYBACK
)
623 dma
= 1; /* capture DMA offset is 1,3 */
625 dma
+= 2; /* stereo DMA offset is 2, mono is 0 */
626 cpu_dai
->dma_data
= ssp_dma_params
[cpu_dai
->id
][dma
];
628 dev_dbg(&ssp
->pdev
->dev
, "pxa_ssp_hw_params: dma %d\n", dma
);
630 /* we can only change the settings if the port is not in use */
631 if (ssp_read_reg(ssp
, SSCR0
) & SSCR0_SSE
)
634 /* clear selected SSP bits */
635 sscr0
= ssp_read_reg(ssp
, SSCR0
) & ~(SSCR0_DSS
| SSCR0_EDSS
);
636 ssp_write_reg(ssp
, SSCR0
, sscr0
);
639 sscr0
= ssp_read_reg(ssp
, SSCR0
);
640 switch (params_format(params
)) {
641 case SNDRV_PCM_FORMAT_S16_LE
:
644 sscr0
|= SSCR0_FPCKE
;
646 sscr0
|= SSCR0_DataSize(16);
647 if (params_channels(params
) > 1)
650 case SNDRV_PCM_FORMAT_S24_LE
:
651 sscr0
|= (SSCR0_EDSS
| SSCR0_DataSize(8));
652 /* we must be in network mode (2 slots) for 24 bit stereo */
654 case SNDRV_PCM_FORMAT_S32_LE
:
655 sscr0
|= (SSCR0_EDSS
| SSCR0_DataSize(16));
656 /* we must be in network mode (2 slots) for 32 bit stereo */
659 ssp_write_reg(ssp
, SSCR0
, sscr0
);
661 switch (priv
->dai_fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
662 case SND_SOC_DAIFMT_I2S
:
663 /* Cleared when the DAI format is set */
664 sspsp
= ssp_read_reg(ssp
, SSPSP
) | SSPSP_SFRMWDTH(width
);
665 ssp_write_reg(ssp
, SSPSP
, sspsp
);
671 /* We always use a network mode so we always require TDM slots
672 * - complain loudly and fail if they've not been set up yet.
674 if (!(ssp_read_reg(ssp
, SSTSA
) & 0xf)) {
675 dev_err(&ssp
->pdev
->dev
, "No TDM timeslot configured\n");
684 static int pxa_ssp_trigger(struct snd_pcm_substream
*substream
, int cmd
,
685 struct snd_soc_dai
*dai
)
687 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
688 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
690 struct ssp_priv
*priv
= cpu_dai
->private_data
;
691 struct ssp_device
*ssp
= priv
->dev
.ssp
;
695 case SNDRV_PCM_TRIGGER_RESUME
:
696 ssp_enable(&priv
->dev
);
698 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
699 val
= ssp_read_reg(ssp
, SSCR1
);
700 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
704 ssp_write_reg(ssp
, SSCR1
, val
);
705 val
= ssp_read_reg(ssp
, SSSR
);
706 ssp_write_reg(ssp
, SSSR
, val
);
708 case SNDRV_PCM_TRIGGER_START
:
709 val
= ssp_read_reg(ssp
, SSCR1
);
710 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
714 ssp_write_reg(ssp
, SSCR1
, val
);
715 ssp_enable(&priv
->dev
);
717 case SNDRV_PCM_TRIGGER_STOP
:
718 val
= ssp_read_reg(ssp
, SSCR1
);
719 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
723 ssp_write_reg(ssp
, SSCR1
, val
);
725 case SNDRV_PCM_TRIGGER_SUSPEND
:
726 ssp_disable(&priv
->dev
);
728 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
729 val
= ssp_read_reg(ssp
, SSCR1
);
730 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
734 ssp_write_reg(ssp
, SSCR1
, val
);
746 static int pxa_ssp_probe(struct platform_device
*pdev
,
747 struct snd_soc_dai
*dai
)
749 struct ssp_priv
*priv
;
752 priv
= kzalloc(sizeof(struct ssp_priv
), GFP_KERNEL
);
756 priv
->dev
.ssp
= ssp_request(dai
->id
, "SoC audio");
757 if (priv
->dev
.ssp
== NULL
) {
762 dai
->private_data
= priv
;
771 static void pxa_ssp_remove(struct platform_device
*pdev
,
772 struct snd_soc_dai
*dai
)
774 struct ssp_priv
*priv
= dai
->private_data
;
775 ssp_free(priv
->dev
.ssp
);
778 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
779 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
780 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
781 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
783 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
784 SNDRV_PCM_FMTBIT_S24_LE | \
785 SNDRV_PCM_FMTBIT_S32_LE)
787 struct snd_soc_dai pxa_ssp_dai
[] = {
789 .name
= "pxa2xx-ssp1",
791 .probe
= pxa_ssp_probe
,
792 .remove
= pxa_ssp_remove
,
793 .suspend
= pxa_ssp_suspend
,
794 .resume
= pxa_ssp_resume
,
798 .rates
= PXA_SSP_RATES
,
799 .formats
= PXA_SSP_FORMATS
,
804 .rates
= PXA_SSP_RATES
,
805 .formats
= PXA_SSP_FORMATS
,
808 .startup
= pxa_ssp_startup
,
809 .shutdown
= pxa_ssp_shutdown
,
810 .trigger
= pxa_ssp_trigger
,
811 .hw_params
= pxa_ssp_hw_params
,
812 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
813 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
814 .set_pll
= pxa_ssp_set_dai_pll
,
815 .set_fmt
= pxa_ssp_set_dai_fmt
,
816 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
817 .set_tristate
= pxa_ssp_set_dai_tristate
,
820 { .name
= "pxa2xx-ssp2",
822 .probe
= pxa_ssp_probe
,
823 .remove
= pxa_ssp_remove
,
824 .suspend
= pxa_ssp_suspend
,
825 .resume
= pxa_ssp_resume
,
829 .rates
= PXA_SSP_RATES
,
830 .formats
= PXA_SSP_FORMATS
,
835 .rates
= PXA_SSP_RATES
,
836 .formats
= PXA_SSP_FORMATS
,
839 .startup
= pxa_ssp_startup
,
840 .shutdown
= pxa_ssp_shutdown
,
841 .trigger
= pxa_ssp_trigger
,
842 .hw_params
= pxa_ssp_hw_params
,
843 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
844 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
845 .set_pll
= pxa_ssp_set_dai_pll
,
846 .set_fmt
= pxa_ssp_set_dai_fmt
,
847 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
848 .set_tristate
= pxa_ssp_set_dai_tristate
,
852 .name
= "pxa2xx-ssp3",
854 .probe
= pxa_ssp_probe
,
855 .remove
= pxa_ssp_remove
,
856 .suspend
= pxa_ssp_suspend
,
857 .resume
= pxa_ssp_resume
,
861 .rates
= PXA_SSP_RATES
,
862 .formats
= PXA_SSP_FORMATS
,
867 .rates
= PXA_SSP_RATES
,
868 .formats
= PXA_SSP_FORMATS
,
871 .startup
= pxa_ssp_startup
,
872 .shutdown
= pxa_ssp_shutdown
,
873 .trigger
= pxa_ssp_trigger
,
874 .hw_params
= pxa_ssp_hw_params
,
875 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
876 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
877 .set_pll
= pxa_ssp_set_dai_pll
,
878 .set_fmt
= pxa_ssp_set_dai_fmt
,
879 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
880 .set_tristate
= pxa_ssp_set_dai_tristate
,
884 .name
= "pxa2xx-ssp4",
886 .probe
= pxa_ssp_probe
,
887 .remove
= pxa_ssp_remove
,
888 .suspend
= pxa_ssp_suspend
,
889 .resume
= pxa_ssp_resume
,
893 .rates
= PXA_SSP_RATES
,
894 .formats
= PXA_SSP_FORMATS
,
899 .rates
= PXA_SSP_RATES
,
900 .formats
= PXA_SSP_FORMATS
,
903 .startup
= pxa_ssp_startup
,
904 .shutdown
= pxa_ssp_shutdown
,
905 .trigger
= pxa_ssp_trigger
,
906 .hw_params
= pxa_ssp_hw_params
,
907 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
908 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
909 .set_pll
= pxa_ssp_set_dai_pll
,
910 .set_fmt
= pxa_ssp_set_dai_fmt
,
911 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
912 .set_tristate
= pxa_ssp_set_dai_tristate
,
916 EXPORT_SYMBOL_GPL(pxa_ssp_dai
);
918 /* Module information */
919 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
920 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
921 MODULE_LICENSE("GPL");