2 * pxa-ssp.c -- ALSA Soc Audio Layer
4 * Copyright 2005,2008 Wolfson Microelectronics PLC.
5 * Author: Liam Girdwood
6 * Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 * o Test network mode for > 16bit sample size
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/clk.h>
25 #include <sound/core.h>
26 #include <sound/pcm.h>
27 #include <sound/initval.h>
28 #include <sound/pcm_params.h>
29 #include <sound/soc.h>
30 #include <sound/pxa2xx-lib.h>
32 #include <mach/hardware.h>
34 #include <mach/regs-ssp.h>
35 #include <mach/audio.h>
38 #include "pxa2xx-pcm.h"
42 * SSP audio private data
49 struct ssp_state state
;
53 static void dump_registers(struct ssp_device
*ssp
)
55 dev_dbg(&ssp
->pdev
->dev
, "SSCR0 0x%08x SSCR1 0x%08x SSTO 0x%08x\n",
56 ssp_read_reg(ssp
, SSCR0
), ssp_read_reg(ssp
, SSCR1
),
57 ssp_read_reg(ssp
, SSTO
));
59 dev_dbg(&ssp
->pdev
->dev
, "SSPSP 0x%08x SSSR 0x%08x SSACD 0x%08x\n",
60 ssp_read_reg(ssp
, SSPSP
), ssp_read_reg(ssp
, SSSR
),
61 ssp_read_reg(ssp
, SSACD
));
64 struct pxa2xx_pcm_dma_data
{
65 struct pxa2xx_pcm_dma_params params
;
69 static struct pxa2xx_pcm_dma_params
*
70 ssp_get_dma_params(struct ssp_device
*ssp
, int width4
, int out
)
72 struct pxa2xx_pcm_dma_data
*dma
;
74 dma
= kzalloc(sizeof(struct pxa2xx_pcm_dma_data
), GFP_KERNEL
);
78 snprintf(dma
->name
, 20, "SSP%d PCM %s %s", ssp
->port_id
,
79 width4
? "32-bit" : "16-bit", out
? "out" : "in");
81 dma
->params
.name
= dma
->name
;
82 dma
->params
.drcmr
= &DRCMR(out
? ssp
->drcmr_tx
: ssp
->drcmr_rx
);
83 dma
->params
.dcmd
= (out
? (DCMD_INCSRCADDR
| DCMD_FLOWTRG
) :
84 (DCMD_INCTRGADDR
| DCMD_FLOWSRC
)) |
85 (width4
? DCMD_WIDTH4
: DCMD_WIDTH2
) | DCMD_BURST16
;
86 dma
->params
.dev_addr
= ssp
->phys_base
+ SSDR
;
91 static int pxa_ssp_startup(struct snd_pcm_substream
*substream
,
92 struct snd_soc_dai
*dai
)
94 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
95 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
96 struct ssp_priv
*priv
= cpu_dai
->private_data
;
99 if (!cpu_dai
->active
) {
100 priv
->dev
.port
= cpu_dai
->id
+ 1;
101 priv
->dev
.irq
= NO_IRQ
;
102 clk_enable(priv
->dev
.ssp
->clk
);
103 ssp_disable(&priv
->dev
);
106 if (cpu_dai
->dma_data
) {
107 kfree(cpu_dai
->dma_data
);
108 cpu_dai
->dma_data
= NULL
;
113 static void pxa_ssp_shutdown(struct snd_pcm_substream
*substream
,
114 struct snd_soc_dai
*dai
)
116 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
117 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
118 struct ssp_priv
*priv
= cpu_dai
->private_data
;
120 if (!cpu_dai
->active
) {
121 ssp_disable(&priv
->dev
);
122 clk_disable(priv
->dev
.ssp
->clk
);
125 if (cpu_dai
->dma_data
) {
126 kfree(cpu_dai
->dma_data
);
127 cpu_dai
->dma_data
= NULL
;
133 static int pxa_ssp_suspend(struct snd_soc_dai
*cpu_dai
)
135 struct ssp_priv
*priv
= cpu_dai
->private_data
;
137 if (!cpu_dai
->active
)
138 clk_enable(priv
->dev
.ssp
->clk
);
140 ssp_save_state(&priv
->dev
, &priv
->state
);
141 clk_disable(priv
->dev
.ssp
->clk
);
146 static int pxa_ssp_resume(struct snd_soc_dai
*cpu_dai
)
148 struct ssp_priv
*priv
= cpu_dai
->private_data
;
150 clk_enable(priv
->dev
.ssp
->clk
);
151 ssp_restore_state(&priv
->dev
, &priv
->state
);
154 ssp_enable(&priv
->dev
);
156 clk_disable(priv
->dev
.ssp
->clk
);
162 #define pxa_ssp_suspend NULL
163 #define pxa_ssp_resume NULL
167 * ssp_set_clkdiv - set SSP clock divider
168 * @div: serial clock rate divider
170 static void ssp_set_scr(struct ssp_device
*ssp
, u32 div
)
172 u32 sscr0
= ssp_read_reg(ssp
, SSCR0
);
174 if (cpu_is_pxa25x() && ssp
->type
== PXA25x_SSP
) {
175 sscr0
&= ~0x0000ff00;
176 sscr0
|= ((div
- 2)/2) << 8; /* 2..512 */
178 sscr0
&= ~0x000fff00;
179 sscr0
|= (div
- 1) << 8; /* 1..4096 */
181 ssp_write_reg(ssp
, SSCR0
, sscr0
);
185 * ssp_get_clkdiv - get SSP clock divider
187 static u32
ssp_get_scr(struct ssp_device
*ssp
)
189 u32 sscr0
= ssp_read_reg(ssp
, SSCR0
);
192 if (cpu_is_pxa25x() && ssp
->type
== PXA25x_SSP
)
193 div
= ((sscr0
>> 8) & 0xff) * 2 + 2;
195 div
= ((sscr0
>> 8) & 0xfff) + 1;
200 * Set the SSP ports SYSCLK.
202 static int pxa_ssp_set_dai_sysclk(struct snd_soc_dai
*cpu_dai
,
203 int clk_id
, unsigned int freq
, int dir
)
205 struct ssp_priv
*priv
= cpu_dai
->private_data
;
206 struct ssp_device
*ssp
= priv
->dev
.ssp
;
209 u32 sscr0
= ssp_read_reg(ssp
, SSCR0
) &
210 ~(SSCR0_ECS
| SSCR0_NCS
| SSCR0_MOD
| SSCR0_ACS
);
212 dev_dbg(&ssp
->pdev
->dev
,
213 "pxa_ssp_set_dai_sysclk id: %d, clk_id %d, freq %u\n",
214 cpu_dai
->id
, clk_id
, freq
);
217 case PXA_SSP_CLK_NET_PLL
:
220 case PXA_SSP_CLK_PLL
:
221 /* Internal PLL is fixed */
223 priv
->sysclk
= 1843200;
225 priv
->sysclk
= 13000000;
227 case PXA_SSP_CLK_EXT
:
231 case PXA_SSP_CLK_NET
:
233 sscr0
|= SSCR0_NCS
| SSCR0_MOD
;
235 case PXA_SSP_CLK_AUDIO
:
244 /* The SSP clock must be disabled when changing SSP clock mode
245 * on PXA2xx. On PXA3xx it must be enabled when doing so. */
246 if (!cpu_is_pxa3xx())
247 clk_disable(priv
->dev
.ssp
->clk
);
248 val
= ssp_read_reg(ssp
, SSCR0
) | sscr0
;
249 ssp_write_reg(ssp
, SSCR0
, val
);
250 if (!cpu_is_pxa3xx())
251 clk_enable(priv
->dev
.ssp
->clk
);
257 * Set the SSP clock dividers.
259 static int pxa_ssp_set_dai_clkdiv(struct snd_soc_dai
*cpu_dai
,
262 struct ssp_priv
*priv
= cpu_dai
->private_data
;
263 struct ssp_device
*ssp
= priv
->dev
.ssp
;
267 case PXA_SSP_AUDIO_DIV_ACDS
:
268 val
= (ssp_read_reg(ssp
, SSACD
) & ~0x7) | SSACD_ACDS(div
);
269 ssp_write_reg(ssp
, SSACD
, val
);
271 case PXA_SSP_AUDIO_DIV_SCDB
:
272 val
= ssp_read_reg(ssp
, SSACD
);
274 #if defined(CONFIG_PXA3xx)
279 case PXA_SSP_CLK_SCDB_1
:
282 case PXA_SSP_CLK_SCDB_4
:
284 #if defined(CONFIG_PXA3xx)
285 case PXA_SSP_CLK_SCDB_8
:
295 ssp_write_reg(ssp
, SSACD
, val
);
297 case PXA_SSP_DIV_SCR
:
298 ssp_set_scr(ssp
, div
);
308 * Configure the PLL frequency pxa27x and (afaik - pxa320 only)
310 static int pxa_ssp_set_dai_pll(struct snd_soc_dai
*cpu_dai
, int pll_id
,
311 int source
, unsigned int freq_in
, unsigned int freq_out
)
313 struct ssp_priv
*priv
= cpu_dai
->private_data
;
314 struct ssp_device
*ssp
= priv
->dev
.ssp
;
315 u32 ssacd
= ssp_read_reg(ssp
, SSACD
) & ~0x70;
317 #if defined(CONFIG_PXA3xx)
319 ssp_write_reg(ssp
, SSACDD
, 0);
346 /* PXA3xx has a clock ditherer which can be used to generate
347 * a wider range of frequencies - calculate a value for it.
349 if (cpu_is_pxa3xx()) {
353 do_div(tmp
, freq_out
);
356 val
= (val
<< 16) | 64;
357 ssp_write_reg(ssp
, SSACDD
, val
);
361 dev_dbg(&ssp
->pdev
->dev
,
362 "Using SSACDD %x to supply %uHz\n",
371 ssp_write_reg(ssp
, SSACD
, ssacd
);
377 * Set the active slots in TDM/Network mode
379 static int pxa_ssp_set_dai_tdm_slot(struct snd_soc_dai
*cpu_dai
,
380 unsigned int tx_mask
, unsigned int rx_mask
, int slots
, int slot_width
)
382 struct ssp_priv
*priv
= cpu_dai
->private_data
;
383 struct ssp_device
*ssp
= priv
->dev
.ssp
;
386 sscr0
= ssp_read_reg(ssp
, SSCR0
);
387 sscr0
&= ~(SSCR0_MOD
| SSCR0_SlotsPerFrm(8) | SSCR0_EDSS
| SSCR0_DSS
);
391 sscr0
|= SSCR0_EDSS
| SSCR0_DataSize(slot_width
- 16);
393 sscr0
|= SSCR0_DataSize(slot_width
);
396 /* enable network mode */
399 /* set number of active slots */
400 sscr0
|= SSCR0_SlotsPerFrm(slots
);
402 /* set active slot mask */
403 ssp_write_reg(ssp
, SSTSA
, tx_mask
);
404 ssp_write_reg(ssp
, SSRSA
, rx_mask
);
406 ssp_write_reg(ssp
, SSCR0
, sscr0
);
412 * Tristate the SSP DAI lines
414 static int pxa_ssp_set_dai_tristate(struct snd_soc_dai
*cpu_dai
,
417 struct ssp_priv
*priv
= cpu_dai
->private_data
;
418 struct ssp_device
*ssp
= priv
->dev
.ssp
;
421 sscr1
= ssp_read_reg(ssp
, SSCR1
);
426 ssp_write_reg(ssp
, SSCR1
, sscr1
);
432 * Set up the SSP DAI format.
433 * The SSP Port must be inactive before calling this function as the
434 * physical interface format is changed.
436 static int pxa_ssp_set_dai_fmt(struct snd_soc_dai
*cpu_dai
,
439 struct ssp_priv
*priv
= cpu_dai
->private_data
;
440 struct ssp_device
*ssp
= priv
->dev
.ssp
;
445 /* check if we need to change anything at all */
446 if (priv
->dai_fmt
== fmt
)
449 /* we can only change the settings if the port is not in use */
450 if (ssp_read_reg(ssp
, SSCR0
) & SSCR0_SSE
) {
451 dev_err(&ssp
->pdev
->dev
,
452 "can't change hardware dai format: stream is in use");
456 /* reset port settings */
457 sscr0
= ssp_read_reg(ssp
, SSCR0
) &
458 (SSCR0_ECS
| SSCR0_NCS
| SSCR0_MOD
| SSCR0_ACS
);
459 sscr1
= SSCR1_RxTresh(8) | SSCR1_TxTresh(7);
462 switch (fmt
& SND_SOC_DAIFMT_MASTER_MASK
) {
463 case SND_SOC_DAIFMT_CBM_CFM
:
464 sscr1
|= SSCR1_SCLKDIR
| SSCR1_SFRMDIR
;
466 case SND_SOC_DAIFMT_CBM_CFS
:
467 sscr1
|= SSCR1_SCLKDIR
;
469 case SND_SOC_DAIFMT_CBS_CFS
:
475 switch (fmt
& SND_SOC_DAIFMT_INV_MASK
) {
476 case SND_SOC_DAIFMT_NB_NF
:
477 sspsp
|= SSPSP_SFRMP
;
479 case SND_SOC_DAIFMT_NB_IF
:
481 case SND_SOC_DAIFMT_IB_IF
:
482 sspsp
|= SSPSP_SCMODE(2);
484 case SND_SOC_DAIFMT_IB_NF
:
485 sspsp
|= SSPSP_SCMODE(2) | SSPSP_SFRMP
;
491 switch (fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
492 case SND_SOC_DAIFMT_I2S
:
494 sscr1
|= SSCR1_RWOT
| SSCR1_TRAIL
;
495 /* See hw_params() */
498 case SND_SOC_DAIFMT_DSP_A
:
500 case SND_SOC_DAIFMT_DSP_B
:
501 sscr0
|= SSCR0_MOD
| SSCR0_PSP
;
502 sscr1
|= SSCR1_TRAIL
| SSCR1_RWOT
;
509 ssp_write_reg(ssp
, SSCR0
, sscr0
);
510 ssp_write_reg(ssp
, SSCR1
, sscr1
);
511 ssp_write_reg(ssp
, SSPSP
, sspsp
);
515 /* Since we are configuring the timings for the format by hand
516 * we have to defer some things until hw_params() where we
517 * know parameters like the sample size.
525 * Set the SSP audio DMA parameters and sample size.
526 * Can be called multiple times by oss emulation.
528 static int pxa_ssp_hw_params(struct snd_pcm_substream
*substream
,
529 struct snd_pcm_hw_params
*params
,
530 struct snd_soc_dai
*dai
)
532 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
533 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
534 struct ssp_priv
*priv
= cpu_dai
->private_data
;
535 struct ssp_device
*ssp
= priv
->dev
.ssp
;
536 int chn
= params_channels(params
);
539 int width
= snd_pcm_format_physical_width(params_format(params
));
540 int ttsa
= ssp_read_reg(ssp
, SSTSA
) & 0xf;
542 /* generate correct DMA params */
543 if (cpu_dai
->dma_data
)
544 kfree(cpu_dai
->dma_data
);
546 /* Network mode with one active slot (ttsa == 1) can be used
547 * to force 16-bit frame width on the wire (for S16_LE), even
548 * with two channels. Use 16-bit DMA transfers for this case.
550 cpu_dai
->dma_data
= ssp_get_dma_params(ssp
,
551 ((chn
== 2) && (ttsa
!= 1)) || (width
== 32),
552 substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
);
554 /* we can only change the settings if the port is not in use */
555 if (ssp_read_reg(ssp
, SSCR0
) & SSCR0_SSE
)
558 /* clear selected SSP bits */
559 sscr0
= ssp_read_reg(ssp
, SSCR0
) & ~(SSCR0_DSS
| SSCR0_EDSS
);
560 ssp_write_reg(ssp
, SSCR0
, sscr0
);
563 sscr0
= ssp_read_reg(ssp
, SSCR0
);
564 switch (params_format(params
)) {
565 case SNDRV_PCM_FORMAT_S16_LE
:
568 sscr0
|= SSCR0_FPCKE
;
570 sscr0
|= SSCR0_DataSize(16);
572 case SNDRV_PCM_FORMAT_S24_LE
:
573 sscr0
|= (SSCR0_EDSS
| SSCR0_DataSize(8));
575 case SNDRV_PCM_FORMAT_S32_LE
:
576 sscr0
|= (SSCR0_EDSS
| SSCR0_DataSize(16));
579 ssp_write_reg(ssp
, SSCR0
, sscr0
);
581 switch (priv
->dai_fmt
& SND_SOC_DAIFMT_FORMAT_MASK
) {
582 case SND_SOC_DAIFMT_I2S
:
583 sspsp
= ssp_read_reg(ssp
, SSPSP
);
585 if ((ssp_get_scr(ssp
) == 4) && (width
== 16)) {
586 /* This is a special case where the bitclk is 64fs
587 * and we're not dealing with 2*32 bits of audio
590 * The SSP values used for that are all found out by
591 * trying and failing a lot; some of the registers
592 * needed for that mode are only available on PXA3xx.
596 if (!cpu_is_pxa3xx())
599 sspsp
|= SSPSP_SFRMWDTH(width
* 2);
600 sspsp
|= SSPSP_SFRMDLY(width
* 4);
601 sspsp
|= SSPSP_EDMYSTOP(3);
602 sspsp
|= SSPSP_DMYSTOP(3);
603 sspsp
|= SSPSP_DMYSTRT(1);
608 /* The frame width is the width the LRCLK is
609 * asserted for; the delay is expressed in
610 * half cycle units. We need the extra cycle
611 * because the data starts clocking out one BCLK
612 * after LRCLK changes polarity.
614 sspsp
|= SSPSP_SFRMWDTH(width
+ 1);
615 sspsp
|= SSPSP_SFRMDLY((width
+ 1) * 2);
616 sspsp
|= SSPSP_DMYSTRT(1);
619 ssp_write_reg(ssp
, SSPSP
, sspsp
);
625 /* When we use a network mode, we always require TDM slots
626 * - complain loudly and fail if they've not been set up yet.
628 if ((sscr0
& SSCR0_MOD
) && !ttsa
) {
629 dev_err(&ssp
->pdev
->dev
, "No TDM timeslot configured\n");
638 static int pxa_ssp_trigger(struct snd_pcm_substream
*substream
, int cmd
,
639 struct snd_soc_dai
*dai
)
641 struct snd_soc_pcm_runtime
*rtd
= substream
->private_data
;
642 struct snd_soc_dai
*cpu_dai
= rtd
->dai
->cpu_dai
;
644 struct ssp_priv
*priv
= cpu_dai
->private_data
;
645 struct ssp_device
*ssp
= priv
->dev
.ssp
;
649 case SNDRV_PCM_TRIGGER_RESUME
:
650 ssp_enable(&priv
->dev
);
652 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE
:
653 val
= ssp_read_reg(ssp
, SSCR1
);
654 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
658 ssp_write_reg(ssp
, SSCR1
, val
);
659 val
= ssp_read_reg(ssp
, SSSR
);
660 ssp_write_reg(ssp
, SSSR
, val
);
662 case SNDRV_PCM_TRIGGER_START
:
663 val
= ssp_read_reg(ssp
, SSCR1
);
664 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
668 ssp_write_reg(ssp
, SSCR1
, val
);
669 ssp_enable(&priv
->dev
);
671 case SNDRV_PCM_TRIGGER_STOP
:
672 val
= ssp_read_reg(ssp
, SSCR1
);
673 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
677 ssp_write_reg(ssp
, SSCR1
, val
);
679 case SNDRV_PCM_TRIGGER_SUSPEND
:
680 ssp_disable(&priv
->dev
);
682 case SNDRV_PCM_TRIGGER_PAUSE_PUSH
:
683 val
= ssp_read_reg(ssp
, SSCR1
);
684 if (substream
->stream
== SNDRV_PCM_STREAM_PLAYBACK
)
688 ssp_write_reg(ssp
, SSCR1
, val
);
700 static int pxa_ssp_probe(struct platform_device
*pdev
,
701 struct snd_soc_dai
*dai
)
703 struct ssp_priv
*priv
;
706 priv
= kzalloc(sizeof(struct ssp_priv
), GFP_KERNEL
);
710 priv
->dev
.ssp
= ssp_request(dai
->id
+ 1, "SoC audio");
711 if (priv
->dev
.ssp
== NULL
) {
716 priv
->dai_fmt
= (unsigned int) -1;
717 dai
->private_data
= priv
;
726 static void pxa_ssp_remove(struct platform_device
*pdev
,
727 struct snd_soc_dai
*dai
)
729 struct ssp_priv
*priv
= dai
->private_data
;
730 ssp_free(priv
->dev
.ssp
);
733 #define PXA_SSP_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
734 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | \
735 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 | \
736 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
738 #define PXA_SSP_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
739 SNDRV_PCM_FMTBIT_S24_LE | \
740 SNDRV_PCM_FMTBIT_S32_LE)
742 static struct snd_soc_dai_ops pxa_ssp_dai_ops
= {
743 .startup
= pxa_ssp_startup
,
744 .shutdown
= pxa_ssp_shutdown
,
745 .trigger
= pxa_ssp_trigger
,
746 .hw_params
= pxa_ssp_hw_params
,
747 .set_sysclk
= pxa_ssp_set_dai_sysclk
,
748 .set_clkdiv
= pxa_ssp_set_dai_clkdiv
,
749 .set_pll
= pxa_ssp_set_dai_pll
,
750 .set_fmt
= pxa_ssp_set_dai_fmt
,
751 .set_tdm_slot
= pxa_ssp_set_dai_tdm_slot
,
752 .set_tristate
= pxa_ssp_set_dai_tristate
,
755 struct snd_soc_dai pxa_ssp_dai
[] = {
757 .name
= "pxa2xx-ssp1",
759 .probe
= pxa_ssp_probe
,
760 .remove
= pxa_ssp_remove
,
761 .suspend
= pxa_ssp_suspend
,
762 .resume
= pxa_ssp_resume
,
766 .rates
= PXA_SSP_RATES
,
767 .formats
= PXA_SSP_FORMATS
,
772 .rates
= PXA_SSP_RATES
,
773 .formats
= PXA_SSP_FORMATS
,
775 .ops
= &pxa_ssp_dai_ops
,
777 { .name
= "pxa2xx-ssp2",
779 .probe
= pxa_ssp_probe
,
780 .remove
= pxa_ssp_remove
,
781 .suspend
= pxa_ssp_suspend
,
782 .resume
= pxa_ssp_resume
,
786 .rates
= PXA_SSP_RATES
,
787 .formats
= PXA_SSP_FORMATS
,
792 .rates
= PXA_SSP_RATES
,
793 .formats
= PXA_SSP_FORMATS
,
795 .ops
= &pxa_ssp_dai_ops
,
798 .name
= "pxa2xx-ssp3",
800 .probe
= pxa_ssp_probe
,
801 .remove
= pxa_ssp_remove
,
802 .suspend
= pxa_ssp_suspend
,
803 .resume
= pxa_ssp_resume
,
807 .rates
= PXA_SSP_RATES
,
808 .formats
= PXA_SSP_FORMATS
,
813 .rates
= PXA_SSP_RATES
,
814 .formats
= PXA_SSP_FORMATS
,
816 .ops
= &pxa_ssp_dai_ops
,
819 .name
= "pxa2xx-ssp4",
821 .probe
= pxa_ssp_probe
,
822 .remove
= pxa_ssp_remove
,
823 .suspend
= pxa_ssp_suspend
,
824 .resume
= pxa_ssp_resume
,
828 .rates
= PXA_SSP_RATES
,
829 .formats
= PXA_SSP_FORMATS
,
834 .rates
= PXA_SSP_RATES
,
835 .formats
= PXA_SSP_FORMATS
,
837 .ops
= &pxa_ssp_dai_ops
,
840 EXPORT_SYMBOL_GPL(pxa_ssp_dai
);
842 static int __init
pxa_ssp_init(void)
844 return snd_soc_register_dais(pxa_ssp_dai
, ARRAY_SIZE(pxa_ssp_dai
));
846 module_init(pxa_ssp_init
);
848 static void __exit
pxa_ssp_exit(void)
850 snd_soc_unregister_dais(pxa_ssp_dai
, ARRAY_SIZE(pxa_ssp_dai
));
852 module_exit(pxa_ssp_exit
);
854 /* Module information */
855 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
856 MODULE_DESCRIPTION("PXA SSP/PCM SoC Interface");
857 MODULE_LICENSE("GPL");